2 * Copyright (c) 1993 The Regents of the University of California.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
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11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by the University of
16 * California, Berkeley and its contributors.
17 * 4. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * $FreeBSD: src/sys/i386/i386/support.s,v 1.67.2.5 2001/08/15 01:23:50 peter Exp $
34 * $DragonFly: src/sys/platform/pc32/i386/support.s,v 1.7 2003/07/01 20:30:40 dillon Exp $
39 #include <machine/asmacros.h>
40 #include <machine/cputypes.h>
41 #include <machine/pmap.h>
42 #include <machine/specialreg.h>
64 #if defined(I586_CPU) && NNPX > 0
74 * void bzero(void *buf, u_int len)
99 * do 64 byte chunks first
101 * XXX this is probably over-unrolled at least for DX2's
158 * a jump table seems to be faster than a loop or more range reductions
160 * XXX need a const section for non-text
195 #if defined(I586_CPU) && NNPX > 0
201 * The FPU register method is twice as fast as the integer register
202 * method unless the target is in the L1 cache and we pre-allocate a
203 * cache line for it (then the integer register method is 4-5 times
204 * faster). However, we never pre-allocate cache lines, since that
205 * would make the integer method 25% or more slower for the common
206 * case when the target isn't in either the L1 cache or the L2 cache.
207 * Thus we normally use the FPU register method unless the overhead
208 * would be too large.
210 cmpl $256,%ecx /* empirical; clts, fninit, smsw cost a lot */
214 * The FPU registers may belong to an application or to fastmove()
215 * or to another invocation of bcopy() or ourself in a higher level
216 * interrupt or trap handler. Preserving the registers is
217 * complicated since we avoid it if possible at all levels. We
218 * want to localize the complications even when that increases them.
219 * Here the extra work involves preserving CR0_TS in TS.
220 * `npxthread != NULL' is supposed to be the condition that all the
221 * FPU resources belong to an application, but npxthread and CR0_TS
222 * aren't set atomically enough for this condition to work in
223 * interrupt handlers.
225 * Case 1: FPU registers belong to the application: we must preserve
226 * the registers if we use them, so we only use the FPU register
227 * method if the target size is large enough to amortize the extra
228 * overhead for preserving them. CR0_TS must be preserved although
229 * it is very likely to end up as set.
231 * Case 2: FPU registers belong to fastmove(): fastmove() currently
232 * makes the registers look like they belong to an application so
233 * that cpu_switch() and savectx() don't have to know about it, so
234 * this case reduces to case 1.
236 * Case 3: FPU registers belong to the kernel: don't use the FPU
237 * register method. This case is unlikely, and supporting it would
238 * be more complicated and might take too much stack.
240 * Case 4: FPU registers don't belong to anyone: the FPU registers
241 * don't need to be preserved, so we always use the FPU register
242 * method. CR0_TS must be preserved although it is very likely to
243 * always end up as clear.
245 cmpl $0,PCPU(npxthread)
247 cmpl $256+184,%ecx /* empirical; not quite 2*108 more */
249 sarb $1,kernel_fpu_lock
258 sarb $1,kernel_fpu_lock
262 fninit /* XXX should avoid needing this */
267 * Align to an 8 byte boundary (misalignment in the main loop would
268 * cost a factor of >= 2). Avoid jumps (at little cost if it is
269 * already aligned) by always zeroing 8 bytes and using the part up
270 * to the _next_ alignment position.
273 addl %edx,%ecx /* part of %ecx -= new_%edx - %edx */
279 * Similarly align `len' to a multiple of 8.
286 * This wouldn't be any faster if it were unrolled, since the loop
287 * control instructions are much faster than the fstl and/or done
288 * in parallel with it so their overhead is insignificant.
290 fpureg_i586_bzero_loop:
295 jae fpureg_i586_bzero_loop
297 cmpl $0,PCPU(npxthread)
302 movb $0xfe,kernel_fpu_lock
308 movb $0xfe,kernel_fpu_lock
313 * `rep stos' seems to be the best method in practice for small
314 * counts. Fancy methods usually take too long to start up due
315 * to cache and BTB misses.
335 #endif /* I586_CPU && NNPX > 0 */
387 /* fillw(pat, base, cnt) */
407 cmpl %ecx,%eax /* overlapping && src < dst? */
409 cld /* nope, copy forwards */
418 addl %ecx,%edi /* copy backwards. */
439 * generic_bcopy(src, dst, cnt)
440 * ws@tools.de (Wolfgang Solfrank, TooLs GmbH) +49-228-985800
451 cmpl %ecx,%eax /* overlapping && src < dst? */
454 shrl $2,%ecx /* copy by 32-bit words */
455 cld /* nope, copy forwards */
459 andl $3,%ecx /* any bytes left? */
468 addl %ecx,%edi /* copy backwards */
472 andl $3,%ecx /* any fractional bytes? */
476 movl 20(%esp),%ecx /* copy remainder by 32-bit words */
487 #if defined(I586_CPU) && NNPX > 0
497 cmpl %ecx,%eax /* overlapping && src < dst? */
503 sarb $1,kernel_fpu_lock
505 cmpl $0,PCPU(npxthread)
516 fninit /* XXX should avoid needing this */
521 #define DCACHE_SIZE 8192
522 cmpl $(DCACHE_SIZE-512)/2,%ecx
524 movl $(DCACHE_SIZE-512)/2,%ecx
528 jb 5f /* XXX should prefetch if %ecx >= 32 */
549 large_i586_bcopy_loop:
570 jae large_i586_bcopy_loop
576 cmpl $0,PCPU(npxthread)
582 movb $0xfe,kernel_fpu_lock
585 * This is a duplicate of the main part of generic_bcopy. See the comments
586 * there. Jumping into generic_bcopy would cost a whole 0-1 cycles and
587 * would mess up high resolution profiling.
623 #endif /* I586_CPU && NNPX > 0 */
626 * Note: memcpy does not support overlapping copies
635 shrl $2,%ecx /* copy by 32-bit words */
636 cld /* nope, copy forwards */
640 andl $3,%ecx /* any bytes left? */
648 /*****************************************************************************/
649 /* copyout and fubyte family */
650 /*****************************************************************************/
652 * Access user memory from inside the kernel. These routines and possibly
653 * the math- and DOS emulators should be the only places that do this.
655 * We have to access the memory with user's permissions, so use a segment
656 * selector with RPL 3. For writes to user space we have to additionally
657 * check the PTE for write permission, because the 386 does not check
658 * write permissions when we are executing with EPL 0. The 486 does check
659 * this if the WP bit is set in CR0, so we can use a simpler version here.
661 * These routines set curpcb->onfault for the time they execute. When a
662 * protection violation occurs inside the functions, the trap handler
663 * returns to *curpcb->onfault instead of the function.
667 * copyout(from_kernel, to_user, len) - MP SAFE (if not I386_CPU)
673 ENTRY(generic_copyout)
674 movl PCPU(curthread),%eax
675 movl TD_PCB(%eax),%eax
676 movl $copyout_fault,PCB_ONFAULT(%eax)
683 testl %ebx,%ebx /* anything to do? */
687 * Check explicitly for non-user addresses. If 486 write protection
688 * is being used, this check is essential because we are in kernel
689 * mode so the h/w does not provide any protection against writing
694 * First, prevent address wrapping.
700 * XXX STOP USING VM_MAXUSER_ADDRESS.
701 * It is an end address, not a max, so every time it is used correctly it
702 * looks like there is an off by one error, and of course it caused an off
703 * by one error in several places.
705 cmpl $VM_MAXUSER_ADDRESS,%eax
708 #if defined(I386_CPU)
710 #if defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)
711 cmpl $CPUCLASS_386,_cpu_class
715 * We have to check each PTE for user write permission.
716 * The checking may cause a page fault, so it is important to set
717 * up everything for return via copyout_fault before here.
719 /* compute number of pages */
724 shrl $IDXSHIFT+2,%ecx
727 /* compute PTE offset for start address */
733 /* check PTE for each page */
734 leal PTmap(%edx),%eax
737 testb $PG_V,PTmap(%eax) /* PTE page must be valid */
740 andb $PG_V|PG_RW|PG_U,%al /* page must be valid and user writable */
741 cmpb $PG_V|PG_RW|PG_U,%al
745 /* simulate a trap */
750 call trapwrite /* trapwrite(addr) */
755 testl %eax,%eax /* if not ok, return EFAULT */
761 jnz 1b /* check next page */
762 #endif /* I386_CPU */
764 /* bcopy(%esi, %edi, %ebx) */
768 #if defined(I586_CPU) && NNPX > 0
786 movl PCPU(curthread),%edx
787 movl TD_PCB(%edx),%edx
788 movl %eax,PCB_ONFAULT(%edx)
796 movl PCPU(curthread),%edx
797 movl TD_PCB(%edx),%edx
798 movl $0,PCB_ONFAULT(%edx)
802 #if defined(I586_CPU) && NNPX > 0
805 * Duplicated from generic_copyout. Could be done a bit better.
807 movl PCPU(curthread),%eax
808 movl TD_PCB(%eax),%eax
809 movl $copyout_fault,PCB_ONFAULT(%eax)
816 testl %ebx,%ebx /* anything to do? */
820 * Check explicitly for non-user addresses. If 486 write protection
821 * is being used, this check is essential because we are in kernel
822 * mode so the h/w does not provide any protection against writing
827 * First, prevent address wrapping.
833 * XXX STOP USING VM_MAXUSER_ADDRESS.
834 * It is an end address, not a max, so every time it is used correctly it
835 * looks like there is an off by one error, and of course it caused an off
836 * by one error in several places.
838 cmpl $VM_MAXUSER_ADDRESS,%eax
841 /* bcopy(%esi, %edi, %ebx) */
845 * End of duplicated code.
855 #endif /* I586_CPU && NNPX > 0 */
858 * copyin(from_user, to_kernel, len) - MP SAFE
864 ENTRY(generic_copyin)
865 movl PCPU(curthread),%eax
866 movl TD_PCB(%eax),%eax
867 movl $copyin_fault,PCB_ONFAULT(%eax)
870 movl 12(%esp),%esi /* caddr_t from */
871 movl 16(%esp),%edi /* caddr_t to */
872 movl 20(%esp),%ecx /* size_t len */
875 * make sure address is valid
880 cmpl $VM_MAXUSER_ADDRESS,%edx
883 #if defined(I586_CPU) && NNPX > 0
888 shrl $2,%ecx /* copy longword-wise */
893 andb $3,%cl /* copy remaining bytes */
897 #if defined(I586_CPU) && NNPX > 0
904 movl PCPU(curthread),%edx
905 movl TD_PCB(%edx),%edx
906 movl %eax,PCB_ONFAULT(%edx)
913 movl PCPU(curthread),%edx
914 movl TD_PCB(%edx),%edx
915 movl $0,PCB_ONFAULT(%edx)
919 #if defined(I586_CPU) && NNPX > 0
922 * Duplicated from generic_copyin. Could be done a bit better.
924 movl PCPU(curthread),%eax
925 movl TD_PCB(%eax),%eax
926 movl $copyin_fault,PCB_ONFAULT(%eax)
929 movl 12(%esp),%esi /* caddr_t from */
930 movl 16(%esp),%edi /* caddr_t to */
931 movl 20(%esp),%ecx /* size_t len */
934 * make sure address is valid
939 cmpl $VM_MAXUSER_ADDRESS,%edx
942 * End of duplicated code.
948 pushl %ebx /* XXX prepare for fastmove_fault */
953 #endif /* I586_CPU && NNPX > 0 */
955 #if defined(I586_CPU) && NNPX > 0
956 /* fastmove(src, dst, len)
959 len in %ecx XXX changed to on stack for profiling
960 uses %eax and %edx for tmp. storage
962 /* XXX use ENTRY() to get profiling. fastmove() is actually a non-entry. */
966 subl $PCB_SAVE87_SIZE+3*4,%esp
972 testl $7,%esi /* check if src addr is multiple of 8 */
975 testl $7,%edi /* check if dst addr is multiple of 8 */
978 /* if (npxthread != NULL) { */
979 cmpl $0,PCPU(npxthread)
981 /* fnsave(&curpcb->pcb_savefpu); */
982 movl PCPU(curthread),%eax
983 movl TD_PCB(%eax),%eax
984 fnsave PCB_SAVEFPU(%eax)
985 /* npxthread = NULL; */
986 movl $0,PCPU(npxthread)
989 /* now we own the FPU. */
992 * The process' FP state is saved in the pcb, but if we get
993 * switched, the cpu_switch() will store our FP state in the
994 * pcb. It should be possible to avoid all the copying for
995 * this, e.g., by setting a flag to tell cpu_switch() to
996 * save the state somewhere else.
998 /* tmp = curpcb->pcb_savefpu; */
1003 movl PCPU(curthread),%esi
1004 movl TD_PCB(%esi),%esi
1005 addl $PCB_SAVEFPU,%esi
1007 movl $PCB_SAVE87_SIZE>>2,%ecx
1013 /* stop_emulating(); */
1015 /* npxthread = curthread; */
1016 movl PCPU(curthread),%eax
1017 movl %eax,PCPU(npxthread)
1018 movl PCPU(curthread),%eax
1019 movl TD_PCB(%eax),%eax
1020 movl $fastmove_fault,PCB_ONFAULT(%eax)
1077 /* curpcb->pcb_savefpu = tmp; */
1081 movl PCPU(curthread),%edi
1082 movl TD_PCB(%edi),%edi
1083 addl $PCB_SAVEFPU,%edi
1086 movl $PCB_SAVE87_SIZE>>2,%ecx
1093 /* start_emulating(); */
1097 /* npxthread = NULL; */
1098 movl $0,PCPU(npxthread)
1102 movl PCPU(curthread),%eax
1103 movl TD_PCB(%eax),%eax
1104 movl $fastmove_tail_fault,PCB_ONFAULT(%eax)
1107 shrl $2,%ecx /* copy longword-wise */
1112 andb $3,%cl /* copy remaining bytes */
1122 movl PCPU(curthread),%edi
1123 movl TD_PCB(%edi),%edi
1124 addl $PCB_SAVEFPU,%edi
1127 movl $PCB_SAVE87_SIZE>>2,%ecx
1134 movl $0,PCPU(npxthread)
1136 fastmove_tail_fault:
1143 movl PCPU(curthread),%edx
1144 movl TD_PCB(%edx),%edx
1145 movl $0,PCB_ONFAULT(%edx)
1148 #endif /* I586_CPU && NNPX > 0 */
1151 * fu{byte,sword,word} - MP SAFE
1153 * Fetch a byte (sword, word) from user memory
1156 movl PCPU(curthread),%ecx
1157 movl TD_PCB(%ecx),%ecx
1158 movl $fusufault,PCB_ONFAULT(%ecx)
1159 movl 4(%esp),%edx /* from */
1161 cmpl $VM_MAXUSER_ADDRESS-4,%edx /* verify address is valid */
1165 movl $0,PCB_ONFAULT(%ecx)
1169 * These two routines are called from the profiling code, potentially
1170 * at interrupt time. If they fail, that's okay, good things will
1171 * happen later. Fail all the time for now - until the trap code is
1172 * able to deal with this.
1183 movl PCPU(curthread),%ecx
1184 movl TD_PCB(%ecx),%ecx
1185 movl $fusufault,PCB_ONFAULT(%ecx)
1188 cmpl $VM_MAXUSER_ADDRESS-2,%edx
1192 movl $0,PCB_ONFAULT(%ecx)
1199 movl PCPU(curthread),%ecx
1200 movl TD_PCB(%ecx),%ecx
1201 movl $fusufault,PCB_ONFAULT(%ecx)
1204 cmpl $VM_MAXUSER_ADDRESS-1,%edx
1208 movl $0,PCB_ONFAULT(%ecx)
1213 movl PCPU(curthread),%ecx
1214 movl TD_PCB(%ecx),%ecx
1216 movl %eax,PCB_ONFAULT(%ecx)
1221 * su{byte,sword,word} - MP SAFE (if not I386_CPU)
1223 * Write a byte (word, longword) to user memory
1226 movl PCPU(curthread),%ecx
1227 movl TD_PCB(%ecx),%ecx
1228 movl $fusufault,PCB_ONFAULT(%ecx)
1231 #if defined(I386_CPU)
1233 #if defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)
1234 cmpl $CPUCLASS_386,_cpu_class
1235 jne 2f /* we only have to set the right segment selector */
1236 #endif /* I486_CPU || I586_CPU || I686_CPU */
1238 /* XXX - page boundary crossing is still not handled */
1243 leal _PTmap(%edx),%ecx
1246 testb $PG_V,_PTmap(%ecx) /* PTE page must be valid */
1248 movb _PTmap(%edx),%dl
1249 andb $PG_V|PG_RW|PG_U,%dl /* page must be valid and user writable */
1250 cmpb $PG_V|PG_RW|PG_U,%dl
1254 /* simulate a trap */
1257 popl %edx /* remove junk parameter from stack */
1265 cmpl $VM_MAXUSER_ADDRESS-4,%edx /* verify address validity */
1271 movl PCPU(curthread),%ecx
1272 movl TD_PCB(%ecx),%ecx
1273 movl %eax,PCB_ONFAULT(%ecx)
1277 * susword - MP SAFE (if not I386_CPU)
1280 movl PCPU(curthread),%ecx
1281 movl TD_PCB(%ecx),%ecx
1282 movl $fusufault,PCB_ONFAULT(%ecx)
1285 #if defined(I386_CPU)
1287 #if defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)
1288 cmpl $CPUCLASS_386,_cpu_class
1290 #endif /* I486_CPU || I586_CPU || I686_CPU */
1292 /* XXX - page boundary crossing is still not handled */
1297 leal _PTmap(%edx),%ecx
1300 testb $PG_V,_PTmap(%ecx) /* PTE page must be valid */
1302 movb _PTmap(%edx),%dl
1303 andb $PG_V|PG_RW|PG_U,%dl /* page must be valid and user writable */
1304 cmpb $PG_V|PG_RW|PG_U,%dl
1308 /* simulate a trap */
1311 popl %edx /* remove junk parameter from stack */
1319 cmpl $VM_MAXUSER_ADDRESS-2,%edx /* verify address validity */
1325 movl PCPU(curthread),%ecx /* restore trashed register */
1326 movl TD_PCB(%ecx),%ecx
1327 movl %eax,PCB_ONFAULT(%ecx)
1331 * su[i]byte - MP SAFE (if not I386_CPU)
1335 movl PCPU(curthread),%ecx
1336 movl TD_PCB(%ecx),%ecx
1337 movl $fusufault,PCB_ONFAULT(%ecx)
1340 #if defined(I386_CPU)
1342 #if defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)
1343 cmpl $CPUCLASS_386,_cpu_class
1345 #endif /* I486_CPU || I586_CPU || I686_CPU */
1351 leal _PTmap(%edx),%ecx
1354 testb $PG_V,_PTmap(%ecx) /* PTE page must be valid */
1356 movb _PTmap(%edx),%dl
1357 andb $PG_V|PG_RW|PG_U,%dl /* page must be valid and user writable */
1358 cmpb $PG_V|PG_RW|PG_U,%dl
1362 /* simulate a trap */
1365 popl %edx /* remove junk parameter from stack */
1373 cmpl $VM_MAXUSER_ADDRESS-1,%edx /* verify address validity */
1379 movl PCPU(curthread),%ecx /* restore trashed register */
1380 movl TD_PCB(%ecx),%ecx
1381 movl %eax,PCB_ONFAULT(%ecx)
1385 * copyinstr(from, to, maxlen, int *lencopied) - MP SAFE
1387 * copy a string from from to to, stop when a 0 character is reached.
1388 * return ENAMETOOLONG if string is longer than maxlen, and
1389 * EFAULT on protection violations. If lencopied is non-zero,
1390 * return the actual length in *lencopied.
1395 movl PCPU(curthread),%ecx
1396 movl TD_PCB(%ecx),%ecx
1397 movl $cpystrflt,PCB_ONFAULT(%ecx)
1399 movl 12(%esp),%esi /* %esi = from */
1400 movl 16(%esp),%edi /* %edi = to */
1401 movl 20(%esp),%edx /* %edx = maxlen */
1403 movl $VM_MAXUSER_ADDRESS,%eax
1405 /* make sure 'from' is within bounds */
1409 /* restrict maxlen to <= VM_MAXUSER_ADDRESS-from */
1427 /* Success -- 0 byte reached */
1432 /* edx is zero - return ENAMETOOLONG or EFAULT */
1433 cmpl $VM_MAXUSER_ADDRESS,%esi
1436 movl $ENAMETOOLONG,%eax
1443 /* set *lencopied and return %eax */
1444 movl PCPU(curthread),%ecx
1445 movl TD_PCB(%ecx),%ecx
1446 movl $0,PCB_ONFAULT(%ecx)
1460 * copystr(from, to, maxlen, int *lencopied) - MP SAFE
1466 movl 12(%esp),%esi /* %esi = from */
1467 movl 16(%esp),%edi /* %edi = to */
1468 movl 20(%esp),%edx /* %edx = maxlen */
1479 /* Success -- 0 byte reached */
1484 /* edx is zero -- return ENAMETOOLONG */
1485 movl $ENAMETOOLONG,%eax
1488 /* set *lencopied and return %eax */
1510 cld /* compare forwards */
1529 * Handling of special 386 registers and descriptor tables etc
1531 /* void lgdt(struct region_descriptor *rdp); */
1533 /* reload the descriptor table */
1537 /* flush the prefetch q */
1541 /* reload "stale" selectors */
1550 /* reload code selector by turning return into intersegmental return */
1557 * void lidt(struct region_descriptor *rdp);
1565 * void lldt(u_short sel)
1572 * void ltr(u_short sel)
1578 /* ssdtosd(*ssdp,*sdp) */
1615 /* void load_cr3(caddr_t cr3) */
1617 #if defined(SWTCH_OPTIM_STATS)
1618 incl _tlb_flush_count
1629 /* void load_cr4(caddr_t cr4) */
1635 /* void reset_dbregs() */
1638 movl %eax,%dr7 /* disable all breapoints first */
1646 /*****************************************************************************/
1647 /* setjump, longjump */
1648 /*****************************************************************************/
1652 movl %ebx,(%eax) /* save ebx */
1653 movl %esp,4(%eax) /* save esp */
1654 movl %ebp,8(%eax) /* save ebp */
1655 movl %esi,12(%eax) /* save esi */
1656 movl %edi,16(%eax) /* save edi */
1657 movl (%esp),%edx /* get rta */
1658 movl %edx,20(%eax) /* save eip */
1659 xorl %eax,%eax /* return(0); */
1664 movl (%eax),%ebx /* restore ebx */
1665 movl 4(%eax),%esp /* restore esp */
1666 movl 8(%eax),%ebp /* restore ebp */
1667 movl 12(%eax),%esi /* restore esi */
1668 movl 16(%eax),%edi /* restore edi */
1669 movl 20(%eax),%edx /* get rta */
1670 movl %edx,(%esp) /* put in return frame */
1671 xorl %eax,%eax /* return(1); */
1676 * Support for BB-profiling (gcc -a). The kernbb program will extract
1677 * the data from the kernel.
1687 NON_GPROF_ENTRY(__bb_init_func)
1693 .byte 0xc3 /* avoid macro for `ret' */