1 /* $FreeBSD: src/sys/dev/asr/asr.c,v 1.3.2.2 2001/08/23 05:21:29 scottl Exp $ */
2 /* $DragonFly: src/sys/dev/raid/asr/asr.c,v 1.16 2004/08/23 15:11:44 joerg Exp $ */
4 * Copyright (c) 1996-2000 Distributed Processing Technology Corporation
5 * Copyright (c) 2000-2001 Adaptec Corporation
8 * TERMS AND CONDITIONS OF USE
10 * Redistribution and use in source form, with or without modification, are
11 * permitted provided that redistributions of source code must retain the
12 * above copyright notice, this list of conditions and the following disclaimer.
14 * This software is provided `as is' by Adaptec and any express or implied
15 * warranties, including, but not limited to, the implied warranties of
16 * merchantability and fitness for a particular purpose, are disclaimed. In no
17 * event shall Adaptec be liable for any direct, indirect, incidental, special,
18 * exemplary or consequential damages (including, but not limited to,
19 * procurement of substitute goods or services; loss of use, data, or profits;
20 * or business interruptions) however caused and on any theory of liability,
21 * whether in contract, strict liability, or tort (including negligence or
22 * otherwise) arising in any way out of the use of this driver software, even
23 * if advised of the possibility of such damage.
25 * SCSI I2O host adapter driver
27 * V1.08 2001/08/21 Mark_Salyzyn@adaptec.com
28 * - The 2000S and 2005S do not initialize on some machines,
29 * increased timeout to 255ms from 50ms for the StatusGet
31 * V1.07 2001/05/22 Mark_Salyzyn@adaptec.com
32 * - I knew this one was too good to be true. The error return
33 * on ioctl commands needs to be compared to CAM_REQ_CMP, not
34 * to the bit masked status.
35 * V1.06 2001/05/08 Mark_Salyzyn@adaptec.com
36 * - The 2005S that was supported is affectionately called the
37 * Conjoined BAR Firmware. In order to support RAID-5 in a
38 * 16MB low-cost configuration, Firmware was forced to go
39 * to a Split BAR Firmware. This requires a separate IOP and
40 * Messaging base address.
41 * V1.05 2001/04/25 Mark_Salyzyn@adaptec.com
42 * - Handle support for 2005S Zero Channel RAID solution.
43 * - System locked up if the Adapter locked up. Do not try
44 * to send other commands if the resetIOP command fails. The
45 * fail outstanding command discovery loop was flawed as the
46 * removal of the command from the list prevented discovering
48 * - Comment changes to clarify driver.
49 * - SysInfo searched for an EATA SmartROM, not an I2O SmartROM.
50 * - We do not use the AC_FOUND_DEV event because of I2O.
52 * V1.04 2000/09/22 Mark_Salyzyn@adaptec.com, msmith@freebsd.org,
53 * lampa@fee.vutbr.cz and Scott_Long@adaptec.com.
54 * - Removed support for PM1554, PM2554 and PM2654 in Mode-0
55 * mode as this is confused with competitor adapters in run
57 * - critical locking needed in ASR_ccbAdd and ASR_ccbRemove
58 * to prevent operating system panic.
59 * - moved default major number to 154 from 97.
60 * V1.03 2000/07/12 Mark_Salyzyn@adaptec.com
61 * - The controller is not actually an ASR (Adaptec SCSI RAID)
62 * series that is visible, it's more of an internal code name.
63 * remove any visible references within reason for now.
64 * - bus_ptr->LUN was not correctly zeroed when initially
65 * allocated causing a possible panic of the operating system
67 * V1.02 2000/06/26 Mark_Salyzyn@adaptec.com
68 * - Code always fails for ASR_getTid affecting performance.
69 * - initiated a set of changes that resulted from a formal
70 * code inspection by Mark_Salyzyn@adaptec.com,
71 * George_Dake@adaptec.com, Jeff_Zeak@adaptec.com,
72 * Martin_Wilson@adaptec.com and Vincent_Trandoan@adaptec.com.
73 * Their findings were focussed on the LCT & TID handler, and
74 * all resulting changes were to improve code readability,
75 * consistency or have a positive effect on performance.
76 * V1.01 2000/06/14 Mark_Salyzyn@adaptec.com
77 * - Passthrough returned an incorrect error.
78 * - Passthrough did not migrate the intrinsic scsi layer wakeup
79 * on command completion.
80 * - generate control device nodes using make_dev and delete_dev.
81 * - Performance affected by TID caching reallocing.
82 * - Made suggested changes by Justin_Gibbs@adaptec.com
83 * - use splcam instead of splbio.
84 * - use cam_imask instead of bio_imask.
85 * - use u_int8_t instead of u_char.
86 * - use u_int16_t instead of u_short.
87 * - use u_int32_t instead of u_long where appropriate.
88 * - use 64 bit context handler instead of 32 bit.
89 * - create_ccb should only allocate the worst case
90 * requirements for the driver since CAM may evolve
91 * making union ccb much larger than needed here.
92 * renamed create_ccb to asr_alloc_ccb.
93 * - go nutz justifying all debug prints as macros
94 * defined at the top and remove unsightly ifdefs.
95 * - INLINE STATIC viewed as confusing. Historically
96 * utilized to affect code performance and debug
97 * issues in OS, Compiler or OEM specific situations.
98 * V1.00 2000/05/31 Mark_Salyzyn@adaptec.com
99 * - Ported from FreeBSD 2.2.X DPT I2O driver.
100 * changed struct scsi_xfer to union ccb/struct ccb_hdr
101 * changed variable name xs to ccb
102 * changed struct scsi_link to struct cam_path
103 * changed struct scsibus_data to struct cam_sim
104 * stopped using fordriver for holding on to the TID
105 * use proprietary packet creation instead of scsi_inquire
106 * CAM layer sends synchronize commands.
109 #define ASR_VERSION 1
110 #define ASR_REVISION '0'
111 #define ASR_SUBREVISION '8'
114 #define ASR_YEAR 2001 - 1980
117 * Debug macros to reduce the unsightly ifdefs
119 #if (defined(DEBUG_ASR) || defined(DEBUG_ASR_USR_CMD) || defined(DEBUG_ASR_CMD))
120 # define debug_asr_message(message) \
122 u_int32_t * pointer = (u_int32_t *)message; \
123 u_int32_t length = I2O_MESSAGE_FRAME_getMessageSize(message);\
124 u_int32_t counter = 0; \
127 printf ("%08lx%c", (u_long)*(pointer++), \
128 (((++counter & 7) == 0) || (length == 0)) \
133 #endif /* DEBUG_ASR || DEBUG_ASR_USR_CMD || DEBUG_ASR_CMD */
135 #if (defined(DEBUG_ASR))
136 /* Breaks on none STDC based compilers :-( */
137 # define debug_asr_printf(fmt,args...) printf(fmt, ##args)
138 # define debug_asr_dump_message(message) debug_asr_message(message)
139 # define debug_asr_print_path(ccb) xpt_print_path(ccb->ccb_h.path);
140 /* None fatal version of the ASSERT macro */
141 # if (defined(__STDC__))
142 # define ASSERT(phrase) if(!(phrase))printf(#phrase " at line %d file %s\n",__LINE__,__FILE__)
144 # define ASSERT(phrase) if(!(phrase))printf("phrase" " at line %d file %s\n",__LINE__,__FILE__)
146 #else /* DEBUG_ASR */
147 # define debug_asr_printf(fmt,args...)
148 # define debug_asr_dump_message(message)
149 # define debug_asr_print_path(ccb)
151 #endif /* DEBUG_ASR */
154 * If DEBUG_ASR_CMD is defined:
155 * 0 - Display incoming SCSI commands
156 * 1 - add in a quick character before queueing.
157 * 2 - add in outgoing message frames.
159 #if (defined(DEBUG_ASR_CMD))
160 # define debug_asr_cmd_printf(fmt,args...) printf(fmt,##args)
161 # define debug_asr_dump_ccb(ccb) \
163 u_int8_t * cp = (unsigned char *)&(ccb->csio.cdb_io); \
164 int len = ccb->csio.cdb_len; \
167 debug_asr_cmd_printf (" %02x", *(cp++)); \
171 # if (DEBUG_ASR_CMD > 0)
172 # define debug_asr_cmd1_printf debug_asr_cmd_printf
174 # define debug_asr_cmd1_printf(fmt,args...)
176 # if (DEBUG_ASR_CMD > 1)
177 # define debug_asr_cmd2_printf debug_asr_cmd_printf
178 # define debug_asr_cmd2_dump_message(message) debug_asr_message(message)
180 # define debug_asr_cmd2_printf(fmt,args...)
181 # define debug_asr_cmd2_dump_message(message)
183 #else /* DEBUG_ASR_CMD */
184 # define debug_asr_cmd_printf(fmt,args...)
185 # define debug_asr_cmd_dump_ccb(ccb)
186 # define debug_asr_cmd1_printf(fmt,args...)
187 # define debug_asr_cmd2_printf(fmt,args...)
188 # define debug_asr_cmd2_dump_message(message)
189 #endif /* DEBUG_ASR_CMD */
191 #if (defined(DEBUG_ASR_USR_CMD))
192 # define debug_usr_cmd_printf(fmt,args...) printf(fmt,##args)
193 # define debug_usr_cmd_dump_message(message) debug_usr_message(message)
194 #else /* DEBUG_ASR_USR_CMD */
195 # define debug_usr_cmd_printf(fmt,args...)
196 # define debug_usr_cmd_dump_message(message)
197 #endif /* DEBUG_ASR_USR_CMD */
199 #define dsDescription_size 46 /* Snug as a bug in a rug */
202 static dpt_sig_S ASR_sig = {
203 { 'd', 'P', 't', 'S', 'i', 'G'}, SIG_VERSION, PROC_INTEL,
204 PROC_386 | PROC_486 | PROC_PENTIUM | PROC_SEXIUM, FT_HBADRVR, 0,
205 OEM_DPT, OS_FREE_BSD, CAP_ABOVE16MB, DEV_ALL,
207 0, 0, ASR_VERSION, ASR_REVISION, ASR_SUBREVISION,
208 ASR_MONTH, ASR_DAY, ASR_YEAR,
209 /* 01234567890123456789012345678901234567890123456789 < 50 chars */
210 "Adaptec FreeBSD 4.0.0 Unix SCSI I2O HBA Driver"
211 /* ^^^^^ asr_attach alters these to match OS */
214 #include <sys/param.h> /* TRUE=1 and FALSE=0 defined here */
215 #include <sys/kernel.h>
216 #include <sys/systm.h>
217 #include <sys/malloc.h>
218 #include <sys/proc.h>
219 #include <sys/conf.h>
220 #include <sys/disklabel.h>
222 #include <machine/resource.h>
223 #include <machine/bus.h>
224 #include <sys/rman.h>
225 #include <sys/stat.h>
226 #include <sys/device.h>
228 #include <bus/cam/cam.h>
229 #include <bus/cam/cam_ccb.h>
230 #include <bus/cam/cam_sim.h>
231 #include <bus/cam/cam_xpt_sim.h>
232 #include <bus/cam/cam_xpt_periph.h>
234 #include <bus/cam/scsi/scsi_all.h>
235 #include <bus/cam/scsi/scsi_message.h>
239 #include <machine/cputypes.h>
240 #include <machine/clock.h>
241 #include <i386/include/vmparam.h>
243 #include <bus/pci/pcivar.h>
244 #include <bus/pci/pcireg.h>
246 #define STATIC static
249 #if (defined(DEBUG_ASR) && (DEBUG_ASR > 0))
259 #define osdSwap4(x) ((u_long)ntohl((u_long)(x)))
260 #define KVTOPHYS(x) vtophys(x)
261 #include "dptalign.h"
263 #include "i2obscsi.h"
265 #include "i2oadptr.h"
266 #include "sys_info.h"
268 /* Configuration Definitions */
270 #define SG_SIZE 58 /* Scatter Gather list Size */
271 #define MAX_TARGET_ID 126 /* Maximum Target ID supported */
272 #define MAX_LUN 255 /* Maximum LUN Supported */
273 #define MAX_CHANNEL 7 /* Maximum Channel # Supported by driver */
274 #define MAX_INBOUND 2000 /* Max CCBs, Also Max Queue Size */
275 #define MAX_OUTBOUND 256 /* Maximum outbound frames/adapter */
276 #define MAX_INBOUND_SIZE 512 /* Maximum inbound frame size */
277 #define MAX_MAP 4194304L /* Maximum mapping size of IOP */
278 /* Also serves as the minimum map for */
279 /* the 2005S zero channel RAID product */
281 /**************************************************************************
282 ** ASR Host Adapter structure - One Structure For Each Host Adapter That **
283 ** Is Configured Into The System. The Structure Supplies Configuration **
284 ** Information, Status Info, Queue Info And An Active CCB List Pointer. **
285 ***************************************************************************/
287 /* I2O register set */
292 # define Mask_InterruptsDisabled 0x08
294 volatile U32 ToFIFO; /* In Bound FIFO */
295 volatile U32 FromFIFO; /* Out Bound FIFO */
299 * A MIX of performance and space considerations for TID lookups
301 typedef u_int16_t tid_t;
304 u_int32_t size; /* up to MAX_LUN */
309 u_int32_t size; /* up to MAX_TARGET */
314 * To ensure that we only allocate and use the worst case ccb here, lets
315 * make our own local ccb union. If asr_alloc_ccb is utilized for another
316 * ccb type, ensure that you add the additional structures into our local
317 * ccb union. To ensure strict type checking, we will utilize the local
318 * ccb definition wherever possible.
321 struct ccb_hdr ccb_h; /* For convenience */
322 struct ccb_scsiio csio;
323 struct ccb_setasync csa;
326 typedef struct Asr_softc {
328 void * ha_Base; /* base port for each board */
329 u_int8_t * volatile ha_blinkLED;
330 i2oRegs_t * ha_Virt; /* Base address of IOP */
331 U8 * ha_Fvirt; /* Base address of Frames */
332 I2O_IOP_ENTRY ha_SystemTable;
333 LIST_HEAD(,ccb_hdr) ha_ccb; /* ccbs in use */
334 struct cam_path * ha_path[MAX_CHANNEL+1];
335 struct cam_sim * ha_sim[MAX_CHANNEL+1];
336 #if defined(__DragonFly__) || __FreeBSD_version >= 400000
337 struct resource * ha_mem_res;
338 struct resource * ha_mes_res;
339 struct resource * ha_irq_res;
342 PI2O_LCT ha_LCT; /* Complete list of devices */
343 # define le_type IdentityTag[0]
344 # define I2O_BSA 0x20
345 # define I2O_FCA 0x40
346 # define I2O_SCSI 0x00
347 # define I2O_PORT 0x80
348 # define I2O_UNKNOWN 0x7F
349 # define le_bus IdentityTag[1]
350 # define le_target IdentityTag[2]
351 # define le_lun IdentityTag[3]
352 target2lun_t * ha_targets[MAX_CHANNEL+1];
353 PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME ha_Msgs;
356 u_int8_t ha_in_reset;
357 # define HA_OPERATIONAL 0
358 # define HA_IN_RESET 1
359 # define HA_OFF_LINE 2
360 # define HA_OFF_LINE_RECOVERY 3
361 /* Configuration information */
362 /* The target id maximums we take */
363 u_int8_t ha_MaxBus; /* Maximum bus */
364 u_int8_t ha_MaxId; /* Maximum target ID */
365 u_int8_t ha_MaxLun; /* Maximum target LUN */
366 u_int8_t ha_SgSize; /* Max SG elements */
367 u_int8_t ha_pciBusNum;
368 u_int8_t ha_pciDeviceNum;
369 u_int8_t ha_adapter_target[MAX_CHANNEL+1];
370 u_int16_t ha_QueueSize; /* Max outstanding commands */
371 u_int16_t ha_Msgs_Count;
373 /* Links into other parents and HBAs */
374 struct Asr_softc * ha_next; /* HBA list */
377 STATIC Asr_softc_t * Asr_softc;
380 * Prototypes of the routines we have in this object.
383 /* Externally callable routines */
384 #if defined(__DragonFly__) || __FreeBSD_version >= 400000
385 #define PROBE_ARGS IN device_t tag
386 #define PROBE_RET int
387 #define PROBE_SET() u_long id = (pci_get_device(tag)<<16)|pci_get_vendor(tag)
388 #define PROBE_RETURN(retval) if(retval){device_set_desc(tag,retval);return(0);}else{return(ENXIO);}
389 #define ATTACH_ARGS IN device_t tag
390 #define ATTACH_RET int
391 #define ATTACH_SET() int unit = device_get_unit(tag)
392 #define ATTACH_RETURN(retval) return(retval)
394 #define PROBE_ARGS IN pcici_t tag, IN pcidi_t id
395 #define PROBE_RET const char *
397 #define PROBE_RETURN(retval) return(retval)
398 #define ATTACH_ARGS IN pcici_t tag, IN int unit
399 #define ATTACH_RET void
401 #define ATTACH_RETURN(retval) return
403 /* I2O HDM interface */
404 STATIC PROBE_RET asr_probe (PROBE_ARGS);
405 STATIC ATTACH_RET asr_attach (ATTACH_ARGS);
406 /* DOMINO placeholder */
407 STATIC PROBE_RET domino_probe (PROBE_ARGS);
408 STATIC ATTACH_RET domino_attach (ATTACH_ARGS);
409 /* MODE0 adapter placeholder */
410 STATIC PROBE_RET mode0_probe (PROBE_ARGS);
411 STATIC ATTACH_RET mode0_attach (ATTACH_ARGS);
413 STATIC Asr_softc_t * ASR_get_sc (
415 STATIC int asr_ioctl (
421 STATIC int asr_open (
426 STATIC int asr_close (
431 STATIC int asr_intr (
432 IN Asr_softc_t * sc);
433 STATIC void asr_timeout (
435 STATIC int ASR_init (
436 IN Asr_softc_t * sc);
437 STATIC INLINE int ASR_acquireLct (
438 INOUT Asr_softc_t * sc);
439 STATIC INLINE int ASR_acquireHrt (
440 INOUT Asr_softc_t * sc);
441 STATIC void asr_action (
442 IN struct cam_sim * sim,
444 STATIC void asr_poll (
445 IN struct cam_sim * sim);
448 * Here is the auto-probe structure used to nest our tests appropriately
449 * during the startup phase of the operating system.
451 #if defined(__DragonFly__) || __FreeBSD_version >= 400000
452 STATIC device_method_t asr_methods[] = {
453 DEVMETHOD(device_probe, asr_probe),
454 DEVMETHOD(device_attach, asr_attach),
458 STATIC driver_t asr_driver = {
464 STATIC devclass_t asr_devclass;
466 DECLARE_DUMMY_MODULE(asr);
467 DRIVER_MODULE(asr, pci, asr_driver, asr_devclass, 0, 0);
469 STATIC device_method_t domino_methods[] = {
470 DEVMETHOD(device_probe, domino_probe),
471 DEVMETHOD(device_attach, domino_attach),
475 STATIC driver_t domino_driver = {
481 STATIC devclass_t domino_devclass;
483 DRIVER_MODULE(domino, pci, domino_driver, domino_devclass, 0, 0);
485 STATIC device_method_t mode0_methods[] = {
486 DEVMETHOD(device_probe, mode0_probe),
487 DEVMETHOD(device_attach, mode0_attach),
491 STATIC driver_t mode0_driver = {
497 STATIC devclass_t mode0_devclass;
499 DRIVER_MODULE(mode0, pci, mode0_driver, mode0_devclass, 0, 0);
501 STATIC u_long asr_pcicount = 0;
502 STATIC struct pci_device asr_pcidev = {
509 DATA_SET (asr_pciset, asr_pcidev);
511 STATIC u_long domino_pcicount = 0;
512 STATIC struct pci_device domino_pcidev = {
519 DATA_SET (domino_pciset, domino_pcidev);
521 STATIC u_long mode0_pcicount = 0;
522 STATIC struct pci_device mode0_pcidev = {
529 DATA_SET (mode0_pciset, mode0_pcidev);
533 * devsw for asr hba driver
535 * only ioctl is used. the sd driver provides all other access.
537 #define CDEV_MAJOR 154 /* prefered default character major */
538 STATIC struct cdevsw asr_cdevsw = {
540 CDEV_MAJOR, /* maj */
546 asr_close, /* close */
549 asr_ioctl, /* ioctl */
552 nostrategy, /* strategy */
558 * Initialize the dynamic cdevsw hooks.
561 asr_drvinit (void * unused)
563 static int asr_devsw_installed = 0;
565 if (asr_devsw_installed) {
568 asr_devsw_installed++;
570 * Find a free spot (the report during driver load used by
571 * osd layer in engine to generate the controlling nodes).
573 * XXX this is garbage code, store a unit number in asr_cdevsw
574 * and iterate through that instead?
576 while (asr_cdevsw.d_maj < NUMCDEVSW &&
577 cdevsw_get(asr_cdevsw.d_maj, -1) != NULL
581 if (asr_cdevsw.d_maj >= NUMCDEVSW) {
582 asr_cdevsw.d_maj = 0;
583 while (asr_cdevsw.d_maj < CDEV_MAJOR &&
584 cdevsw_get(asr_cdevsw.d_maj, -1) != NULL
593 cdevsw_add(&asr_cdevsw, 0, 0);
596 /* Must initialize before CAM layer picks up our HBA driver */
597 SYSINIT(asrdev,SI_SUB_DRIVERS,SI_ORDER_MIDDLE+CDEV_MAJOR,asr_drvinit,NULL)
599 /* I2O support routines */
600 #define defAlignLong(STRUCT,NAME) char NAME[sizeof(STRUCT)]
601 #define getAlignLong(STRUCT,NAME) ((STRUCT *)(NAME))
604 * Fill message with default.
606 STATIC PI2O_MESSAGE_FRAME
611 OUT PI2O_MESSAGE_FRAME Message_Ptr;
613 Message_Ptr = getAlignLong(I2O_MESSAGE_FRAME, Message);
614 bzero ((void *)Message_Ptr, size);
615 I2O_MESSAGE_FRAME_setVersionOffset(Message_Ptr, I2O_VERSION_11);
616 I2O_MESSAGE_FRAME_setMessageSize(Message_Ptr,
617 (size + sizeof(U32) - 1) >> 2);
618 I2O_MESSAGE_FRAME_setInitiatorAddress (Message_Ptr, 1);
619 return (Message_Ptr);
620 } /* ASR_fillMessage */
622 #define EMPTY_QUEUE ((U32)-1L)
628 OUT U32 MessageOffset;
630 if ((MessageOffset = virt->ToFIFO) == EMPTY_QUEUE) {
631 MessageOffset = virt->ToFIFO;
633 return (MessageOffset);
634 } /* ASR_getMessage */
636 /* Issue a polled command */
639 INOUT i2oRegs_t * virt,
641 IN PI2O_MESSAGE_FRAME Message)
648 * ASR_initiateCp is only used for synchronous commands and will
649 * be made more resiliant to adapter delays since commands like
650 * resetIOP can cause the adapter to be deaf for a little time.
652 while (((MessageOffset = ASR_getMessage(virt)) == EMPTY_QUEUE)
656 if (MessageOffset != EMPTY_QUEUE) {
657 bcopy (Message, fvirt + MessageOffset,
658 I2O_MESSAGE_FRAME_getMessageSize(Message) << 2);
660 * Disable the Interrupts
662 virt->Mask = (Mask = virt->Mask) | Mask_InterruptsDisabled;
663 virt->ToFIFO = MessageOffset;
666 } /* ASR_initiateCp */
673 INOUT i2oRegs_t * virt,
676 struct resetMessage {
677 I2O_EXEC_IOP_RESET_MESSAGE M;
680 defAlignLong(struct resetMessage,Message);
681 PI2O_EXEC_IOP_RESET_MESSAGE Message_Ptr;
682 OUT U32 * volatile Reply_Ptr;
686 * Build up our copy of the Message.
688 Message_Ptr = (PI2O_EXEC_IOP_RESET_MESSAGE)ASR_fillMessage(Message,
689 sizeof(I2O_EXEC_IOP_RESET_MESSAGE));
690 I2O_EXEC_IOP_RESET_MESSAGE_setFunction(Message_Ptr, I2O_EXEC_IOP_RESET);
692 * Reset the Reply Status
694 *(Reply_Ptr = (U32 *)((char *)Message_Ptr
695 + sizeof(I2O_EXEC_IOP_RESET_MESSAGE))) = 0;
696 I2O_EXEC_IOP_RESET_MESSAGE_setStatusWordLowAddress(Message_Ptr,
697 KVTOPHYS((void *)Reply_Ptr));
699 * Send the Message out
701 if ((Old = ASR_initiateCp (virt, fvirt, (PI2O_MESSAGE_FRAME)Message_Ptr)) != (U32)-1L) {
703 * Wait for a response (Poll), timeouts are dangerous if
704 * the card is truly responsive. We assume response in 2s.
706 u_int8_t Delay = 200;
708 while ((*Reply_Ptr == 0) && (--Delay != 0)) {
712 * Re-enable the interrupts.
718 ASSERT (Old != (U32)-1L);
723 * Get the curent state of the adapter
725 STATIC INLINE PI2O_EXEC_STATUS_GET_REPLY
727 INOUT i2oRegs_t * virt,
729 OUT PI2O_EXEC_STATUS_GET_REPLY buffer)
731 defAlignLong(I2O_EXEC_STATUS_GET_MESSAGE,Message);
732 PI2O_EXEC_STATUS_GET_MESSAGE Message_Ptr;
736 * Build up our copy of the Message.
738 Message_Ptr = (PI2O_EXEC_STATUS_GET_MESSAGE)ASR_fillMessage(Message,
739 sizeof(I2O_EXEC_STATUS_GET_MESSAGE));
740 I2O_EXEC_STATUS_GET_MESSAGE_setFunction(Message_Ptr,
741 I2O_EXEC_STATUS_GET);
742 I2O_EXEC_STATUS_GET_MESSAGE_setReplyBufferAddressLow(Message_Ptr,
743 KVTOPHYS((void *)buffer));
744 /* This one is a Byte Count */
745 I2O_EXEC_STATUS_GET_MESSAGE_setReplyBufferLength(Message_Ptr,
746 sizeof(I2O_EXEC_STATUS_GET_REPLY));
748 * Reset the Reply Status
750 bzero ((void *)buffer, sizeof(I2O_EXEC_STATUS_GET_REPLY));
752 * Send the Message out
754 if ((Old = ASR_initiateCp (virt, fvirt, (PI2O_MESSAGE_FRAME)Message_Ptr)) != (U32)-1L) {
756 * Wait for a response (Poll), timeouts are dangerous if
757 * the card is truly responsive. We assume response in 50ms.
759 u_int8_t Delay = 255;
761 while (*((U8 * volatile)&(buffer->SyncByte)) == 0) {
763 buffer = (PI2O_EXEC_STATUS_GET_REPLY)NULL;
769 * Re-enable the interrupts.
774 return ((PI2O_EXEC_STATUS_GET_REPLY)NULL);
775 } /* ASR_getStatus */
778 * Check if the device is a SCSI I2O HBA, and add it to the list.
782 * Probe for ASR controller. If we find it, we will use it.
786 asr_probe(PROBE_ARGS)
789 if ((id == 0xA5011044) || (id == 0xA5111044)) {
790 PROBE_RETURN ("Adaptec Caching SCSI RAID");
796 * Probe/Attach for DOMINO chipset.
799 domino_probe(PROBE_ARGS)
802 if (id == 0x10121044) {
803 PROBE_RETURN ("Adaptec Caching Memory Controller");
809 domino_attach (ATTACH_ARGS)
812 } /* domino_attach */
815 * Probe/Attach for MODE0 adapters.
818 mode0_probe(PROBE_ARGS)
823 * If/When we can get a business case to commit to a
824 * Mode0 driver here, we can make all these tests more
825 * specific and robust. Mode0 adapters have their processors
826 * turned off, this the chips are in a raw state.
829 /* This is a PLX9054 */
830 if (id == 0x905410B5) {
831 PROBE_RETURN ("Adaptec Mode0 PM3757");
833 /* This is a PLX9080 */
834 if (id == 0x908010B5) {
835 PROBE_RETURN ("Adaptec Mode0 PM3754/PM3755");
837 /* This is a ZION 80303 */
838 if (id == 0x53098086) {
839 PROBE_RETURN ("Adaptec Mode0 3010S");
841 /* This is an i960RS */
842 if (id == 0x39628086) {
843 PROBE_RETURN ("Adaptec Mode0 2100S");
845 /* This is an i960RN */
846 if (id == 0x19648086) {
847 PROBE_RETURN ("Adaptec Mode0 PM2865/2400A/3200S/3400S");
849 #if 0 /* this would match any generic i960 -- mjs */
850 /* This is an i960RP (typically also on Motherboards) */
851 if (id == 0x19608086) {
852 PROBE_RETURN ("Adaptec Mode0 PM2554/PM1554/PM2654");
859 mode0_attach (ATTACH_ARGS)
864 STATIC INLINE union asr_ccb *
868 OUT union asr_ccb * new_ccb;
870 if ((new_ccb = (union asr_ccb *)malloc(sizeof(*new_ccb),
871 M_DEVBUF, M_WAITOK)) != (union asr_ccb *)NULL) {
872 bzero (new_ccb, sizeof(*new_ccb));
873 new_ccb->ccb_h.pinfo.priority = 1;
874 new_ccb->ccb_h.pinfo.index = CAM_UNQUEUED_INDEX;
875 new_ccb->ccb_h.spriv_ptr0 = sc;
878 } /* asr_alloc_ccb */
882 IN union asr_ccb * free_ccb)
884 free(free_ccb, M_DEVBUF);
888 * Print inquiry data `carefully'
895 while ((--len >= 0) && (*s) && (*s != ' ') && (*s != '-')) {
896 printf ("%c", *(s++));
903 STATIC INLINE int ASR_queue (
905 IN PI2O_MESSAGE_FRAME Message);
907 * Send a message synchronously and without Interrupt to a ccb.
911 INOUT union asr_ccb * ccb,
912 IN PI2O_MESSAGE_FRAME Message)
916 Asr_softc_t * sc = (Asr_softc_t *)(ccb->ccb_h.spriv_ptr0);
919 * We do not need any (optional byteswapping) method access to
920 * the Initiator context field.
922 I2O_MESSAGE_FRAME_setInitiatorContext64(Message, (long)ccb);
924 /* Prevent interrupt service */
926 sc->ha_Virt->Mask = (Mask = sc->ha_Virt->Mask)
927 | Mask_InterruptsDisabled;
929 if (ASR_queue (sc, Message) == EMPTY_QUEUE) {
930 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
931 ccb->ccb_h.status |= CAM_REQUEUE_REQ;
935 * Wait for this board to report a finished instruction.
937 while ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG) {
941 /* Re-enable Interrupts */
942 sc->ha_Virt->Mask = Mask;
945 return (ccb->ccb_h.status);
949 * Send a message synchronously to a Asr_softc_t
954 IN PI2O_MESSAGE_FRAME Message)
959 if ((ccb = asr_alloc_ccb (sc)) == (union asr_ccb *)NULL) {
960 return (CAM_REQUEUE_REQ);
963 status = ASR_queue_s (ccb, Message);
971 * Add the specified ccb to the active queue
976 INOUT union asr_ccb * ccb)
981 LIST_INSERT_HEAD(&(sc->ha_ccb), &(ccb->ccb_h), sim_links.le);
982 if (ccb->ccb_h.timeout != CAM_TIME_INFINITY) {
983 if (ccb->ccb_h.timeout == CAM_TIME_DEFAULT) {
985 * RAID systems can take considerable time to
986 * complete some commands given the large cache
987 * flashes switching from write back to write thru.
989 ccb->ccb_h.timeout = 6 * 60 * 1000;
991 ccb->ccb_h.timeout_ch = timeout(asr_timeout, (caddr_t)ccb,
992 (ccb->ccb_h.timeout * hz) / 1000);
998 * Remove the specified ccb from the active queue.
1002 IN Asr_softc_t * sc,
1003 INOUT union asr_ccb * ccb)
1008 untimeout(asr_timeout, (caddr_t)ccb, ccb->ccb_h.timeout_ch);
1009 LIST_REMOVE(&(ccb->ccb_h), sim_links.le);
1011 } /* ASR_ccbRemove */
1014 * Fail all the active commands, so they get re-issued by the operating
1018 ASR_failActiveCommands (
1019 IN Asr_softc_t * sc)
1021 struct ccb_hdr * ccb;
1024 #if 0 /* Currently handled by callers, unnecessary paranoia currently */
1025 /* Left in for historical perspective. */
1026 defAlignLong(I2O_EXEC_LCT_NOTIFY_MESSAGE,Message);
1027 PI2O_EXEC_LCT_NOTIFY_MESSAGE Message_Ptr;
1029 /* Send a blind LCT command to wait for the enableSys to complete */
1030 Message_Ptr = (PI2O_EXEC_LCT_NOTIFY_MESSAGE)ASR_fillMessage(Message,
1031 sizeof(I2O_EXEC_LCT_NOTIFY_MESSAGE) - sizeof(I2O_SG_ELEMENT));
1032 I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame),
1033 I2O_EXEC_LCT_NOTIFY);
1034 I2O_EXEC_LCT_NOTIFY_MESSAGE_setClassIdentifier(Message_Ptr,
1035 I2O_CLASS_MATCH_ANYCLASS);
1036 (void)ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
1041 * We do not need to inform the CAM layer that we had a bus
1042 * reset since we manage it on our own, this also prevents the
1043 * SCSI_DELAY settling that would be required on other systems.
1044 * The `SCSI_DELAY' has already been handled by the card via the
1045 * acquisition of the LCT table while we are at CAM priority level.
1046 * for (int bus = 0; bus <= sc->ha_MaxBus; ++bus) {
1047 * xpt_async (AC_BUS_RESET, sc->ha_path[bus], NULL);
1050 while ((ccb = LIST_FIRST(&(sc->ha_ccb))) != (struct ccb_hdr *)NULL) {
1051 ASR_ccbRemove (sc, (union asr_ccb *)ccb);
1053 ccb->status &= ~CAM_STATUS_MASK;
1054 ccb->status |= CAM_REQUEUE_REQ;
1055 /* Nothing Transfered */
1056 ((struct ccb_scsiio *)ccb)->resid
1057 = ((struct ccb_scsiio *)ccb)->dxfer_len;
1060 xpt_done ((union ccb *)ccb);
1062 wakeup ((caddr_t)ccb);
1066 } /* ASR_failActiveCommands */
1069 * The following command causes the HBA to reset the specific bus
1073 IN Asr_softc_t * sc,
1076 defAlignLong(I2O_HBA_BUS_RESET_MESSAGE,Message);
1077 I2O_HBA_BUS_RESET_MESSAGE * Message_Ptr;
1078 PI2O_LCT_ENTRY Device;
1080 Message_Ptr = (I2O_HBA_BUS_RESET_MESSAGE *)ASR_fillMessage(Message,
1081 sizeof(I2O_HBA_BUS_RESET_MESSAGE));
1082 I2O_MESSAGE_FRAME_setFunction(&Message_Ptr->StdMessageFrame,
1084 for (Device = sc->ha_LCT->LCTEntry; Device < (PI2O_LCT_ENTRY)
1085 (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT));
1087 if (((Device->le_type & I2O_PORT) != 0)
1088 && (Device->le_bus == bus)) {
1089 I2O_MESSAGE_FRAME_setTargetAddress(
1090 &Message_Ptr->StdMessageFrame,
1091 I2O_LCT_ENTRY_getLocalTID(Device));
1092 /* Asynchronous command, with no expectations */
1093 (void)ASR_queue(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
1097 } /* ASR_resetBus */
1100 ASR_getBlinkLedCode (
1101 IN Asr_softc_t * sc)
1103 if ((sc != (Asr_softc_t *)NULL)
1104 && (sc->ha_blinkLED != (u_int8_t *)NULL)
1105 && (sc->ha_blinkLED[1] == 0xBC)) {
1106 return (sc->ha_blinkLED[0]);
1109 } /* ASR_getBlinkCode */
1112 * Determine the address of an TID lookup. Must be done at high priority
1113 * since the address can be changed by other threads of execution.
1115 * Returns NULL pointer if not indexible (but will attempt to generate
1116 * an index if `new_entry' flag is set to TRUE).
1118 * All addressible entries are to be guaranteed zero if never initialized.
1120 STATIC INLINE tid_t *
1122 INOUT Asr_softc_t * sc,
1128 target2lun_t * bus_ptr;
1129 lun2tid_t * target_ptr;
1133 * Validity checking of incoming parameters. More of a bound
1134 * expansion limit than an issue with the code dealing with the
1137 * sc must be valid before it gets here, so that check could be
1138 * dropped if speed a critical issue.
1140 if ((sc == (Asr_softc_t *)NULL)
1141 || (bus > MAX_CHANNEL)
1142 || (target > sc->ha_MaxId)
1143 || (lun > sc->ha_MaxLun)) {
1144 debug_asr_printf("(%lx,%d,%d,%d) target out of range\n",
1145 (u_long)sc, bus, target, lun);
1146 return ((tid_t *)NULL);
1149 * See if there is an associated bus list.
1151 * for performance, allocate in size of BUS_CHUNK chunks.
1152 * BUS_CHUNK must be a power of two. This is to reduce
1153 * fragmentation effects on the allocations.
1155 # define BUS_CHUNK 8
1156 new_size = ((target + BUS_CHUNK - 1) & ~(BUS_CHUNK - 1));
1157 if ((bus_ptr = sc->ha_targets[bus]) == (target2lun_t *)NULL) {
1159 * Allocate a new structure?
1160 * Since one element in structure, the +1
1161 * needed for size has been abstracted.
1163 if ((new_entry == FALSE)
1164 || ((sc->ha_targets[bus] = bus_ptr = (target2lun_t *)malloc (
1165 sizeof(*bus_ptr) + (sizeof(bus_ptr->LUN) * new_size),
1167 == (target2lun_t *)NULL)) {
1168 debug_asr_printf("failed to allocate bus list\n");
1169 return ((tid_t *)NULL);
1171 bzero (bus_ptr, sizeof(*bus_ptr)
1172 + (sizeof(bus_ptr->LUN) * new_size));
1173 bus_ptr->size = new_size + 1;
1174 } else if (bus_ptr->size <= new_size) {
1175 target2lun_t * new_bus_ptr;
1178 * Reallocate a new structure?
1179 * Since one element in structure, the +1
1180 * needed for size has been abstracted.
1182 if ((new_entry == FALSE)
1183 || ((new_bus_ptr = (target2lun_t *)malloc (
1184 sizeof(*bus_ptr) + (sizeof(bus_ptr->LUN) * new_size),
1186 == (target2lun_t *)NULL)) {
1187 debug_asr_printf("failed to reallocate bus list\n");
1188 return ((tid_t *)NULL);
1191 * Zero and copy the whole thing, safer, simpler coding
1192 * and not really performance critical at this point.
1194 bzero (new_bus_ptr, sizeof(*bus_ptr)
1195 + (sizeof(bus_ptr->LUN) * new_size));
1196 bcopy (bus_ptr, new_bus_ptr, sizeof(*bus_ptr)
1197 + (sizeof(bus_ptr->LUN) * (bus_ptr->size - 1)));
1198 sc->ha_targets[bus] = new_bus_ptr;
1199 free (bus_ptr, M_TEMP);
1200 bus_ptr = new_bus_ptr;
1201 bus_ptr->size = new_size + 1;
1204 * We now have the bus list, lets get to the target list.
1205 * Since most systems have only *one* lun, we do not allocate
1206 * in chunks as above, here we allow one, then in chunk sizes.
1207 * TARGET_CHUNK must be a power of two. This is to reduce
1208 * fragmentation effects on the allocations.
1210 # define TARGET_CHUNK 8
1211 if ((new_size = lun) != 0) {
1212 new_size = ((lun + TARGET_CHUNK - 1) & ~(TARGET_CHUNK - 1));
1214 if ((target_ptr = bus_ptr->LUN[target]) == (lun2tid_t *)NULL) {
1216 * Allocate a new structure?
1217 * Since one element in structure, the +1
1218 * needed for size has been abstracted.
1220 if ((new_entry == FALSE)
1221 || ((bus_ptr->LUN[target] = target_ptr = (lun2tid_t *)malloc (
1222 sizeof(*target_ptr) + (sizeof(target_ptr->TID) * new_size),
1224 == (lun2tid_t *)NULL)) {
1225 debug_asr_printf("failed to allocate target list\n");
1226 return ((tid_t *)NULL);
1228 bzero (target_ptr, sizeof(*target_ptr)
1229 + (sizeof(target_ptr->TID) * new_size));
1230 target_ptr->size = new_size + 1;
1231 } else if (target_ptr->size <= new_size) {
1232 lun2tid_t * new_target_ptr;
1235 * Reallocate a new structure?
1236 * Since one element in structure, the +1
1237 * needed for size has been abstracted.
1239 if ((new_entry == FALSE)
1240 || ((new_target_ptr = (lun2tid_t *)malloc (
1241 sizeof(*target_ptr) + (sizeof(target_ptr->TID) * new_size),
1243 == (lun2tid_t *)NULL)) {
1244 debug_asr_printf("failed to reallocate target list\n");
1245 return ((tid_t *)NULL);
1248 * Zero and copy the whole thing, safer, simpler coding
1249 * and not really performance critical at this point.
1251 bzero (new_target_ptr, sizeof(*target_ptr)
1252 + (sizeof(target_ptr->TID) * new_size));
1253 bcopy (target_ptr, new_target_ptr,
1255 + (sizeof(target_ptr->TID) * (target_ptr->size - 1)));
1256 bus_ptr->LUN[target] = new_target_ptr;
1257 free (target_ptr, M_TEMP);
1258 target_ptr = new_target_ptr;
1259 target_ptr->size = new_size + 1;
1262 * Now, acquire the TID address from the LUN indexed list.
1264 return (&(target_ptr->TID[lun]));
1265 } /* ASR_getTidAddress */
1268 * Get a pre-existing TID relationship.
1270 * If the TID was never set, return (tid_t)-1.
1272 * should use mutex rather than spl.
1276 IN Asr_softc_t * sc,
1286 if (((tid_ptr = ASR_getTidAddress (sc, bus, target, lun, FALSE))
1288 /* (tid_t)0 or (tid_t)-1 indicate no TID */
1289 || (*tid_ptr == (tid_t)0)) {
1299 * Set a TID relationship.
1301 * If the TID was not set, return (tid_t)-1.
1303 * should use mutex rather than spl.
1307 INOUT Asr_softc_t * sc,
1316 if (TID != (tid_t)-1) {
1321 if ((tid_ptr = ASR_getTidAddress (sc, bus, target, lun, TRUE))
1332 /*-------------------------------------------------------------------------*/
1333 /* Function ASR_rescan */
1334 /*-------------------------------------------------------------------------*/
1335 /* The Parameters Passed To This Function Are : */
1336 /* Asr_softc_t * : HBA miniport driver's adapter data storage. */
1338 /* This Function Will rescan the adapter and resynchronize any data */
1340 /* Return : 0 For OK, Error Code Otherwise */
1341 /*-------------------------------------------------------------------------*/
1345 IN Asr_softc_t * sc)
1351 * Re-acquire the LCT table and synchronize us to the adapter.
1353 if ((error = ASR_acquireLct(sc)) == 0) {
1354 error = ASR_acquireHrt(sc);
1361 bus = sc->ha_MaxBus;
1362 /* Reset all existing cached TID lookups */
1364 int target, event = 0;
1367 * Scan for all targets on this bus to see if they
1368 * got affected by the rescan.
1370 for (target = 0; target <= sc->ha_MaxId; ++target) {
1373 /* Stay away from the controller ID */
1374 if (target == sc->ha_adapter_target[bus]) {
1377 for (lun = 0; lun <= sc->ha_MaxLun; ++lun) {
1378 PI2O_LCT_ENTRY Device;
1379 tid_t TID = (tid_t)-1;
1383 * See if the cached TID changed. Search for
1384 * the device in our new LCT.
1386 for (Device = sc->ha_LCT->LCTEntry;
1387 Device < (PI2O_LCT_ENTRY)(((U32 *)sc->ha_LCT)
1388 + I2O_LCT_getTableSize(sc->ha_LCT));
1390 if ((Device->le_type != I2O_UNKNOWN)
1391 && (Device->le_bus == bus)
1392 && (Device->le_target == target)
1393 && (Device->le_lun == lun)
1394 && (I2O_LCT_ENTRY_getUserTID(Device)
1396 TID = I2O_LCT_ENTRY_getLocalTID(
1402 * Indicate to the OS that the label needs
1403 * to be recalculated, or that the specific
1404 * open device is no longer valid (Merde)
1405 * because the cached TID changed.
1407 LastTID = ASR_getTid (sc, bus, target, lun);
1408 if (LastTID != TID) {
1409 struct cam_path * path;
1411 if (xpt_create_path(&path,
1413 cam_sim_path(sc->ha_sim[bus]),
1414 target, lun) != CAM_REQ_CMP) {
1415 if (TID == (tid_t)-1) {
1416 event |= AC_LOST_DEVICE;
1418 event |= AC_INQ_CHANGED
1419 | AC_GETDEV_CHANGED;
1422 if (TID == (tid_t)-1) {
1426 } else if (LastTID == (tid_t)-1) {
1427 struct ccb_getdev ccb;
1431 path, /*priority*/5);
1447 * We have the option of clearing the
1448 * cached TID for it to be rescanned, or to
1449 * set it now even if the device never got
1450 * accessed. We chose the later since we
1451 * currently do not use the condition that
1452 * the TID ever got cached.
1454 ASR_setTid (sc, bus, target, lun, TID);
1458 * The xpt layer can not handle multiple events at the
1461 if (event & AC_LOST_DEVICE) {
1462 xpt_async(AC_LOST_DEVICE, sc->ha_path[bus], NULL);
1464 if (event & AC_INQ_CHANGED) {
1465 xpt_async(AC_INQ_CHANGED, sc->ha_path[bus], NULL);
1467 if (event & AC_GETDEV_CHANGED) {
1468 xpt_async(AC_GETDEV_CHANGED, sc->ha_path[bus], NULL);
1470 } while (--bus >= 0);
1474 /*-------------------------------------------------------------------------*/
1475 /* Function ASR_reset */
1476 /*-------------------------------------------------------------------------*/
1477 /* The Parameters Passed To This Function Are : */
1478 /* Asr_softc_t * : HBA miniport driver's adapter data storage. */
1480 /* This Function Will reset the adapter and resynchronize any data */
1483 /*-------------------------------------------------------------------------*/
1487 IN Asr_softc_t * sc)
1492 if ((sc->ha_in_reset == HA_IN_RESET)
1493 || (sc->ha_in_reset == HA_OFF_LINE_RECOVERY)) {
1498 * Promotes HA_OPERATIONAL to HA_IN_RESET,
1499 * or HA_OFF_LINE to HA_OFF_LINE_RECOVERY.
1501 ++(sc->ha_in_reset);
1502 if (ASR_resetIOP (sc->ha_Virt, sc->ha_Fvirt) == 0) {
1503 debug_asr_printf ("ASR_resetIOP failed\n");
1505 * We really need to take this card off-line, easier said
1506 * than make sense. Better to keep retrying for now since if a
1507 * UART cable is connected the blinkLEDs the adapter is now in
1508 * a hard state requiring action from the monitor commands to
1509 * the HBA to continue. For debugging waiting forever is a
1510 * good thing. In a production system, however, one may wish
1511 * to instead take the card off-line ...
1513 # if 0 && (defined(HA_OFF_LINE))
1515 * Take adapter off-line.
1517 printf ("asr%d: Taking adapter off-line\n",
1519 ? cam_sim_unit(xpt_path_sim(sc->ha_path[0]))
1521 sc->ha_in_reset = HA_OFF_LINE;
1526 while (ASR_resetIOP (sc->ha_Virt, sc->ha_Fvirt) == 0);
1529 retVal = ASR_init (sc);
1532 debug_asr_printf ("ASR_init failed\n");
1533 sc->ha_in_reset = HA_OFF_LINE;
1536 if (ASR_rescan (sc) != 0) {
1537 debug_asr_printf ("ASR_rescan failed\n");
1539 ASR_failActiveCommands (sc);
1540 if (sc->ha_in_reset == HA_OFF_LINE_RECOVERY) {
1541 printf ("asr%d: Brining adapter back on-line\n",
1543 ? cam_sim_unit(xpt_path_sim(sc->ha_path[0]))
1546 sc->ha_in_reset = HA_OPERATIONAL;
1551 * Device timeout handler.
1557 union asr_ccb * ccb = (union asr_ccb *)arg;
1558 Asr_softc_t * sc = (Asr_softc_t *)(ccb->ccb_h.spriv_ptr0);
1561 debug_asr_print_path(ccb);
1562 debug_asr_printf("timed out");
1565 * Check if the adapter has locked up?
1567 if ((s = ASR_getBlinkLedCode(sc)) != 0) {
1569 printf ("asr%d: Blink LED 0x%x resetting adapter\n",
1570 cam_sim_unit(xpt_path_sim(ccb->ccb_h.path)), s);
1571 if (ASR_reset (sc) == ENXIO) {
1572 /* Try again later */
1573 ccb->ccb_h.timeout_ch = timeout(asr_timeout,
1575 (ccb->ccb_h.timeout * hz) / 1000);
1580 * Abort does not function on the ASR card!!! Walking away from
1581 * the SCSI command is also *very* dangerous. A SCSI BUS reset is
1582 * our best bet, followed by a complete adapter reset if that fails.
1585 /* Check if we already timed out once to raise the issue */
1586 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_CMD_TIMEOUT) {
1587 debug_asr_printf (" AGAIN\nreinitializing adapter\n");
1588 if (ASR_reset (sc) == ENXIO) {
1589 ccb->ccb_h.timeout_ch = timeout(asr_timeout,
1591 (ccb->ccb_h.timeout * hz) / 1000);
1596 debug_asr_printf ("\nresetting bus\n");
1597 /* If the BUS reset does not take, then an adapter reset is next! */
1598 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
1599 ccb->ccb_h.status |= CAM_CMD_TIMEOUT;
1600 ccb->ccb_h.timeout_ch = timeout(asr_timeout, (caddr_t)ccb,
1601 (ccb->ccb_h.timeout * hz) / 1000);
1602 ASR_resetBus (sc, cam_sim_bus(xpt_path_sim(ccb->ccb_h.path)));
1603 xpt_async (AC_BUS_RESET, ccb->ccb_h.path, NULL);
1608 * send a message asynchronously
1612 IN Asr_softc_t * sc,
1613 IN PI2O_MESSAGE_FRAME Message)
1615 OUT U32 MessageOffset;
1616 union asr_ccb * ccb;
1618 debug_asr_printf ("Host Command Dump:\n");
1619 debug_asr_dump_message (Message);
1621 ccb = (union asr_ccb *)(long)
1622 I2O_MESSAGE_FRAME_getInitiatorContext64(Message);
1624 if ((MessageOffset = ASR_getMessage(sc->ha_Virt)) != EMPTY_QUEUE) {
1625 bcopy (Message, sc->ha_Fvirt + MessageOffset,
1626 I2O_MESSAGE_FRAME_getMessageSize(Message) << 2);
1628 ASR_ccbAdd (sc, ccb);
1630 /* Post the command */
1631 sc->ha_Virt->ToFIFO = MessageOffset;
1633 if (ASR_getBlinkLedCode(sc)) {
1635 * Unlikely we can do anything if we can't grab a
1636 * message frame :-(, but lets give it a try.
1638 (void)ASR_reset (sc);
1641 return (MessageOffset);
1645 /* Simple Scatter Gather elements */
1646 #define SG(SGL,Index,Flags,Buffer,Size) \
1647 I2O_FLAGS_COUNT_setCount( \
1648 &(((PI2O_SG_ELEMENT)(SGL))->u.Simple[Index].FlagsCount), \
1650 I2O_FLAGS_COUNT_setFlags( \
1651 &(((PI2O_SG_ELEMENT)(SGL))->u.Simple[Index].FlagsCount), \
1652 I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT | (Flags)); \
1653 I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress( \
1654 &(((PI2O_SG_ELEMENT)(SGL))->u.Simple[Index]), \
1655 (Buffer == NULL) ? NULL : KVTOPHYS(Buffer))
1658 * Retrieve Parameter Group.
1659 * Buffer must be allocated using defAlignLong macro.
1663 IN Asr_softc_t * sc,
1667 IN unsigned BufferSize)
1669 struct paramGetMessage {
1670 I2O_UTIL_PARAMS_GET_MESSAGE M;
1672 sizeof(I2O_SGE_SIMPLE_ELEMENT)*2 - sizeof(I2O_SG_ELEMENT)];
1674 I2O_PARAM_OPERATIONS_LIST_HEADER Header;
1675 I2O_PARAM_OPERATION_ALL_TEMPLATE Template[1];
1678 defAlignLong(struct paramGetMessage, Message);
1679 struct Operations * Operations_Ptr;
1680 I2O_UTIL_PARAMS_GET_MESSAGE * Message_Ptr;
1681 struct ParamBuffer {
1682 I2O_PARAM_RESULTS_LIST_HEADER Header;
1683 I2O_PARAM_READ_OPERATION_RESULT Read;
1687 Message_Ptr = (I2O_UTIL_PARAMS_GET_MESSAGE *)ASR_fillMessage(Message,
1688 sizeof(I2O_UTIL_PARAMS_GET_MESSAGE)
1689 + sizeof(I2O_SGE_SIMPLE_ELEMENT)*2 - sizeof(I2O_SG_ELEMENT));
1690 Operations_Ptr = (struct Operations *)((char *)Message_Ptr
1691 + sizeof(I2O_UTIL_PARAMS_GET_MESSAGE)
1692 + sizeof(I2O_SGE_SIMPLE_ELEMENT)*2 - sizeof(I2O_SG_ELEMENT));
1693 bzero ((void *)Operations_Ptr, sizeof(struct Operations));
1694 I2O_PARAM_OPERATIONS_LIST_HEADER_setOperationCount(
1695 &(Operations_Ptr->Header), 1);
1696 I2O_PARAM_OPERATION_ALL_TEMPLATE_setOperation(
1697 &(Operations_Ptr->Template[0]), I2O_PARAMS_OPERATION_FIELD_GET);
1698 I2O_PARAM_OPERATION_ALL_TEMPLATE_setFieldCount(
1699 &(Operations_Ptr->Template[0]), 0xFFFF);
1700 I2O_PARAM_OPERATION_ALL_TEMPLATE_setGroupNumber(
1701 &(Operations_Ptr->Template[0]), Group);
1702 bzero ((void *)(Buffer_Ptr = getAlignLong(struct ParamBuffer, Buffer)),
1705 I2O_MESSAGE_FRAME_setVersionOffset(&(Message_Ptr->StdMessageFrame),
1707 + (((sizeof(I2O_UTIL_PARAMS_GET_MESSAGE) - sizeof(I2O_SG_ELEMENT))
1708 / sizeof(U32)) << 4));
1709 I2O_MESSAGE_FRAME_setTargetAddress (&(Message_Ptr->StdMessageFrame),
1711 I2O_MESSAGE_FRAME_setFunction (&(Message_Ptr->StdMessageFrame),
1712 I2O_UTIL_PARAMS_GET);
1714 * Set up the buffers as scatter gather elements.
1716 SG(&(Message_Ptr->SGL), 0,
1717 I2O_SGL_FLAGS_DIR | I2O_SGL_FLAGS_END_OF_BUFFER,
1718 Operations_Ptr, sizeof(struct Operations));
1719 SG(&(Message_Ptr->SGL), 1,
1720 I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER,
1721 Buffer_Ptr, BufferSize);
1723 if ((ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr) == CAM_REQ_CMP)
1724 && (Buffer_Ptr->Header.ResultCount)) {
1725 return ((void *)(Buffer_Ptr->Info));
1727 return ((void *)NULL);
1728 } /* ASR_getParams */
1731 * Acquire the LCT information.
1735 INOUT Asr_softc_t * sc)
1737 PI2O_EXEC_LCT_NOTIFY_MESSAGE Message_Ptr;
1738 PI2O_SGE_SIMPLE_ELEMENT sg;
1739 int MessageSizeInBytes;
1743 PI2O_LCT_ENTRY Entry;
1746 * sc value assumed valid
1748 MessageSizeInBytes = sizeof(I2O_EXEC_LCT_NOTIFY_MESSAGE)
1749 - sizeof(I2O_SG_ELEMENT) + sizeof(I2O_SGE_SIMPLE_ELEMENT);
1750 if ((Message_Ptr = (PI2O_EXEC_LCT_NOTIFY_MESSAGE)malloc (
1751 MessageSizeInBytes, M_TEMP, M_WAITOK))
1752 == (PI2O_EXEC_LCT_NOTIFY_MESSAGE)NULL) {
1755 (void)ASR_fillMessage((char *)Message_Ptr, MessageSizeInBytes);
1756 I2O_MESSAGE_FRAME_setVersionOffset(&(Message_Ptr->StdMessageFrame),
1758 (((sizeof(I2O_EXEC_LCT_NOTIFY_MESSAGE) - sizeof(I2O_SG_ELEMENT))
1759 / sizeof(U32)) << 4)));
1760 I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame),
1761 I2O_EXEC_LCT_NOTIFY);
1762 I2O_EXEC_LCT_NOTIFY_MESSAGE_setClassIdentifier(Message_Ptr,
1763 I2O_CLASS_MATCH_ANYCLASS);
1765 * Call the LCT table to determine the number of device entries
1766 * to reserve space for.
1768 SG(&(Message_Ptr->SGL), 0,
1769 I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER, &Table,
1772 * since this code is reused in several systems, code efficiency
1773 * is greater by using a shift operation rather than a divide by
1774 * sizeof(u_int32_t).
1776 I2O_LCT_setTableSize(&Table,
1777 (sizeof(I2O_LCT) - sizeof(I2O_LCT_ENTRY)) >> 2);
1778 (void)ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
1780 * Determine the size of the LCT table.
1783 free (sc->ha_LCT, M_TEMP);
1786 * malloc only generates contiguous memory when less than a
1787 * page is expected. We must break the request up into an SG list ...
1789 if (((len = (I2O_LCT_getTableSize(&Table) << 2)) <=
1790 (sizeof(I2O_LCT) - sizeof(I2O_LCT_ENTRY)))
1791 || (len > (128 * 1024))) { /* Arbitrary */
1792 free (Message_Ptr, M_TEMP);
1795 if ((sc->ha_LCT = (PI2O_LCT)malloc (len, M_TEMP, M_WAITOK))
1796 == (PI2O_LCT)NULL) {
1797 free (Message_Ptr, M_TEMP);
1801 * since this code is reused in several systems, code efficiency
1802 * is greater by using a shift operation rather than a divide by
1803 * sizeof(u_int32_t).
1805 I2O_LCT_setTableSize(sc->ha_LCT,
1806 (sizeof(I2O_LCT) - sizeof(I2O_LCT_ENTRY)) >> 2);
1808 * Convert the access to the LCT table into a SG list.
1810 sg = Message_Ptr->SGL.u.Simple;
1811 v = (caddr_t)(sc->ha_LCT);
1813 int next, base, span;
1816 next = base = KVTOPHYS(v);
1817 I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress(sg, base);
1819 /* How far can we go contiguously */
1820 while ((len > 0) && (base == next)) {
1823 next = trunc_page(base) + PAGE_SIZE;
1834 /* Construct the Flags */
1835 I2O_FLAGS_COUNT_setCount(&(sg->FlagsCount), span);
1837 int rw = I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT;
1839 rw = (I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT
1840 | I2O_SGL_FLAGS_LAST_ELEMENT
1841 | I2O_SGL_FLAGS_END_OF_BUFFER);
1843 I2O_FLAGS_COUNT_setFlags(&(sg->FlagsCount), rw);
1851 * Incrementing requires resizing of the packet.
1854 MessageSizeInBytes += sizeof(*sg);
1855 I2O_MESSAGE_FRAME_setMessageSize(
1856 &(Message_Ptr->StdMessageFrame),
1857 I2O_MESSAGE_FRAME_getMessageSize(
1858 &(Message_Ptr->StdMessageFrame))
1859 + (sizeof(*sg) / sizeof(U32)));
1861 PI2O_EXEC_LCT_NOTIFY_MESSAGE NewMessage_Ptr;
1863 if ((NewMessage_Ptr = (PI2O_EXEC_LCT_NOTIFY_MESSAGE)
1864 malloc (MessageSizeInBytes, M_TEMP, M_WAITOK))
1865 == (PI2O_EXEC_LCT_NOTIFY_MESSAGE)NULL) {
1866 free (sc->ha_LCT, M_TEMP);
1867 sc->ha_LCT = (PI2O_LCT)NULL;
1868 free (Message_Ptr, M_TEMP);
1871 span = ((caddr_t)sg) - (caddr_t)Message_Ptr;
1872 bcopy ((caddr_t)Message_Ptr,
1873 (caddr_t)NewMessage_Ptr, span);
1874 free (Message_Ptr, M_TEMP);
1875 sg = (PI2O_SGE_SIMPLE_ELEMENT)
1876 (((caddr_t)NewMessage_Ptr) + span);
1877 Message_Ptr = NewMessage_Ptr;
1882 retval = ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
1883 free (Message_Ptr, M_TEMP);
1884 if (retval != CAM_REQ_CMP) {
1888 /* If the LCT table grew, lets truncate accesses */
1889 if (I2O_LCT_getTableSize(&Table) < I2O_LCT_getTableSize(sc->ha_LCT)) {
1890 I2O_LCT_setTableSize(sc->ha_LCT, I2O_LCT_getTableSize(&Table));
1892 for (Entry = sc->ha_LCT->LCTEntry; Entry < (PI2O_LCT_ENTRY)
1893 (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT));
1895 Entry->le_type = I2O_UNKNOWN;
1896 switch (I2O_CLASS_ID_getClass(&(Entry->ClassID))) {
1898 case I2O_CLASS_RANDOM_BLOCK_STORAGE:
1899 Entry->le_type = I2O_BSA;
1902 case I2O_CLASS_SCSI_PERIPHERAL:
1903 Entry->le_type = I2O_SCSI;
1906 case I2O_CLASS_FIBRE_CHANNEL_PERIPHERAL:
1907 Entry->le_type = I2O_FCA;
1910 case I2O_CLASS_BUS_ADAPTER_PORT:
1911 Entry->le_type = I2O_PORT | I2O_SCSI;
1913 case I2O_CLASS_FIBRE_CHANNEL_PORT:
1914 if (I2O_CLASS_ID_getClass(&(Entry->ClassID)) ==
1915 I2O_CLASS_FIBRE_CHANNEL_PORT) {
1916 Entry->le_type = I2O_PORT | I2O_FCA;
1918 { struct ControllerInfo {
1919 I2O_PARAM_RESULTS_LIST_HEADER Header;
1920 I2O_PARAM_READ_OPERATION_RESULT Read;
1921 I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR Info;
1923 defAlignLong(struct ControllerInfo, Buffer);
1924 PI2O_HBA_SCSI_CONTROLLER_INFO_SCALAR Info;
1926 Entry->le_bus = 0xff;
1927 Entry->le_target = 0xff;
1928 Entry->le_lun = 0xff;
1930 if ((Info = (PI2O_HBA_SCSI_CONTROLLER_INFO_SCALAR)
1932 I2O_LCT_ENTRY_getLocalTID(Entry),
1933 I2O_HBA_SCSI_CONTROLLER_INFO_GROUP_NO,
1934 Buffer, sizeof(struct ControllerInfo)))
1935 == (PI2O_HBA_SCSI_CONTROLLER_INFO_SCALAR)NULL) {
1939 = I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_getInitiatorID(
1946 { struct DeviceInfo {
1947 I2O_PARAM_RESULTS_LIST_HEADER Header;
1948 I2O_PARAM_READ_OPERATION_RESULT Read;
1949 I2O_DPT_DEVICE_INFO_SCALAR Info;
1951 defAlignLong (struct DeviceInfo, Buffer);
1952 PI2O_DPT_DEVICE_INFO_SCALAR Info;
1954 Entry->le_bus = 0xff;
1955 Entry->le_target = 0xff;
1956 Entry->le_lun = 0xff;
1958 if ((Info = (PI2O_DPT_DEVICE_INFO_SCALAR)
1960 I2O_LCT_ENTRY_getLocalTID(Entry),
1961 I2O_DPT_DEVICE_INFO_GROUP_NO,
1962 Buffer, sizeof(struct DeviceInfo)))
1963 == (PI2O_DPT_DEVICE_INFO_SCALAR)NULL) {
1967 |= I2O_DPT_DEVICE_INFO_SCALAR_getDeviceType(Info);
1969 = I2O_DPT_DEVICE_INFO_SCALAR_getBus(Info);
1970 if ((Entry->le_bus > sc->ha_MaxBus)
1971 && (Entry->le_bus <= MAX_CHANNEL)) {
1972 sc->ha_MaxBus = Entry->le_bus;
1975 = I2O_DPT_DEVICE_INFO_SCALAR_getIdentifier(Info);
1977 = I2O_DPT_DEVICE_INFO_SCALAR_getLunInfo(Info);
1981 * A zero return value indicates success.
1984 } /* ASR_acquireLct */
1987 * Initialize a message frame.
1988 * We assume that the CDB has already been set up, so all we do here is
1989 * generate the Scatter Gather list.
1991 STATIC INLINE PI2O_MESSAGE_FRAME
1993 IN union asr_ccb * ccb,
1994 OUT PI2O_MESSAGE_FRAME Message)
1996 int next, span, base, rw;
1997 OUT PI2O_MESSAGE_FRAME Message_Ptr;
1998 Asr_softc_t * sc = (Asr_softc_t *)(ccb->ccb_h.spriv_ptr0);
1999 PI2O_SGE_SIMPLE_ELEMENT sg;
2001 vm_size_t size, len;
2004 /* We only need to zero out the PRIVATE_SCSI_SCB_EXECUTE_MESSAGE */
2005 bzero (Message_Ptr = getAlignLong(I2O_MESSAGE_FRAME, Message),
2006 (sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) - sizeof(I2O_SG_ELEMENT)));
2009 int target = ccb->ccb_h.target_id;
2010 int lun = ccb->ccb_h.target_lun;
2011 int bus = cam_sim_bus(xpt_path_sim(ccb->ccb_h.path));
2014 if ((TID = ASR_getTid (sc, bus, target, lun)) == (tid_t)-1) {
2015 PI2O_LCT_ENTRY Device;
2018 for (Device = sc->ha_LCT->LCTEntry; Device < (PI2O_LCT_ENTRY)
2019 (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT));
2021 if ((Device->le_type != I2O_UNKNOWN)
2022 && (Device->le_bus == bus)
2023 && (Device->le_target == target)
2024 && (Device->le_lun == lun)
2025 && (I2O_LCT_ENTRY_getUserTID(Device) == 0xFFF)) {
2026 TID = I2O_LCT_ENTRY_getLocalTID(Device);
2027 ASR_setTid (sc, Device->le_bus,
2028 Device->le_target, Device->le_lun,
2034 if (TID == (tid_t)0) {
2035 return ((PI2O_MESSAGE_FRAME)NULL);
2037 I2O_MESSAGE_FRAME_setTargetAddress(Message_Ptr, TID);
2038 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setTID(
2039 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr, TID);
2041 I2O_MESSAGE_FRAME_setVersionOffset(Message_Ptr, I2O_VERSION_11 |
2042 (((sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) - sizeof(I2O_SG_ELEMENT))
2043 / sizeof(U32)) << 4));
2044 I2O_MESSAGE_FRAME_setMessageSize(Message_Ptr,
2045 (sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2046 - sizeof(I2O_SG_ELEMENT)) / sizeof(U32));
2047 I2O_MESSAGE_FRAME_setInitiatorAddress (Message_Ptr, 1);
2048 I2O_MESSAGE_FRAME_setFunction(Message_Ptr, I2O_PRIVATE_MESSAGE);
2049 I2O_PRIVATE_MESSAGE_FRAME_setXFunctionCode (
2050 (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr, I2O_SCSI_SCB_EXEC);
2051 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (
2052 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr,
2053 I2O_SCB_FLAG_ENABLE_DISCONNECT
2054 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
2055 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER);
2057 * We do not need any (optional byteswapping) method access to
2058 * the Initiator & Transaction context field.
2060 I2O_MESSAGE_FRAME_setInitiatorContext64(Message, (long)ccb);
2062 I2O_PRIVATE_MESSAGE_FRAME_setOrganizationID(
2063 (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr, DPT_ORGANIZATION_ID);
2067 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setCDBLength(
2068 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr, ccb->csio.cdb_len);
2069 bcopy (&(ccb->csio.cdb_io),
2070 ((PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr)->CDB, ccb->csio.cdb_len);
2073 * Given a buffer describing a transfer, set up a scatter/gather map
2074 * in a ccb to map that SCSI transfer.
2077 rw = (ccb->ccb_h.flags & CAM_DIR_IN) ? 0 : I2O_SGL_FLAGS_DIR;
2079 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (
2080 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr,
2081 (ccb->csio.dxfer_len)
2082 ? ((rw) ? (I2O_SCB_FLAG_XFER_TO_DEVICE
2083 | I2O_SCB_FLAG_ENABLE_DISCONNECT
2084 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
2085 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER)
2086 : (I2O_SCB_FLAG_XFER_FROM_DEVICE
2087 | I2O_SCB_FLAG_ENABLE_DISCONNECT
2088 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
2089 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER))
2090 : (I2O_SCB_FLAG_ENABLE_DISCONNECT
2091 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
2092 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER));
2095 * Given a transfer described by a `data', fill in the SG list.
2097 sg = &((PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr)->SGL.u.Simple[0];
2099 len = ccb->csio.dxfer_len;
2100 v = ccb->csio.data_ptr;
2101 ASSERT (ccb->csio.dxfer_len >= 0);
2102 MessageSize = I2O_MESSAGE_FRAME_getMessageSize(Message_Ptr);
2103 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setByteCount(
2104 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr, len);
2105 while ((len > 0) && (sg < &((PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2106 Message_Ptr)->SGL.u.Simple[SG_SIZE])) {
2108 next = base = KVTOPHYS(v);
2109 I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress(sg, base);
2111 /* How far can we go contiguously */
2112 while ((len > 0) && (base == next)) {
2113 next = trunc_page(base) + PAGE_SIZE;
2124 I2O_FLAGS_COUNT_setCount(&(sg->FlagsCount), span);
2126 rw |= I2O_SGL_FLAGS_LAST_ELEMENT;
2128 I2O_FLAGS_COUNT_setFlags(&(sg->FlagsCount),
2129 I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT | rw);
2131 MessageSize += sizeof(*sg) / sizeof(U32);
2133 /* We always do the request sense ... */
2134 if ((span = ccb->csio.sense_len) == 0) {
2135 span = sizeof(ccb->csio.sense_data);
2137 SG(sg, 0, I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER,
2138 &(ccb->csio.sense_data), span);
2139 I2O_MESSAGE_FRAME_setMessageSize(Message_Ptr,
2140 MessageSize + (sizeof(*sg) / sizeof(U32)));
2141 return (Message_Ptr);
2142 } /* ASR_init_message */
2145 * Reset the adapter.
2149 INOUT Asr_softc_t * sc)
2151 struct initOutBoundMessage {
2152 I2O_EXEC_OUTBOUND_INIT_MESSAGE M;
2155 defAlignLong(struct initOutBoundMessage,Message);
2156 PI2O_EXEC_OUTBOUND_INIT_MESSAGE Message_Ptr;
2157 OUT U32 * volatile Reply_Ptr;
2161 * Build up our copy of the Message.
2163 Message_Ptr = (PI2O_EXEC_OUTBOUND_INIT_MESSAGE)ASR_fillMessage(Message,
2164 sizeof(I2O_EXEC_OUTBOUND_INIT_MESSAGE));
2165 I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame),
2166 I2O_EXEC_OUTBOUND_INIT);
2167 I2O_EXEC_OUTBOUND_INIT_MESSAGE_setHostPageFrameSize(Message_Ptr, PAGE_SIZE);
2168 I2O_EXEC_OUTBOUND_INIT_MESSAGE_setOutboundMFrameSize(Message_Ptr,
2169 sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME));
2171 * Reset the Reply Status
2173 *(Reply_Ptr = (U32 *)((char *)Message_Ptr
2174 + sizeof(I2O_EXEC_OUTBOUND_INIT_MESSAGE))) = 0;
2175 SG (&(Message_Ptr->SGL), 0, I2O_SGL_FLAGS_LAST_ELEMENT, Reply_Ptr,
2178 * Send the Message out
2180 if ((Old = ASR_initiateCp (sc->ha_Virt, sc->ha_Fvirt, (PI2O_MESSAGE_FRAME)Message_Ptr)) != (U32)-1L) {
2184 * Wait for a response (Poll).
2186 while (*Reply_Ptr < I2O_EXEC_OUTBOUND_INIT_REJECTED);
2188 * Re-enable the interrupts.
2190 sc->ha_Virt->Mask = Old;
2192 * Populate the outbound table.
2194 if (sc->ha_Msgs == (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)NULL) {
2196 /* Allocate the reply frames */
2197 size = sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)
2198 * sc->ha_Msgs_Count;
2201 * contigmalloc only works reliably at
2202 * initialization time.
2204 if ((sc->ha_Msgs = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)
2205 contigmalloc (size, M_DEVBUF, M_WAITOK, 0ul,
2206 0xFFFFFFFFul, (u_long)sizeof(U32), 0ul))
2207 != (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)NULL) {
2208 (void)bzero ((char *)sc->ha_Msgs, size);
2209 sc->ha_Msgs_Phys = KVTOPHYS(sc->ha_Msgs);
2213 /* Initialize the outbound FIFO */
2214 if (sc->ha_Msgs != (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)NULL)
2215 for (size = sc->ha_Msgs_Count, addr = sc->ha_Msgs_Phys;
2217 sc->ha_Virt->FromFIFO = addr;
2218 addr += sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME);
2220 return (*Reply_Ptr);
2223 } /* ASR_initOutBound */
2226 * Set the system table
2230 IN Asr_softc_t * sc)
2232 PI2O_EXEC_SYS_TAB_SET_MESSAGE Message_Ptr;
2233 PI2O_SET_SYSTAB_HEADER SystemTable;
2235 PI2O_SGE_SIMPLE_ELEMENT sg;
2238 if ((SystemTable = (PI2O_SET_SYSTAB_HEADER)malloc (
2239 sizeof(I2O_SET_SYSTAB_HEADER), M_TEMP, M_WAITOK))
2240 == (PI2O_SET_SYSTAB_HEADER)NULL) {
2243 bzero (SystemTable, sizeof(I2O_SET_SYSTAB_HEADER));
2244 for (ha = Asr_softc; ha; ha = ha->ha_next) {
2245 ++SystemTable->NumberEntries;
2247 if ((Message_Ptr = (PI2O_EXEC_SYS_TAB_SET_MESSAGE)malloc (
2248 sizeof(I2O_EXEC_SYS_TAB_SET_MESSAGE) - sizeof(I2O_SG_ELEMENT)
2249 + ((3+SystemTable->NumberEntries) * sizeof(I2O_SGE_SIMPLE_ELEMENT)),
2250 M_TEMP, M_WAITOK)) == (PI2O_EXEC_SYS_TAB_SET_MESSAGE)NULL) {
2251 free (SystemTable, M_TEMP);
2254 (void)ASR_fillMessage((char *)Message_Ptr,
2255 sizeof(I2O_EXEC_SYS_TAB_SET_MESSAGE) - sizeof(I2O_SG_ELEMENT)
2256 + ((3+SystemTable->NumberEntries) * sizeof(I2O_SGE_SIMPLE_ELEMENT)));
2257 I2O_MESSAGE_FRAME_setVersionOffset(&(Message_Ptr->StdMessageFrame),
2259 (((sizeof(I2O_EXEC_SYS_TAB_SET_MESSAGE) - sizeof(I2O_SG_ELEMENT))
2260 / sizeof(U32)) << 4)));
2261 I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame),
2262 I2O_EXEC_SYS_TAB_SET);
2264 * Call the LCT table to determine the number of device entries
2265 * to reserve space for.
2266 * since this code is reused in several systems, code efficiency
2267 * is greater by using a shift operation rather than a divide by
2268 * sizeof(u_int32_t).
2270 sg = (PI2O_SGE_SIMPLE_ELEMENT)((char *)Message_Ptr
2271 + ((I2O_MESSAGE_FRAME_getVersionOffset(
2272 &(Message_Ptr->StdMessageFrame)) & 0xF0) >> 2));
2273 SG(sg, 0, I2O_SGL_FLAGS_DIR, SystemTable, sizeof(I2O_SET_SYSTAB_HEADER));
2275 for (ha = Asr_softc; ha; ha = ha->ha_next) {
2278 ? (I2O_SGL_FLAGS_DIR)
2279 : (I2O_SGL_FLAGS_DIR | I2O_SGL_FLAGS_END_OF_BUFFER)),
2280 &(ha->ha_SystemTable), sizeof(ha->ha_SystemTable));
2283 SG(sg, 0, I2O_SGL_FLAGS_DIR | I2O_SGL_FLAGS_END_OF_BUFFER, NULL, 0);
2284 SG(sg, 1, I2O_SGL_FLAGS_DIR | I2O_SGL_FLAGS_LAST_ELEMENT
2285 | I2O_SGL_FLAGS_END_OF_BUFFER, NULL, 0);
2286 retVal = ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
2287 free (Message_Ptr, M_TEMP);
2288 free (SystemTable, M_TEMP);
2290 } /* ASR_setSysTab */
2294 INOUT Asr_softc_t * sc)
2296 defAlignLong(I2O_EXEC_HRT_GET_MESSAGE,Message);
2297 I2O_EXEC_HRT_GET_MESSAGE * Message_Ptr;
2300 I2O_HRT_ENTRY Entry[MAX_CHANNEL];
2302 u_int8_t NumberOfEntries;
2303 PI2O_HRT_ENTRY Entry;
2305 bzero ((void *)&Hrt, sizeof (Hrt));
2306 Message_Ptr = (I2O_EXEC_HRT_GET_MESSAGE *)ASR_fillMessage(Message,
2307 sizeof(I2O_EXEC_HRT_GET_MESSAGE) - sizeof(I2O_SG_ELEMENT)
2308 + sizeof(I2O_SGE_SIMPLE_ELEMENT));
2309 I2O_MESSAGE_FRAME_setVersionOffset(&(Message_Ptr->StdMessageFrame),
2311 + (((sizeof(I2O_EXEC_HRT_GET_MESSAGE) - sizeof(I2O_SG_ELEMENT))
2312 / sizeof(U32)) << 4)));
2313 I2O_MESSAGE_FRAME_setFunction (&(Message_Ptr->StdMessageFrame),
2317 * Set up the buffers as scatter gather elements.
2319 SG(&(Message_Ptr->SGL), 0,
2320 I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER,
2322 if (ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr) != CAM_REQ_CMP) {
2325 if ((NumberOfEntries = I2O_HRT_getNumberEntries(&Hrt.Header))
2326 > (MAX_CHANNEL + 1)) {
2327 NumberOfEntries = MAX_CHANNEL + 1;
2329 for (Entry = Hrt.Header.HRTEntry;
2330 NumberOfEntries != 0;
2331 ++Entry, --NumberOfEntries) {
2332 PI2O_LCT_ENTRY Device;
2334 for (Device = sc->ha_LCT->LCTEntry; Device < (PI2O_LCT_ENTRY)
2335 (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT));
2337 if (I2O_LCT_ENTRY_getLocalTID(Device)
2338 == (I2O_HRT_ENTRY_getAdapterID(Entry) & 0xFFF)) {
2339 Device->le_bus = I2O_HRT_ENTRY_getAdapterID(
2341 if ((Device->le_bus > sc->ha_MaxBus)
2342 && (Device->le_bus <= MAX_CHANNEL)) {
2343 sc->ha_MaxBus = Device->le_bus;
2349 } /* ASR_acquireHrt */
2352 * Enable the adapter.
2356 IN Asr_softc_t * sc)
2358 defAlignLong(I2O_EXEC_SYS_ENABLE_MESSAGE,Message);
2359 PI2O_EXEC_SYS_ENABLE_MESSAGE Message_Ptr;
2361 Message_Ptr = (PI2O_EXEC_SYS_ENABLE_MESSAGE)ASR_fillMessage(Message,
2362 sizeof(I2O_EXEC_SYS_ENABLE_MESSAGE));
2363 I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame),
2364 I2O_EXEC_SYS_ENABLE);
2365 return (ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr) != 0);
2366 } /* ASR_enableSys */
2369 * Perform the stages necessary to initialize the adapter
2373 IN Asr_softc_t * sc)
2375 return ((ASR_initOutBound(sc) == 0)
2376 || (ASR_setSysTab(sc) != CAM_REQ_CMP)
2377 || (ASR_enableSys(sc) != CAM_REQ_CMP));
2381 * Send a Synchronize Cache command to the target device.
2385 IN Asr_softc_t * sc,
2393 * We will not synchronize the device when there are outstanding
2394 * commands issued by the OS (this is due to a locked up device,
2395 * as the OS normally would flush all outstanding commands before
2396 * issuing a shutdown or an adapter reset).
2398 if ((sc != (Asr_softc_t *)NULL)
2399 && (LIST_FIRST(&(sc->ha_ccb)) != (struct ccb_hdr *)NULL)
2400 && ((TID = ASR_getTid (sc, bus, target, lun)) != (tid_t)-1)
2401 && (TID != (tid_t)0)) {
2402 defAlignLong(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE,Message);
2403 PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE Message_Ptr;
2406 = getAlignLong(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE, Message),
2407 sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2408 - sizeof(I2O_SG_ELEMENT) + sizeof(I2O_SGE_SIMPLE_ELEMENT));
2410 I2O_MESSAGE_FRAME_setVersionOffset(
2411 (PI2O_MESSAGE_FRAME)Message_Ptr,
2413 | (((sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2414 - sizeof(I2O_SG_ELEMENT))
2415 / sizeof(U32)) << 4));
2416 I2O_MESSAGE_FRAME_setMessageSize(
2417 (PI2O_MESSAGE_FRAME)Message_Ptr,
2418 (sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2419 - sizeof(I2O_SG_ELEMENT))
2421 I2O_MESSAGE_FRAME_setInitiatorAddress (
2422 (PI2O_MESSAGE_FRAME)Message_Ptr, 1);
2423 I2O_MESSAGE_FRAME_setFunction(
2424 (PI2O_MESSAGE_FRAME)Message_Ptr, I2O_PRIVATE_MESSAGE);
2425 I2O_MESSAGE_FRAME_setTargetAddress(
2426 (PI2O_MESSAGE_FRAME)Message_Ptr, TID);
2427 I2O_PRIVATE_MESSAGE_FRAME_setXFunctionCode (
2428 (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr,
2430 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setTID(Message_Ptr, TID);
2431 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (Message_Ptr,
2432 I2O_SCB_FLAG_ENABLE_DISCONNECT
2433 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
2434 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER);
2435 I2O_PRIVATE_MESSAGE_FRAME_setOrganizationID(
2436 (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr,
2437 DPT_ORGANIZATION_ID);
2438 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setCDBLength(Message_Ptr, 6);
2439 Message_Ptr->CDB[0] = SYNCHRONIZE_CACHE;
2440 Message_Ptr->CDB[1] = (lun << 5);
2442 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (Message_Ptr,
2443 (I2O_SCB_FLAG_XFER_FROM_DEVICE
2444 | I2O_SCB_FLAG_ENABLE_DISCONNECT
2445 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
2446 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER));
2448 (void)ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
2455 IN Asr_softc_t * sc)
2457 int bus, target, lun;
2459 for (bus = 0; bus <= sc->ha_MaxBus; ++bus) {
2460 for (target = 0; target <= sc->ha_MaxId; ++target) {
2461 for (lun = 0; lun <= sc->ha_MaxLun; ++lun) {
2462 ASR_sync(sc,bus,target,lun);
2469 * Reset the HBA, targets and BUS.
2470 * Currently this resets *all* the SCSI busses.
2474 IN Asr_softc_t * sc)
2476 ASR_synchronize (sc);
2477 (void)ASR_reset (sc);
2478 } /* asr_hbareset */
2481 * A reduced copy of the real pci_map_mem, incorporating the MAX_MAP
2482 * limit and a reduction in error checking (in the pre 4.0 case).
2486 #if defined(__DragonFly__) || __FreeBSD_version >= 400000
2491 IN Asr_softc_t * sc)
2496 #if defined(__DragonFly__) || __FreeBSD_version >= 400000
2498 * I2O specification says we must find first *memory* mapped BAR
2500 for (rid = PCIR_MAPS;
2501 rid < (PCIR_MAPS + 4 * sizeof(u_int32_t));
2502 rid += sizeof(u_int32_t)) {
2503 p = pci_read_config(tag, rid, sizeof(p));
2511 if (rid >= (PCIR_MAPS + 4 * sizeof(u_int32_t))) {
2514 p = pci_read_config(tag, rid, sizeof(p));
2515 pci_write_config(tag, rid, -1, sizeof(p));
2516 l = 0 - (pci_read_config(tag, rid, sizeof(l)) & ~15);
2517 pci_write_config(tag, rid, p, sizeof(p));
2522 * The 2005S Zero Channel RAID solution is not a perfect PCI
2523 * citizen. It asks for 4MB on BAR0, and 0MB on BAR1, once
2524 * enabled it rewrites the size of BAR0 to 2MB, sets BAR1 to
2525 * BAR0+2MB and sets it's size to 2MB. The IOP registers are
2526 * accessible via BAR0, the messaging registers are accessible
2527 * via BAR1. If the subdevice code is 50 to 59 decimal.
2529 s = pci_read_config(tag, PCIR_DEVVENDOR, sizeof(s));
2530 if (s != 0xA5111044) {
2531 s = pci_read_config(tag, PCIR_SUBVEND_0, sizeof(s));
2532 if ((((ADPTDOMINATOR_SUB_ID_START ^ s) & 0xF000FFFF) == 0)
2533 && (ADPTDOMINATOR_SUB_ID_START <= s)
2534 && (s <= ADPTDOMINATOR_SUB_ID_END)) {
2535 l = MAX_MAP; /* Conjoined BAR Raptor Daptor */
2539 sc->ha_mem_res = bus_alloc_resource(tag, SYS_RES_MEMORY, &rid,
2540 p, p + l, l, RF_ACTIVE);
2541 if (sc->ha_mem_res == (struct resource *)NULL) {
2544 sc->ha_Base = (void *)rman_get_start(sc->ha_mem_res);
2545 if (sc->ha_Base == (void *)NULL) {
2548 sc->ha_Virt = (i2oRegs_t *) rman_get_virtual(sc->ha_mem_res);
2549 if (s == 0xA5111044) { /* Split BAR Raptor Daptor */
2550 if ((rid += sizeof(u_int32_t))
2551 >= (PCIR_MAPS + 4 * sizeof(u_int32_t))) {
2554 p = pci_read_config(tag, rid, sizeof(p));
2555 pci_write_config(tag, rid, -1, sizeof(p));
2556 l = 0 - (pci_read_config(tag, rid, sizeof(l)) & ~15);
2557 pci_write_config(tag, rid, p, sizeof(p));
2562 sc->ha_mes_res = bus_alloc_resource(tag, SYS_RES_MEMORY, &rid,
2563 p, p + l, l, RF_ACTIVE);
2564 if (sc->ha_mes_res == (struct resource *)NULL) {
2567 if ((void *)rman_get_start(sc->ha_mes_res) == (void *)NULL) {
2570 sc->ha_Fvirt = (U8 *) rman_get_virtual(sc->ha_mes_res);
2572 sc->ha_Fvirt = (U8 *)(sc->ha_Virt);
2575 vm_size_t psize, poffs;
2578 * I2O specification says we must find first *memory* mapped BAR
2580 for (rid = PCI_MAP_REG_START;
2581 rid < (PCI_MAP_REG_START + 4 * sizeof(u_int32_t));
2582 rid += sizeof(u_int32_t)) {
2583 p = pci_conf_read (tag, rid);
2588 if (rid >= (PCI_MAP_REG_START + 4 * sizeof(u_int32_t))) {
2589 rid = PCI_MAP_REG_START;
2592 ** save old mapping, get size and type of memory
2594 ** type is in the lowest four bits.
2595 ** If device requires 2^n bytes, the next
2596 ** n-4 bits are read as 0.
2599 sc->ha_Base = (void *)((p = pci_conf_read (tag, rid))
2600 & PCI_MAP_MEMORY_ADDRESS_MASK);
2601 pci_conf_write (tag, rid, 0xfffffffful);
2602 l = pci_conf_read (tag, rid);
2603 pci_conf_write (tag, rid, p);
2609 if (!((l & PCI_MAP_MEMORY_TYPE_MASK) == PCI_MAP_MEMORY_TYPE_32BIT_1M
2610 && ((u_long)sc->ha_Base & ~0xfffff) == 0)
2611 && ((l & PCI_MAP_MEMORY_TYPE_MASK) != PCI_MAP_MEMORY_TYPE_32BIT)) {
2613 "asr_pci_map_mem failed: bad memory type=0x%x\n",
2622 psize = -(l & PCI_MAP_MEMORY_ADDRESS_MASK);
2623 if (psize > MAX_MAP) {
2627 * The 2005S Zero Channel RAID solution is not a perfect PCI
2628 * citizen. It asks for 4MB on BAR0, and 0MB on BAR1, once
2629 * enabled it rewrites the size of BAR0 to 2MB, sets BAR1 to
2630 * BAR0+2MB and sets it's size to 2MB. The IOP registers are
2631 * accessible via BAR0, the messaging registers are accessible
2632 * via BAR1. If the subdevice code is 50 to 59 decimal.
2634 s = pci_read_config(tag, PCIR_DEVVENDOR, sizeof(s));
2635 if (s != 0xA5111044) {
2636 s = pci_conf_read (tag, PCIR_SUBVEND_0)
2637 if ((((ADPTDOMINATOR_SUB_ID_START ^ s) & 0xF000FFFF) == 0)
2638 && (ADPTDOMINATOR_SUB_ID_START <= s)
2639 && (s <= ADPTDOMINATOR_SUB_ID_END)) {
2644 if ((sc->ha_Base == (void *)NULL)
2645 || (sc->ha_Base == (void *)PCI_MAP_MEMORY_ADDRESS_MASK)) {
2646 debug_asr_printf ("asr_pci_map_mem: not configured by bios.\n");
2651 ** Truncate sc->ha_Base to page boundary.
2652 ** (Or does pmap_mapdev the job?)
2655 poffs = (u_long)sc->ha_Base - trunc_page ((u_long)sc->ha_Base);
2656 sc->ha_Virt = (i2oRegs_t *)pmap_mapdev ((u_long)sc->ha_Base - poffs,
2659 if (sc->ha_Virt == (i2oRegs_t *)NULL) {
2663 sc->ha_Virt = (i2oRegs_t *)((u_long)sc->ha_Virt + poffs);
2664 if (s == 0xA5111044) {
2665 if ((rid += sizeof(u_int32_t))
2666 >= (PCI_MAP_REG_START + 4 * sizeof(u_int32_t))) {
2671 ** save old mapping, get size and type of memory
2673 ** type is in the lowest four bits.
2674 ** If device requires 2^n bytes, the next
2675 ** n-4 bits are read as 0.
2678 if ((((p = pci_conf_read (tag, rid))
2679 & PCI_MAP_MEMORY_ADDRESS_MASK) == 0L)
2680 || ((p & PCI_MAP_MEMORY_ADDRESS_MASK)
2681 == PCI_MAP_MEMORY_ADDRESS_MASK)) {
2682 debug_asr_printf ("asr_pci_map_mem: not configured by bios.\n");
2684 pci_conf_write (tag, rid, 0xfffffffful);
2685 l = pci_conf_read (tag, rid);
2686 pci_conf_write (tag, rid, p);
2687 p &= PCI_MAP_MEMORY_TYPE_MASK;
2693 if (!((l & PCI_MAP_MEMORY_TYPE_MASK)
2694 == PCI_MAP_MEMORY_TYPE_32BIT_1M
2695 && (p & ~0xfffff) == 0)
2696 && ((l & PCI_MAP_MEMORY_TYPE_MASK)
2697 != PCI_MAP_MEMORY_TYPE_32BIT)) {
2699 "asr_pci_map_mem failed: bad memory type=0x%x\n",
2708 psize = -(l & PCI_MAP_MEMORY_ADDRESS_MASK);
2709 if (psize > MAX_MAP) {
2714 ** Truncate p to page boundary.
2715 ** (Or does pmap_mapdev the job?)
2718 poffs = p - trunc_page (p);
2719 sc->ha_Fvirt = (U8 *)pmap_mapdev (p - poffs, psize + poffs);
2721 if (sc->ha_Fvirt == (U8 *)NULL) {
2725 sc->ha_Fvirt = (U8 *)((u_long)sc->ha_Fvirt + poffs);
2727 sc->ha_Fvirt = (U8 *)(sc->ha_Virt);
2731 } /* asr_pci_map_mem */
2734 * A simplified copy of the real pci_map_int with additional
2735 * registration requirements.
2739 #if defined(__DragonFly__) || __FreeBSD_version >= 400000
2744 IN Asr_softc_t * sc)
2746 #if defined(__DragonFly__) || __FreeBSD_version >= 400000
2749 sc->ha_irq_res = bus_alloc_resource(tag, SYS_RES_IRQ, &rid,
2750 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
2751 if (sc->ha_irq_res == (struct resource *)NULL) {
2754 if (bus_setup_intr(tag, sc->ha_irq_res, INTR_TYPE_CAM,
2755 (driver_intr_t *)asr_intr, (void *)sc, &(sc->ha_intr))) {
2758 sc->ha_irq = pci_read_config(tag, PCIR_INTLINE, sizeof(char));
2760 if (!pci_map_int(tag, (pci_inthand_t *)asr_intr,
2761 (void *)sc, &cam_imask)) {
2764 sc->ha_irq = pci_conf_read(tag, PCIR_INTLINE);
2767 } /* asr_pci_map_int */
2770 * Attach the devices, and virtual devices to the driver list.
2773 asr_attach (ATTACH_ARGS)
2776 struct scsi_inquiry_data * iq;
2779 sc = malloc(sizeof(*sc), M_DEVBUF, M_INTWAIT);
2780 if (Asr_softc == (Asr_softc_t *)NULL) {
2782 * Fixup the OS revision as saved in the dptsig for the
2783 * engine (dptioctl.h) to pick up.
2785 bcopy (osrelease, &ASR_sig.dsDescription[16], 5);
2786 printf ("asr%d: major=%d\n", unit, asr_cdevsw.d_maj);
2789 * Initialize the software structure
2791 bzero (sc, sizeof(*sc));
2792 LIST_INIT(&(sc->ha_ccb));
2793 /* Link us into the HA list */
2797 for (ha = &Asr_softc; *ha; ha = &((*ha)->ha_next));
2801 PI2O_EXEC_STATUS_GET_REPLY status;
2805 * This is the real McCoy!
2807 if (!asr_pci_map_mem(tag, sc)) {
2808 printf ("asr%d: could not map memory\n", unit);
2809 ATTACH_RETURN(ENXIO);
2811 /* Enable if not formerly enabled */
2812 #if defined(__DragonFly__) || __FreeBSD_version >= 400000
2813 pci_write_config (tag, PCIR_COMMAND,
2814 pci_read_config (tag, PCIR_COMMAND, sizeof(char))
2815 | PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN, sizeof(char));
2816 /* Knowledge is power, responsibility is direct */
2818 struct pci_devinfo {
2819 STAILQ_ENTRY(pci_devinfo) pci_links;
2820 struct resource_list resources;
2822 } * dinfo = device_get_ivars(tag);
2823 sc->ha_pciBusNum = dinfo->cfg.bus;
2824 sc->ha_pciDeviceNum = (dinfo->cfg.slot << 3)
2828 pci_conf_write (tag, PCIR_COMMAND,
2829 pci_conf_read (tag, PCIR_COMMAND)
2830 | PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN);
2831 /* Knowledge is power, responsibility is direct */
2832 switch (pci_mechanism) {
2835 sc->ha_pciBusNum = tag.cfg1 >> 16;
2836 sc->ha_pciDeviceNum = tag.cfg1 >> 8;
2839 sc->ha_pciBusNum = tag.cfg2.forward;
2840 sc->ha_pciDeviceNum = ((tag.cfg2.enable >> 1) & 7)
2841 | (tag.cfg2.port >> 5);
2844 /* Check if the device is there? */
2845 if ((ASR_resetIOP(sc->ha_Virt, sc->ha_Fvirt) == 0)
2846 || ((status = (PI2O_EXEC_STATUS_GET_REPLY)malloc (
2847 sizeof(I2O_EXEC_STATUS_GET_REPLY), M_TEMP, M_WAITOK))
2848 == (PI2O_EXEC_STATUS_GET_REPLY)NULL)
2849 || (ASR_getStatus(sc->ha_Virt, sc->ha_Fvirt, status) == NULL)) {
2850 printf ("asr%d: could not initialize hardware\n", unit);
2851 ATTACH_RETURN(ENODEV); /* Get next, maybe better luck */
2853 sc->ha_SystemTable.OrganizationID = status->OrganizationID;
2854 sc->ha_SystemTable.IOP_ID = status->IOP_ID;
2855 sc->ha_SystemTable.I2oVersion = status->I2oVersion;
2856 sc->ha_SystemTable.IopState = status->IopState;
2857 sc->ha_SystemTable.MessengerType = status->MessengerType;
2858 sc->ha_SystemTable.InboundMessageFrameSize
2859 = status->InboundMFrameSize;
2860 sc->ha_SystemTable.MessengerInfo.InboundMessagePortAddressLow
2861 = (U32)(sc->ha_Base) + (U32)(&(((i2oRegs_t *)NULL)->ToFIFO));
2863 if (!asr_pci_map_int(tag, (void *)sc)) {
2864 printf ("asr%d: could not map interrupt\n", unit);
2865 ATTACH_RETURN(ENXIO);
2868 /* Adjust the maximim inbound count */
2869 if (((sc->ha_QueueSize
2870 = I2O_EXEC_STATUS_GET_REPLY_getMaxInboundMFrames(status))
2872 || (sc->ha_QueueSize == 0)) {
2873 sc->ha_QueueSize = MAX_INBOUND;
2876 /* Adjust the maximum outbound count */
2877 if (((sc->ha_Msgs_Count
2878 = I2O_EXEC_STATUS_GET_REPLY_getMaxOutboundMFrames(status))
2880 || (sc->ha_Msgs_Count == 0)) {
2881 sc->ha_Msgs_Count = MAX_OUTBOUND;
2883 if (sc->ha_Msgs_Count > sc->ha_QueueSize) {
2884 sc->ha_Msgs_Count = sc->ha_QueueSize;
2887 /* Adjust the maximum SG size to adapter */
2888 if ((size = (I2O_EXEC_STATUS_GET_REPLY_getInboundMFrameSize(
2889 status) << 2)) > MAX_INBOUND_SIZE) {
2890 size = MAX_INBOUND_SIZE;
2892 free (status, M_TEMP);
2893 sc->ha_SgSize = (size - sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2894 + sizeof(I2O_SG_ELEMENT)) / sizeof(I2O_SGE_SIMPLE_ELEMENT);
2898 * Only do a bus/HBA reset on the first time through. On this
2899 * first time through, we do not send a flush to the devices.
2901 if (ASR_init(sc) == 0) {
2903 I2O_PARAM_RESULTS_LIST_HEADER Header;
2904 I2O_PARAM_READ_OPERATION_RESULT Read;
2905 I2O_DPT_EXEC_IOP_BUFFERS_SCALAR Info;
2907 defAlignLong (struct BufferInfo, Buffer);
2908 PI2O_DPT_EXEC_IOP_BUFFERS_SCALAR Info;
2909 # define FW_DEBUG_BLED_OFFSET 8
2911 if ((Info = (PI2O_DPT_EXEC_IOP_BUFFERS_SCALAR)
2912 ASR_getParams(sc, 0,
2913 I2O_DPT_EXEC_IOP_BUFFERS_GROUP_NO,
2914 Buffer, sizeof(struct BufferInfo)))
2915 != (PI2O_DPT_EXEC_IOP_BUFFERS_SCALAR)NULL) {
2916 sc->ha_blinkLED = sc->ha_Fvirt
2917 + I2O_DPT_EXEC_IOP_BUFFERS_SCALAR_getSerialOutputOffset(Info)
2918 + FW_DEBUG_BLED_OFFSET;
2920 if (ASR_acquireLct(sc) == 0) {
2921 (void)ASR_acquireHrt(sc);
2924 printf ("asr%d: failed to initialize\n", unit);
2925 ATTACH_RETURN(ENXIO);
2928 * Add in additional probe responses for more channels. We
2929 * are reusing the variable `target' for a channel loop counter.
2930 * Done here because of we need both the acquireLct and
2933 { PI2O_LCT_ENTRY Device;
2935 for (Device = sc->ha_LCT->LCTEntry; Device < (PI2O_LCT_ENTRY)
2936 (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT));
2938 if (Device->le_type == I2O_UNKNOWN) {
2941 if (I2O_LCT_ENTRY_getUserTID(Device) == 0xFFF) {
2942 if (Device->le_target > sc->ha_MaxId) {
2943 sc->ha_MaxId = Device->le_target;
2945 if (Device->le_lun > sc->ha_MaxLun) {
2946 sc->ha_MaxLun = Device->le_lun;
2949 if (((Device->le_type & I2O_PORT) != 0)
2950 && (Device->le_bus <= MAX_CHANNEL)) {
2951 /* Do not increase MaxId for efficiency */
2952 sc->ha_adapter_target[Device->le_bus]
2953 = Device->le_target;
2960 * Print the HBA model number as inquired from the card.
2963 printf ("asr%d:", unit);
2965 if ((iq = (struct scsi_inquiry_data *)malloc (
2966 sizeof(struct scsi_inquiry_data), M_TEMP, M_WAITOK))
2967 != (struct scsi_inquiry_data *)NULL) {
2968 defAlignLong(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE,Message);
2969 PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE Message_Ptr;
2972 bzero (iq, sizeof(struct scsi_inquiry_data));
2974 = getAlignLong(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE, Message),
2975 sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2976 - sizeof(I2O_SG_ELEMENT) + sizeof(I2O_SGE_SIMPLE_ELEMENT));
2978 I2O_MESSAGE_FRAME_setVersionOffset(
2979 (PI2O_MESSAGE_FRAME)Message_Ptr,
2981 | (((sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2982 - sizeof(I2O_SG_ELEMENT))
2983 / sizeof(U32)) << 4));
2984 I2O_MESSAGE_FRAME_setMessageSize(
2985 (PI2O_MESSAGE_FRAME)Message_Ptr,
2986 (sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2987 - sizeof(I2O_SG_ELEMENT) + sizeof(I2O_SGE_SIMPLE_ELEMENT))
2989 I2O_MESSAGE_FRAME_setInitiatorAddress (
2990 (PI2O_MESSAGE_FRAME)Message_Ptr, 1);
2991 I2O_MESSAGE_FRAME_setFunction(
2992 (PI2O_MESSAGE_FRAME)Message_Ptr, I2O_PRIVATE_MESSAGE);
2993 I2O_PRIVATE_MESSAGE_FRAME_setXFunctionCode (
2994 (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr,
2996 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (Message_Ptr,
2997 I2O_SCB_FLAG_ENABLE_DISCONNECT
2998 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
2999 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER);
3000 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setInterpret(Message_Ptr, 1);
3001 I2O_PRIVATE_MESSAGE_FRAME_setOrganizationID(
3002 (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr,
3003 DPT_ORGANIZATION_ID);
3004 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setCDBLength(Message_Ptr, 6);
3005 Message_Ptr->CDB[0] = INQUIRY;
3006 Message_Ptr->CDB[4] = (unsigned char)sizeof(struct scsi_inquiry_data);
3007 if (Message_Ptr->CDB[4] == 0) {
3008 Message_Ptr->CDB[4] = 255;
3011 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (Message_Ptr,
3012 (I2O_SCB_FLAG_XFER_FROM_DEVICE
3013 | I2O_SCB_FLAG_ENABLE_DISCONNECT
3014 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
3015 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER));
3017 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setByteCount(
3018 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr,
3019 sizeof(struct scsi_inquiry_data));
3020 SG(&(Message_Ptr->SGL), 0,
3021 I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER,
3022 iq, sizeof(struct scsi_inquiry_data));
3023 (void)ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
3025 if (iq->vendor[0] && (iq->vendor[0] != ' ')) {
3027 ASR_prstring (iq->vendor, 8);
3030 if (iq->product[0] && (iq->product[0] != ' ')) {
3032 ASR_prstring (iq->product, 16);
3035 if (iq->revision[0] && (iq->revision[0] != ' ')) {
3036 printf (" FW Rev. ");
3037 ASR_prstring (iq->revision, 4);
3040 free ((caddr_t)iq, M_TEMP);
3045 printf (" %d channel, %d CCBs, Protocol I2O\n", sc->ha_MaxBus + 1,
3046 (sc->ha_QueueSize > MAX_INBOUND) ? MAX_INBOUND : sc->ha_QueueSize);
3049 * fill in the prototype cam_path.
3053 union asr_ccb * ccb;
3055 if ((ccb = asr_alloc_ccb (sc)) == (union asr_ccb *)NULL) {
3056 printf ("asr%d: CAM could not be notified of asynchronous callback parameters\n", unit);
3057 ATTACH_RETURN(ENOMEM);
3059 for (bus = 0; bus <= sc->ha_MaxBus; ++bus) {
3060 int QueueSize = sc->ha_QueueSize;
3062 if (QueueSize > MAX_INBOUND) {
3063 QueueSize = MAX_INBOUND;
3067 * Construct our first channel SIM entry
3069 sc->ha_sim[bus] = cam_sim_alloc(
3070 asr_action, asr_poll, "asr", sc,
3071 unit, 1, QueueSize, NULL);
3072 if (sc->ha_sim[bus] == NULL)
3075 if (xpt_bus_register(sc->ha_sim[bus], bus)
3077 cam_sim_free(sc->ha_sim[bus]);
3078 sc->ha_sim[bus] = NULL;
3082 if (xpt_create_path(&(sc->ha_path[bus]), /*periph*/NULL,
3083 cam_sim_path(sc->ha_sim[bus]), CAM_TARGET_WILDCARD,
3084 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
3086 cam_sim_path(sc->ha_sim[bus]));
3087 cam_sim_free(sc->ha_sim[bus]);
3088 sc->ha_sim[bus] = NULL;
3095 * Generate the device node information
3097 make_dev(&asr_cdevsw, unit, 0, 0, S_IRWXU, "rasr%d", unit);
3103 IN struct cam_sim *sim)
3105 asr_intr(cam_sim_softc(sim));
3110 IN struct cam_sim * sim,
3113 struct Asr_softc * sc;
3115 debug_asr_printf ("asr_action(%lx,%lx{%x})\n",
3116 (u_long)sim, (u_long)ccb, ccb->ccb_h.func_code);
3118 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("asr_action\n"));
3120 ccb->ccb_h.spriv_ptr0 = sc = (struct Asr_softc *)cam_sim_softc(sim);
3122 switch (ccb->ccb_h.func_code) {
3124 /* Common cases first */
3125 case XPT_SCSI_IO: /* Execute the requested I/O operation */
3128 char M[MAX_INBOUND_SIZE];
3130 defAlignLong(struct Message,Message);
3131 PI2O_MESSAGE_FRAME Message_Ptr;
3133 /* Reject incoming commands while we are resetting the card */
3134 if (sc->ha_in_reset != HA_OPERATIONAL) {
3135 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3136 if (sc->ha_in_reset >= HA_OFF_LINE) {
3137 /* HBA is now off-line */
3138 ccb->ccb_h.status |= CAM_UNREC_HBA_ERROR;
3140 /* HBA currently resetting, try again later. */
3141 ccb->ccb_h.status |= CAM_REQUEUE_REQ;
3143 debug_asr_cmd_printf (" e\n");
3145 debug_asr_cmd_printf (" q\n");
3148 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
3150 "asr%d WARNING: scsi_cmd(%x) already done on b%dt%du%d\n",
3151 cam_sim_unit(xpt_path_sim(ccb->ccb_h.path)),
3152 ccb->csio.cdb_io.cdb_bytes[0],
3154 ccb->ccb_h.target_id,
3155 ccb->ccb_h.target_lun);
3157 debug_asr_cmd_printf ("(%d,%d,%d,%d)",
3160 ccb->ccb_h.target_id,
3161 ccb->ccb_h.target_lun);
3162 debug_asr_cmd_dump_ccb(ccb);
3164 if ((Message_Ptr = ASR_init_message ((union asr_ccb *)ccb,
3165 (PI2O_MESSAGE_FRAME)Message)) != (PI2O_MESSAGE_FRAME)NULL) {
3166 debug_asr_cmd2_printf ("TID=%x:\n",
3167 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_getTID(
3168 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr));
3169 debug_asr_cmd2_dump_message(Message_Ptr);
3170 debug_asr_cmd1_printf (" q");
3172 if (ASR_queue (sc, Message_Ptr) == EMPTY_QUEUE) {
3173 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3174 ccb->ccb_h.status |= CAM_REQUEUE_REQ;
3175 debug_asr_cmd_printf (" E\n");
3178 debug_asr_cmd_printf (" Q\n");
3182 * We will get here if there is no valid TID for the device
3183 * referenced in the scsi command packet.
3185 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3186 ccb->ccb_h.status |= CAM_SEL_TIMEOUT;
3187 debug_asr_cmd_printf (" B\n");
3192 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */
3193 /* Rese HBA device ... */
3195 ccb->ccb_h.status = CAM_REQ_CMP;
3199 # if (defined(REPORT_LUNS))
3202 case XPT_ABORT: /* Abort the specified CCB */
3204 ccb->ccb_h.status = CAM_REQ_INVALID;
3208 case XPT_SET_TRAN_SETTINGS:
3210 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
3214 case XPT_GET_TRAN_SETTINGS:
3215 /* Get default/user set transfer settings for the target */
3217 struct ccb_trans_settings *cts;
3221 target_mask = 0x01 << ccb->ccb_h.target_id;
3222 if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0) {
3223 cts->flags = CCB_TRANS_DISC_ENB|CCB_TRANS_TAG_ENB;
3224 cts->bus_width = MSG_EXT_WDTR_BUS_16_BIT;
3225 cts->sync_period = 6; /* 40MHz */
3226 cts->sync_offset = 15;
3228 cts->valid = CCB_TRANS_SYNC_RATE_VALID
3229 | CCB_TRANS_SYNC_OFFSET_VALID
3230 | CCB_TRANS_BUS_WIDTH_VALID
3231 | CCB_TRANS_DISC_VALID
3232 | CCB_TRANS_TQ_VALID;
3233 ccb->ccb_h.status = CAM_REQ_CMP;
3235 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
3241 case XPT_CALC_GEOMETRY:
3243 struct ccb_calc_geometry *ccg;
3245 u_int32_t secs_per_cylinder;
3248 size_mb = ccg->volume_size
3249 / ((1024L * 1024L) / ccg->block_size);
3251 if (size_mb > 4096) {
3253 ccg->secs_per_track = 63;
3254 } else if (size_mb > 2048) {
3256 ccg->secs_per_track = 63;
3257 } else if (size_mb > 1024) {
3259 ccg->secs_per_track = 63;
3262 ccg->secs_per_track = 32;
3264 secs_per_cylinder = ccg->heads * ccg->secs_per_track;
3265 ccg->cylinders = ccg->volume_size / secs_per_cylinder;
3266 ccb->ccb_h.status = CAM_REQ_CMP;
3271 case XPT_RESET_BUS: /* Reset the specified SCSI bus */
3272 ASR_resetBus (sc, cam_sim_bus(sim));
3273 ccb->ccb_h.status = CAM_REQ_CMP;
3277 case XPT_TERM_IO: /* Terminate the I/O process */
3279 ccb->ccb_h.status = CAM_REQ_INVALID;
3283 case XPT_PATH_INQ: /* Path routing inquiry */
3285 struct ccb_pathinq *cpi = &(ccb->cpi);
3287 cpi->version_num = 1; /* XXX??? */
3288 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE|PI_WIDE_16;
3289 cpi->target_sprt = 0;
3290 /* Not necessary to reset bus, done by HDM initialization */
3291 cpi->hba_misc = PIM_NOBUSRESET;
3292 cpi->hba_eng_cnt = 0;
3293 cpi->max_target = sc->ha_MaxId;
3294 cpi->max_lun = sc->ha_MaxLun;
3295 cpi->initiator_id = sc->ha_adapter_target[cam_sim_bus(sim)];
3296 cpi->bus_id = cam_sim_bus(sim);
3297 cpi->base_transfer_speed = 3300;
3298 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
3299 strncpy(cpi->hba_vid, "Adaptec", HBA_IDLEN);
3300 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
3301 cpi->unit_number = cam_sim_unit(sim);
3302 cpi->ccb_h.status = CAM_REQ_CMP;
3307 ccb->ccb_h.status = CAM_REQ_INVALID;
3315 * Handle processing of current CCB as pointed to by the Status.
3319 IN Asr_softc_t * sc)
3324 sc->ha_Virt->Status & Mask_InterruptsDisabled;
3326 union asr_ccb * ccb;
3328 PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME Reply;
3330 if (((ReplyOffset = sc->ha_Virt->FromFIFO) == EMPTY_QUEUE)
3331 && ((ReplyOffset = sc->ha_Virt->FromFIFO) == EMPTY_QUEUE)) {
3334 Reply = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)(ReplyOffset
3335 - sc->ha_Msgs_Phys + (char *)(sc->ha_Msgs));
3337 * We do not need any (optional byteswapping) method access to
3338 * the Initiator context field.
3340 ccb = (union asr_ccb *)(long)
3341 I2O_MESSAGE_FRAME_getInitiatorContext64(
3342 &(Reply->StdReplyFrame.StdMessageFrame));
3343 if (I2O_MESSAGE_FRAME_getMsgFlags(
3344 &(Reply->StdReplyFrame.StdMessageFrame))
3345 & I2O_MESSAGE_FLAGS_FAIL) {
3346 defAlignLong(I2O_UTIL_NOP_MESSAGE,Message);
3347 PI2O_UTIL_NOP_MESSAGE Message_Ptr;
3350 MessageOffset = (u_long)
3351 I2O_FAILURE_REPLY_MESSAGE_FRAME_getPreservedMFA(
3352 (PI2O_FAILURE_REPLY_MESSAGE_FRAME)Reply);
3354 * Get the Original Message Frame's address, and get
3355 * it's Transaction Context into our space. (Currently
3356 * unused at original authorship, but better to be
3357 * safe than sorry). Straight copy means that we
3358 * need not concern ourselves with the (optional
3359 * byteswapping) method access.
3361 Reply->StdReplyFrame.TransactionContext
3362 = ((PI2O_SINGLE_REPLY_MESSAGE_FRAME)
3363 (sc->ha_Fvirt + MessageOffset))->TransactionContext;
3365 * For 64 bit machines, we need to reconstruct the
3368 ccb = (union asr_ccb *)(long)
3369 I2O_MESSAGE_FRAME_getInitiatorContext64(
3370 &(Reply->StdReplyFrame.StdMessageFrame));
3372 * Unique error code for command failure.
3374 I2O_SINGLE_REPLY_MESSAGE_FRAME_setDetailedStatusCode(
3375 &(Reply->StdReplyFrame), (u_int16_t)-2);
3377 * Modify the message frame to contain a NOP and
3378 * re-issue it to the controller.
3380 Message_Ptr = (PI2O_UTIL_NOP_MESSAGE)ASR_fillMessage(
3381 Message, sizeof(I2O_UTIL_NOP_MESSAGE));
3382 # if (I2O_UTIL_NOP != 0)
3383 I2O_MESSAGE_FRAME_setFunction (
3384 &(Message_Ptr->StdMessageFrame),
3388 * Copy the packet out to the Original Message
3390 bcopy ((caddr_t)Message_Ptr,
3391 sc->ha_Fvirt + MessageOffset,
3392 sizeof(I2O_UTIL_NOP_MESSAGE));
3396 sc->ha_Virt->ToFIFO = MessageOffset;
3400 * Asynchronous command with no return requirements,
3401 * and a generic handler for immunity against odd error
3402 * returns from the adapter.
3404 if (ccb == (union asr_ccb *)NULL) {
3406 * Return Reply so that it can be used for the
3409 sc->ha_Virt->FromFIFO = ReplyOffset;
3413 /* Welease Wadjah! (and stop timeouts) */
3414 ASR_ccbRemove (sc, ccb);
3417 I2O_SINGLE_REPLY_MESSAGE_FRAME_getDetailedStatusCode(
3418 &(Reply->StdReplyFrame))) {
3420 case I2O_SCSI_DSC_SUCCESS:
3421 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3422 ccb->ccb_h.status |= CAM_REQ_CMP;
3425 case I2O_SCSI_DSC_CHECK_CONDITION:
3426 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3427 ccb->ccb_h.status |= CAM_REQ_CMP|CAM_AUTOSNS_VALID;
3430 case I2O_SCSI_DSC_BUSY:
3432 case I2O_SCSI_HBA_DSC_ADAPTER_BUSY:
3434 case I2O_SCSI_HBA_DSC_SCSI_BUS_RESET:
3436 case I2O_SCSI_HBA_DSC_BUS_BUSY:
3437 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3438 ccb->ccb_h.status |= CAM_SCSI_BUSY;
3441 case I2O_SCSI_HBA_DSC_SELECTION_TIMEOUT:
3442 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3443 ccb->ccb_h.status |= CAM_SEL_TIMEOUT;
3446 case I2O_SCSI_HBA_DSC_COMMAND_TIMEOUT:
3448 case I2O_SCSI_HBA_DSC_DEVICE_NOT_PRESENT:
3450 case I2O_SCSI_HBA_DSC_LUN_INVALID:
3452 case I2O_SCSI_HBA_DSC_SCSI_TID_INVALID:
3453 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3454 ccb->ccb_h.status |= CAM_CMD_TIMEOUT;
3457 case I2O_SCSI_HBA_DSC_DATA_OVERRUN:
3459 case I2O_SCSI_HBA_DSC_REQUEST_LENGTH_ERROR:
3460 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3461 ccb->ccb_h.status |= CAM_DATA_RUN_ERR;
3465 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3466 ccb->ccb_h.status |= CAM_REQUEUE_REQ;
3469 if ((ccb->csio.resid = ccb->csio.dxfer_len) != 0) {
3471 I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_getTransferCount(
3475 /* Sense data in reply packet */
3476 if (ccb->ccb_h.status & CAM_AUTOSNS_VALID) {
3477 u_int16_t size = I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_getAutoSenseTransferCount(Reply);
3480 if (size > sizeof(ccb->csio.sense_data)) {
3481 size = sizeof(ccb->csio.sense_data);
3483 if (size > I2O_SCSI_SENSE_DATA_SZ) {
3484 size = I2O_SCSI_SENSE_DATA_SZ;
3486 if ((ccb->csio.sense_len)
3487 && (size > ccb->csio.sense_len)) {
3488 size = ccb->csio.sense_len;
3490 bcopy ((caddr_t)Reply->SenseData,
3491 (caddr_t)&(ccb->csio.sense_data), size);
3496 * Return Reply so that it can be used for the next command
3497 * since we have no more need for it now
3499 sc->ha_Virt->FromFIFO = ReplyOffset;
3501 if (ccb->ccb_h.path) {
3502 xpt_done ((union ccb *)ccb);
3504 wakeup ((caddr_t)ccb);
3510 #undef QueueSize /* Grrrr */
3511 #undef SG_Size /* Grrrr */
3514 * Meant to be included at the bottom of asr.c !!!
3518 * Included here as hard coded. Done because other necessary include
3519 * files utilize C++ comment structures which make them a nuisance to
3520 * included here just to pick up these three typedefs.
3522 typedef U32 DPT_TAG_T;
3523 typedef U32 DPT_MSG_T;
3524 typedef U32 DPT_RTN_T;
3526 #undef SCSI_RESET /* Conflicts with "scsi/scsiconf.h" defintion */
3527 #include "osd_unix.h"
3529 #define asr_unit(dev) minor(dev)
3531 STATIC INLINE Asr_softc_t *
3535 int unit = asr_unit(dev);
3536 OUT Asr_softc_t * sc = Asr_softc;
3538 while (sc && sc->ha_sim[0] && (cam_sim_unit(sc->ha_sim[0]) != unit)) {
3544 STATIC u_int8_t ASR_ctlr_held;
3545 #if (!defined(UNREFERENCED_PARAMETER))
3546 # define UNREFERENCED_PARAMETER(x) (void)(x)
3558 UNREFERENCED_PARAMETER(flags);
3559 UNREFERENCED_PARAMETER(ifmt);
3561 if (ASR_get_sc (dev) == (Asr_softc_t *)NULL) {
3564 KKASSERT(td->td_proc);
3566 if (ASR_ctlr_held) {
3568 } else if ((error = suser_cred(td->td_proc->p_ucred, 0)) == 0) {
3582 UNREFERENCED_PARAMETER(dev);
3583 UNREFERENCED_PARAMETER(flags);
3584 UNREFERENCED_PARAMETER(ifmt);
3585 UNREFERENCED_PARAMETER(td);
3592 /*-------------------------------------------------------------------------*/
3593 /* Function ASR_queue_i */
3594 /*-------------------------------------------------------------------------*/
3595 /* The Parameters Passed To This Function Are : */
3596 /* Asr_softc_t * : HBA miniport driver's adapter data storage. */
3597 /* PI2O_MESSAGE_FRAME : Msg Structure Pointer For This Command */
3598 /* I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME following the Msg Structure */
3600 /* This Function Will Take The User Request Packet And Convert It To An */
3601 /* I2O MSG And Send It Off To The Adapter. */
3603 /* Return : 0 For OK, Error Code Otherwise */
3604 /*-------------------------------------------------------------------------*/
3607 IN Asr_softc_t * sc,
3608 INOUT PI2O_MESSAGE_FRAME Packet)
3610 union asr_ccb * ccb;
3611 PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME Reply;
3612 PI2O_MESSAGE_FRAME Message_Ptr;
3613 PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME Reply_Ptr;
3614 int MessageSizeInBytes;
3615 int ReplySizeInBytes;
3618 /* Scatter Gather buffer list */
3619 struct ioctlSgList_S {
3620 SLIST_ENTRY(ioctlSgList_S) link;
3622 I2O_FLAGS_COUNT FlagsCount;
3623 char KernelSpace[sizeof(long)];
3625 /* Generates a `first' entry */
3626 SLIST_HEAD(ioctlSgListHead_S, ioctlSgList_S) sgList;
3628 if (ASR_getBlinkLedCode(sc)) {
3629 debug_usr_cmd_printf ("Adapter currently in BlinkLed %x\n",
3630 ASR_getBlinkLedCode(sc));
3633 /* Copy in the message into a local allocation */
3634 if ((Message_Ptr = (PI2O_MESSAGE_FRAME)malloc (
3635 sizeof(I2O_MESSAGE_FRAME), M_TEMP, M_WAITOK))
3636 == (PI2O_MESSAGE_FRAME)NULL) {
3637 debug_usr_cmd_printf (
3638 "Failed to acquire I2O_MESSAGE_FRAME memory\n");
3641 if ((error = copyin ((caddr_t)Packet, (caddr_t)Message_Ptr,
3642 sizeof(I2O_MESSAGE_FRAME))) != 0) {
3643 free (Message_Ptr, M_TEMP);
3644 debug_usr_cmd_printf ("Can't copy in packet errno=%d\n", error);
3647 /* Acquire information to determine type of packet */
3648 MessageSizeInBytes = (I2O_MESSAGE_FRAME_getMessageSize(Message_Ptr)<<2);
3649 /* The offset of the reply information within the user packet */
3650 Reply = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)((char *)Packet
3651 + MessageSizeInBytes);
3653 /* Check if the message is a synchronous initialization command */
3654 s = I2O_MESSAGE_FRAME_getFunction(Message_Ptr);
3655 free (Message_Ptr, M_TEMP);
3658 case I2O_EXEC_IOP_RESET:
3661 status = ASR_resetIOP(sc->ha_Virt, sc->ha_Fvirt);
3662 ReplySizeInBytes = sizeof(status);
3663 debug_usr_cmd_printf ("resetIOP done\n");
3664 return (copyout ((caddr_t)&status, (caddr_t)Reply,
3668 case I2O_EXEC_STATUS_GET:
3669 { I2O_EXEC_STATUS_GET_REPLY status;
3671 if (ASR_getStatus (sc->ha_Virt, sc->ha_Fvirt, &status)
3672 == (PI2O_EXEC_STATUS_GET_REPLY)NULL) {
3673 debug_usr_cmd_printf ("getStatus failed\n");
3676 ReplySizeInBytes = sizeof(status);
3677 debug_usr_cmd_printf ("getStatus done\n");
3678 return (copyout ((caddr_t)&status, (caddr_t)Reply,
3682 case I2O_EXEC_OUTBOUND_INIT:
3685 status = ASR_initOutBound(sc);
3686 ReplySizeInBytes = sizeof(status);
3687 debug_usr_cmd_printf ("intOutBound done\n");
3688 return (copyout ((caddr_t)&status, (caddr_t)Reply,
3693 /* Determine if the message size is valid */
3694 if ((MessageSizeInBytes < sizeof(I2O_MESSAGE_FRAME))
3695 || (MAX_INBOUND_SIZE < MessageSizeInBytes)) {
3696 debug_usr_cmd_printf ("Packet size %d incorrect\n",
3697 MessageSizeInBytes);
3701 if ((Message_Ptr = (PI2O_MESSAGE_FRAME)malloc (MessageSizeInBytes,
3702 M_TEMP, M_WAITOK)) == (PI2O_MESSAGE_FRAME)NULL) {
3703 debug_usr_cmd_printf ("Failed to acquire frame[%d] memory\n",
3704 MessageSizeInBytes);
3707 if ((error = copyin ((caddr_t)Packet, (caddr_t)Message_Ptr,
3708 MessageSizeInBytes)) != 0) {
3709 free (Message_Ptr, M_TEMP);
3710 debug_usr_cmd_printf ("Can't copy in packet[%d] errno=%d\n",
3711 MessageSizeInBytes, error);
3715 /* Check the size of the reply frame, and start constructing */
3717 if ((Reply_Ptr = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)malloc (
3718 sizeof(I2O_MESSAGE_FRAME), M_TEMP, M_WAITOK))
3719 == (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)NULL) {
3720 free (Message_Ptr, M_TEMP);
3721 debug_usr_cmd_printf (
3722 "Failed to acquire I2O_MESSAGE_FRAME memory\n");
3725 if ((error = copyin ((caddr_t)Reply, (caddr_t)Reply_Ptr,
3726 sizeof(I2O_MESSAGE_FRAME))) != 0) {
3727 free (Reply_Ptr, M_TEMP);
3728 free (Message_Ptr, M_TEMP);
3729 debug_usr_cmd_printf (
3730 "Failed to copy in reply frame, errno=%d\n",
3734 ReplySizeInBytes = (I2O_MESSAGE_FRAME_getMessageSize(
3735 &(Reply_Ptr->StdReplyFrame.StdMessageFrame)) << 2);
3736 free (Reply_Ptr, M_TEMP);
3737 if (ReplySizeInBytes < sizeof(I2O_SINGLE_REPLY_MESSAGE_FRAME)) {
3738 free (Message_Ptr, M_TEMP);
3739 debug_usr_cmd_printf (
3740 "Failed to copy in reply frame[%d], errno=%d\n",
3741 ReplySizeInBytes, error);
3745 if ((Reply_Ptr = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)malloc (
3746 ((ReplySizeInBytes > sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME))
3748 : sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)),
3749 M_TEMP, M_WAITOK)) == (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)NULL) {
3750 free (Message_Ptr, M_TEMP);
3751 debug_usr_cmd_printf ("Failed to acquire frame[%d] memory\n",
3755 (void)ASR_fillMessage ((char *)Reply_Ptr, ReplySizeInBytes);
3756 Reply_Ptr->StdReplyFrame.StdMessageFrame.InitiatorContext
3757 = Message_Ptr->InitiatorContext;
3758 Reply_Ptr->StdReplyFrame.TransactionContext
3759 = ((PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr)->TransactionContext;
3760 I2O_MESSAGE_FRAME_setMsgFlags(
3761 &(Reply_Ptr->StdReplyFrame.StdMessageFrame),
3762 I2O_MESSAGE_FRAME_getMsgFlags(
3763 &(Reply_Ptr->StdReplyFrame.StdMessageFrame))
3764 | I2O_MESSAGE_FLAGS_REPLY);
3766 /* Check if the message is a special case command */
3767 switch (I2O_MESSAGE_FRAME_getFunction(Message_Ptr)) {
3768 case I2O_EXEC_SYS_TAB_SET: /* Special Case of empty Scatter Gather */
3769 if (MessageSizeInBytes == ((I2O_MESSAGE_FRAME_getVersionOffset(
3770 Message_Ptr) & 0xF0) >> 2)) {
3771 free (Message_Ptr, M_TEMP);
3772 I2O_SINGLE_REPLY_MESSAGE_FRAME_setDetailedStatusCode(
3773 &(Reply_Ptr->StdReplyFrame),
3774 (ASR_setSysTab(sc) != CAM_REQ_CMP));
3775 I2O_MESSAGE_FRAME_setMessageSize(
3776 &(Reply_Ptr->StdReplyFrame.StdMessageFrame),
3777 sizeof(I2O_SINGLE_REPLY_MESSAGE_FRAME));
3778 error = copyout ((caddr_t)Reply_Ptr, (caddr_t)Reply,
3780 free (Reply_Ptr, M_TEMP);
3785 /* Deal in the general case */
3786 /* First allocate and optionally copy in each scatter gather element */
3787 SLIST_INIT(&sgList);
3788 if ((I2O_MESSAGE_FRAME_getVersionOffset(Message_Ptr) & 0xF0) != 0) {
3789 PI2O_SGE_SIMPLE_ELEMENT sg;
3792 * since this code is reused in several systems, code
3793 * efficiency is greater by using a shift operation rather
3794 * than a divide by sizeof(u_int32_t).
3796 sg = (PI2O_SGE_SIMPLE_ELEMENT)((char *)Message_Ptr
3797 + ((I2O_MESSAGE_FRAME_getVersionOffset(Message_Ptr) & 0xF0)
3799 while (sg < (PI2O_SGE_SIMPLE_ELEMENT)(((caddr_t)Message_Ptr)
3800 + MessageSizeInBytes)) {
3804 if ((I2O_FLAGS_COUNT_getFlags(&(sg->FlagsCount))
3805 & I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT) == 0) {
3809 len = I2O_FLAGS_COUNT_getCount(&(sg->FlagsCount));
3810 debug_usr_cmd_printf ("SG[%d] = %x[%d]\n",
3811 sg - (PI2O_SGE_SIMPLE_ELEMENT)((char *)Message_Ptr
3812 + ((I2O_MESSAGE_FRAME_getVersionOffset(
3813 Message_Ptr) & 0xF0) >> 2)),
3814 I2O_SGE_SIMPLE_ELEMENT_getPhysicalAddress(sg), len);
3816 if ((elm = (struct ioctlSgList_S *)malloc (
3817 sizeof(*elm) - sizeof(elm->KernelSpace) + len,
3819 == (struct ioctlSgList_S *)NULL) {
3820 debug_usr_cmd_printf (
3821 "Failed to allocate SG[%d]\n", len);
3825 SLIST_INSERT_HEAD(&sgList, elm, link);
3826 elm->FlagsCount = sg->FlagsCount;
3827 elm->UserSpace = (caddr_t)
3828 (I2O_SGE_SIMPLE_ELEMENT_getPhysicalAddress(sg));
3829 v = elm->KernelSpace;
3830 /* Copy in outgoing data (DIR bit could be invalid) */
3831 if ((error = copyin (elm->UserSpace, (caddr_t)v, len))
3836 * If the buffer is not contiguous, lets
3837 * break up the scatter/gather entries.
3840 && (sg < (PI2O_SGE_SIMPLE_ELEMENT)
3841 (((caddr_t)Message_Ptr) + MAX_INBOUND_SIZE))) {
3842 int next, base, span;
3845 next = base = KVTOPHYS(v);
3846 I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress(sg,
3849 /* How far can we go physically contiguously */
3850 while ((len > 0) && (base == next)) {
3853 next = trunc_page(base) + PAGE_SIZE;
3864 /* Construct the Flags */
3865 I2O_FLAGS_COUNT_setCount(&(sg->FlagsCount),
3868 int flags = I2O_FLAGS_COUNT_getFlags(
3869 &(elm->FlagsCount));
3870 /* Any remaining length? */
3873 ~(I2O_SGL_FLAGS_END_OF_BUFFER
3874 | I2O_SGL_FLAGS_LAST_ELEMENT);
3876 I2O_FLAGS_COUNT_setFlags(
3877 &(sg->FlagsCount), flags);
3880 debug_usr_cmd_printf ("sg[%d] = %x[%d]\n",
3881 sg - (PI2O_SGE_SIMPLE_ELEMENT)
3882 ((char *)Message_Ptr
3883 + ((I2O_MESSAGE_FRAME_getVersionOffset(
3884 Message_Ptr) & 0xF0) >> 2)),
3885 I2O_SGE_SIMPLE_ELEMENT_getPhysicalAddress(sg),
3892 * Incrementing requires resizing of the
3893 * packet, and moving up the existing SG
3897 MessageSizeInBytes += sizeof(*sg);
3898 I2O_MESSAGE_FRAME_setMessageSize(Message_Ptr,
3899 I2O_MESSAGE_FRAME_getMessageSize(Message_Ptr)
3900 + (sizeof(*sg) / sizeof(U32)));
3902 PI2O_MESSAGE_FRAME NewMessage_Ptr;
3905 = (PI2O_MESSAGE_FRAME)
3906 malloc (MessageSizeInBytes,
3908 == (PI2O_MESSAGE_FRAME)NULL) {
3909 debug_usr_cmd_printf (
3910 "Failed to acquire frame[%d] memory\n",
3911 MessageSizeInBytes);
3915 span = ((caddr_t)sg)
3916 - (caddr_t)Message_Ptr;
3917 bcopy ((caddr_t)Message_Ptr,
3918 (caddr_t)NewMessage_Ptr, span);
3919 bcopy ((caddr_t)(sg-1),
3920 ((caddr_t)NewMessage_Ptr) + span,
3921 MessageSizeInBytes - span);
3922 free (Message_Ptr, M_TEMP);
3923 sg = (PI2O_SGE_SIMPLE_ELEMENT)
3924 (((caddr_t)NewMessage_Ptr) + span);
3925 Message_Ptr = NewMessage_Ptr;
3929 || ((I2O_FLAGS_COUNT_getFlags(&(sg->FlagsCount))
3930 & I2O_SGL_FLAGS_LAST_ELEMENT) != 0)) {
3936 while ((elm = SLIST_FIRST(&sgList))
3937 != (struct ioctlSgList_S *)NULL) {
3938 SLIST_REMOVE_HEAD(&sgList, link);
3941 free (Reply_Ptr, M_TEMP);
3942 free (Message_Ptr, M_TEMP);
3947 debug_usr_cmd_printf ("Inbound: ");
3948 debug_usr_cmd_dump_message(Message_Ptr);
3950 /* Send the command */
3951 if ((ccb = asr_alloc_ccb (sc)) == (union asr_ccb *)NULL) {
3952 /* Free up in-kernel buffers */
3953 while ((elm = SLIST_FIRST(&sgList))
3954 != (struct ioctlSgList_S *)NULL) {
3955 SLIST_REMOVE_HEAD(&sgList, link);
3958 free (Reply_Ptr, M_TEMP);
3959 free (Message_Ptr, M_TEMP);
3964 * We do not need any (optional byteswapping) method access to
3965 * the Initiator context field.
3967 I2O_MESSAGE_FRAME_setInitiatorContext64(
3968 (PI2O_MESSAGE_FRAME)Message_Ptr, (long)ccb);
3970 (void)ASR_queue (sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
3972 free (Message_Ptr, M_TEMP);
3975 * Wait for the board to report a finished instruction.
3978 while ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG) {
3979 if (ASR_getBlinkLedCode(sc)) {
3981 printf ("asr%d: Blink LED 0x%x resetting adapter\n",
3982 cam_sim_unit(xpt_path_sim(ccb->ccb_h.path)),
3983 ASR_getBlinkLedCode(sc));
3984 if (ASR_reset (sc) == ENXIO) {
3985 /* Command Cleanup */
3986 ASR_ccbRemove(sc, ccb);
3989 /* Free up in-kernel buffers */
3990 while ((elm = SLIST_FIRST(&sgList))
3991 != (struct ioctlSgList_S *)NULL) {
3992 SLIST_REMOVE_HEAD(&sgList, link);
3995 free (Reply_Ptr, M_TEMP);
3999 /* Check every second for BlinkLed */
4000 tsleep((caddr_t)ccb, 0, "asr", hz);
4004 debug_usr_cmd_printf ("Outbound: ");
4005 debug_usr_cmd_dump_message(Reply_Ptr);
4007 I2O_SINGLE_REPLY_MESSAGE_FRAME_setDetailedStatusCode(
4008 &(Reply_Ptr->StdReplyFrame),
4009 (ccb->ccb_h.status != CAM_REQ_CMP));
4011 if (ReplySizeInBytes >= (sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)
4012 - I2O_SCSI_SENSE_DATA_SZ - sizeof(U32))) {
4013 I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_setTransferCount(Reply_Ptr,
4014 ccb->csio.dxfer_len - ccb->csio.resid);
4016 if ((ccb->ccb_h.status & CAM_AUTOSNS_VALID) && (ReplySizeInBytes
4017 > (sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)
4018 - I2O_SCSI_SENSE_DATA_SZ))) {
4019 int size = ReplySizeInBytes
4020 - sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)
4021 - I2O_SCSI_SENSE_DATA_SZ;
4023 if (size > sizeof(ccb->csio.sense_data)) {
4024 size = sizeof(ccb->csio.sense_data);
4026 bcopy ((caddr_t)&(ccb->csio.sense_data), (caddr_t)Reply_Ptr->SenseData,
4028 I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_setAutoSenseTransferCount(
4032 /* Free up in-kernel buffers */
4033 while ((elm = SLIST_FIRST(&sgList)) != (struct ioctlSgList_S *)NULL) {
4034 /* Copy out as necessary */
4036 /* DIR bit considered `valid', error due to ignorance works */
4037 && ((I2O_FLAGS_COUNT_getFlags(&(elm->FlagsCount))
4038 & I2O_SGL_FLAGS_DIR) == 0)) {
4039 error = copyout ((caddr_t)(elm->KernelSpace),
4041 I2O_FLAGS_COUNT_getCount(&(elm->FlagsCount)));
4043 SLIST_REMOVE_HEAD(&sgList, link);
4047 /* Copy reply frame to user space */
4048 error = copyout ((caddr_t)Reply_Ptr, (caddr_t)Reply,
4051 free (Reply_Ptr, M_TEMP);
4057 /*----------------------------------------------------------------------*/
4058 /* Function asr_ioctl */
4059 /*----------------------------------------------------------------------*/
4060 /* The parameters passed to this function are : */
4061 /* dev : Device number. */
4062 /* cmd : Ioctl Command */
4063 /* data : User Argument Passed In. */
4064 /* flag : Mode Parameter */
4065 /* proc : Process Parameter */
4067 /* This function is the user interface into this adapter driver */
4069 /* Return : zero if OK, error code if not */
4070 /*----------------------------------------------------------------------*/
4082 Asr_softc_t * sc = ASR_get_sc (dev);
4083 UNREFERENCED_PARAMETER(flag);
4084 UNREFERENCED_PARAMETER(td);
4086 if (sc != (Asr_softc_t *)NULL)
4090 # if (dsDescription_size != 50)
4091 case DPT_SIGNATURE + ((50 - dsDescription_size) << 16):
4093 if (cmd & 0xFFFF0000) {
4094 (void)bcopy ((caddr_t)(&ASR_sig), data,
4098 /* Traditional version of the ioctl interface */
4099 case DPT_SIGNATURE & 0x0000FFFF:
4100 return (copyout ((caddr_t)(&ASR_sig), *((caddr_t *)data),
4101 sizeof(dpt_sig_S)));
4103 /* Traditional version of the ioctl interface */
4104 case DPT_CTRLINFO & 0x0000FFFF:
4105 case DPT_CTRLINFO: {
4108 u_int16_t drvrHBAnum;
4110 u_int16_t blinkState;
4112 u_int8_t pciDeviceNum;
4114 u_int16_t Interrupt;
4115 u_int32_t reserved1;
4116 u_int32_t reserved2;
4117 u_int32_t reserved3;
4120 bzero (&CtlrInfo, sizeof(CtlrInfo));
4121 CtlrInfo.length = sizeof(CtlrInfo) - sizeof(u_int16_t);
4122 CtlrInfo.drvrHBAnum = asr_unit(dev);
4123 CtlrInfo.baseAddr = (u_long)sc->ha_Base;
4124 i = ASR_getBlinkLedCode (sc);
4128 CtlrInfo.blinkState = i;
4129 CtlrInfo.pciBusNum = sc->ha_pciBusNum;
4130 CtlrInfo.pciDeviceNum = sc->ha_pciDeviceNum;
4131 #define FLG_OSD_PCI_VALID 0x0001
4132 #define FLG_OSD_DMA 0x0002
4133 #define FLG_OSD_I2O 0x0004
4134 CtlrInfo.hbaFlags = FLG_OSD_PCI_VALID | FLG_OSD_DMA | FLG_OSD_I2O;
4135 CtlrInfo.Interrupt = sc->ha_irq;
4136 if (cmd & 0xFFFF0000) {
4137 bcopy (&CtlrInfo, data, sizeof(CtlrInfo));
4139 error = copyout (&CtlrInfo, *(caddr_t *)data, sizeof(CtlrInfo));
4143 /* Traditional version of the ioctl interface */
4144 case DPT_SYSINFO & 0x0000FFFF:
4148 /* Kernel Specific ptok `hack' */
4149 # define ptok(a) ((char *)(a) + KERNBASE)
4151 bzero (&Info, sizeof(Info));
4153 /* Appears I am the only person in the Kernel doing this */
4161 Info.drive0CMOS = j;
4168 Info.drive1CMOS = j;
4170 Info.numDrives = *((char *)ptok(0x475));
4172 Info.processorFamily = ASR_sig.dsProcessorFamily;
4174 case CPU_386SX: case CPU_386:
4175 Info.processorType = PROC_386; break;
4176 case CPU_486SX: case CPU_486:
4177 Info.processorType = PROC_486; break;
4179 Info.processorType = PROC_PENTIUM; break;
4181 Info.processorType = PROC_SEXIUM; break;
4183 Info.osType = OS_BSDI_UNIX;
4184 Info.osMajorVersion = osrelease[0] - '0';
4185 Info.osMinorVersion = osrelease[2] - '0';
4186 /* Info.osRevision = 0; */
4187 /* Info.osSubRevision = 0; */
4188 Info.busType = SI_PCI_BUS;
4189 Info.flags = SI_CMOS_Valid | SI_NumDrivesValid
4190 | SI_OSversionValid | SI_BusTypeValid | SI_NO_SmartROM;
4192 /* Go Out And Look For I2O SmartROM */
4193 for(j = 0xC8000; j < 0xE0000; j += 2048) {
4197 if (*((unsigned short *)cp) != 0xAA55) {
4200 j += (cp[2] * 512) - 2048;
4201 if ((*((u_long *)(cp + 6))
4202 != ('S' + (' ' * 256) + (' ' * 65536L)))
4203 || (*((u_long *)(cp + 10))
4204 != ('I' + ('2' * 256) + ('0' * 65536L)))) {
4208 for (k = 0; k < 64; ++k) {
4209 if (*((unsigned short *)cp)
4210 == (' ' + ('v' * 256))) {
4215 Info.smartROMMajorVersion
4216 = *((unsigned char *)(cp += 4)) - '0';
4217 Info.smartROMMinorVersion
4218 = *((unsigned char *)(cp += 2));
4219 Info.smartROMRevision
4220 = *((unsigned char *)(++cp));
4221 Info.flags |= SI_SmartROMverValid;
4222 Info.flags &= ~SI_NO_SmartROM;
4226 /* Get The Conventional Memory Size From CMOS */
4232 Info.conventionalMemSize = j;
4234 /* Get The Extended Memory Found At Power On From CMOS */
4240 Info.extendedMemSize = j;
4241 Info.flags |= SI_MemorySizeValid;
4243 # if (defined(THIS_IS_BROKEN))
4244 /* If There Is 1 or 2 Drives Found, Set Up Drive Parameters */
4245 if (Info.numDrives > 0) {
4247 * Get The Pointer From Int 41 For The First
4250 j = ((unsigned)(*((unsigned short *)ptok(0x104+2))) << 4)
4251 + (unsigned)(*((unsigned short *)ptok(0x104+0)));
4253 * It appears that SmartROM's Int41/Int46 pointers
4254 * use memory that gets stepped on by the kernel
4255 * loading. We no longer have access to this
4256 * geometry information but try anyways (!?)
4258 Info.drives[0].cylinders = *((unsigned char *)ptok(j));
4260 Info.drives[0].cylinders += ((int)*((unsigned char *)
4263 Info.drives[0].heads = *((unsigned char *)ptok(j));
4265 Info.drives[0].sectors = *((unsigned char *)ptok(j));
4266 Info.flags |= SI_DriveParamsValid;
4267 if ((Info.drives[0].cylinders == 0)
4268 || (Info.drives[0].heads == 0)
4269 || (Info.drives[0].sectors == 0)) {
4270 Info.flags &= ~SI_DriveParamsValid;
4272 if (Info.numDrives > 1) {
4274 * Get The Pointer From Int 46 For The
4275 * Second Drive Parameters
4277 j = ((unsigned)(*((unsigned short *)ptok(0x118+2))) << 4)
4278 + (unsigned)(*((unsigned short *)ptok(0x118+0)));
4279 Info.drives[1].cylinders = *((unsigned char *)
4282 Info.drives[1].cylinders += ((int)
4283 *((unsigned char *)ptok(j))) << 8;
4285 Info.drives[1].heads = *((unsigned char *)
4288 Info.drives[1].sectors = *((unsigned char *)
4290 if ((Info.drives[1].cylinders == 0)
4291 || (Info.drives[1].heads == 0)
4292 || (Info.drives[1].sectors == 0)) {
4293 Info.flags &= ~SI_DriveParamsValid;
4298 /* Copy Out The Info Structure To The User */
4299 if (cmd & 0xFFFF0000) {
4300 bcopy (&Info, data, sizeof(Info));
4302 error = copyout (&Info, *(caddr_t *)data, sizeof(Info));
4306 /* Get The BlinkLED State */
4308 i = ASR_getBlinkLedCode (sc);
4312 if (cmd & 0xFFFF0000) {
4313 bcopy ((caddr_t)(&i), data, sizeof(i));
4315 error = copyout (&i, *(caddr_t *)data, sizeof(i));
4319 /* Send an I2O command */
4321 return (ASR_queue_i (sc, *((PI2O_MESSAGE_FRAME *)data)));
4323 /* Reset and re-initialize the adapter */
4325 return (ASR_reset (sc));
4327 /* Rescan the LCT table and resynchronize the information */
4329 return (ASR_rescan (sc));