sys/sys/ata.h

   1 /*-
   2  * Copyright (c) 2000,2001,2002 Søren Schmidt <sos@FreeBSD.org>
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer,
  10  *    without modification, immediately at the beginning of the file.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  * 3. The name of the author may not be used to endorse or promote products
  15  *    derived from this software without specific prior written permission.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * $FreeBSD: src/sys/sys/ata.h,v 1.8.2.4 2002/04/02 14:47:35 sos Exp $
  29  * $DragonFly: src/sys/sys/ata.h,v 1.2 2003/06/17 04:28:58 dillon Exp $
  30  */
  31
  32 #ifndef _SYS_ATA_H_
  33 #define _SYS_ATA_H_
  34
  35 #include <sys/ioccom.h>
  36
  37 /* ATA/ATAPI device parameter information */
  38 struct ata_params {
  39 /*000*/ u_int16_t       packet_size     :2;     /* packet command size */
  40 #define ATAPI_PSIZE_12                  0       /* 12 bytes */
  41 #define ATAPI_PSIZE_16                  1       /* 16 bytes */
  42
  43         u_int16_t       incomplete      :1;
  44         u_int16_t                       :2;
  45         u_int16_t       drq_type        :2;     /* DRQ type */
  46 #define ATAPI_DRQT_MPROC                0       /* cpu    3 ms delay */
  47 #define ATAPI_DRQT_INTR                 1       /* intr  10 ms delay */
  48 #define ATAPI_DRQT_ACCEL                2       /* accel 50 us delay */
  49
  50         u_int16_t       removable       :1;     /* device is removable */
  51         u_int16_t       type            :5;     /* device type */
  52 #define ATAPI_TYPE_DIRECT               0       /* disk/floppy */
  53 #define ATAPI_TYPE_TAPE                 1       /* streaming tape */
  54 #define ATAPI_TYPE_CDROM                5       /* CD-ROM device */
  55 #define ATAPI_TYPE_OPTICAL              7       /* optical disk */
  56
  57         u_int16_t                       :2;
  58         u_int16_t       cmd_protocol    :1;     /* command protocol */
  59 #define ATA_PROTO_ATA                   0
  60 #define ATA_PROTO_ATAPI                 1
  61
  62 /*001*/ u_int16_t       cylinders;              /* # of cylinders */
  63         u_int16_t       reserved2;
  64 /*003*/ u_int16_t       heads;                  /* # heads */
  65         u_int16_t       obsolete4;
  66         u_int16_t       obsolete5;
  67 /*006*/ u_int16_t       sectors;                /* # sectors/track */
  68 /*007*/ u_int16_t       vendor7[3];
  69 /*010*/ u_int8_t        serial[20];             /* serial number */
  70         u_int16_t       retired20;
  71         u_int16_t       retired21;
  72         u_int16_t       obsolete22;
  73 /*023*/ u_int8_t        revision[8];            /* firmware revision */
  74 /*027*/ u_int8_t        model[40];              /* model name */
  75 /*047*/ u_int16_t       sectors_intr:8;         /* sectors per interrupt */
  76         u_int16_t       :8;
  77
  78 /*048*/ u_int16_t       usedmovsd;              /* double word read/write? */
  79 /*049*/ u_int16_t       retired49:8;
  80         u_int16_t       support_dma     :1;     /* DMA supported */
  81         u_int16_t       support_lba     :1;     /* LBA supported */
  82         u_int16_t       disable_iordy   :1;     /* IORDY may be disabled */
  83         u_int16_t       support_iordy   :1;     /* IORDY supported */
  84         u_int16_t       softreset       :1;     /* needs softreset when busy */
  85         u_int16_t       stdby_ovlap     :1;     /* standby/overlap supported */
  86         u_int16_t       support_queueing:1;     /* supports queuing overlap */
  87         u_int16_t       support_idma    :1;     /* interleaved DMA supported */
  88
  89 /*050*/ u_int16_t       device_stdby_min:1;
  90         u_int16_t       :13;
  91         u_int16_t       capability_one:1;
  92         u_int16_t       capability_zero:1;
  93
  94 /*051*/ u_int16_t       vendor51:8;
  95         u_int16_t       retired_piomode:8;      /* PIO modes 0-2 */
  96 /*052*/ u_int16_t       vendor52:8;
  97         u_int16_t       retired_dmamode:8;      /* DMA modes, not ATA-3 */
  98 /*053*/ u_int16_t       atavalid;               /* fields valid */
  99 #define ATA_FLAG_54_58                  1       /* words 54-58 valid */
 100 #define ATA_FLAG_64_70                  2       /* words 64-70 valid */
 101 #define ATA_FLAG_88                     4       /* word 88 valid */
 102
 103         u_int16_t       obsolete54[5];
 104 /*059*/ u_int16_t       multi_count:8;
 105         u_int16_t       multi_valid:1;
 106         u_int16_t       :7;
 107
 108 /*060*/ u_int32_t       lba_size;
 109         u_int16_t       obsolete62;
 110 /*063*/ u_int16_t       mwdmamodes;             /* multiword DMA modes */
 111 /*064*/ u_int16_t       apiomodes;              /* advanced PIO modes */
 112
 113 /*065*/ u_int16_t       mwdmamin;               /* min. M/W DMA time/word ns */
 114 /*066*/ u_int16_t       mwdmarec;               /* rec. M/W DMA time ns */
 115 /*067*/ u_int16_t       pioblind;               /* min. PIO cycle w/o flow */
 116 /*068*/ u_int16_t       pioiordy;               /* min. PIO cycle IORDY flow */
 117         u_int16_t       reserved69;
 118         u_int16_t       reserved70;
 119 /*071*/ u_int16_t       rlsovlap;               /* rel time (us) for overlap */
 120 /*072*/ u_int16_t       rlsservice;             /* rel time (us) for service */
 121         u_int16_t       reserved73;
 122         u_int16_t       reserved74;
 123
 124 /*075*/ u_int16_t       queuelen:5;
 125         u_int16_t       :11;
 126
 127         u_int16_t       reserved76;
 128         u_int16_t       reserved77;
 129         u_int16_t       reserved78;
 130         u_int16_t       reserved79;
 131 /*080*/ u_int16_t       version_major;
 132 /*081*/ u_int16_t       version_minor;
 133         struct {
 134 /*082/085*/ u_int16_t   smart:1;
 135             u_int16_t   security:1;
 136             u_int16_t   removable:1;
 137             u_int16_t   power_mngt:1;
 138             u_int16_t   packet:1;
 139             u_int16_t   write_cache:1;
 140             u_int16_t   look_ahead:1;
 141             u_int16_t   release_irq:1;
 142             u_int16_t   service_irq:1;
 143             u_int16_t   reset:1;
 144             u_int16_t   protected:1;
 145             u_int16_t   :1;
 146             u_int16_t   write_buffer:1;
 147             u_int16_t   read_buffer:1;
 148             u_int16_t   nop:1;
 149             u_int16_t   :1;
 150
 151 /*083/086*/ u_int16_t   microcode:1;
 152             u_int16_t   queued:1;
 153             u_int16_t   cfa:1;
 154             u_int16_t   apm:1;
 155             u_int16_t   notify:1;
 156             u_int16_t   standby:1;
 157             u_int16_t   spinup:1;
 158             u_int16_t   :1;
 159             u_int16_t   max_security:1;
 160             u_int16_t   auto_acoustic:1;
 161             u_int16_t   address48:1;
 162             u_int16_t   config_overlay:1;
 163             u_int16_t   flush_cache:1;
 164             u_int16_t   flush_cache48:1;
 165             u_int16_t   support_one:1;
 166             u_int16_t   support_zero:1;
 167
 168 /*084/087*/ u_int16_t   smart_error_log:1;
 169             u_int16_t   smart_self_test:1;
 170             u_int16_t   media_serial_no:1;
 171             u_int16_t   media_card_pass:1;
 172             u_int16_t   streaming:1;
 173             u_int16_t   logging:1;
 174             u_int16_t   :8;
 175             u_int16_t   extended_one:1;
 176             u_int16_t   extended_zero:1;
 177         } support, enabled;
 178
 179 /*088*/ u_int16_t       udmamodes;              /* UltraDMA modes */
 180 /*089*/ u_int16_t       erase_time;
 181 /*090*/ u_int16_t       enhanced_erase_time;
 182 /*091*/ u_int16_t       apm_value;
 183 /*092*/ u_int16_t       master_passwd_revision;
 184
 185 /*093*/ u_int16_t       hwres_master    :8;
 186         u_int16_t       hwres_slave     :5;
 187         u_int16_t       hwres_cblid     :1;
 188         u_int16_t       hwres_valid:2;
 189
 190 /*094*/ u_int16_t       current_acoustic:8;
 191         u_int16_t       vendor_acoustic:8;
 192
 193 /*095*/ u_int16_t       stream_min_req_size;
 194 /*096*/ u_int16_t       stream_transfer_time;
 195 /*097*/ u_int16_t       stream_access_latency;
 196 /*098*/ u_int32_t       stream_granularity;
 197 /*100*/ u_int64_t       lba_size48;
 198         u_int16_t       reserved104[23];
 199 /*127*/ u_int16_t       removable_status;
 200 /*128*/ u_int16_t       security_status;
 201         u_int16_t       reserved129[31];
 202 /*160*/ u_int16_t       cfa_powermode1;
 203         u_int16_t       reserved161[14];
 204 /*176*/ u_int16_t       media_serial[30];
 205         u_int16_t       reserved206[49];
 206 /*255*/ u_int16_t       integrity;
 207 };
 208
 209 #define ATA_MODE_MASK           0x0f
 210 #define ATA_DMA_MASK            0xf0
 211 #define ATA_PIO                 0x00
 212 #define ATA_PIO0                0x08
 213 #define ATA_PIO1                0x09
 214 #define ATA_PIO2                0x0a
 215 #define ATA_PIO3                0x0b
 216 #define ATA_PIO4                0x0c
 217 #define ATA_DMA                 0x10
 218 #define ATA_WDMA                0x20
 219 #define ATA_WDMA2               0x22
 220 #define ATA_UDMA                0x40
 221 #define ATA_UDMA2               0x42
 222 #define ATA_UDMA4               0x44
 223 #define ATA_UDMA5               0x45
 224 #define ATA_UDMA6               0x46
 225
 226 struct ata_cmd {
 227     int                         channel;
 228     int                         device;
 229     int                         cmd;
 230 #define ATAGPARM                1
 231 #define ATAGMODE                2
 232 #define ATASMODE                3
 233 #define ATAREINIT               4
 234 #define ATAATTACH               5
 235 #define ATADETACH               6
 236 #define ATAPICMD                7
 237 #define ATARAIDREBUILD          8
 238 #define ATARAIDCREATE           9
 239 #define ATARAIDDELETE           10
 240 #define ATARAIDSTATUS           11
 241 #define ATAENCSTAT              12
 242
 243     union {
 244         struct {
 245             int                 mode[2];
 246         } mode;
 247         struct {
 248             int                 type[2];
 249             char                name[2][32];
 250             struct ata_params   params[2];
 251         } param;
 252         struct raid_setup {
 253             int                 type;
 254 #define AR_RAID0                        1
 255 #define AR_RAID1                        2
 256 #define AR_SPAN                         4
 257
 258             int                 total_disks;
 259             int                 disks[16];
 260             int                 interleave;
 261             int                 unit;
 262         } raid_setup;
 263         struct raid_status {
 264             int                 type;
 265             int                 total_disks;
 266             int                 disks[16];
 267             int                 interleave;
 268             int                 status;
 269 #define AR_READY                        1
 270 #define AR_DEGRADED                     2
 271 #define AR_REBUILDING                   4
 272
 273             int                 progress;
 274         } raid_status;
 275         struct {
 276             int                 fan;
 277             int                 temp;
 278             int                 v05;
 279             int                 v12;
 280         } enclosure;
 281         struct {
 282             char                ccb[16];
 283             caddr_t             data;
 284             int                 count;
 285             int                 flags;
 286 #define ATAPI_CMD_CTRL                  0x00
 287 #define ATAPI_CMD_READ                  0x01
 288 #define ATAPI_CMD_WRITE                 0x02
 289
 290             int                 timeout;
 291             int                 error;
 292             char                sense_data[18];
 293         } atapi;
 294     } u;
 295 };
 296
 297 #define IOCATA                  _IOWR('a',  1, struct ata_cmd)
 298
 299 #endif /* _SYS_ATA_H_ */