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30 * $FreeBSD: src/sys/i386/isa/intr_machdep.h,v 1.19.2.2 2001/10/14 20:05:50 luigi Exp $
33 #ifndef _ARCH_INTR_MACHDEP_H_
34 #define _ARCH_INTR_MACHDEP_H_
38 #include <sys/types.h>
43 * Low level interrupt code.
48 #define IDT_OFFSET 0x20
49 #define IDT_OFFSET_SYSCALL 0x80
50 #define IDT_OFFSET_IPI 0xe0
52 #define IDT_HWI_VECTORS (IDT_OFFSET_IPI - IDT_OFFSET)
55 * Local APIC TPR priority vector levels:
57 * 0xff (255) +-------------+
58 * | | 15 (IPIs: Xcpustop, Xspuriousint)
59 * 0xf0 (240) +-------------+
60 * | | 14 (IPIs: Xinvltlb, Xipiq, Xtimer, Xsniff)
61 * 0xe0 (224) +-------------+
63 * 0xd0 (208) +-------------+
65 * 0xc0 (192) +-------------+
67 * 0xb0 (176) +-------------+
69 * 0xa0 (160) +-------------+
71 * 0x90 (144) +-------------+
72 * | | 8 (syscall at 0x80)
73 * 0x80 (128) +-------------+
75 * 0x70 (112) +-------------+
77 * 0x60 (96) +-------------+
79 * 0x50 (80) +-------------+
81 * 0x40 (64) +-------------+
83 * 0x30 (48) +-------------+
84 * | | 2 (hardware INTs)
85 * 0x20 (32) +-------------+
86 * | | 1 (exceptions, traps, etc.)
87 * 0x10 (16) +-------------+
88 * | | 0 (exceptions, traps, etc.)
89 * 0x00 (0) +-------------+
93 /* Local APIC Task Priority Register */
94 #define TPR_IPI (IDT_OFFSET_IPI - 1)
100 #define IDT_OFFSET_IPIG1 IDT_OFFSET_IPI
103 #define XINVLTLB_OFFSET (IDT_OFFSET_IPIG1 + 0)
105 /* IPI group1 1: unused (was inter-cpu clock handling) */
106 /* IPI group1 2: unused (was inter-cpu rendezvous) */
108 /* IPIQ rendezvous */
109 #define XIPIQ_OFFSET (IDT_OFFSET_IPIG1 + 3)
111 /* TIMER rendezvous */
112 #define XTIMER_OFFSET (IDT_OFFSET_IPIG1 + 4)
114 /* SNIFF rendezvous */
115 #define XSNIFF_OFFSET (IDT_OFFSET_IPIG1 + 5)
117 /* IPI group1 6 ~ 15: unused */
123 #define IDT_OFFSET_IPIG2 (IDT_OFFSET_IPIG1 + TPR_STEP)
125 /* IPI to signal CPUs to stop and wait for another CPU to restart them */
126 #define XCPUSTOP_OFFSET (IDT_OFFSET_IPIG2 + 0)
128 /* IPI group2 1 ~ 14: unused */
130 /* NOTE: this vector MUST be xxxx1111 */
131 #define XSPURIOUSINT_OFFSET (IDT_OFFSET_IPIG2 + 15)
136 * Type of the first (asm) part of an interrupt handler.
138 typedef void inthand_t(u_int cs, u_int ef, u_int esp, u_int ss);
140 #define IDTVEC(name) __CONCAT(X,name)
143 Xspuriousint, /* handle APIC "spurious INTs" */
144 Xtimer; /* handle per-cpu timer INT */
147 Xinvltlb, /* TLB shootdowns */
148 Xcpustop, /* CPU stops & waits for another CPU to restart it */
149 Xipiq, /* handle lwkt_send_ipiq() requests */
150 Xsniff; /* sniff CPU */
156 #endif /* !_ARCH_INTR_MACHDEP_H_ */