2 * Copyright (c) 1992, 1993, 1995 Eugene W. Stark
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Eugene W. Stark.
16 * 4. The name of the author may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY EUGENE W. STARK (THE AUTHOR) ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
23 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * $FreeBSD: src/sys/i386/isa/tw.c,v 1.38 2000/01/29 16:00:32 peter Exp $
32 * $DragonFly: src/sys/dev/misc/tw/tw.c,v 1.11 2004/09/18 19:11:29 dillon Exp $
39 * Driver configuration parameters
43 * Time for 1/2 of a power line cycle, in microseconds.
44 * Change this to 10000 for 50Hz power. Phil Sampson
45 * (vk2jnt@gw.vk2jnt.ampr.org OR sampson@gidday.enet.dec.com)
46 * reports that this works (at least in Australia) using a
47 * TW7223 module (a local version of the TW523).
49 #define HALFCYCLE 8333 /* 1/2 cycle = 8333us at 60Hz */
52 * Undefine the following if you don't have the high-resolution "microtime"
53 * routines (leave defined for FreeBSD, which has them).
58 * End of driver configuration parameters
62 * FreeBSD Device Driver for X-10 POWERHOUSE (tm)
63 * Two-Way Power Line Interface, Model #TW523
65 * written by Eugene W. Stark (stark@cs.sunysb.edu)
70 * The TW523 is a carrier-current modem for home control/automation purposes.
77 * (201) 784-9700 or 1-800-526-0027
79 * X-10 Home Controls Inc.
80 * 1200 Aerowood Drive, Unit 20
81 * Mississauga, Ontario
82 * (416) 624-4446 or 1-800-387-3346
84 * The TW523 is designed for communications using the X-10 protocol,
85 * which is compatible with a number of home control systems, including
86 * Radio Shack "Plug 'n Power(tm)" and Stanley "Lightmaker(tm)."
87 * I bought my TW523 from:
89 * Home Control Concepts
90 * 9353-C Activity Road
94 * They supplied me with the TW523 (which has an RJ-11 four-wire modular
95 * telephone connector), a modular cable, an RJ-11 to DB-25 connector with
96 * internal wiring, documentation from X-10 on the TW523 (very good),
97 * an instruction manual by Home Control Concepts (not very informative),
98 * and a floppy disk containing binary object code of some demonstration/test
99 * programs and of a C function library suitable for controlling the TW523
100 * by an IBM PC under MS-DOS (not useful to me other than to verify that
101 * the unit worked). I suggest saving money and buying the bare TW523
102 * rather than the TW523 development kit (what I bought), because if you
103 * are running FreeBSD you don't really care about the DOS binaries.
105 * The interface to the TW-523 consists of four wires on the RJ-11 connector,
106 * which are jumpered to somewhat more wires on the DB-25 connector, which
107 * in turn is intended to plug into the PC parallel printer port. I dismantled
108 * the DB-25 connector to find out what they had done:
110 * Signal RJ-11 pin DB-25 pin(s) Parallel Port
111 * Transmit TX 4 (Y) 2, 4, 6, 8 Data out
112 * Receive RX 3 (G) 10, 14 -ACK, -AutoFeed
113 * Common 2 (R) 25 Common
114 * Zero crossing 1 (B) 17 or 12 -Select or +PaperEnd
116 * NOTE: In the original cable I have (which I am still using, May, 1997)
117 * the Zero crossing signal goes to pin 17 (-Select) on the parallel port.
118 * In retrospect, this doesn't make a whole lot of sense, given that the
119 * -Select signal propagates the other direction. Indeed, some people have
120 * reported problems with this, and have had success using pin 12 (+PaperEnd)
121 * instead. This driver searches for the zero crossing signal on either
122 * pin 17 or pin 12, so it should work with either cable configuration.
123 * My suggestion would be to start by making the cable so that the zero
124 * crossing signal goes to pin 12 on the parallel port.
126 * The zero crossing signal is used to synchronize transmission to the
127 * zero crossings of the AC line, as detailed in the X-10 documentation.
128 * It would be nice if one could generate interrupts with this signal,
129 * however one needs interrupts on both the rising and falling edges,
130 * and the -ACK signal to the parallel port interrupts only on the falling
131 * edge, so it can't be done without additional hardware.
133 * In this driver, the transmit function is performed in a non-interrupt-driven
134 * fashion, by polling the zero crossing signal to determine when a transition
135 * has occurred. This wastes CPU time during transmission, but it seems like
136 * the best that can be done without additional hardware. One problem with
137 * the scheme is that preemption of the CPU during transmission can cause loss
138 * of sync. The driver tries to catch this, by noticing that a long delay
139 * loop has somehow become foreshortened, and the transmission is aborted with
140 * an error return. It is up to the user level software to handle this
141 * situation (most likely by retrying the transmission).
144 #include <sys/param.h>
145 #include <sys/systm.h>
146 #include <sys/conf.h>
147 #include <sys/kernel.h>
149 #include <sys/syslog.h>
150 #include <sys/select.h>
151 #include <sys/poll.h>
154 #include <sys/time.h>
155 #endif /* HIRESTIME */
157 #include <bus/isa/i386/isa_device.h>
160 * Transmission is done by calling write() to send three byte packets of data.
161 * The first byte contains a four bit house code (0=A to 15=P).
162 * The second byte contains five bit unit/key code (0=unit 1 to 15=unit 16,
163 * 16=All Units Off to 31 = Status Request). The third byte specifies
164 * the number of times the packet is to be transmitted without any
165 * gaps between successive transmissions. Normally this is 2, as per
166 * the X-10 documentation, but sometimes (e.g. for bright and dim codes)
167 * it can be another value. Each call to write can specify an arbitrary
168 * number of data bytes. An incomplete packet is buffered until a subsequent
169 * call to write() provides data to complete it. At most one packet will
170 * actually be processed in any call to write(). Successive calls to write()
171 * leave a three-cycle gap between transmissions, per the X-10 documentation.
173 * Reception is done using read().
174 * The driver produces a series of three-character packets.
175 * In each packet, the first character consists of flags,
176 * the second character is a four bit house code (0-15),
177 * and the third character is a five bit key/function code (0-31).
178 * The flags are the following:
181 #define TW_RCV_LOCAL 1 /* The packet arrived during a local transmission */
182 #define TW_RCV_ERROR 2 /* An invalid/corrupted packet was received */
185 * IBM PC parallel port definitions relevant to TW523
188 #define tw_data 0 /* Data to tw523 (R/W) */
190 #define tw_status 1 /* Status of tw523 (R) */
191 #define TWS_RDATA 0x40 /* tw523 receive data */
192 #define TWS_OUT 0x20 /* pin 12, out of paper */
194 #define tw_control 2 /* Control tw523 (R/W) */
195 #define TWC_SYNC 0x08 /* tw523 sync (pin 17) */
196 #define TWC_ENA 0x10 /* tw523 interrupt enable */
199 * Miscellaneous defines
202 #define TWUNIT(dev) (minor(dev)) /* Extract unit number from device */
204 static int twprobe(struct isa_device *idp);
205 static int twattach(struct isa_device *idp);
207 struct isa_driver twdriver = {
208 twprobe, twattach, "tw"
211 static d_open_t twopen;
212 static d_close_t twclose;
213 static d_read_t twread;
214 static d_write_t twwrite;
215 static d_poll_t twpoll;
217 #define CDEV_MAJOR 19
218 static struct cdevsw tw_cdevsw = {
220 /* maj */ CDEV_MAJOR,
232 /* strategy */ nostrategy,
238 * Software control structure for TW523
241 #define TWS_XMITTING 1 /* Transmission in progress */
242 #define TWS_RCVING 2 /* Reception in progress */
243 #define TWS_WANT 4 /* A process wants received data */
244 #define TWS_OPEN 8 /* Is it currently open? */
246 #define TW_SIZE 3*60 /* Enough for about 10 sec. of input */
247 #define TW_MIN_DELAY 1500 /* Ignore interrupts of lesser latency */
249 static struct tw_sc {
250 u_int sc_port; /* I/O Port */
251 u_int sc_state; /* Current software control state */
252 struct selinfo sc_selp; /* Information for select() */
253 u_char sc_xphase; /* Current state of sync (for transmitter) */
254 u_char sc_rphase; /* Current state of sync (for receiver) */
255 u_char sc_flags; /* Flags for current reception */
256 short sc_rcount; /* Number of bits received so far */
257 int sc_bits; /* Bits received so far */
258 u_char sc_pkt[3]; /* Packet not yet transmitted */
259 short sc_pktsize; /* How many bytes in the packet? */
260 u_char sc_buf[TW_SIZE]; /* We buffer our own input */
261 int sc_nextin; /* Next free slot in circular buffer */
262 int sc_nextout; /* First used slot in circular buffer */
263 /* Callout for canceling our abortrcv timeout */
264 struct callout abortrcv_ch;
266 int sc_xtimes[22]; /* Times for bits in current xmit packet */
267 int sc_rtimes[22]; /* Times for bits in current rcv packet */
268 int sc_no_rcv; /* number of interrupts received */
269 #define SC_RCV_TIME_LEN 128
270 int sc_rcv_time[SC_RCV_TIME_LEN]; /* usec time stamp on interrupt */
271 #endif /* HIRESTIME */
274 static int tw_zcport; /* offset of port for zero crossing signal */
275 static int tw_zcmask; /* mask for the zero crossing signal */
277 static void twdelay25(void);
278 static void twdelayn(int n);
279 static void twsetuptimes(int *a);
280 static int wait_for_zero(struct tw_sc *sc);
281 static int twputpkt(struct tw_sc *sc, u_char *p);
282 static ointhand2_t twintr;
283 static int twgetbytes(struct tw_sc *sc, u_char *p, int cnt);
284 static timeout_t twabortrcv;
285 static int twsend(struct tw_sc *sc, int h, int k, int cnt);
286 static int next_zero(struct tw_sc *sc);
287 static int twchecktime(int target, int tol);
288 static void twdebugtimes(struct tw_sc *sc);
291 * Counter value for delay loop.
292 * It is adjusted by twprobe so that the delay loop takes about 25us.
295 #define TWDELAYCOUNT 161 /* Works on my 486DX/33 */
296 static int twdelaycount;
299 * Twdelay25 is used for very short delays of about 25us.
300 * It is implemented with a calibrated delay loop, and should be
301 * fairly accurate ... unless we are preempted by an interrupt.
303 * We use this to wait for zero crossings because the X-10 specs say we
304 * are supposed to assert carrier within 25us when one happens.
305 * I don't really believe we can do this, but the X-10 devices seem to be
309 static void twdelay25(void)
312 for(cnt = twdelaycount; cnt; cnt--); /* Should take about 25us */
316 * Twdelayn is used to time the length of the 1ms carrier pulse.
317 * This is not very critical, but if we have high-resolution time-of-day
318 * we check it every apparent 200us to make sure we don't get too far off
319 * if we happen to be interrupted during the delay.
322 static void twdelayn(int n)
330 #endif /* HIRESTIME */
338 if(d >= 0 && d < 1000000) return;
340 #endif /* HIRESTIME */
344 static int twprobe(idp)
345 struct isa_device *idp;
351 sc.sc_port = idp->id_iobase;
352 /* Search for the zero crossing signal at ports, bit combinations. */
353 tw_zcport = tw_control;
354 tw_zcmask = TWC_SYNC;
355 sc.sc_xphase = inb(idp->id_iobase + tw_zcport) & tw_zcmask;
356 if(wait_for_zero(&sc) < 0) {
357 tw_zcport = tw_status;
359 sc.sc_xphase = inb(idp->id_iobase + tw_zcport) & tw_zcmask;
361 if(wait_for_zero(&sc) < 0)
364 * Iteratively check the timing of a few sync transitions, and adjust
365 * the loop delay counter, if necessary, to bring the timing reported
366 * by wait_for_zero() close to HALFCYCLE. Give up if anything
367 * ridiculous happens.
369 if(twdelaycount == 0) { /* Only adjust timing for first unit */
370 twdelaycount = TWDELAYCOUNT;
371 for(tries = 0; tries < 10; tries++) {
372 sc.sc_xphase = inb(idp->id_iobase + tw_zcport) & tw_zcmask;
373 if(wait_for_zero(&sc) >= 0) {
374 d = wait_for_zero(&sc);
375 if(d <= HALFCYCLE/100 || d >= HALFCYCLE*100) {
379 twdelaycount = (twdelaycount * d)/HALFCYCLE;
384 * Now do a final check, just to make sure
386 sc.sc_xphase = inb(idp->id_iobase + tw_zcport) & tw_zcmask;
387 if(wait_for_zero(&sc) >= 0) {
388 d = wait_for_zero(&sc);
389 if(d <= (HALFCYCLE * 110)/100 && d >= (HALFCYCLE * 90)/100) return(8);
394 static int twattach(idp)
395 struct isa_device *idp;
400 idp->id_ointr = twintr;
401 sc = &tw_sc[unit = idp->id_unit];
402 sc->sc_port = idp->id_iobase;
405 callout_init(&sc->abortrcv_ch);
406 cdevsw_add(&tw_cdevsw, -1, unit);
407 make_dev(&tw_cdevsw, unit, 0, 0, 0600, "tw%d", unit);
411 int twopen(dev, flag, mode, td)
417 struct tw_sc *sc = &tw_sc[TWUNIT(dev)];
421 if(sc->sc_state == 0) {
422 sc->sc_state = TWS_OPEN;
423 sc->sc_nextin = sc->sc_nextout = 0;
425 outb(sc->sc_port+tw_control, TWC_ENA);
431 int twclose(dev, flag, mode, td)
437 struct tw_sc *sc = &tw_sc[TWUNIT(dev)];
442 outb(sc->sc_port+tw_control, 0);
447 int twread(dev, uio, ioflag)
453 struct tw_sc *sc = &tw_sc[TWUNIT(dev)];
457 cnt = MIN(uio->uio_resid, 3);
458 if((error = twgetbytes(sc, buf, cnt)) == 0) {
459 error = uiomove(buf, cnt, uio);
465 int twwrite(dev, uio, ioflag)
471 int house, key, reps;
475 sc = &tw_sc[TWUNIT(dev)];
477 * Note: Although I had intended to allow concurrent transmitters,
478 * there is a potential problem here if two processes both write
479 * into the sc_pkt buffer at the same time. The following code
480 * is an additional critical section that needs to be synchronized.
483 cnt = MIN(3 - sc->sc_pktsize, uio->uio_resid);
484 error = uiomove(&(sc->sc_pkt[sc->sc_pktsize]), cnt, uio);
489 sc->sc_pktsize += cnt;
490 if(sc->sc_pktsize < 3) { /* Only transmit 3-byte packets */
496 * Collect house code, key code, and rep count, and check for sanity.
498 house = sc->sc_pkt[0];
500 reps = sc->sc_pkt[2];
501 if(house >= 16 || key >= 32) {
506 * Synchronize with the receiver operating in the bottom half, and
507 * also with concurrent transmitters.
508 * We don't want to interfere with a packet currently being received,
509 * and we would like the receiver to recognize when a packet has
510 * originated locally.
512 while(sc->sc_state & (TWS_RCVING | TWS_XMITTING)) {
513 error = tsleep((caddr_t)sc, PCATCH, "twwrite", 0);
519 sc->sc_state |= TWS_XMITTING;
521 * Everything looks OK, let's do the transmission.
523 splx(s); /* Enable interrupts because this takes a LONG time */
524 error = twsend(sc, house, key, reps);
526 sc->sc_state &= ~TWS_XMITTING;
529 if(error) return(EIO);
534 * Determine if there is data available for reading
537 int twpoll(dev, events, td)
546 sc = &tw_sc[TWUNIT(dev)];
548 /* XXX is this correct? the original code didn't test select rw mode!! */
549 if (events & (POLLIN | POLLRDNORM)) {
550 if(sc->sc_nextin != sc->sc_nextout)
551 revents |= events & (POLLIN | POLLRDNORM);
553 selrecord(td, &sc->sc_selp);
563 #define X10_START_LENGTH 4
564 static char X10_START[] = { 1, 1, 1, 0 };
567 * Each bit of the 4-bit house code and 5-bit key code
568 * is transmitted twice, once in true form, and then in
569 * complemented form. This is already taken into account
570 * in the following tables.
573 #define X10_HOUSE_LENGTH 8
574 static char X10_HOUSE[16][8] = {
575 { 0, 1, 1, 0, 1, 0, 0, 1 }, /* A = 0110 */
576 { 1, 0, 1, 0, 1, 0, 0, 1 }, /* B = 1110 */
577 { 0, 1, 0, 1, 1, 0, 0, 1 }, /* C = 0010 */
578 { 1, 0, 0, 1, 1, 0, 0, 1 }, /* D = 1010 */
579 { 0, 1, 0, 1, 0, 1, 1, 0 }, /* E = 0001 */
580 { 1, 0, 0, 1, 0, 1, 1, 0 }, /* F = 1001 */
581 { 0, 1, 1, 0, 0, 1, 1, 0 }, /* G = 0101 */
582 { 1, 0, 1, 0, 0, 1, 1, 0 }, /* H = 1101 */
583 { 0, 1, 1, 0, 1, 0, 1, 0 }, /* I = 0111 */
584 { 1, 0, 1, 0, 1, 0, 1, 0 }, /* J = 1111 */
585 { 0, 1, 0, 1, 1, 0, 1, 0 }, /* K = 0011 */
586 { 1, 0, 0, 1, 1, 0, 1, 0 }, /* L = 1011 */
587 { 0, 1, 0, 1, 0, 1, 0, 1 }, /* M = 0000 */
588 { 1, 0, 0, 1, 0, 1, 0, 1 }, /* N = 1000 */
589 { 0, 1, 1, 0, 0, 1, 0, 1 }, /* O = 0100 */
590 { 1, 0, 1, 0, 0, 1, 0, 1 } /* P = 1100 */
593 #define X10_KEY_LENGTH 10
594 static char X10_KEY[32][10] = {
595 { 0, 1, 1, 0, 1, 0, 0, 1, 0, 1 }, /* 01100 => 1 */
596 { 1, 0, 1, 0, 1, 0, 0, 1, 0, 1 }, /* 11100 => 2 */
597 { 0, 1, 0, 1, 1, 0, 0, 1, 0, 1 }, /* 00100 => 3 */
598 { 1, 0, 0, 1, 1, 0, 0, 1, 0, 1 }, /* 10100 => 4 */
599 { 0, 1, 0, 1, 0, 1, 1, 0, 0, 1 }, /* 00010 => 5 */
600 { 1, 0, 0, 1, 0, 1, 1, 0, 0, 1 }, /* 10010 => 6 */
601 { 0, 1, 1, 0, 0, 1, 1, 0, 0, 1 }, /* 01010 => 7 */
602 { 1, 0, 1, 0, 0, 1, 1, 0, 0, 1 }, /* 11010 => 8 */
603 { 0, 1, 1, 0, 1, 0, 1, 0, 0, 1 }, /* 01110 => 9 */
604 { 1, 0, 1, 0, 1, 0, 1, 0, 0, 1 }, /* 11110 => 10 */
605 { 0, 1, 0, 1, 1, 0, 1, 0, 0, 1 }, /* 00110 => 11 */
606 { 1, 0, 0, 1, 1, 0, 1, 0, 0, 1 }, /* 10110 => 12 */
607 { 0, 1, 0, 1, 0, 1, 0, 1, 0, 1 }, /* 00000 => 13 */
608 { 1, 0, 0, 1, 0, 1, 0, 1, 0, 1 }, /* 10000 => 14 */
609 { 0, 1, 1, 0, 0, 1, 0, 1, 0, 1 }, /* 01000 => 15 */
610 { 1, 0, 1, 0, 0, 1, 0, 1, 0, 1 }, /* 11000 => 16 */
611 { 0, 1, 0, 1, 0, 1, 0, 1, 1, 0 }, /* 00001 => All Units Off */
612 { 0, 1, 0, 1, 0, 1, 1, 0, 1, 0 }, /* 00011 => All Units On */
613 { 0, 1, 0, 1, 1, 0, 0, 1, 1, 0 }, /* 00101 => On */
614 { 0, 1, 0, 1, 1, 0, 1, 0, 1, 0 }, /* 00111 => Off */
615 { 0, 1, 1, 0, 0, 1, 0, 1, 1, 0 }, /* 01001 => Dim */
616 { 0, 1, 1, 0, 0, 1, 1, 0, 1, 0 }, /* 01011 => Bright */
617 { 0, 1, 1, 0, 1, 0, 0, 1, 1, 0 }, /* 01101 => All LIGHTS Off */
618 { 0, 1, 1, 0, 1, 0, 1, 0, 1, 0 }, /* 01111 => Extended Code */
619 { 1, 0, 0, 1, 0, 1, 0, 1, 1, 0 }, /* 10001 => Hail Request */
620 { 1, 0, 0, 1, 0, 1, 1, 0, 1, 0 }, /* 10011 => Hail Acknowledge */
621 { 1, 0, 0, 1, 1, 0, 0, 1, 1, 0 }, /* 10101 => Preset Dim 0 */
622 { 1, 0, 0, 1, 1, 0, 1, 0, 1, 0 }, /* 10111 => Preset Dim 1 */
623 { 1, 0, 1, 0, 0, 1, 0, 1, 0, 1 }, /* 11000 => Extended Data (analog) */
624 { 1, 0, 1, 0, 0, 1, 1, 0, 1, 0 }, /* 11011 => Status = on */
625 { 1, 0, 1, 0, 1, 0, 0, 1, 1, 0 }, /* 11101 => Status = off */
626 { 1, 0, 1, 0, 1, 0, 1, 0, 1, 0 } /* 11111 => Status request */
630 * Tables for mapping received X-10 code back to house/key number.
633 static short X10_HOUSE_INV[16] = {
634 12, 4, 2, 10, 14, 6, 0, 8,
635 13, 5, 3, 11, 15, 7, 1, 9
638 static short X10_KEY_INV[32] = {
639 12, 16, 4, 17, 2, 18, 10, 19,
640 14, 20, 6, 21, 0, 22, 8, 23,
641 13, 24, 5, 25, 3, 26, 11, 27,
642 15, 28, 7, 29, 1, 30, 9, 31
645 static char *X10_KEY_LABEL[32] = {
674 "Extended Data (analog)",
680 * Transmit a packet containing house code h and key code k
683 #define TWRETRY 10 /* Try 10 times to sync with AC line */
685 static int twsend(sc, h, k, cnt)
690 int port = sc->sc_port;
693 * Make sure we get a reliable sync with a power line zero crossing
695 for(i = 0; i < TWRETRY; i++) {
696 if(wait_for_zero(sc) > 100) goto insync;
698 log(LOG_ERR, "TWXMIT: failed to sync.\n");
703 * Be sure to leave 3 cycles space between transmissions
705 for(i = 6; i > 0; i--)
706 if(next_zero(sc) < 0) return(-1);
708 * The packet is transmitted cnt times, with no gaps.
712 * Transmit the start code
714 for(i = 0; i < X10_START_LENGTH; i++) {
715 outb(port+tw_data, X10_START[i] ? 0xff : 0x00); /* Waste no time! */
717 if(i == 0) twsetuptimes(sc->sc_xtimes);
718 if(twchecktime(sc->sc_xtimes[i], HALFCYCLE/20) == 0) {
719 outb(port+tw_data, 0);
722 #endif /* HIRESTIME */
723 twdelayn(1000); /* 1ms pulse width */
724 outb(port+tw_data, 0);
725 if(next_zero(sc) < 0) return(-1);
728 * Transmit the house code
730 for(i = 0; i < X10_HOUSE_LENGTH; i++) {
731 outb(port+tw_data, X10_HOUSE[h][i] ? 0xff : 0x00); /* Waste no time! */
733 if(twchecktime(sc->sc_xtimes[i+X10_START_LENGTH], HALFCYCLE/20) == 0) {
734 outb(port+tw_data, 0);
737 #endif /* HIRESTIME */
738 twdelayn(1000); /* 1ms pulse width */
739 outb(port+tw_data, 0);
740 if(next_zero(sc) < 0) return(-1);
743 * Transmit the unit/key code
745 for(i = 0; i < X10_KEY_LENGTH; i++) {
746 outb(port+tw_data, X10_KEY[k][i] ? 0xff : 0x00);
748 if(twchecktime(sc->sc_xtimes[i+X10_START_LENGTH+X10_HOUSE_LENGTH],
749 HALFCYCLE/20) == 0) {
750 outb(port+tw_data, 0);
753 #endif /* HIRESTIME */
754 twdelayn(1000); /* 1ms pulse width */
755 outb(port+tw_data, 0);
756 if(next_zero(sc) < 0) return(-1);
763 * Waste CPU cycles to get in sync with a power line zero crossing.
764 * The value returned is roughly how many microseconds we wasted before
765 * seeing the transition. To avoid wasting time forever, we give up after
766 * waiting patiently for 1/4 sec (15 power line cycles at 60 Hz),
767 * which is more than the 11 cycles it takes to transmit a full
771 static int wait_for_zero(sc)
774 int i, old, new, max;
775 int port = sc->sc_port + tw_zcport;
778 max = 10000; /* 10000 * 25us = 0.25 sec */
781 new = inb(port) & tw_zcmask;
793 * Wait for the next zero crossing transition, and if we don't have
794 * high-resolution time-of-day, check to see that the zero crossing
795 * appears to be arriving on schedule.
796 * We expect to be waiting almost a full half-cycle (8.333ms-1ms = 7.333ms).
797 * If we don't seem to wait very long, something is wrong (like we got
798 * preempted!) and we should abort the transmission because
799 * there's no telling how long it's really been since the
800 * last bit was transmitted.
803 static int next_zero(sc)
808 if((d = wait_for_zero(sc)) < 0) {
810 if((d = wait_for_zero(sc)) < 6000 || d > 8500) {
811 /* No less than 6.0ms, no more than 8.5ms */
812 #endif /* HIRESTIME */
813 log(LOG_ERR, "TWXMIT framing error: %d\n", d);
820 * Put a three-byte packet into the circular buffer
821 * Should be called at priority spltty()
824 static int twputpkt(sc, p)
830 for(i = 0; i < 3; i++) {
831 next = sc->sc_nextin+1;
832 if(next >= TW_SIZE) next = 0;
833 if(next == sc->sc_nextout) { /* Buffer full */
835 log(LOG_ERR, "TWRCV: Buffer overrun\n");
839 sc->sc_buf[sc->sc_nextin] = *p++;
840 sc->sc_nextin = next;
842 if(sc->sc_state & TWS_WANT) {
843 sc->sc_state &= ~TWS_WANT;
844 wakeup((caddr_t)(&sc->sc_buf));
846 selwakeup(&sc->sc_selp);
851 * Get bytes from the circular buffer
852 * Should be called at priority spltty()
855 static int twgetbytes(sc, p, cnt)
863 while(sc->sc_nextin == sc->sc_nextout) { /* Buffer empty */
864 sc->sc_state |= TWS_WANT;
865 error = tsleep((caddr_t)(&sc->sc_buf), PCATCH, "twread", 0);
870 *p++ = sc->sc_buf[sc->sc_nextout++];
871 if(sc->sc_nextout >= TW_SIZE) sc->sc_nextout = 0;
877 * Abort reception that has failed to complete in the required time.
884 struct tw_sc *sc = arg;
889 sc->sc_state &= ~TWS_RCVING;
890 /* simply ignore single isolated interrupts. */
891 if (sc->sc_no_rcv > 1) {
892 sc->sc_flags |= TW_RCV_ERROR;
893 pkt[0] = sc->sc_flags;
896 log(LOG_ERR, "TWRCV: aborting (%x, %d)\n", sc->sc_bits, sc->sc_rcount);
904 tw_is_within(int value, int expected, int tolerance)
907 diff = value - expected;
910 if (diff < tolerance)
916 * This routine handles interrupts that occur when there is a falling
917 * transition on the RX input. There isn't going to be a transition
918 * on every bit (some are zero), but if we are smart and keep track of
919 * how long it's been since the last interrupt (via the zero crossing
920 * detect line and/or high-resolution time-of-day routine), we can
921 * reconstruct the transmission without having to poll.
924 static void twintr(unit)
927 struct tw_sc *sc = &tw_sc[unit];
936 * Ignore any interrupts that occur if the device is not open.
938 if(sc->sc_state == 0) return;
939 newphase = inb(port + tw_zcport) & tw_zcmask;
944 * If we aren't currently receiving a packet, set up a new packet
945 * and put in the first "1" bit that has just arrived.
946 * Arrange for the reception to be aborted if too much time goes by.
948 if((sc->sc_state & TWS_RCVING) == 0) {
950 twsetuptimes(sc->sc_rtimes);
951 #endif /* HIRESTIME */
952 sc->sc_state |= TWS_RCVING;
954 if(sc->sc_state & TWS_XMITTING) sc->sc_flags = TW_RCV_LOCAL;
955 else sc->sc_flags = 0;
957 sc->sc_rphase = newphase;
958 /* 3 cycles of silence = 3/60 = 1/20 = 50 msec */
959 callout_reset(&sc->abortrcv_ch, hz / 20, twabortrcv, sc);
960 sc->sc_rcv_time[0] = tv.tv_usec;
964 callout_reset(&sc->abortrcv_ch, hz / 20, twabortrcv, sc);
965 newphase = inb(port + tw_zcport) & tw_zcmask;
967 /* enforce a minimum delay since the last interrupt */
968 delay = tv.tv_usec - sc->sc_rcv_time[sc->sc_no_rcv - 1];
971 if (delay < TW_MIN_DELAY)
974 sc->sc_rcv_time[sc->sc_no_rcv] = tv.tv_usec;
975 if (sc->sc_rcv_time[sc->sc_no_rcv] < sc->sc_rcv_time[0])
976 sc->sc_rcv_time[sc->sc_no_rcv] += 1000000;
981 * The second and third bits are a special case.
983 if (sc->sc_rcount < 3) {
986 tw_is_within(delay, HALFCYCLE, HALFCYCLE / 6)
988 newphase != sc->sc_rphase
994 * Invalid start code -- abort reception.
996 sc->sc_state &= ~TWS_RCVING;
997 sc->sc_flags |= TW_RCV_ERROR;
998 callout_stop(&sc->abortrcv_ch);
999 log(LOG_ERR, "TWRCV: Invalid start code\n");
1004 if(sc->sc_rcount == 3) {
1006 * We've gotten three "1" bits in a row. The start code
1007 * is really 1110, but this might be followed by a zero
1008 * bit from the house code, so if we wait any longer we
1009 * might be confused about the first house code bit.
1010 * So, we guess that the start code is correct and insert
1011 * the trailing zero without actually having seen it.
1012 * We don't change sc_rphase in this case, because two
1013 * bit arrivals in a row preserve parity.
1019 * Update sc_rphase to the current phase before returning.
1021 sc->sc_rphase = newphase;
1026 * Now figure out what the current bit is that just arrived.
1027 * The X-10 protocol transmits each data bit twice: once in
1028 * true form and once in complemented form on the next half
1029 * cycle. So, there will be at least one interrupt per bit.
1030 * By comparing the phase we see at the time of the interrupt
1031 * with the saved sc_rphase, we can tell on which half cycle
1032 * the interrupt occrred. This assumes, of course, that the
1033 * packet is well-formed. We do the best we can at trying to
1034 * catch errors by aborting if too much time has gone by, and
1035 * by tossing out a packet if too many bits arrive, but the
1036 * whole scheme is probably not as robust as if we had a nice
1037 * interrupt on every half cycle of the power line.
1038 * If we have high-resolution time-of-day routines, then we
1039 * can do a bit more sanity checking.
1043 * A complete packet is 22 half cycles.
1045 if(sc->sc_rcount <= 20) {
1047 int bit = 0, last_bit;
1048 if (sc->sc_rcount == 4)
1049 last_bit = 1; /* Start (1110) ends in 10, a 'one' code. */
1051 last_bit = sc->sc_bits & 0x1;
1052 if ( ( (last_bit == 1)
1053 && (tw_is_within(delay, HALFCYCLE * 2, HALFCYCLE / 6)))
1054 || ( (last_bit == 0)
1055 && (tw_is_within(delay, HALFCYCLE * 1, HALFCYCLE / 6))))
1057 else if ( ( (last_bit == 1)
1058 && (tw_is_within(delay, HALFCYCLE * 3, HALFCYCLE / 6)))
1059 || ( (last_bit == 0)
1060 && (tw_is_within(delay, HALFCYCLE * 2, HALFCYCLE / 6))))
1063 sc->sc_flags |= TW_RCV_ERROR;
1064 log(LOG_ERR, "TWRCV: %d cycle after %d bit, delay %d%%\n",
1065 sc->sc_rcount, last_bit, 100 * delay / HALFCYCLE);
1067 sc->sc_bits = (sc->sc_bits << 1) | bit;
1069 sc->sc_bits = (sc->sc_bits << 1)
1070 | ((newphase == sc->sc_rphase) ? 0x0 : 0x1);
1071 #endif /* HIRESTIME */
1074 if(sc->sc_rcount >= 22 || sc->sc_flags & TW_RCV_ERROR) {
1075 if(sc->sc_rcount != 22) {
1076 sc->sc_flags |= TW_RCV_ERROR;
1077 pkt[0] = sc->sc_flags;
1078 pkt[1] = pkt[2] = 0;
1080 pkt[0] = sc->sc_flags;
1081 pkt[1] = X10_HOUSE_INV[(sc->sc_bits & 0x1e0) >> 5];
1082 pkt[2] = X10_KEY_INV[sc->sc_bits & 0x1f];
1084 sc->sc_state &= ~TWS_RCVING;
1086 callout_stop(&sc->abortrcv_ch);
1087 if(sc->sc_flags & TW_RCV_ERROR) {
1088 log(LOG_ERR, "TWRCV: invalid packet: (%d, %x) %c %s\n",
1089 sc->sc_rcount, sc->sc_bits, 'A' + pkt[1], X10_KEY_LABEL[pkt[2]]);
1092 /* log(LOG_ERR, "TWRCV: valid packet: (%d, %x) %c %s\n",
1093 sc->sc_rcount, sc->sc_bits, 'A' + pkt[1], X10_KEY_LABEL[pkt[2]]); */
1096 wakeup((caddr_t)sc);
1100 static void twdebugtimes(struct tw_sc *sc)
1103 for (i = 0; (i < sc->sc_no_rcv) && (i < SC_RCV_TIME_LEN); i++)
1104 log(LOG_ERR, "TWRCV: interrupt %2d: %d\t%d%%\n", i, sc->sc_rcv_time[i],
1105 (sc->sc_rcv_time[i] - sc->sc_rcv_time[(i?i-1:0)])*100/HALFCYCLE);
1110 * Initialize an array of 22 times, starting from the current
1111 * microtime and continuing for the next 21 half cycles.
1112 * We use the times as a reference to make sure transmission
1113 * or reception is on schedule.
1116 static void twsetuptimes(int *a)
1123 for(i = 0; i < 22; i++) {
1126 if(t >= 1000000) t -= 1000000;
1131 * Check the current time against a slot in a previously set up
1132 * timing array, and make sure that it looks like we are still
1136 static int twchecktime(int target, int tol)
1143 d = (target - t) >= 0 ? (target - t) : (t - target);
1144 if(d > 500000) d = 1000000-d;
1145 if(d <= tol && d >= -tol) {
1151 #endif /* HIRESTIME */