Mark the following stuff as depricated:
[dragonfly.git] / sys / dev / pccard / pcic / i82365.c
1 /*      $NetBSD: i82365.c,v 1.25 1999/10/15 06:07:27 haya Exp $ */
2 /* $FreeBSD: src/sys/dev/pcic/i82365.c,v 1.37 2002/11/17 04:52:37 imp Exp $ */
3 /* $DragonFly: src/sys/dev/pccard/pcic/Attic/i82365.c,v 1.2 2004/12/08 20:36:39 joerg Exp $ */
4
5 /*
6  * Copyright (c) 1997 Marc Horowitz.  All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *      This product includes software developed by Marc Horowitz.
19  * 4. The name of the author may not be used to endorse or promote products
20  *    derived from this software without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33
34 #include "opt_depricated.h"
35 #ifndef I_WANT_DEPRICATED_STUFF
36 #error "Add options I_WANT_DEPRICATED_STUFF to your kernel config and send a mail to kernel@"
37 #endif
38
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/malloc.h>
42 #include <sys/module.h>
43 #include <sys/kernel.h>
44 #include <sys/queue.h>
45 #include <sys/types.h>
46
47 #include <sys/bus.h>
48 #include <machine/bus.h>
49 #include <sys/rman.h>
50 #include <machine/resource.h>
51
52 #include <machine/clock.h>
53
54 #include <sys/wait.h>
55 #include <sys/unistd.h>
56 #include <sys/kthread.h>
57
58 /* We shouldn't need to include the following, but sadly we do for now */
59 /* XXX */
60 #include <bus/pccard/pccardreg.h>
61 #include <bus/pccard/pccardvar.h>
62
63 #include <dev/pccard/pcic/i82365reg.h>
64 #include <dev/pccard/pcic/i82365var.h>
65
66 #include "card_if.h"
67
68 #define PCICDEBUG
69
70 #ifdef PCICDEBUG
71 int     pcic_debug = 1;
72 #define DPRINTF(arg) if (pcic_debug) printf arg; else ;
73 #define DEVPRINTF(arg) if (pcic_debug) device_printf arg; else ;
74 #else
75 #define DPRINTF(arg)
76 #define DEVPRINTF(arg)
77 #endif
78
79 #define VERBOSE(arg) if (bootverbose) printf arg; else ;
80
81 #define N(a)    (sizeof(a)/sizeof(a[0]))
82
83 #define PCIC_VENDOR_UNKNOWN             0
84 #define PCIC_VENDOR_I82365SLR0          1
85 #define PCIC_VENDOR_I82365SLR1          2
86 #define PCIC_VENDOR_CIRRUS_PD6710       3
87 #define PCIC_VENDOR_CIRRUS_PD672X       4
88
89 #define PCIC_H2SOFTC(h) ((struct pcic_softc *)h->sc)
90 /*
91  * Individual drivers will allocate their own memory and io regions. Memory
92  * regions must be a multiple of 4k, aligned on a 4k boundary.
93  */
94
95 #define PCIC_MEM_ALIGN  PCIC_MEM_PAGESIZE
96
97 static void     pcic_init_socket(struct pcic_handle *);
98 static void     pcic_intr_socket(struct pcic_handle *);
99
100 static int      pcic_activate(device_t dev);
101 static void     pcic_intr(void *arg);
102
103 static void     pcic_attach_card(struct pcic_handle *);
104 static void     pcic_detach_card(struct pcic_handle *);
105
106 static void     pcic_chip_do_mem_map(struct pcic_handle *, int);
107 static void     pcic_chip_do_io_map(struct pcic_handle *, int);
108
109 void    pcic_create_event_thread(void *);
110 void    pcic_event_thread(void *);
111
112 void    pcic_queue_event(struct pcic_handle *, int);
113
114 static void     pcic_wait_ready(struct pcic_handle *);
115
116 static u_int8_t st_pcic_read(struct pcic_handle *, int);
117 static void st_pcic_write(struct pcic_handle *, int, u_int8_t);
118
119 /* XXX Should really be dynamic XXX */
120 static struct pcic_handle *handles[20];
121 static struct pcic_handle **lasthandle = handles;
122
123 static struct pcic_handle *
124 pcic_get_handle(device_t dev, device_t child)
125 {
126         if (dev == child)
127                 return NULL;
128         while (child && device_get_parent(child) != dev)
129                 child = device_get_parent(child);
130         if (child == NULL)
131                 return NULL;
132         return ((struct pcic_handle *) device_get_ivars(child));
133 }
134
135 int
136 pcic_ident_ok(int ident)
137 {
138         /* this is very empirical and heuristic */
139
140         if ((ident == 0) || (ident == 0xff) || (ident & PCIC_IDENT_ZERO))
141                 return (0);
142
143         if ((ident & PCIC_IDENT_IFTYPE_MASK) != PCIC_IDENT_IFTYPE_MEM_AND_IO) {
144 #ifdef DIAGNOSTIC
145                 printf("pcic: does not support memory and I/O cards, "
146                     "ignored (ident=%0x)\n", ident);
147 #endif
148                 return (0);
149         }
150         return (1);
151 }
152
153 int
154 pcic_vendor(struct pcic_handle *h)
155 {
156         int reg;
157
158         /*
159          * the chip_id of the cirrus toggles between 11 and 00 after a write.
160          * weird.
161          */
162
163         pcic_write(h, PCIC_CIRRUS_CHIP_INFO, 0);
164         reg = pcic_read(h, -1);
165
166         if ((reg & PCIC_CIRRUS_CHIP_INFO_CHIP_ID) ==
167             PCIC_CIRRUS_CHIP_INFO_CHIP_ID) {
168                 reg = pcic_read(h, -1);
169                 if ((reg & PCIC_CIRRUS_CHIP_INFO_CHIP_ID) == 0) {
170                         if (reg & PCIC_CIRRUS_CHIP_INFO_SLOTS)
171                                 return (PCIC_VENDOR_CIRRUS_PD672X);
172                         else
173                                 return (PCIC_VENDOR_CIRRUS_PD6710);
174                 }
175         }
176
177         reg = pcic_read(h, PCIC_IDENT);
178
179         if ((reg & PCIC_IDENT_REV_MASK) == PCIC_IDENT_REV_I82365SLR0)
180                 return (PCIC_VENDOR_I82365SLR0);
181         else
182                 return (PCIC_VENDOR_I82365SLR1);
183
184         return (PCIC_VENDOR_UNKNOWN);
185 }
186
187 char *
188 pcic_vendor_to_string(int vendor)
189 {
190         switch (vendor) {
191         case PCIC_VENDOR_I82365SLR0:
192                 return ("Intel 82365SL Revision 0");
193         case PCIC_VENDOR_I82365SLR1:
194                 return ("Intel 82365SL Revision 1");
195         case PCIC_VENDOR_CIRRUS_PD6710:
196                 return ("Cirrus PD6710");
197         case PCIC_VENDOR_CIRRUS_PD672X:
198                 return ("Cirrus PD672X");
199         }
200
201         return ("Unknown controller");
202 }
203
204 static int
205 pcic_activate(device_t dev)
206 {
207         struct pcic_softc *sc = PCIC_SOFTC(dev);
208         int err;
209
210         sc->port_rid = 0;
211         sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->port_rid,
212             0, ~0, PCIC_IOSIZE, RF_ACTIVE);
213         if (!sc->port_res) {
214                 device_printf(dev, "Cannot allocate ioport\n");
215                 return ENOMEM;
216         }
217
218         sc->irq_rid = 0;
219         sc->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irq_rid, 
220             0, ~0, 1, RF_ACTIVE);
221         if (sc->irq_res) {
222                 sc->irq = rman_get_start(sc->irq_res);
223                 if ((err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC, 
224                     pcic_intr, sc, &sc->intrhand)) != 0) {
225                         device_printf(dev, "Cannot setup intr\n");
226                         pcic_deactivate(dev);
227                         return err;
228                 }
229         } else {
230                 printf("Polling not supported\n");
231                 /* XXX Do polling */
232                 return (ENXIO);
233         }
234
235         /* XXX This might not be needed in future, get it directly from
236          * XXX parent */
237         sc->mem_rid = 0;
238         sc->mem_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &sc->mem_rid, 
239             0, ~0, 1 << 13, RF_ACTIVE);
240         if (sc->mem_res == NULL) {
241                 device_printf(dev, "Cannot allocate mem\n");
242                 pcic_deactivate(dev);
243                 return ENOMEM;
244         }
245
246         sc->iot = rman_get_bustag(sc->port_res);
247         sc->ioh = rman_get_bushandle(sc->port_res);;
248         sc->memt = rman_get_bustag(sc->mem_res);
249         sc->memh = rman_get_bushandle(sc->mem_res);;
250         
251         return (0);
252 }
253
254 void
255 pcic_deactivate(device_t dev)
256 {
257         struct pcic_softc *sc = PCIC_SOFTC(dev);
258         
259         if (sc->intrhand)
260                 bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
261         sc->intrhand = 0;
262         if (sc->port_res)
263                 bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid, 
264                     sc->port_res);
265         sc->port_res = 0;
266         if (sc->irq_res)
267                 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid, 
268                     sc->irq_res);
269         sc->irq_res = 0;
270         if (sc->mem_res)
271                 bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, 
272                     sc->mem_res);
273         sc->mem_res = 0;
274         return;
275 }
276
277 int
278 pcic_attach(device_t dev)
279 {
280         struct pcic_softc *sc = PCIC_SOFTC(dev);
281         struct pcic_handle *h;
282         int vendor, count, i, reg, error;
283
284         sc->dev = dev;
285
286         /* Activate our resources */
287         if ((error = pcic_activate(dev)) != 0) {
288                 printf("pcic_attach (active) returns %d\n", error);
289                 return error;
290         }
291
292         /* now check for each controller/socket */
293
294         /*
295          * this could be done with a loop, but it would violate the
296          * abstraction...  --- unknown
297          * I don't see the abstraction... --imp
298          */
299
300         count = 0;
301
302         VERBOSE(("pcic ident regs:"));
303
304         sc->handle[0].sc = sc;
305         sc->handle[0].sock = C0SA;
306         /* initialise pcic_read and pcic_write functions */
307         sc->handle[0].ph_read = st_pcic_read;
308         sc->handle[0].ph_write = st_pcic_write;
309         sc->handle[0].ph_bus_t = sc->iot;
310         sc->handle[0].ph_bus_h = sc->ioh;
311         if (pcic_ident_ok(reg = pcic_read(&sc->handle[0], PCIC_IDENT))) {
312                 sc->handle[0].flags = PCIC_FLAG_SOCKETP;
313                 count++;
314         } else {
315                 sc->handle[0].flags = 0;
316         }
317         sc->handle[0].laststate = PCIC_LASTSTATE_EMPTY;
318
319         VERBOSE((" 0x%02x", reg));
320
321         sc->handle[1].sc = sc;
322         sc->handle[1].sock = C0SB;
323         /* initialise pcic_read and pcic_write functions */
324         sc->handle[1].ph_read = st_pcic_read;
325         sc->handle[1].ph_write = st_pcic_write;
326         sc->handle[1].ph_bus_t = sc->iot;
327         sc->handle[1].ph_bus_h = sc->ioh;
328         if (pcic_ident_ok(reg = pcic_read(&sc->handle[1], PCIC_IDENT))) {
329                 sc->handle[1].flags = PCIC_FLAG_SOCKETP;
330                 count++;
331         } else {
332                 sc->handle[1].flags = 0;
333         }
334         sc->handle[1].laststate = PCIC_LASTSTATE_EMPTY;
335
336         VERBOSE((" 0x%02x", reg));
337
338         /*
339          * The CL-PD6729 has only one controller and always returns 0
340          * if you try to read from the second one. Maybe pcic_ident_ok
341          * shouldn't accept 0?
342          */
343         sc->handle[2].sc = sc;
344         sc->handle[2].sock = C1SA;
345         /* initialise pcic_read and pcic_write functions */
346         sc->handle[2].ph_read = st_pcic_read;
347         sc->handle[2].ph_write = st_pcic_write;
348         sc->handle[2].ph_bus_t = sc->iot;
349         sc->handle[2].ph_bus_h = sc->ioh;
350         if (pcic_vendor(&sc->handle[0]) != PCIC_VENDOR_CIRRUS_PD672X ||
351             pcic_read(&sc->handle[2], PCIC_IDENT) != 0) {
352                 if (pcic_ident_ok(reg = pcic_read(&sc->handle[2],
353                                                   PCIC_IDENT))) {
354                         sc->handle[2].flags = PCIC_FLAG_SOCKETP;
355                         count++;
356                 } else {
357                         sc->handle[2].flags = 0;
358                 }
359                 sc->handle[2].laststate = PCIC_LASTSTATE_EMPTY;
360
361                 VERBOSE((" 0x%02x", reg));
362
363                 sc->handle[3].sc = sc;
364                 sc->handle[3].sock = C1SB;
365                 /* initialise pcic_read and pcic_write functions */
366                 sc->handle[3].ph_read = st_pcic_read;
367                 sc->handle[3].ph_write = st_pcic_write;
368                 sc->handle[3].ph_bus_t = sc->iot;
369                 sc->handle[3].ph_bus_h = sc->ioh;
370                 if (pcic_ident_ok(reg = pcic_read(&sc->handle[3],
371                                                   PCIC_IDENT))) {
372                         sc->handle[3].flags = PCIC_FLAG_SOCKETP;
373                         count++;
374                 } else {
375                         sc->handle[3].flags = 0;
376                 }
377                 sc->handle[3].laststate = PCIC_LASTSTATE_EMPTY;
378
379                 VERBOSE((" 0x%02x\n", reg));
380         } else {
381                 sc->handle[2].flags = 0;
382                 sc->handle[3].flags = 0;
383         }
384
385         if (count == 0) {
386                 printf("pcic_attach: attach found no sockets\n");
387                 return (ENXIO);
388         }
389
390         /* establish the interrupt */
391
392         /* XXX block interrupts? */
393
394         for (i = 0; i < PCIC_NSLOTS; i++) {
395                 /*
396                  * this should work, but w/o it, setting tty flags hangs at
397                  * boot time.
398                  */
399                 if (sc->handle[i].flags & PCIC_FLAG_SOCKETP)
400                 {
401                         STAILQ_INIT(&sc->handle[i].events);
402                         pcic_write(&sc->handle[i], PCIC_CSC_INTR, 0);
403                         pcic_read(&sc->handle[i], PCIC_CSC);
404                 }
405         }
406
407         if ((sc->handle[0].flags & PCIC_FLAG_SOCKETP) ||
408             (sc->handle[1].flags & PCIC_FLAG_SOCKETP)) {
409                 vendor = pcic_vendor(&sc->handle[0]);
410
411                 device_printf(dev, "controller 0 (%s) has ",
412                        pcic_vendor_to_string(vendor));
413
414                 if ((sc->handle[0].flags & PCIC_FLAG_SOCKETP) &&
415                     (sc->handle[1].flags & PCIC_FLAG_SOCKETP))
416                         printf("sockets A and B\n");
417                 else if (sc->handle[0].flags & PCIC_FLAG_SOCKETP)
418                         printf("socket A only\n");
419                 else
420                         printf("socket B only\n");
421
422                 if (sc->handle[0].flags & PCIC_FLAG_SOCKETP)
423                         sc->handle[0].vendor = vendor;
424                 if (sc->handle[1].flags & PCIC_FLAG_SOCKETP)
425                         sc->handle[1].vendor = vendor;
426         }
427         if ((sc->handle[2].flags & PCIC_FLAG_SOCKETP) ||
428             (sc->handle[3].flags & PCIC_FLAG_SOCKETP)) {
429                 vendor = pcic_vendor(&sc->handle[2]);
430
431                 device_printf(dev, "controller 1 (%s) has ",
432                        pcic_vendor_to_string(vendor));
433
434                 if ((sc->handle[2].flags & PCIC_FLAG_SOCKETP) &&
435                     (sc->handle[3].flags & PCIC_FLAG_SOCKETP))
436                         printf("sockets A and B\n");
437                 else if (sc->handle[2].flags & PCIC_FLAG_SOCKETP)
438                         printf("socket A only\n");
439                 else
440                         printf("socket B only\n");
441
442                 if (sc->handle[2].flags & PCIC_FLAG_SOCKETP)
443                         sc->handle[2].vendor = vendor;
444                 if (sc->handle[3].flags & PCIC_FLAG_SOCKETP)
445                         sc->handle[3].vendor = vendor;
446         }
447
448         for (i = 0; i < PCIC_NSLOTS; i++) {
449                 if ((sc->handle[i].flags & PCIC_FLAG_SOCKETP) == 0)
450                         continue;
451                 h = &sc->handle[i];
452                 /* initialize the rest of the handle */
453                 h->shutdown = 0;
454                 h->memalloc = 0;
455                 h->ioalloc = 0;
456                 h->ih_irq = 0;
457                 h->sc = sc;
458                 h->dev = device_add_child(dev, "pccard", -1);
459                 device_set_ivars(h->dev, h);
460                 pcic_init_socket(h);
461         }
462
463         /*
464          * Probe and attach any children as were configured above.
465          */
466         error = bus_generic_attach(dev);
467         if (error)
468                 pcic_deactivate(dev);
469         return error;
470 }
471
472 void
473 pcic_create_event_thread(void *arg)
474 {
475         struct pcic_handle *h = arg;
476         const char *cs;
477
478         switch (h->sock) {
479         case C0SA:
480                 cs = "0,0";
481                 break;
482         case C0SB:
483                 cs = "0,1";
484                 break;
485         case C1SA:
486                 cs = "1,0";
487                 break;
488         case C1SB:
489                 cs = "1,1";
490                 break;
491         default:
492                 panic("pcic_create_event_thread: unknown pcic socket");
493         }
494
495         if (kthread_create(pcic_event_thread, h, &h->event_thread,
496             "%s,%s", device_get_name(PCIC_H2SOFTC(h)->dev), cs)) {
497                 device_printf(PCIC_H2SOFTC(h)->dev,
498                     "cannot create event thread for sock 0x%02x\n", h->sock);
499                 panic("pcic_create_event_thread");
500         }
501 }
502
503 void
504 pcic_event_thread(void *arg)
505 {
506         struct pcic_handle *h = arg;
507         struct pcic_event *pe;
508         int s;
509         struct pcic_softc *sc = h->sc;
510
511         while (h->shutdown == 0) {
512                 s = splhigh();
513                 if ((pe = STAILQ_FIRST(&h->events)) == NULL) {
514                         splx(s);
515                         (void) tsleep(&h->events, 0, "pcicev", 0);
516                         continue;
517                 } else {
518                         splx(s);
519                         /* sleep .25s to be enqueued chatterling interrupts */
520                         (void) tsleep((caddr_t)pcic_event_thread, 0, "pcicss", hz/4);
521                 }
522                 s = splhigh();
523                 STAILQ_REMOVE_HEAD_UNTIL(&h->events, pe, pe_q);
524                 splx(s);
525
526                 switch (pe->pe_type) {
527                 case PCIC_EVENT_INSERTION:
528                         s = splhigh();
529                         while (1) {
530                                 struct pcic_event *pe1, *pe2;
531
532                                 if ((pe1 = STAILQ_FIRST(&h->events)) == NULL)
533                                         break;
534                                 if (pe1->pe_type != PCIC_EVENT_REMOVAL)
535                                         break;
536                                 if ((pe2 = STAILQ_NEXT(pe1, pe_q)) == NULL)
537                                         break;
538                                 if (pe2->pe_type == PCIC_EVENT_INSERTION) {
539                                         STAILQ_REMOVE_HEAD_UNTIL(&h->events, pe1, pe_q);
540                                         free(pe1, M_TEMP);
541                                         STAILQ_REMOVE_HEAD_UNTIL(&h->events, pe2, pe_q);
542                                         free(pe2, M_TEMP);
543                                 }
544                         }
545                         splx(s);
546                                 
547                         DEVPRINTF((h->dev, "insertion event\n"));
548                         pcic_attach_card(h);
549                         break;
550
551                 case PCIC_EVENT_REMOVAL:
552                         s = splhigh();
553                         while (1) {
554                                 struct pcic_event *pe1, *pe2;
555
556                                 if ((pe1 = STAILQ_FIRST(&h->events)) == NULL)
557                                         break;
558                                 if (pe1->pe_type != PCIC_EVENT_INSERTION)
559                                         break;
560                                 if ((pe2 = STAILQ_NEXT(pe1, pe_q)) == NULL)
561                                         break;
562                                 if (pe2->pe_type == PCIC_EVENT_REMOVAL) {
563                                         STAILQ_REMOVE_HEAD_UNTIL(&h->events, pe1, pe_q);
564                                         free(pe1, M_TEMP);
565                                         STAILQ_REMOVE_HEAD_UNTIL(&h->events, pe2, pe_q);
566                                         free(pe2, M_TEMP);
567                                 }
568                         }
569                         splx(s);
570
571                         DEVPRINTF((h->dev, "removal event\n"));
572                         pcic_detach_card(h);
573                         break;
574
575                 default:
576                         panic("pcic_event_thread: unknown event %d",
577                             pe->pe_type);
578                 }
579                 free(pe, M_TEMP);
580         }
581
582         h->event_thread = NULL;
583
584         /* In case parent is waiting for us to exit. */
585         wakeup(sc);
586
587         kthread_exit();
588 }
589
590 void
591 pcic_init_socket(struct pcic_handle *h)
592 {
593         int reg;
594         struct pcic_softc *sc = h->sc;
595
596         /*
597          * queue creation of a kernel thread to handle insert/removal events.
598          */
599         *lasthandle++ = h;
600
601         /* set up the card to interrupt on card detect */
602
603         pcic_write(h, PCIC_CSC_INTR, (sc->irq << PCIC_CSC_INTR_IRQ_SHIFT) |
604             PCIC_CSC_INTR_CD_ENABLE);
605         pcic_write(h, PCIC_INTR, 0);
606         pcic_read(h, PCIC_CSC);
607
608         /* unsleep the cirrus controller */
609
610         if ((h->vendor == PCIC_VENDOR_CIRRUS_PD6710) ||
611             (h->vendor == PCIC_VENDOR_CIRRUS_PD672X)) {
612                 reg = pcic_read(h, PCIC_CIRRUS_MISC_CTL_2);
613                 if (reg & PCIC_CIRRUS_MISC_CTL_2_SUSPEND) {
614                         DEVPRINTF((sc->dev, "socket %02x was suspended\n",
615                             h->sock));
616                         reg &= ~PCIC_CIRRUS_MISC_CTL_2_SUSPEND;
617                         pcic_write(h, PCIC_CIRRUS_MISC_CTL_2, reg);
618                 }
619         }
620         h->laststate = PCIC_LASTSTATE_EMPTY;
621
622 #if 0
623 /* XXX */
624 /*      Should do this later */
625 /* maybe as part of interrupt routing verification */
626         if ((reg & PCIC_IF_STATUS_CARDDETECT_MASK) ==
627             PCIC_IF_STATUS_CARDDETECT_PRESENT) {
628                 pcic_attach_card(h);
629                 h->laststate = PCIC_LASTSTATE_PRESENT;
630         } else {
631                 h->laststate = PCIC_LASTSTATE_EMPTY;
632         }
633 #endif
634 }
635
636 static void
637 pcic_intr(void *arg)
638 {
639         struct pcic_softc *sc = arg;
640         int i;
641
642         for (i = 0; i < PCIC_NSLOTS; i++)
643                 if (sc->handle[i].flags & PCIC_FLAG_SOCKETP)
644                         pcic_intr_socket(&sc->handle[i]);
645 }
646
647 static void
648 pcic_intr_socket(struct pcic_handle *h)
649 {
650         int cscreg;
651
652         cscreg = pcic_read(h, PCIC_CSC);
653
654         cscreg &= (PCIC_CSC_GPI | PCIC_CSC_CD | PCIC_CSC_READY | 
655             PCIC_CSC_BATTWARN | PCIC_CSC_BATTDEAD);
656
657         if (cscreg & PCIC_CSC_GPI) {
658                 DEVPRINTF((h->dev, "%02x GPI\n", h->sock));
659         }
660         if (cscreg & PCIC_CSC_CD) {
661                 int statreg;
662
663                 statreg = pcic_read(h, PCIC_IF_STATUS);
664
665                 DEVPRINTF((h->dev, "%02x CD %x\n", h->sock, statreg));
666
667                 if ((statreg & PCIC_IF_STATUS_CARDDETECT_MASK) ==
668                     PCIC_IF_STATUS_CARDDETECT_PRESENT) {
669                         if (h->laststate != PCIC_LASTSTATE_PRESENT) {
670                                 DEVPRINTF((h->dev, 
671                                     "enqueing INSERTION event\n"));
672                                 pcic_queue_event(h, PCIC_EVENT_INSERTION);
673                         }
674                         h->laststate = PCIC_LASTSTATE_PRESENT;
675                 } else {
676                         if (h->laststate == PCIC_LASTSTATE_PRESENT) {
677                                 /* Deactivate the card now. */
678                                 DEVPRINTF((h->dev, "detaching card\n"));
679                                 pcic_detach_card(h);
680                                 DEVPRINTF((h->dev,"enqueing REMOVAL event\n"));
681                                 pcic_queue_event(h, PCIC_EVENT_REMOVAL);
682                         }
683                         h->laststate = ((statreg & PCIC_IF_STATUS_CARDDETECT_MASK) == 0)
684                                 ? PCIC_LASTSTATE_EMPTY : PCIC_LASTSTATE_HALF;
685                 }
686         }
687         if (cscreg & PCIC_CSC_READY) {
688                 DEVPRINTF((h->dev, "%02x READY\n", h->sock));
689                 /* shouldn't happen */
690         }
691         if (cscreg & PCIC_CSC_BATTWARN) {
692                 DEVPRINTF((h->dev, "%02x BATTWARN\n", h->sock));
693         }
694         if (cscreg & PCIC_CSC_BATTDEAD) {
695                 DEVPRINTF((h->dev, "%02x BATTDEAD\n", h->sock));
696         }
697 }
698
699 void
700 pcic_queue_event(struct pcic_handle *h, int event)
701 {
702         struct pcic_event *pe;
703         int s;
704
705         pe = malloc(sizeof(*pe), M_TEMP, M_NOWAIT);
706         if (pe == NULL)
707                 panic("pcic_queue_event: can't allocate event");
708
709         pe->pe_type = event;
710         s = splhigh();
711         STAILQ_INSERT_TAIL(&h->events, pe, pe_q);
712         splx(s);
713         wakeup(&h->events);
714 }
715
716 static void
717 pcic_attach_card(struct pcic_handle *h)
718 {
719         if (!(h->flags & PCIC_FLAG_CARDP)) {
720                 /* call the MI attach function */
721                 CARD_ATTACH_CARD(h->dev);
722                 h->flags |= PCIC_FLAG_CARDP;
723         } else {
724                 DPRINTF(("pcic_attach_card: already attached\n"));
725         }
726 }
727
728 static void
729 pcic_detach_card(struct pcic_handle *h)
730 {
731         if (h->flags & PCIC_FLAG_CARDP) {
732                 h->flags &= ~PCIC_FLAG_CARDP;
733                 /* call the MI detach function */
734                 CARD_DETACH_CARD(h->dev);
735         }
736 }
737
738 static int 
739 pcic_chip_mem_alloc(struct pcic_handle *h, struct resource *r, bus_size_t size,
740     struct pccard_mem_handle *pcmhp)
741 {
742         bus_space_handle_t memh;
743         bus_addr_t addr;
744         bus_size_t sizepg;
745         int mask;
746         struct pcic_softc *sc = h->sc;
747
748         /* out of sc->memh, allocate as many pages as necessary */
749
750         /* convert size to PCIC pages */
751         sizepg = (size + (PCIC_MEM_ALIGN - 1)) / PCIC_MEM_ALIGN;
752         if (sizepg > PCIC_MAX_MEM_PAGES)
753                 return (1);
754
755         mask = (1 << sizepg) - 1;
756
757         addr = rman_get_start(r);
758         memh = addr;
759         pcmhp->memt = sc->memt;
760         pcmhp->memh = memh;
761         pcmhp->addr = addr;
762         pcmhp->size = size;
763         pcmhp->realsize = sizepg * PCIC_MEM_PAGESIZE;
764         return (0);
765 }
766
767 static void 
768 pcic_chip_mem_free(struct pcic_handle *h, struct pccard_mem_handle *pcmhp)
769 {
770 }
771
772 static struct mem_map_index_st {
773         int     sysmem_start_lsb;
774         int     sysmem_start_msb;
775         int     sysmem_stop_lsb;
776         int     sysmem_stop_msb;
777         int     cardmem_lsb;
778         int     cardmem_msb;
779         int     memenable;
780 } mem_map_index[] = {
781         {
782                 PCIC_SYSMEM_ADDR0_START_LSB,
783                 PCIC_SYSMEM_ADDR0_START_MSB,
784                 PCIC_SYSMEM_ADDR0_STOP_LSB,
785                 PCIC_SYSMEM_ADDR0_STOP_MSB,
786                 PCIC_CARDMEM_ADDR0_LSB,
787                 PCIC_CARDMEM_ADDR0_MSB,
788                 PCIC_ADDRWIN_ENABLE_MEM0,
789         },
790         {
791                 PCIC_SYSMEM_ADDR1_START_LSB,
792                 PCIC_SYSMEM_ADDR1_START_MSB,
793                 PCIC_SYSMEM_ADDR1_STOP_LSB,
794                 PCIC_SYSMEM_ADDR1_STOP_MSB,
795                 PCIC_CARDMEM_ADDR1_LSB,
796                 PCIC_CARDMEM_ADDR1_MSB,
797                 PCIC_ADDRWIN_ENABLE_MEM1,
798         },
799         {
800                 PCIC_SYSMEM_ADDR2_START_LSB,
801                 PCIC_SYSMEM_ADDR2_START_MSB,
802                 PCIC_SYSMEM_ADDR2_STOP_LSB,
803                 PCIC_SYSMEM_ADDR2_STOP_MSB,
804                 PCIC_CARDMEM_ADDR2_LSB,
805                 PCIC_CARDMEM_ADDR2_MSB,
806                 PCIC_ADDRWIN_ENABLE_MEM2,
807         },
808         {
809                 PCIC_SYSMEM_ADDR3_START_LSB,
810                 PCIC_SYSMEM_ADDR3_START_MSB,
811                 PCIC_SYSMEM_ADDR3_STOP_LSB,
812                 PCIC_SYSMEM_ADDR3_STOP_MSB,
813                 PCIC_CARDMEM_ADDR3_LSB,
814                 PCIC_CARDMEM_ADDR3_MSB,
815                 PCIC_ADDRWIN_ENABLE_MEM3,
816         },
817         {
818                 PCIC_SYSMEM_ADDR4_START_LSB,
819                 PCIC_SYSMEM_ADDR4_START_MSB,
820                 PCIC_SYSMEM_ADDR4_STOP_LSB,
821                 PCIC_SYSMEM_ADDR4_STOP_MSB,
822                 PCIC_CARDMEM_ADDR4_LSB,
823                 PCIC_CARDMEM_ADDR4_MSB,
824                 PCIC_ADDRWIN_ENABLE_MEM4,
825         },
826 };
827
828 static void 
829 pcic_chip_do_mem_map(struct pcic_handle *h, int win)
830 {
831         int reg;
832
833         pcic_write(h, mem_map_index[win].sysmem_start_lsb,
834             (h->mem[win].addr >> PCIC_SYSMEM_ADDRX_SHIFT) & 0xff);
835         pcic_write(h, mem_map_index[win].sysmem_start_msb,
836             ((h->mem[win].addr >> (PCIC_SYSMEM_ADDRX_SHIFT + 8)) &
837             PCIC_SYSMEM_ADDRX_START_MSB_ADDR_MASK));
838
839 #if 0
840         /* XXX do I want 16 bit all the time? */
841         PCIC_SYSMEM_ADDRX_START_MSB_DATASIZE_16BIT;
842 #endif
843
844         pcic_write(h, mem_map_index[win].sysmem_stop_lsb,
845             ((h->mem[win].addr + h->mem[win].size) >>
846             PCIC_SYSMEM_ADDRX_SHIFT) & 0xff);
847         pcic_write(h, mem_map_index[win].sysmem_stop_msb,
848             (((h->mem[win].addr + h->mem[win].size) >>
849             (PCIC_SYSMEM_ADDRX_SHIFT + 8)) &
850             PCIC_SYSMEM_ADDRX_STOP_MSB_ADDR_MASK) |
851             PCIC_SYSMEM_ADDRX_STOP_MSB_WAIT2);
852
853         pcic_write(h, mem_map_index[win].cardmem_lsb,
854             (h->mem[win].offset >> PCIC_CARDMEM_ADDRX_SHIFT) & 0xff);
855         pcic_write(h, mem_map_index[win].cardmem_msb,
856             ((h->mem[win].offset >> (PCIC_CARDMEM_ADDRX_SHIFT + 8)) &
857             PCIC_CARDMEM_ADDRX_MSB_ADDR_MASK) |
858             ((h->mem[win].kind == PCCARD_MEM_ATTR) ?
859             PCIC_CARDMEM_ADDRX_MSB_REGACTIVE_ATTR : 0));
860
861         reg = pcic_read(h, PCIC_ADDRWIN_ENABLE);
862         reg |= (mem_map_index[win].memenable | PCIC_ADDRWIN_ENABLE_MEMCS16);
863         pcic_write(h, PCIC_ADDRWIN_ENABLE, reg);
864
865         DELAY(100);
866
867 #ifdef PCICDEBUG
868         {
869                 int r1, r2, r3, r4, r5, r6;
870
871                 r1 = pcic_read(h, mem_map_index[win].sysmem_start_msb);
872                 r2 = pcic_read(h, mem_map_index[win].sysmem_start_lsb);
873                 r3 = pcic_read(h, mem_map_index[win].sysmem_stop_msb);
874                 r4 = pcic_read(h, mem_map_index[win].sysmem_stop_lsb);
875                 r5 = pcic_read(h, mem_map_index[win].cardmem_msb);
876                 r6 = pcic_read(h, mem_map_index[win].cardmem_lsb);
877
878                 DPRINTF(("pcic_chip_do_mem_map window %d: %02x%02x %02x%02x "
879                     "%02x%02x\n", win, r1, r2, r3, r4, r5, r6));
880         }
881 #endif
882 }
883
884 static int 
885 pcic_chip_mem_map(struct pcic_handle *h, int kind, bus_addr_t card_addr,
886     bus_size_t size, struct pccard_mem_handle *pcmhp, bus_addr_t *offsetp,
887     int *windowp)
888 {
889         bus_addr_t busaddr;
890         long card_offset;
891         int i, win;
892
893         win = -1;
894         for (i = 0; i < N(mem_map_index); i++) {
895                 if ((h->memalloc & (1 << i)) == 0) {
896                         win = i;
897                         h->memalloc |= (1 << i);
898                         break;
899                 }
900         }
901
902         if (win == -1)
903                 return (1);
904
905         *windowp = win;
906         busaddr = pcmhp->addr;
907
908         /*
909          * compute the address offset to the pccard address space for the
910          * pcic.  this is intentionally signed.  The masks and shifts below
911          * will cause TRT to happen in the pcic registers.  Deal with making
912          * sure the address is aligned, and return the alignment offset.
913          */
914
915         *offsetp = card_addr % PCIC_MEM_ALIGN;
916         card_addr -= *offsetp;
917
918         DPRINTF(("pcic_chip_mem_map window %d bus %lx+%lx+%lx at card addr "
919             "%lx\n", win, (u_long) busaddr, (u_long) * offsetp, (u_long) size,
920             (u_long) card_addr));
921
922         /*
923          * include the offset in the size, and decrement size by one, since
924          * the hw wants start/stop
925          */
926         size += *offsetp - 1;
927
928         card_offset = (((long) card_addr) - ((long) busaddr));
929
930         h->mem[win].addr = busaddr;
931         h->mem[win].size = size;
932         h->mem[win].offset = card_offset;
933         h->mem[win].kind = kind;
934
935         pcic_chip_do_mem_map(h, win);
936
937         return (0);
938 }
939
940 static void 
941 pcic_chip_mem_unmap(struct pcic_handle *h, int window)
942 {
943         int reg;
944
945         if (window >= N(mem_map_index))
946                 panic("pcic_chip_mem_unmap: window out of range");
947
948         reg = pcic_read(h, PCIC_ADDRWIN_ENABLE);
949         reg &= ~mem_map_index[window].memenable;
950         pcic_write(h, PCIC_ADDRWIN_ENABLE, reg);
951
952         h->memalloc &= ~(1 << window);
953 }
954
955 static int 
956 pcic_chip_io_alloc(struct pcic_handle *h, bus_addr_t start, bus_size_t size,
957     bus_size_t align, struct pccard_io_handle *pcihp)
958 {
959         bus_space_tag_t iot;
960         bus_space_handle_t ioh;
961         bus_addr_t ioaddr;
962         int flags = 0;
963
964         /*
965          * Allocate some arbitrary I/O space.
966          */
967         iot = h->ph_bus_t;
968         ioaddr = start;
969         if (start) {
970                 ioh = start;
971                 DPRINTF(("pcic_chip_io_alloc map port %lx+%lx\n",
972                     (u_long) ioaddr, (u_long) size));
973         } else {
974                 flags |= PCCARD_IO_ALLOCATED;
975                 ioh = start;
976                 DPRINTF(("pcic_chip_io_alloc alloc port %lx+%lx\n",
977                     (u_long) ioaddr, (u_long) size));
978         }
979
980         pcihp->iot = iot;
981         pcihp->ioh = ioh;
982         pcihp->addr = ioaddr;
983         pcihp->size = size;
984         pcihp->flags = flags;
985
986         return (0);
987 }
988
989 static void 
990 pcic_chip_io_free(struct pcic_handle *h, struct pccard_io_handle *pcihp)
991 {
992 }
993
994
995 static struct io_map_index_st {
996         int     start_lsb;
997         int     start_msb;
998         int     stop_lsb;
999         int     stop_msb;
1000         int     ioenable;
1001         int     ioctlmask;
1002         int     ioctlbits[3];           /* indexed by PCCARD_WIDTH_* */
1003 }               io_map_index[] = {
1004         {
1005                 PCIC_IOADDR0_START_LSB,
1006                 PCIC_IOADDR0_START_MSB,
1007                 PCIC_IOADDR0_STOP_LSB,
1008                 PCIC_IOADDR0_STOP_MSB,
1009                 PCIC_ADDRWIN_ENABLE_IO0,
1010                 PCIC_IOCTL_IO0_WAITSTATE | PCIC_IOCTL_IO0_ZEROWAIT |
1011                 PCIC_IOCTL_IO0_IOCS16SRC_MASK | PCIC_IOCTL_IO0_DATASIZE_MASK,
1012                 {
1013                         PCIC_IOCTL_IO0_IOCS16SRC_CARD,
1014                         PCIC_IOCTL_IO0_IOCS16SRC_DATASIZE |
1015                             PCIC_IOCTL_IO0_DATASIZE_8BIT,
1016                         PCIC_IOCTL_IO0_IOCS16SRC_DATASIZE |
1017                             PCIC_IOCTL_IO0_DATASIZE_16BIT,
1018                 },
1019         },
1020         {
1021                 PCIC_IOADDR1_START_LSB,
1022                 PCIC_IOADDR1_START_MSB,
1023                 PCIC_IOADDR1_STOP_LSB,
1024                 PCIC_IOADDR1_STOP_MSB,
1025                 PCIC_ADDRWIN_ENABLE_IO1,
1026                 PCIC_IOCTL_IO1_WAITSTATE | PCIC_IOCTL_IO1_ZEROWAIT |
1027                 PCIC_IOCTL_IO1_IOCS16SRC_MASK | PCIC_IOCTL_IO1_DATASIZE_MASK,
1028                 {
1029                         PCIC_IOCTL_IO1_IOCS16SRC_CARD,
1030                         PCIC_IOCTL_IO1_IOCS16SRC_DATASIZE |
1031                             PCIC_IOCTL_IO1_DATASIZE_8BIT,
1032                         PCIC_IOCTL_IO1_IOCS16SRC_DATASIZE |
1033                             PCIC_IOCTL_IO1_DATASIZE_16BIT,
1034                 },
1035         },
1036 };
1037
1038 static void 
1039 pcic_chip_do_io_map(struct pcic_handle *h, int win)
1040 {
1041         int reg;
1042
1043         DPRINTF(("pcic_chip_do_io_map win %d addr %lx size %lx width %d\n",
1044             win, (long) h->io[win].addr, (long) h->io[win].size,
1045             h->io[win].width * 8));
1046
1047         pcic_write(h, io_map_index[win].start_lsb, h->io[win].addr & 0xff);
1048         pcic_write(h, io_map_index[win].start_msb,
1049             (h->io[win].addr >> 8) & 0xff);
1050
1051         pcic_write(h, io_map_index[win].stop_lsb,
1052             (h->io[win].addr + h->io[win].size - 1) & 0xff);
1053         pcic_write(h, io_map_index[win].stop_msb,
1054             ((h->io[win].addr + h->io[win].size - 1) >> 8) & 0xff);
1055
1056         reg = pcic_read(h, PCIC_IOCTL);
1057         reg &= ~io_map_index[win].ioctlmask;
1058         reg |= io_map_index[win].ioctlbits[h->io[win].width];
1059         pcic_write(h, PCIC_IOCTL, reg);
1060
1061         reg = pcic_read(h, PCIC_ADDRWIN_ENABLE);
1062         reg |= io_map_index[win].ioenable;
1063         pcic_write(h, PCIC_ADDRWIN_ENABLE, reg);
1064 }
1065
1066 static int 
1067 pcic_chip_io_map(struct pcic_handle *h, int width, bus_addr_t offset,
1068     bus_size_t size, struct pccard_io_handle *pcihp, int *windowp)
1069 {
1070         bus_addr_t ioaddr = pcihp->addr + offset;
1071         int i, win;
1072 #ifdef PCICDEBUG
1073         static char *width_names[] = { "auto", "io8", "io16" };
1074 #endif
1075
1076         /* XXX Sanity check offset/size. */
1077
1078         win = -1;
1079         for (i = 0; i < N(io_map_index); i++) {
1080                 if ((h->ioalloc & (1 << i)) == 0) {
1081                         win = i;
1082                         h->ioalloc |= (1 << i);
1083                         break;
1084                 }
1085         }
1086
1087         if (win == -1)
1088                 return (1);
1089
1090         *windowp = win;
1091
1092         DPRINTF(("pcic_chip_io_map window %d %s port %lx+%lx\n",
1093                  win, width_names[width], (u_long) ioaddr, (u_long) size));
1094
1095         h->io[win].addr = ioaddr;
1096         h->io[win].size = size;
1097         h->io[win].width = width;
1098
1099         pcic_chip_do_io_map(h, win);
1100
1101         return (0);
1102 }
1103
1104 static void 
1105 pcic_chip_io_unmap(struct pcic_handle *h, int window)
1106 {
1107         int reg;
1108
1109         if (window >= N(io_map_index))
1110                 panic("pcic_chip_io_unmap: window out of range");
1111
1112         reg = pcic_read(h, PCIC_ADDRWIN_ENABLE);
1113         reg &= ~io_map_index[window].ioenable;
1114         pcic_write(h, PCIC_ADDRWIN_ENABLE, reg);
1115
1116         h->ioalloc &= ~(1 << window);
1117 }
1118
1119 static void
1120 pcic_wait_ready(struct pcic_handle *h)
1121 {
1122         int i;
1123
1124         for (i = 0; i < 10000; i++) {
1125                 if (pcic_read(h, PCIC_IF_STATUS) & PCIC_IF_STATUS_READY)
1126                         return;
1127                 DELAY(500);
1128 #ifdef PCICDEBUG
1129                 if (pcic_debug) {
1130                         if ((i>5000) && (i%100 == 99))
1131                                 printf(".");
1132                 }
1133 #endif
1134         }
1135
1136 #ifdef DIAGNOSTIC
1137         printf("pcic_wait_ready: ready never happened, status = %02x\n",
1138             pcic_read(h, PCIC_IF_STATUS));
1139 #endif
1140 }
1141
1142 int
1143 pcic_enable_socket(device_t dev, device_t child)
1144 {
1145         struct pcic_handle *h = pcic_get_handle(dev, child);
1146         int cardtype, reg, win;
1147
1148         /* this bit is mostly stolen from pcic_attach_card */
1149
1150         /* power down the socket to reset it, clear the card reset pin */
1151
1152         pcic_write(h, PCIC_PWRCTL, 0);
1153
1154         /* 
1155          * wait 300ms until power fails (Tpf).  Then, wait 100ms since
1156          * we are changing Vcc (Toff).
1157          */
1158         DELAY((300 + 100) * 1000);
1159
1160 #ifdef VADEM_POWER_HACK
1161         bus_space_write_1(sc->iot, sc->ioh, PCIC_REG_INDEX, 0x0e);
1162         bus_space_write_1(sc->iot, sc->ioh, PCIC_REG_INDEX, 0x37);
1163         printf("prcr = %02x\n", pcic_read(h, 0x02));
1164         printf("cvsr = %02x\n", pcic_read(h, 0x2f));
1165         printf("DANGER WILL ROBINSON!  Changing voltage select!\n");
1166         pcic_write(h, 0x2f, pcic_read(h, 0x2f) & ~0x03);
1167         printf("cvsr = %02x\n", pcic_read(h, 0x2f));
1168 #endif
1169         
1170         /* power up the socket */
1171
1172         pcic_write(h, PCIC_PWRCTL, PCIC_PWRCTL_DISABLE_RESETDRV
1173                            | PCIC_PWRCTL_PWR_ENABLE);
1174
1175         /*
1176          * wait 100ms until power raise (Tpr) and 20ms to become
1177          * stable (Tsu(Vcc)).
1178          *
1179          * some machines require some more time to be settled
1180          * (300ms is added here).
1181          */
1182         DELAY((100 + 20 + 300) * 1000);
1183
1184         pcic_write(h, PCIC_PWRCTL, PCIC_PWRCTL_DISABLE_RESETDRV | PCIC_PWRCTL_OE
1185                            | PCIC_PWRCTL_PWR_ENABLE);
1186         pcic_write(h, PCIC_INTR, 0);
1187
1188         /*
1189          * hold RESET at least 10us.
1190          */
1191         DELAY(10);
1192
1193         /* clear the reset flag */
1194
1195         pcic_write(h, PCIC_INTR, PCIC_INTR_RESET);
1196
1197         /* wait 20ms as per pc card standard (r2.01) section 4.3.6 */
1198
1199         DELAY(20000);
1200
1201         /* wait for the chip to finish initializing */
1202
1203 #ifdef DIAGNOSTIC
1204         reg = pcic_read(h, PCIC_IF_STATUS);
1205         if (!(reg & PCIC_IF_STATUS_POWERACTIVE)) {
1206                 printf("pcic_chip_socket_enable: status %x", reg);
1207         }
1208 #endif
1209
1210         pcic_wait_ready(h);
1211
1212         /* zero out the address windows */
1213         pcic_write(h, PCIC_ADDRWIN_ENABLE, 0);
1214
1215         /* set the card type */
1216         CARD_GET_TYPE(h->dev, &cardtype);
1217
1218         reg = pcic_read(h, PCIC_INTR);
1219         reg &= ~(PCIC_INTR_CARDTYPE_MASK | PCIC_INTR_IRQ_MASK | PCIC_INTR_ENABLE);
1220         reg |= ((cardtype == PCCARD_IFTYPE_IO) ?
1221                 PCIC_INTR_CARDTYPE_IO :
1222                 PCIC_INTR_CARDTYPE_MEM);
1223         reg |= h->ih_irq;
1224         pcic_write(h, PCIC_INTR, reg);
1225
1226         DEVPRINTF((h->dev, "pcic_chip_socket_enable cardtype %s %02x\n",
1227             ((cardtype == PCCARD_IFTYPE_IO) ? "io" : "mem"), reg));
1228
1229         /* reinstall all the memory and io mappings */
1230
1231         for (win = 0; win < PCIC_MEM_WINS; win++)
1232                 if (h->memalloc & (1 << win))
1233                         pcic_chip_do_mem_map(h, win);
1234
1235         for (win = 0; win < PCIC_IO_WINS; win++)
1236                 if (h->ioalloc & (1 << win))
1237                         pcic_chip_do_io_map(h, win);
1238
1239         return 0;
1240 }
1241
1242 int
1243 pcic_disable_socket(device_t dev, device_t child)
1244 {
1245         struct pcic_handle *h = pcic_get_handle(dev, child);
1246
1247         /* power down the socket */
1248
1249         pcic_write(h, PCIC_PWRCTL, 0);
1250
1251         /*
1252          * wait 300ms until power fails (Tpf).
1253          */
1254         DELAY(300 * 1000);
1255
1256         return 0;
1257 }
1258
1259 static u_int8_t
1260 st_pcic_read(struct pcic_handle *h, int idx)
1261 {
1262         if (idx != -1) {
1263                 bus_space_write_1(h->ph_bus_t, h->ph_bus_h, PCIC_REG_INDEX, 
1264                     h->sock + idx);
1265         }
1266         return bus_space_read_1(h->ph_bus_t, h->ph_bus_h, PCIC_REG_DATA);
1267 }
1268
1269 static void
1270 st_pcic_write(struct pcic_handle *h, int idx, u_int8_t data)
1271 {
1272         if (idx != -1) {
1273                 bus_space_write_1(h->ph_bus_t, h->ph_bus_h, PCIC_REG_INDEX, 
1274                     h->sock + idx);
1275         }
1276
1277         bus_space_write_1(h->ph_bus_t, h->ph_bus_h, PCIC_REG_DATA, data);
1278 }
1279
1280 int
1281 pcic_activate_resource(device_t dev, device_t child, int type, int rid,
1282     struct resource *r)
1283 {
1284         int err;
1285         int sz;
1286         int win;
1287         bus_addr_t off;
1288         struct pcic_handle *h = pcic_get_handle(dev, child);
1289
1290         sz = rman_get_size(r);
1291         switch (type) {
1292         case SYS_RES_IOPORT:
1293                 win = rid;
1294                 err = pcic_chip_io_map(h, 0, 0, sz, &h->io[rid], &win);
1295                 if (err) {
1296                         pcic_chip_io_free(h, &h->io[rid]);
1297                         return err;
1298                 }
1299                 break;
1300         case SYS_RES_MEMORY: 
1301                 err = pcic_chip_mem_map(h, 0, 0, sz, &h->mem[rid], &off, &win);
1302                 if (err) {
1303                         pcic_chip_mem_free(h, &h->mem[rid]);
1304                         return err;
1305                 }
1306                 break;
1307         default:
1308                 break;
1309         }
1310         err = bus_generic_activate_resource(device_get_parent(dev), child,
1311             type, rid, r);
1312         return (err);
1313 }
1314
1315 int
1316 pcic_deactivate_resource(device_t dev, device_t child, int type, int rid,
1317     struct resource *r)
1318 {
1319         struct pcic_handle *h = pcic_get_handle(dev, child);
1320         int err = 0;
1321
1322         switch (type) {
1323         case SYS_RES_IOPORT:
1324                 pcic_chip_io_unmap(h, rid);
1325                 break;
1326         case SYS_RES_MEMORY: 
1327                 pcic_chip_mem_unmap(h, rid);
1328         default:
1329                 break;
1330         }
1331         err = bus_generic_deactivate_resource(device_get_parent(dev), child,
1332             type, rid, r);
1333         return (err);
1334 }
1335
1336 int
1337 pcic_setup_intr(device_t dev, device_t child, struct resource *irqres,
1338     int flags, driver_intr_t intr, void *arg, void **cookiep)
1339 {
1340         struct pcic_handle *h = pcic_get_handle(dev, child);
1341         int reg;
1342         int irq;
1343         int err;
1344
1345         err = bus_generic_setup_intr(device_get_parent(dev), child, irqres,
1346             flags, intr, arg, cookiep);
1347         if (!err)
1348                 return (err);
1349
1350         irq = rman_get_start(irqres);
1351         reg = pcic_read(h, PCIC_INTR);
1352         reg &= ~(PCIC_INTR_IRQ_MASK | PCIC_INTR_ENABLE);
1353         reg |= irq;
1354         pcic_write(h, PCIC_INTR, reg);
1355
1356         h->ih_irq = irq;
1357
1358         device_printf(dev, "card irq %d\n", irq);
1359
1360         return 0;
1361 }
1362
1363 int
1364 pcic_teardown_intr(device_t dev, device_t child, struct resource *irq,
1365     void *cookiep)
1366 {
1367         int reg;
1368         struct pcic_handle *h = pcic_get_handle(dev, child);
1369
1370         h->ih_irq = 0;
1371
1372         reg = pcic_read(h, PCIC_INTR);
1373         reg &= ~(PCIC_INTR_IRQ_MASK | PCIC_INTR_ENABLE);
1374         pcic_write(h, PCIC_INTR, reg);
1375
1376         return (bus_generic_teardown_intr(device_get_parent(dev), child, irq,
1377             cookiep));
1378 }
1379
1380 struct resource *
1381 pcic_alloc_resource(device_t dev, device_t child, int type, int *rid,
1382     u_long start, u_long end, u_long count, u_int flags)
1383 {
1384         int sz;
1385         int err;
1386         struct resource *r;
1387         struct pcic_handle *h = pcic_get_handle(dev, child);
1388
1389         /* Nearly default */
1390         if (type == SYS_RES_MEMORY && start == 0 && end == ~0 && count != 1) {
1391                 start = 0xd0000;        /* XXX */
1392                 end = 0xdffff;
1393         }
1394
1395         r = bus_generic_alloc_resource(dev, child, type, rid, start, end,
1396             count, flags);
1397         if (r == NULL)
1398                 return r;
1399         sz = rman_get_size(r);
1400         switch (type) {
1401         case SYS_RES_IOPORT:
1402                 err = pcic_chip_io_alloc(h, rman_get_start(r), sz, 0,
1403                     &h->io[*rid]);
1404                 if (err) {
1405                         bus_generic_release_resource(dev, child, type, *rid, 
1406                             r);
1407                         return 0;
1408                 }
1409                 break;
1410         case SYS_RES_MEMORY: 
1411                 err = pcic_chip_mem_alloc(h, r, sz, &h->mem[*rid]);
1412                 if (err) {
1413                         bus_generic_release_resource(dev, child, type, *rid,
1414                             r);
1415                         return 0;
1416                 }
1417                 break;
1418         default:
1419                 break;
1420         }
1421         return r;
1422 }
1423
1424 int
1425 pcic_release_resource(device_t dev, device_t child, int type, int rid,
1426     struct resource *r)
1427 {
1428         struct pcic_handle *h = pcic_get_handle(dev, child);
1429
1430         switch (type) {
1431         case SYS_RES_IOPORT:
1432                 pcic_chip_io_free(h, &h->io[rid]);
1433                 break;
1434         case SYS_RES_MEMORY: 
1435                 pcic_chip_mem_free(h, &h->mem[rid]);
1436         default:
1437                 break;
1438         }
1439         return bus_generic_release_resource(dev, child, type, rid, r);
1440 }
1441
1442 int
1443 pcic_suspend(device_t dev)
1444 {
1445         /*
1446          * Do nothing for now, maybe in time do what FreeBSD's current 
1447          * pccard code does and detach my children.  That's the safest thing
1448          * to do since we don't want to wake up and have different hardware
1449          * in the slots.
1450          */
1451
1452         return 0;
1453 }
1454
1455 int
1456 pcic_resume(device_t dev)
1457 {
1458         /* Need to port pcic_power from newer netbsd versions of this file */
1459
1460         return 0;
1461 }
1462
1463 int
1464 pcic_set_res_flags(device_t dev, device_t child, int type, int rid, 
1465     u_int32_t flags)
1466 {
1467         struct pcic_handle *h = pcic_get_handle(dev, child);
1468
1469         if (type != SYS_RES_MEMORY)
1470                 return (EINVAL);
1471         h->mem[rid].kind = PCCARD_MEM_ATTR;
1472         pcic_chip_do_mem_map(h, rid);
1473
1474         return 0;
1475 }
1476
1477 int
1478 pcic_set_memory_offset(device_t dev, device_t child, int rid, u_int32_t offset,
1479     u_int32_t *deltap)
1480 {
1481         /* XXX BAD XXX */
1482         return EIO;
1483 }
1484
1485 static void
1486 pcic_start_threads(void *arg)
1487 {
1488         struct pcic_handle **walker;
1489         walker = handles;
1490         while (*walker) {
1491                 pcic_create_event_thread(*walker++);
1492         }
1493 }
1494
1495 int
1496 pcic_detach(device_t dev)
1497 {
1498         device_t *kids;
1499         int nkids;
1500         int i;
1501         int ret;
1502
1503         pcic_deactivate(dev);
1504         ret = bus_generic_detach(dev);
1505         if (ret != 0)
1506                 return (ret);
1507         /*
1508          * Normally, one wouldn't delete the children.  However, detach
1509          * merely detaches the children w/o deleting them.  So if
1510          * we were to reattach, we add additional children and wind up
1511          * with duplicates.  So, we remove them here following the
1512          * implicit "if you add it in attach, you should delete it in
1513          * detach" rule that may or may not be documented.
1514          */
1515         device_get_children(dev, &kids, &nkids);
1516         for (i = 0; i < nkids; i++) {
1517                 if ((ret = device_delete_child(dev, kids[i])) != 0)
1518                         device_printf(dev, "delete of %s failed: %d\n",
1519                                 device_get_nameunit(kids[i]), ret);
1520         }
1521         free(kids, M_TEMP);
1522         return 0;
1523 }
1524
1525 SYSINIT(pcic, SI_SUB_KTHREAD_IDLE, SI_ORDER_ANY, pcic_start_threads, 0);
1526 MODULE_VERSION(pcic, 1);