2 * Device driver optimized for the Symbios/LSI 53C896/53C895A/53C1010
3 * PCI-SCSI controllers.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
7 * This driver also supports the following Symbios/LSI PCI-SCSI chips:
8 * 53C810A, 53C825A, 53C860, 53C875, 53C876, 53C885, 53C895,
9 * 53C810, 53C815, 53C825 and the 53C1510D is 53C8XX mode.
12 * This driver for FreeBSD-CAM is derived from the Linux sym53c8xx driver.
13 * Copyright (C) 1998-1999 Gerard Roudier
15 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
16 * a port of the FreeBSD ncr driver to Linux-1.2.13.
18 * The original ncr driver has been written for 386bsd and FreeBSD by
19 * Wolfgang Stanglmeier <wolf@cologne.de>
20 * Stefan Esser <se@mi.Uni-Koeln.de>
21 * Copyright (C) 1994 Wolfgang Stanglmeier
23 * The initialisation code, and part of the code that addresses
24 * FreeBSD-CAM services is based on the aic7xxx driver for FreeBSD-CAM
25 * written by Justin T. Gibbs.
27 * Other major contributions:
29 * NVRAM detection and reading.
30 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
32 *-----------------------------------------------------------------------------
34 * Redistribution and use in source and binary forms, with or without
35 * modification, are permitted provided that the following conditions
37 * 1. Redistributions of source code must retain the above copyright
38 * notice, this list of conditions and the following disclaimer.
39 * 2. Redistributions in binary form must reproduce the above copyright
40 * notice, this list of conditions and the following disclaimer in the
41 * documentation and/or other materials provided with the distribution.
42 * 3. The name of the author may not be used to endorse or promote products
43 * derived from this software without specific prior written permission.
45 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
46 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
47 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
48 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
49 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
50 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
51 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
52 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
53 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
58 /* $FreeBSD: src/sys/dev/sym/sym_fw1.h,v 1.2.2.3 2001/11/11 17:58:53 groudier Exp $ */
59 /* $DragonFly: src/sys/dev/disk/sym/sym_fw1.h,v 1.2 2003/06/17 04:28:31 dillon Exp $ */
62 * Scripts for SYMBIOS-Processor
64 * We have to know the offsets of all labels before we reach
65 * them (for forward jumps). Therefore we declare a struct
66 * here. If you make changes inside the script,
68 * DONT FORGET TO CHANGE THE LENGTHS HERE!
72 * Script fragments which are loaded into the on-chip RAM
73 * of 825A, 875, 876, 895, 895A, 896 and 1010 chips.
74 * Must not exceed 4K bytes.
78 u32 getjob_begin [ 4];
86 #ifdef SYM_CONF_IARB_SUPPORT
100 u32 datao_phase [ 2];
103 #ifdef SYM_CONF_IARB_SUPPORT
111 u32 complete_error [ 5];
118 u32 disconnect [ 20];
119 u32 disconnect2 [ 5];
121 #ifdef SYM_CONF_IARB_SUPPORT
126 #ifdef SYM_CONF_IARB_SUPPORT
132 u32 reselected [ 19];
135 u32 reselected1 [ 25];
140 #if SYM_CONF_MAX_TASK*4 > 512
142 #elif SYM_CONF_MAX_TASK*4 > 256
153 u32 resel_no_tag [ 4];
155 u32 data_in [SYM_CONF_MAX_SG * 2];
157 u32 data_out [SYM_CONF_MAX_SG * 2];
160 u32 pm0_data_out [ 6];
161 u32 pm0_data_end [ 7];
162 u32 pm_data_end [ 4];
165 u32 pm1_data_out [ 6];
166 u32 pm1_data_end [ 9];
170 * Script fragments which stay in main memory for all chips
171 * except for chips that support 8K on-chip RAM.
175 u32 sel_for_abort [ 18];
176 u32 sel_for_abort_1 [ 2];
177 u32 msg_in_etc [ 12];
178 u32 msg_received [ 5];
179 u32 msg_weird_seen [ 5];
180 u32 msg_extended [ 17];
191 u32 nego_bad_phase [ 4];
193 u32 msg_out_done [ 4];
195 u32 data_ovrun1 [ 22];
196 u32 data_ovrun2 [ 8];
197 u32 abort_resel [ 16];
198 u32 resend_ident [ 4];
199 u32 ident_break [ 4];
200 u32 ident_break_atn [ 4];
202 u32 resel_bad_lun [ 4];
204 u32 bad_i_t_l_q [ 4];
206 u32 wsr_ma_helper [ 4];
217 /* End of data area */
223 static struct SYM_FWA_SCR SYM_FWA_SCR = {
224 /*--------------------------< START >----------------------------*/ {
227 * Will be patched with a NO_OP if LED
228 * not needed or not desired.
230 SCR_REG_REG (gpreg, SCR_AND, 0xfe),
235 SCR_FROM_REG (ctest2),
238 * Stop here if the C code wants to perform
239 * some error recovery procedure manually.
240 * (Indicate this by setting SEM in ISTAT)
242 SCR_FROM_REG (istat),
245 * Report to the C code the next position in
246 * the start queue the SCRIPTS will schedule.
247 * The C code must not change SCRATCHA.
252 SCR_INT ^ IFTRUE (MASK (SEM, SEM)),
255 * Start the next job.
257 * @DSA = start point for this job.
258 * SCRATCHA = address of this job in the start queue.
260 * We will restore startpos with SCRATCHA if we fails the
261 * arbitration or if it is the idle job.
263 * The below GETJOB_BEGIN to GETJOB_END section of SCRIPTS
264 * is a critical path. If it is partially executed, it then
265 * may happen that the job address is not yet in the DSA
266 * and the the next queue position points to the next JOB.
268 }/*-------------------------< GETJOB_BEGIN >---------------------*/,{
270 * Copy to a fixed location both the next STARTPOS
271 * and the current JOB address, using self modifying
278 }/*-------------------------< _SMS_A10 >-------------------------*/,{
282 * Move the start address to TEMP using self-
283 * modifying SCRIPTS and jump indirectly to
289 }/*-------------------------< GETJOB_END >-----------------------*/,{
294 }/*-------------------------< _SMS_A20 >-------------------------*/,{
299 }/*-------------------------< SELECT >---------------------------*/,{
301 * DSA contains the address of a scheduled
304 * SCRATCHA contains the address of the start queue
305 * entry which points to the next job.
307 * Set Initiator mode.
309 * (Target mode is left as an exercise for the reader)
314 * And try to select this target.
316 SCR_SEL_TBL_ATN ^ offsetof (struct sym_dsb, select),
319 * Now there are 4 possibilities:
321 * (1) The chip looses arbitration.
322 * This is ok, because it will try again,
323 * when the bus becomes idle.
324 * (But beware of the timeout function!)
326 * (2) The chip is reselected.
327 * Then the script processor takes the jump
328 * to the RESELECT label.
330 * (3) The chip wins arbitration.
331 * Then it will execute SCRIPTS instruction until
332 * the next instruction that checks SCSI phase.
333 * Then will stop and wait for selection to be
334 * complete or selection time-out to occur.
336 * After having won arbitration, the SCRIPTS
337 * processor is able to execute instructions while
338 * the SCSI core is performing SCSI selection.
342 * Copy the CCB header to a fixed location
343 * in the HCB using self-modifying SCRIPTS.
348 SCR_COPY (sizeof(struct sym_ccbh)),
349 }/*-------------------------< _SMS_A30 >-------------------------*/,{
353 * Load the savep (saved data pointer) into
354 * the actual data pointer.
357 HADDR_1 (ccb_head.savep),
360 * Initialize the status register
363 HADDR_1 (ccb_head.status),
365 }/*-------------------------< WF_SEL_DONE >----------------------*/,{
366 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)),
367 SIR_SEL_ATN_NO_MSG_OUT,
368 }/*-------------------------< SEND_IDENT >-----------------------*/,{
370 * Selection complete.
371 * Send the IDENTIFY and possibly the TAG message
372 * and negotiation message if present.
374 SCR_MOVE_TBL ^ SCR_MSG_OUT,
375 offsetof (struct sym_dsb, smsg),
376 }/*-------------------------< SELECT2 >--------------------------*/,{
377 #ifdef SYM_CONF_IARB_SUPPORT
379 * Set IMMEDIATE ARBITRATION if we have been given
380 * a hint to do so. (Some job to do after this one).
382 SCR_FROM_REG (HF_REG),
384 SCR_JUMPR ^ IFFALSE (MASK (HF_HINT_IARB, HF_HINT_IARB)),
386 SCR_REG_REG (scntl1, SCR_OR, IARB),
390 * Anticipate the COMMAND phase.
391 * This is the PHASE we expect at this point.
393 SCR_JUMP ^ IFFALSE (WHEN (SCR_COMMAND)),
394 PADDR_A (sel_no_cmd),
395 }/*-------------------------< COMMAND >--------------------------*/,{
397 * ... and send the command
399 SCR_MOVE_TBL ^ SCR_COMMAND,
400 offsetof (struct sym_dsb, cmd),
401 }/*-------------------------< DISPATCH >-------------------------*/,{
403 * MSG_IN is the only phase that shall be
404 * entered at least once for each (re)selection.
405 * So we test it first.
407 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
409 SCR_JUMP ^ IFTRUE (IF (SCR_DATA_OUT)),
410 PADDR_A (datao_phase),
411 SCR_JUMP ^ IFTRUE (IF (SCR_DATA_IN)),
412 PADDR_A (datai_phase),
413 SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)),
415 SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)),
417 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)),
420 * Discard as many illegal phases as
421 * required and tell the C code about.
423 SCR_JUMPR ^ IFFALSE (WHEN (SCR_ILG_OUT)),
425 SCR_MOVE_ABS (1) ^ SCR_ILG_OUT,
427 SCR_JUMPR ^ IFTRUE (WHEN (SCR_ILG_OUT)),
429 SCR_JUMPR ^ IFFALSE (WHEN (SCR_ILG_IN)),
431 SCR_MOVE_ABS (1) ^ SCR_ILG_IN,
433 SCR_JUMPR ^ IFTRUE (WHEN (SCR_ILG_IN)),
439 }/*-------------------------< SEL_NO_CMD >-----------------------*/,{
441 * The target does not switch to command
442 * phase after IDENTIFY has been sent.
444 * If it stays in MSG OUT phase send it
445 * the IDENTIFY again.
447 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
448 PADDR_B (resend_ident),
450 * If target does not switch to MSG IN phase
451 * and we sent a negotiation, assert the
452 * failure immediately.
454 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
456 SCR_FROM_REG (HS_REG),
458 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
461 * Jump to dispatcher.
465 }/*-------------------------< INIT >-----------------------------*/,{
467 * Wait for the SCSI RESET signal to be
468 * inactive before restarting operations,
469 * since the chip may hang on SEL_ATN
470 * if SCSI RESET is active.
472 SCR_FROM_REG (sstat0),
474 SCR_JUMPR ^ IFTRUE (MASK (IRST, IRST)),
478 }/*-------------------------< CLRACK >---------------------------*/,{
480 * Terminate possible pending message phase.
486 }/*-------------------------< DISP_STATUS >----------------------*/,{
488 * Anticipate STATUS phase.
490 * Does spare 3 SCRIPTS instructions when we have
491 * completed the INPUT of the data.
493 SCR_JUMP ^ IFTRUE (WHEN (SCR_STATUS)),
497 }/*-------------------------< DATAI_DONE >-----------------------*/,{
499 * If the device still wants to send us data,
500 * we must count the extra bytes.
502 SCR_JUMP ^ IFTRUE (WHEN (SCR_DATA_IN)),
503 PADDR_B (data_ovrun),
505 * If the SWIDE is not full, jump to dispatcher.
506 * We anticipate a STATUS phase.
508 SCR_FROM_REG (scntl2),
510 SCR_JUMP ^ IFFALSE (MASK (WSR, WSR)),
511 PADDR_A (disp_status),
514 * Clear this condition.
516 SCR_REG_REG (scntl2, SCR_OR, WSR),
519 * We are expecting an IGNORE RESIDUE message
520 * from the device, otherwise we are in data
521 * overrun condition. Check against MSG_IN phase.
523 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)),
525 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
526 PADDR_A (disp_status),
528 * We are in MSG_IN phase,
529 * Read the first byte of the message.
530 * If it is not an IGNORE RESIDUE message,
531 * signal overrun and jump to message
534 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
536 SCR_INT ^ IFFALSE (DATA (M_IGN_RESIDUE)),
538 SCR_JUMP ^ IFFALSE (DATA (M_IGN_RESIDUE)),
541 * We got the message we expected.
542 * Read the 2nd byte, and jump to dispatcher.
546 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
551 PADDR_A (disp_status),
552 }/*-------------------------< DATAO_DONE >-----------------------*/,{
554 * If the device wants us to send more data,
555 * we must count the extra bytes.
557 SCR_JUMP ^ IFTRUE (WHEN (SCR_DATA_OUT)),
558 PADDR_B (data_ovrun),
560 * If the SODL is not full jump to dispatcher.
561 * We anticipate a STATUS phase.
563 SCR_FROM_REG (scntl2),
565 SCR_JUMP ^ IFFALSE (MASK (WSS, WSS)),
566 PADDR_A (disp_status),
568 * The SODL is full, clear this condition.
570 SCR_REG_REG (scntl2, SCR_OR, WSS),
573 * And signal a DATA UNDERRUN condition
580 }/*-------------------------< DATAI_PHASE >----------------------*/,{
583 }/*-------------------------< DATAO_PHASE >----------------------*/,{
586 }/*-------------------------< MSG_IN >---------------------------*/,{
588 * Get the first byte of the message.
590 * The script processor doesn't negate the
591 * ACK signal after this transfer.
593 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
595 }/*-------------------------< MSG_IN2 >--------------------------*/,{
597 * Check first against 1 byte messages
598 * that we handle from SCRIPTS.
600 SCR_JUMP ^ IFTRUE (DATA (M_COMPLETE)),
602 SCR_JUMP ^ IFTRUE (DATA (M_DISCONNECT)),
603 PADDR_A (disconnect),
604 SCR_JUMP ^ IFTRUE (DATA (M_SAVE_DP)),
606 SCR_JUMP ^ IFTRUE (DATA (M_RESTORE_DP)),
607 PADDR_A (restore_dp),
609 * We handle all other messages from the
610 * C code, so no need to waste on-chip RAM
614 PADDR_B (msg_in_etc),
615 }/*-------------------------< STATUS >---------------------------*/,{
619 SCR_MOVE_ABS (1) ^ SCR_STATUS,
621 #ifdef SYM_CONF_IARB_SUPPORT
623 * If STATUS is not GOOD, clear IMMEDIATE ARBITRATION,
624 * since we may have to tamper the start queue from
627 SCR_JUMPR ^ IFTRUE (DATA (S_GOOD)),
629 SCR_REG_REG (scntl1, SCR_AND, ~IARB),
633 * save status to scsi_status.
638 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
641 * Anticipate the MESSAGE PHASE for
642 * the TASK COMPLETE message.
644 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
648 }/*-------------------------< COMPLETE >-------------------------*/,{
652 * Copy the data pointer to LASTP.
656 HADDR_1 (ccb_head.lastp),
658 * When we terminate the cycle by clearing ACK,
659 * the target may disconnect immediately.
661 * We don't want to be told of an "unexpected disconnect",
662 * so we disable this feature.
664 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
667 * Terminate cycle ...
669 SCR_CLR (SCR_ACK|SCR_ATN),
672 * ... and wait for the disconnect.
676 }/*-------------------------< COMPLETE2 >------------------------*/,{
682 HADDR_1 (ccb_head.status),
684 * Move back the CCB header using self-modifying
690 SCR_COPY (sizeof(struct sym_ccbh)),
692 }/*-------------------------< _SMS_A40 >-------------------------*/,{
695 * Some bridges may reorder DMA writes to memory.
696 * We donnot want the CPU to deal with completions
697 * without all the posted write having been flushed
698 * to memory. This DUMMY READ should flush posted
699 * buffers prior to the CPU having to deal with
702 SCR_COPY (4), /* DUMMY READ */
703 HADDR_1 (ccb_head.status),
706 * If command resulted in not GOOD status,
707 * call the C code if needed.
709 SCR_FROM_REG (SS_REG),
711 SCR_CALL ^ IFFALSE (DATA (S_GOOD)),
712 PADDR_B (bad_status),
714 * If we performed an auto-sense, call
715 * the C code to synchronyze task aborts
716 * with UNIT ATTENTION conditions.
718 SCR_FROM_REG (HF_REG),
720 SCR_JUMP ^ IFTRUE (MASK (0 ,(HF_SENSE|HF_EXT_ERR))),
722 }/*-------------------------< COMPLETE_ERROR >-------------------*/,{
728 }/*-------------------------< DONE >-----------------------------*/,{
730 * Copy the DSA to the DONE QUEUE and
731 * signal completion to the host.
732 * If we are interrupted between DONE
733 * and DONE_END, we must reset, otherwise
734 * the completed CCB may be lost.
741 }/*-------------------------< _SMS_A50 >-------------------------*/,{
747 * The instruction below reads the DONE QUEUE next
748 * free position from memory.
749 * In addition it ensures that all PCI posted writes
750 * are flushed and so the DSA value of the done
751 * CCB is visible by the CPU before INTFLY is raised.
754 }/*-------------------------< _SMS_A60 >-------------------------*/,{
757 }/*-------------------------< DONE_END >-------------------------*/,{
762 }/*-------------------------< SAVE_DP >--------------------------*/,{
764 * Clear ACK immediately.
765 * No need to delay it.
770 * Keep track we received a SAVE DP, so
771 * we will switch to the other PM context
772 * on the next PM since the DP may point
773 * to the current PM context.
775 SCR_REG_REG (HF_REG, SCR_OR, HF_DP_SAVED),
779 * Copy the data pointer to SAVEP.
783 HADDR_1 (ccb_head.savep),
786 }/*-------------------------< RESTORE_DP >-----------------------*/,{
788 * RESTORE_DP message:
789 * Copy SAVEP to actual data pointer.
792 HADDR_1 (ccb_head.savep),
796 }/*-------------------------< DISCONNECT >-----------------------*/,{
800 * disable the "unexpected disconnect" feature,
801 * and remove the ACK signal.
803 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
805 SCR_CLR (SCR_ACK|SCR_ATN),
808 * Wait for the disconnect.
813 * Status is: DISCONNECTED.
815 SCR_LOAD_REG (HS_REG, HS_DISCONNECT),
822 HADDR_1 (ccb_head.status),
824 * If QUIRK_AUTOSAVE is set,
825 * do an "save pointer" operation.
827 SCR_FROM_REG (QU_REG),
829 SCR_JUMP ^ IFFALSE (MASK (SYM_QUIRK_AUTOSAVE, SYM_QUIRK_AUTOSAVE)),
830 PADDR_A (disconnect2),
832 * like SAVE_DP message:
833 * Remember we saved the data pointer.
834 * Copy data pointer to SAVEP.
836 SCR_REG_REG (HF_REG, SCR_OR, HF_DP_SAVED),
840 HADDR_1 (ccb_head.savep),
841 }/*-------------------------< DISCONNECT2 >----------------------*/,{
843 * Move back the CCB header using self-modifying
849 SCR_COPY (sizeof(struct sym_ccbh)),
851 }/*-------------------------< _SMS_A65 >-------------------------*/,{
855 }/*-------------------------< IDLE >-----------------------------*/,{
858 * Switch the LED off and wait for reselect.
859 * Will be patched with a NO_OP if LED
860 * not needed or not desired.
862 SCR_REG_REG (gpreg, SCR_OR, 0x01),
864 #ifdef SYM_CONF_IARB_SUPPORT
868 }/*-------------------------< UNGETJOB >-------------------------*/,{
869 #ifdef SYM_CONF_IARB_SUPPORT
871 * Set IMMEDIATE ARBITRATION, for the next time.
872 * This will give us better chance to win arbitration
873 * for the job we just wanted to do.
875 SCR_REG_REG (scntl1, SCR_OR, IARB),
879 * We are not able to restart the SCRIPTS if we are
880 * interrupted and these instruction haven't been
881 * all executed. BTW, this is very unlikely to
882 * happen, but we check that from the C code.
884 SCR_LOAD_REG (dsa, 0xff),
889 }/*-------------------------< RESELECT >-------------------------*/,{
891 * Make sure we are in initiator mode.
896 * Sleep waiting for a reselection.
900 }/*-------------------------< RESELECTED >-----------------------*/,{
903 * Will be patched with a NO_OP if LED
904 * not needed or not desired.
906 SCR_REG_REG (gpreg, SCR_AND, 0xfe),
909 * load the target id into the sdid
911 SCR_REG_SFBR (ssid, SCR_AND, 0x8F),
916 * Load the target control block address
921 SCR_SFBR_REG (dsa, SCR_SHL, 0),
923 SCR_REG_REG (dsa, SCR_SHL, 0),
925 SCR_REG_REG (dsa, SCR_AND, 0x3c),
931 }/*-------------------------< _SMS_A70 >-------------------------*/,{
935 * Copy the TCB header to a fixed place in
941 SCR_COPY (sizeof(struct sym_tcbh)),
942 }/*-------------------------< _SMS_A80 >-------------------------*/,{
946 * We expect MESSAGE IN phase.
947 * If not, get help from the C code.
949 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)),
951 }/*-------------------------< RESELECTED1 >----------------------*/,{
953 * Load the synchronous transfer registers.
956 HADDR_1 (tcb_head.wval),
959 HADDR_1 (tcb_head.sval),
962 * Get the IDENTIFY message.
964 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
967 * If IDENTIFY LUN #0, use a faster path
968 * to find the LCB structure.
970 SCR_JUMP ^ IFTRUE (MASK (0x80, 0xbf)),
971 PADDR_A (resel_lun0),
973 * If message isn't an IDENTIFY,
974 * tell the C code about.
976 SCR_INT ^ IFFALSE (MASK (0x80, 0x80)),
977 SIR_RESEL_NO_IDENTIFY,
979 * It is an IDENTIFY message,
980 * Load the LUN control block address.
983 HADDR_1 (tcb_head.luntbl_sa),
985 SCR_SFBR_REG (dsa, SCR_SHL, 0),
987 SCR_REG_REG (dsa, SCR_SHL, 0),
989 SCR_REG_REG (dsa, SCR_AND, 0xfc),
995 }/*-------------------------< _SMS_A90 >-------------------------*/,{
1000 }/*-------------------------< RESEL_LUN0 >-----------------------*/,{
1002 * LUN 0 special case (but usual one :))
1005 HADDR_1 (tcb_head.lun0_sa),
1008 * Jump indirectly to the reselect action for this LUN.
1009 * (lcb.head.resel_sa assumed at offset zero of lcb).
1013 PADDR_A (_sms_a100),
1015 }/*-------------------------< _SMS_A100 >------------------------*/,{
1020 /* In normal situations, we jump to RESEL_TAG or RESEL_NO_TAG */
1021 }/*-------------------------< RESEL_TAG >------------------------*/,{
1023 * ACK the IDENTIFY previously received.
1028 * It shall be a tagged command.
1030 * The C code will deal with errors.
1031 * Agressive optimization, is'nt it? :)
1033 SCR_MOVE_ABS (2) ^ SCR_MSG_IN,
1036 * Copy the LCB header to a fixed place in
1037 * the HCB using self-modifying SCRIPTS.
1041 PADDR_A (_sms_a110),
1042 SCR_COPY (sizeof(struct sym_lcbh)),
1043 }/*-------------------------< _SMS_A110 >------------------------*/,{
1047 * Load the pointer to the tagged task
1048 * table for this LUN.
1051 HADDR_1 (lcb_head.itlq_tbl_sa),
1054 * The SIDL still contains the TAG value.
1055 * Agressive optimization, isn't it? :):)
1057 SCR_REG_SFBR (sidl, SCR_SHL, 0),
1059 #if SYM_CONF_MAX_TASK*4 > 512
1060 SCR_JUMPR ^ IFFALSE (CARRYSET),
1062 SCR_REG_REG (dsa1, SCR_OR, 2),
1064 SCR_REG_REG (sfbr, SCR_SHL, 0),
1066 SCR_JUMPR ^ IFFALSE (CARRYSET),
1068 SCR_REG_REG (dsa1, SCR_OR, 1),
1070 #elif SYM_CONF_MAX_TASK*4 > 256
1071 SCR_JUMPR ^ IFFALSE (CARRYSET),
1073 SCR_REG_REG (dsa1, SCR_OR, 1),
1077 * Retrieve the DSA of this task.
1078 * JUMP indirectly to the restart point of the CCB.
1080 SCR_SFBR_REG (dsa, SCR_AND, 0xfc),
1084 PADDR_A (_sms_a120),
1086 }/*-------------------------< _SMS_A120 >------------------------*/,{
1089 }/*-------------------------< RESEL_GO >-------------------------*/,{
1092 PADDR_A (_sms_a130),
1094 * Move 'ccb.phys.head.go' action to
1095 * scratch/scratch1. So scratch1 will
1096 * contain the 'restart' field of the
1100 }/*-------------------------< _SMS_A130 >------------------------*/,{
1104 PADDR_B (scratch1), /* phys.head.go.restart */
1108 /* In normal situations we branch to RESEL_DSA */
1109 }/*-------------------------< RESEL_DSA >------------------------*/,{
1111 * ACK the IDENTIFY or TAG previously received.
1115 }/*-------------------------< RESEL_DSA1 >-----------------------*/,{
1117 * Copy the CCB header to a fixed location
1118 * in the HCB using self-modifying SCRIPTS.
1122 PADDR_A (_sms_a140),
1123 SCR_COPY (sizeof(struct sym_ccbh)),
1124 }/*-------------------------< _SMS_A140 >------------------------*/,{
1128 * Load the savep (saved data pointer) into
1129 * the actual data pointer.
1132 HADDR_1 (ccb_head.savep),
1135 * Initialize the status register
1138 HADDR_1 (ccb_head.status),
1141 * Jump to dispatcher.
1145 }/*-------------------------< RESEL_NO_TAG >---------------------*/,{
1147 * Copy the LCB header to a fixed place in
1148 * the HCB using self-modifying SCRIPTS.
1152 PADDR_A (_sms_a145),
1153 SCR_COPY (sizeof(struct sym_lcbh)),
1154 }/*-------------------------< _SMS_A145 >------------------------*/,{
1158 * Load the DSA with the unique ITL task.
1161 HADDR_1 (lcb_head.itl_task_sa),
1165 }/*-------------------------< DATA_IN >--------------------------*/,{
1167 * Because the size depends on the
1168 * #define SYM_CONF_MAX_SG parameter,
1169 * it is filled in at runtime.
1171 * ##===========< i=0; i<SYM_CONF_MAX_SG >=========
1172 * || SCR_CHMOV_TBL ^ SCR_DATA_IN,
1173 * || offsetof (struct sym_dsb, data[ i]),
1174 * ##==========================================
1177 }/*-------------------------< DATA_IN2 >-------------------------*/,{
1179 PADDR_A (datai_done),
1181 PADDR_B (data_ovrun),
1182 }/*-------------------------< DATA_OUT >-------------------------*/,{
1184 * Because the size depends on the
1185 * #define SYM_CONF_MAX_SG parameter,
1186 * it is filled in at runtime.
1188 * ##===========< i=0; i<SYM_CONF_MAX_SG >=========
1189 * || SCR_CHMOV_TBL ^ SCR_DATA_OUT,
1190 * || offsetof (struct sym_dsb, data[ i]),
1191 * ##==========================================
1194 }/*-------------------------< DATA_OUT2 >------------------------*/,{
1196 PADDR_A (datao_done),
1198 PADDR_B (data_ovrun),
1199 }/*-------------------------< PM0_DATA >-------------------------*/,{
1201 * Read our host flags to SFBR, so we will be able
1202 * to check against the data direction we expect.
1204 SCR_FROM_REG (HF_REG),
1207 * Check against actual DATA PHASE.
1209 SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
1210 PADDR_A (pm0_data_out),
1212 * Actual phase is DATA IN.
1213 * Check against expected direction.
1215 SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
1216 PADDR_B (data_ovrun),
1218 * Keep track we are moving data from the
1219 * PM0 DATA mini-script.
1221 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM0),
1224 * Move the data to memory.
1226 SCR_CHMOV_TBL ^ SCR_DATA_IN,
1227 offsetof (struct sym_ccb, phys.pm0.sg),
1229 PADDR_A (pm0_data_end),
1230 }/*-------------------------< PM0_DATA_OUT >---------------------*/,{
1232 * Actual phase is DATA OUT.
1233 * Check against expected direction.
1235 SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
1236 PADDR_B (data_ovrun),
1238 * Keep track we are moving data from the
1239 * PM0 DATA mini-script.
1241 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM0),
1244 * Move the data from memory.
1246 SCR_CHMOV_TBL ^ SCR_DATA_OUT,
1247 offsetof (struct sym_ccb, phys.pm0.sg),
1248 }/*-------------------------< PM0_DATA_END >---------------------*/,{
1250 * Clear the flag that told we were moving
1251 * data from the PM0 DATA mini-script.
1253 SCR_REG_REG (HF_REG, SCR_AND, (~HF_IN_PM0)),
1256 * Return to the previous DATA script which
1257 * is guaranteed by design (if no bug) to be
1258 * the main DATA script for this transfer.
1263 SCR_REG_REG (scratcha, SCR_ADD, offsetof (struct sym_ccb,phys.pm0.ret)),
1265 }/*-------------------------< PM_DATA_END >----------------------*/,{
1268 PADDR_A (_sms_a150),
1270 }/*-------------------------< _SMS_A150 >------------------------*/,{
1275 }/*-------------------------< PM1_DATA >-------------------------*/,{
1277 * Read our host flags to SFBR, so we will be able
1278 * to check against the data direction we expect.
1280 SCR_FROM_REG (HF_REG),
1283 * Check against actual DATA PHASE.
1285 SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
1286 PADDR_A (pm1_data_out),
1288 * Actual phase is DATA IN.
1289 * Check against expected direction.
1291 SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
1292 PADDR_B (data_ovrun),
1294 * Keep track we are moving data from the
1295 * PM1 DATA mini-script.
1297 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM1),
1300 * Move the data to memory.
1302 SCR_CHMOV_TBL ^ SCR_DATA_IN,
1303 offsetof (struct sym_ccb, phys.pm1.sg),
1305 PADDR_A (pm1_data_end),
1306 }/*-------------------------< PM1_DATA_OUT >---------------------*/,{
1308 * Actual phase is DATA OUT.
1309 * Check against expected direction.
1311 SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
1312 PADDR_B (data_ovrun),
1314 * Keep track we are moving data from the
1315 * PM1 DATA mini-script.
1317 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM1),
1320 * Move the data from memory.
1322 SCR_CHMOV_TBL ^ SCR_DATA_OUT,
1323 offsetof (struct sym_ccb, phys.pm1.sg),
1324 }/*-------------------------< PM1_DATA_END >---------------------*/,{
1326 * Clear the flag that told we were moving
1327 * data from the PM1 DATA mini-script.
1329 SCR_REG_REG (HF_REG, SCR_AND, (~HF_IN_PM1)),
1332 * Return to the previous DATA script which
1333 * is guaranteed by design (if no bug) to be
1334 * the main DATA script for this transfer.
1339 SCR_REG_REG (scratcha, SCR_ADD, offsetof (struct sym_ccb,phys.pm1.ret)),
1342 PADDR_A (pm_data_end),
1343 }/*--------------------------<>----------------------------------*/
1346 static struct SYM_FWB_SCR SYM_FWB_SCR = {
1347 /*-------------------------< NO_DATA >--------------------------*/ {
1349 PADDR_B (data_ovrun),
1350 }/*-------------------------< SEL_FOR_ABORT >--------------------*/,{
1352 * We are jumped here by the C code, if we have
1353 * some target to reset or some disconnected
1354 * job to abort. Since error recovery is a serious
1355 * busyness, we will really reset the SCSI BUS, if
1356 * case of a SCSI interrupt occuring in this path.
1360 * Set initiator mode.
1365 * And try to select this target.
1367 SCR_SEL_TBL_ATN ^ offsetof (struct sym_hcb, abrt_sel),
1370 * Wait for the selection to complete or
1371 * the selection to time out.
1373 SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_OUT)),
1379 SIR_TARGET_SELECTED,
1381 * The C code should let us continue here.
1382 * Send the 'kiss of death' message.
1383 * We expect an immediate disconnect once
1384 * the target has eaten the message.
1386 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
1388 SCR_MOVE_TBL ^ SCR_MSG_OUT,
1389 offsetof (struct sym_hcb, abrt_tbl),
1390 SCR_CLR (SCR_ACK|SCR_ATN),
1395 * Tell the C code that we are done.
1399 }/*-------------------------< SEL_FOR_ABORT_1 >------------------*/,{
1401 * Jump at scheduler.
1405 }/*-------------------------< MSG_IN_ETC >-----------------------*/,{
1407 * If it is an EXTENDED (variable size message)
1410 SCR_JUMP ^ IFTRUE (DATA (M_EXTENDED)),
1411 PADDR_B (msg_extended),
1413 * Let the C code handle any other
1416 SCR_JUMP ^ IFTRUE (MASK (0x00, 0xf0)),
1417 PADDR_B (msg_received),
1418 SCR_JUMP ^ IFTRUE (MASK (0x10, 0xf0)),
1419 PADDR_B (msg_received),
1421 * We donnot handle 2 bytes messages from SCRIPTS.
1422 * So, let the C code deal with these ones too.
1424 SCR_JUMP ^ IFFALSE (MASK (0x20, 0xf0)),
1425 PADDR_B (msg_weird_seen),
1428 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
1430 }/*-------------------------< MSG_RECEIVED >---------------------*/,{
1431 SCR_COPY (4), /* DUMMY READ */
1436 }/*-------------------------< MSG_WEIRD_SEEN >-------------------*/,{
1437 SCR_COPY (4), /* DUMMY READ */
1442 }/*-------------------------< MSG_EXTENDED >---------------------*/,{
1444 * Clear ACK and get the next byte
1445 * assumed to be the message length.
1449 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
1452 * Try to catch some unlikely situations as 0 length
1453 * or too large the length.
1455 SCR_JUMP ^ IFTRUE (DATA (0)),
1456 PADDR_B (msg_weird_seen),
1457 SCR_TO_REG (scratcha),
1459 SCR_REG_REG (sfbr, SCR_ADD, (256-8)),
1461 SCR_JUMP ^ IFTRUE (CARRYSET),
1462 PADDR_B (msg_weird_seen),
1464 * We donnot handle extended messages from SCRIPTS.
1465 * Read the amount of data correponding to the
1466 * message length and call the C code.
1473 }/*-------------------------< _SMS_B10 >-------------------------*/,{
1474 SCR_MOVE_ABS (0) ^ SCR_MSG_IN,
1477 PADDR_B (msg_received),
1478 }/*-------------------------< MSG_BAD >--------------------------*/,{
1480 * unimplemented message - reject it.
1488 }/*-------------------------< MSG_WEIRD >------------------------*/,{
1490 * weird message received
1491 * ignore all MSG IN phases and reject it.
1497 }/*-------------------------< MSG_WEIRD1 >-----------------------*/,{
1500 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
1502 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
1505 PADDR_B (msg_weird1),
1506 }/*-------------------------< WDTR_RESP >------------------------*/,{
1508 * let the target fetch our answer.
1514 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
1515 PADDR_B (nego_bad_phase),
1516 }/*-------------------------< SEND_WDTR >------------------------*/,{
1518 * Send the M_X_WIDE_REQ
1520 SCR_MOVE_ABS (4) ^ SCR_MSG_OUT,
1523 PADDR_B (msg_out_done),
1524 }/*-------------------------< SDTR_RESP >------------------------*/,{
1526 * let the target fetch our answer.
1532 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
1533 PADDR_B (nego_bad_phase),
1534 }/*-------------------------< SEND_SDTR >------------------------*/,{
1536 * Send the M_X_SYNC_REQ
1538 SCR_MOVE_ABS (5) ^ SCR_MSG_OUT,
1541 PADDR_B (msg_out_done),
1542 }/*-------------------------< PPR_RESP >-------------------------*/,{
1544 * let the target fetch our answer.
1550 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
1551 PADDR_B (nego_bad_phase),
1552 }/*-------------------------< SEND_PPR >-------------------------*/,{
1554 * Send the M_X_PPR_REQ
1556 SCR_MOVE_ABS (8) ^ SCR_MSG_OUT,
1559 PADDR_B (msg_out_done),
1560 }/*-------------------------< NEGO_BAD_PHASE >-------------------*/,{
1565 }/*-------------------------< MSG_OUT >--------------------------*/,{
1567 * The target requests a message.
1568 * We donnot send messages that may
1569 * require the device to go to bus free.
1571 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
1574 * ... wait for the next phase
1575 * if it's a message out, send it again, ...
1577 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
1579 }/*-------------------------< MSG_OUT_DONE >---------------------*/,{
1581 * Let the C code be aware of the
1582 * sent message and clear the message.
1587 * ... and process the next phase
1591 }/*-------------------------< DATA_OVRUN >-----------------------*/,{
1593 * Zero scratcha that will count the
1599 }/*-------------------------< DATA_OVRUN1 >----------------------*/,{
1601 * The target may want to transfer too much data.
1603 * If phase is DATA OUT write 1 byte and count it.
1605 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)),
1607 SCR_CHMOV_ABS (1) ^ SCR_DATA_OUT,
1610 PADDR_B (data_ovrun2),
1612 * If WSR is set, clear this condition, and
1615 SCR_FROM_REG (scntl2),
1617 SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
1619 SCR_REG_REG (scntl2, SCR_OR, WSR),
1622 PADDR_B (data_ovrun2),
1624 * Finally check against DATA IN phase.
1625 * Signal data overrun to the C code
1626 * and jump to dispatcher if not so.
1627 * Read 1 byte otherwise and count it.
1629 SCR_JUMPR ^ IFTRUE (WHEN (SCR_DATA_IN)),
1635 SCR_CHMOV_ABS (1) ^ SCR_DATA_IN,
1637 }/*-------------------------< DATA_OVRUN2 >----------------------*/,{
1640 * This will allow to return a negative
1643 SCR_REG_REG (scratcha, SCR_ADD, 0x01),
1645 SCR_REG_REG (scratcha1, SCR_ADDC, 0),
1647 SCR_REG_REG (scratcha2, SCR_ADDC, 0),
1650 * .. and repeat as required.
1653 PADDR_B (data_ovrun1),
1654 }/*-------------------------< ABORT_RESEL >----------------------*/,{
1660 * send the abort/abortag/reset message
1661 * we expect an immediate disconnect
1663 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
1665 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
1667 SCR_CLR (SCR_ACK|SCR_ATN),
1675 }/*-------------------------< RESEND_IDENT >---------------------*/,{
1677 * The target stays in MSG OUT phase after having acked
1678 * Identify [+ Tag [+ Extended message ]]. Targets shall
1679 * behave this way on parity error.
1680 * We must send it again all the messages.
1682 SCR_SET (SCR_ATN), /* Shall be asserted 2 deskew delays before the */
1683 0, /* 1rst ACK = 90 ns. Hope the chip isn't too fast */
1685 PADDR_A (send_ident),
1686 }/*-------------------------< IDENT_BREAK >----------------------*/,{
1691 }/*-------------------------< IDENT_BREAK_ATN >------------------*/,{
1696 }/*-------------------------< SDATA_IN >-------------------------*/,{
1697 SCR_CHMOV_TBL ^ SCR_DATA_IN,
1698 offsetof (struct sym_dsb, sense),
1700 PADDR_A (datai_done),
1702 PADDR_B (data_ovrun),
1703 }/*-------------------------< RESEL_BAD_LUN >--------------------*/,{
1705 * Message is an IDENTIFY, but lun is unknown.
1706 * Signal problem to C code for logging the event.
1707 * Send a M_ABORT to clear all pending tasks.
1712 PADDR_B (abort_resel),
1713 }/*-------------------------< BAD_I_T_L >------------------------*/,{
1715 * We donnot have a task for that I_T_L.
1716 * Signal problem to C code for logging the event.
1717 * Send a M_ABORT message.
1720 SIR_RESEL_BAD_I_T_L,
1722 PADDR_B (abort_resel),
1723 }/*-------------------------< BAD_I_T_L_Q >----------------------*/,{
1725 * We donnot have a task that matches the tag.
1726 * Signal problem to C code for logging the event.
1727 * Send a M_ABORTTAG message.
1730 SIR_RESEL_BAD_I_T_L_Q,
1732 PADDR_B (abort_resel),
1733 }/*-------------------------< BAD_STATUS >-----------------------*/,{
1735 * Anything different from INTERMEDIATE
1736 * CONDITION MET should be a bad SCSI status,
1737 * given that GOOD status has already been tested.
1743 SCR_INT ^ IFFALSE (DATA (S_COND_MET)),
1744 SIR_BAD_SCSI_STATUS,
1747 }/*-------------------------< WSR_MA_HELPER >--------------------*/,{
1749 * Helper for the C code when WSR bit is set.
1750 * Perform the move of the residual byte.
1752 SCR_CHMOV_TBL ^ SCR_DATA_IN,
1753 offsetof (struct sym_ccb, phys.wresid),
1756 }/*-------------------------< ZERO >-----------------------------*/,{
1758 }/*-------------------------< SCRATCH >--------------------------*/,{
1759 SCR_DATA_ZERO, /* MUST BE BEFORE SCRATCH1 */
1760 }/*-------------------------< SCRATCH1 >-------------------------*/,{
1762 }/*-------------------------< PREV_DONE >------------------------*/,{
1763 SCR_DATA_ZERO, /* MUST BE BEFORE DONE_POS ! */
1764 }/*-------------------------< DONE_POS >-------------------------*/,{
1766 }/*-------------------------< NEXTJOB >--------------------------*/,{
1767 SCR_DATA_ZERO, /* MUST BE BEFORE STARTPOS ! */
1768 }/*-------------------------< STARTPOS >-------------------------*/,{
1770 }/*-------------------------< TARGTBL >--------------------------*/,{
1773 }/*-------------------------< SNOOPTEST >------------------------*/,{
1775 * Read the variable.
1781 * Write the variable.
1787 * Read back the variable.
1792 }/*-------------------------< SNOOPEND >-------------------------*/,{
1798 }/*--------------------------<>----------------------------------*/