sys/dev/netif/sr/if_sr.c

   1 /*
   2  * Copyright (c) 1996 - 2001 John Hay.
   3  * Copyright (c) 1996 SDL Communications, Inc.
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  * 3. Neither the name of the author nor the names of any co-contributors
  15  *    may be used to endorse or promote products derived from this software
  16  *    without specific prior written permission.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  28  * SUCH DAMAGE.
  29  *
  30  * $FreeBSD: src/sys/dev/sr/if_sr.c,v 1.48.2.1 2002/06/17 15:10:58 jhay Exp $
  31  * $DragonFly: src/sys/dev/netif/sr/if_sr.c,v 1.13 2005/05/24 09:52:14 joerg Exp $
  32  */
  33
  34 /*
  35  * Programming assumptions and other issues.
  36  *
  37  * Only a 16K window will be used.
  38  *
  39  * The descriptors of a DMA channel will fit in a 16K memory window.
  40  *
  41  * The buffers of a transmit DMA channel will fit in a 16K memory window.
  42  *
  43  * When interface is going up, handshaking is set and it is only cleared
  44  * when the interface is down'ed.
  45  *
  46  * There should be a way to set/reset Raw HDLC/PPP, Loopback, DCE/DTE,
  47  * internal/external clock, etc.....
  48  *
  49  */
  50
  51 #include "opt_netgraph.h"
  52 #ifdef NETGRAPH
  53 #include "if_sr.h"
  54 #endif  /* NETGRAPH */
  55
  56 #include <sys/param.h>
  57 #include <sys/systm.h>
  58 #include <sys/kernel.h>
  59 #include <sys/malloc.h>
  60 #include <sys/mbuf.h>
  61 #include <sys/sockio.h>
  62 #include <sys/socket.h>
  63 #include <sys/bus.h>
  64 #include <machine/bus.h>
  65 #include <machine/resource.h>
  66 #include <machine/bus_pio.h>
  67 #include <machine/bus_memio.h>
  68 #include <sys/rman.h>
  69
  70 #include <net/if.h>
  71 #ifdef NETGRAPH
  72 #include <sys/syslog.h>
  73 #else /* NETGRAPH */
  74 #include <net/sppp/if_sppp.h>
  75
  76 #include <net/bpf.h>
  77 #endif  /* NETGRAPH */
  78
  79 #include <machine/md_var.h>
  80
  81 #include "../ic_layer/hd64570.h"
  82 #include "if_srregs.h"
  83
  84 #ifdef NETGRAPH
  85 #include <netgraph/ng_message.h>
  86 #include <netgraph/netgraph.h>
  87 #endif /* NETGRAPH */
  88 /* #define USE_MODEMCK */
  89
  90 #ifndef BUGGY
  91 #define BUGGY           0
  92 #endif
  93
  94 #ifndef NETGRAPH
  95 #define PPP_HEADER_LEN  4
  96 #endif /* NETGRAPH */
  97
  98 static int      next_sc_unit = 0;
  99 #ifndef NETGRAPH
 100 #ifdef USE_MODEMCK
 101 static int      sr_watcher = 0;
 102 #endif
 103 #endif /* NETGRAPH */
 104
 105 /*
 106  * Define the software interface for the card... There is one for
 107  * every channel (port).
 108  */
 109 struct sr_softc {
 110 #ifndef NETGRAPH
 111         struct  sppp ifsppp;    /* PPP service w/in system */
 112 #endif /* NETGRAPH */
 113         struct  sr_hardc *hc;   /* card-level information */
 114
 115         int     unit;           /* With regard to all sr devices */
 116         int     subunit;        /* With regard to this card */
 117
 118         struct  buf_block {
 119                 u_int   txdesc; /* DPRAM offset */
 120                 u_int   txstart;/* DPRAM offset */
 121                 u_int   txend;  /* DPRAM offset */
 122                 u_int   txtail; /* # of 1st free gran */
 123                 u_int   txmax;  /* # of free grans */
 124                 u_int   txeda;  /* err descr addr */
 125         } block[SR_TX_BLOCKS];
 126
 127         char    xmit_busy;      /* Transmitter is busy */
 128         char    txb_inuse;      /* # of tx grans in use */
 129         u_int   txb_new;        /* ndx to new buffer */
 130         u_int   txb_next_tx;    /* ndx to next gran rdy tx */
 131
 132         u_int   rxdesc;         /* DPRAM offset */
 133         u_int   rxstart;        /* DPRAM offset */
 134         u_int   rxend;          /* DPRAM offset */
 135         u_int   rxhind;         /* ndx to the hd of rx bufrs */
 136         u_int   rxmax;          /* # of avail grans */
 137
 138         u_int   clk_cfg;        /* Clock configuration */
 139
 140         int     scachan;        /* channel # on card */
 141 #ifdef NETGRAPH
 142         int     running;        /* something is attached so we are running */
 143         int     dcd;            /* do we have dcd? */
 144         /* ---netgraph bits --- */
 145         char            nodename[NG_NODELEN + 1]; /* store our node name */
 146         int             datahooks;      /* number of data hooks attached */
 147         node_p          node;           /* netgraph node */
 148         hook_p          hook;           /* data hook */
 149         hook_p          debug_hook;
 150         struct ifqueue  xmitq_hipri;    /* hi-priority transmit queue */
 151         struct ifqueue  xmitq;          /* transmit queue */
 152         int             flags;          /* state */
 153 #define SCF_RUNNING     0x01            /* board is active */
 154 #define SCF_OACTIVE     0x02            /* output is active */
 155         int             out_dog;        /* watchdog cycles output count-down */
 156         struct callout  sr_timer;       /* timeout(9) handle */
 157         u_long          inbytes, outbytes;      /* stats */
 158         u_long          lastinbytes, lastoutbytes; /* a second ago */
 159         u_long          inrate, outrate;        /* highest rate seen */
 160         u_long          inlast;         /* last input N secs ago */
 161         u_long          out_deficit;    /* output since last input */
 162         u_long          oerrors, ierrors[6];
 163         u_long          opackets, ipackets;
 164 #endif /* NETGRAPH */
 165 };
 166
 167 #ifdef NETGRAPH
 168 #define DOG_HOLDOFF     6       /* dog holds off for 6 secs */
 169 #define QUITE_A_WHILE   300     /* 5 MINUTES */
 170 #define LOTS_OF_PACKETS 100
 171 #endif /* NETGRAPH */
 172
 173 /*
 174  * Baud Rate table for Sync Mode.
 175  * Each entry consists of 3 elements:
 176  * Baud Rate (x100) , TMC, BR
 177  *
 178  * Baud Rate = FCLK / TMC / 2^BR
 179  * Baud table for Crystal freq. of 9.8304 Mhz
 180  */
 181 #ifdef N2_TEST_SPEED
 182 struct rate_line {
 183         int     target;         /* target rate/100 */
 184         int     tmc_reg;        /* TMC register value */
 185         int     br_reg;         /* BR (BaudRateClk) selector */
 186 } n2_rates[] = {
 187         /* Baudx100     TMC             BR */
 188         { 3,            128,            8 },
 189         { 6,            128,            7 },
 190         { 12,           128,            6 },
 191         { 24,           128,            5 },
 192         { 48,           128,            4 },
 193         { 96,           128,            3 },
 194         { 192,          128,            2 },
 195         { 384,          128,            1 },
 196         { 560,          88,             1 },
 197         { 640,          77,             1 },
 198         { 1280,         38,             1 },
 199         { 2560,         19,             1 },
 200         { 5120,         10,             1 },
 201         { 10000,        5,              1 },
 202         { 15000,        3,              1 },
 203         { 25000,        2,              1 },
 204         { 50000,        1,              1 },
 205         { 0,            0,              0 }
 206 };
 207
 208 int     sr_test_speed[] = {
 209         N2_TEST_SPEED,
 210         N2_TEST_SPEED
 211 };
 212
 213 int     etc0vals[] = {
 214         SR_MCR_ETC0,            /* ISA channel 0 */
 215         SR_MCR_ETC1,            /* ISA channel 1 */
 216         SR_FECR_ETC0,           /* PCI channel 0 */
 217         SR_FECR_ETC1            /* PCI channel 1 */
 218 };
 219 #endif
 220
 221 devclass_t sr_devclass;
 222 #ifndef NETGRAPH
 223 DECLARE_DUMMY_MODULE(if_sr);
 224 MODULE_DEPEND(if_sr, sppp, 1, 1, 1);
 225 #else
 226 MODULE_DEPEND(ng_sync_sr, netgraph, 1, 1, 1);
 227 #endif
 228
 229 static void     srintr(void *arg);
 230 static void     sr_xmit(struct sr_softc *sc);
 231 #ifndef NETGRAPH
 232 static void     srstart(struct ifnet *ifp);
 233 static int      srioctl(struct ifnet *ifp, u_long cmd, caddr_t data,
 234                         struct ucred *);
 235 static void     srwatchdog(struct ifnet *ifp);
 236 #else
 237 static void     srstart(struct sr_softc *sc);
 238 static void     srwatchdog(struct sr_softc *sc);
 239 #endif /* NETGRAPH */
 240 static int      sr_packet_avail(struct sr_softc *sc, int *len, u_char *rxstat);
 241 static void     sr_copy_rxbuf(struct mbuf *m, struct sr_softc *sc, int len);
 242 static void     sr_eat_packet(struct sr_softc *sc, int single);
 243 static void     sr_get_packets(struct sr_softc *sc);
 244
 245 static void     sr_up(struct sr_softc *sc);
 246 static void     sr_down(struct sr_softc *sc);
 247 static void     src_init(struct sr_hardc *hc);
 248 static void     sr_init_sca(struct sr_hardc *hc);
 249 static void     sr_init_msci(struct sr_softc *sc);
 250 static void     sr_init_rx_dmac(struct sr_softc *sc);
 251 static void     sr_init_tx_dmac(struct sr_softc *sc);
 252 static void     sr_dmac_intr(struct sr_hardc *hc, u_char isr);
 253 static void     sr_msci_intr(struct sr_hardc *hc, u_char isr);
 254 static void     sr_timer_intr(struct sr_hardc *hc, u_char isr);
 255 #ifndef NETGRAPH
 256 #ifdef USE_MODEMCK
 257 static void     sr_modemck(void *x);
 258 #endif
 259 #else
 260 static void     sr_modemck(struct sr_softc *x);
 261 #endif /* NETGRAPH */
 262
 263 #ifdef NETGRAPH
 264 static  void    ngsr_watchdog_frame(void * arg);
 265 static  void    ngsr_init(void* ignored);
 266
 267 static ng_constructor_t ngsr_constructor;
 268 static ng_rcvmsg_t      ngsr_rcvmsg;
 269 static ng_shutdown_t    ngsr_rmnode;
 270 static ng_newhook_t     ngsr_newhook;
 271 /*static ng_findhook_t  ngsr_findhook; */
 272 static ng_connect_t     ngsr_connect;
 273 static ng_rcvdata_t     ngsr_rcvdata;
 274 static ng_disconnect_t  ngsr_disconnect;
 275
 276 static struct ng_type typestruct = {
 277         NG_VERSION,
 278         NG_SR_NODE_TYPE,
 279         NULL,
 280         ngsr_constructor,
 281         ngsr_rcvmsg,
 282         ngsr_rmnode,
 283         ngsr_newhook,
 284         NULL,
 285         ngsr_connect,
 286         ngsr_rcvdata,
 287         ngsr_rcvdata,
 288         ngsr_disconnect,
 289         NULL
 290 };
 291
 292 static int      ngsr_done_init = 0;
 293 #endif /* NETGRAPH */
 294
 295 /*
 296  * Register the ports on the adapter.
 297  * Fill in the info for each port.
 298 #ifndef NETGRAPH
 299  * Attach each port to sppp and bpf.
 300 #endif
 301  */
 302 int
 303 sr_attach(device_t device)
 304 {
 305         int intf_sw, pndx;
 306         u_int32_t flags;
 307         u_int fecr, *fecrp;
 308         struct sr_hardc *hc;
 309         struct sr_softc *sc;
 310 #ifndef NETGRAPH
 311         struct ifnet *ifp;
 312 #endif /* NETGRAPH */
 313         int unit;               /* index: channel w/in card */
 314
 315         hc = (struct sr_hardc *)device_get_softc(device);
 316         MALLOC(sc, struct sr_softc *,
 317                 hc->numports * sizeof(struct sr_softc),
 318                 M_DEVBUF, M_WAITOK | M_ZERO);
 319         if (sc == NULL)
 320                 goto errexit;
 321         hc->sc = sc;
 322
 323         /*
 324          * Get the TX clock direction and configuration. The default is a
 325          * single external clock which is used by RX and TX.
 326          */
 327         switch(hc->cardtype) {
 328         case SR_CRD_N2:
 329                 flags = device_get_flags(device);
 330 #ifdef N2_TEST_SPEED
 331                 if (sr_test_speed[0] > 0)
 332                         hc->sc[0].clk_cfg = SR_FLAGS_INT_CLK;
 333                 else
 334 #endif
 335                 if (flags & SR_FLAGS_0_CLK_MSK)
 336                         hc->sc[0].clk_cfg =
 337                             (flags & SR_FLAGS_0_CLK_MSK)
 338                             >> SR_FLAGS_CLK_SHFT;
 339
 340                 if (hc->numports == 2)
 341 #ifdef N2_TEST_SPEED
 342                         if (sr_test_speed[1] > 0)
 343                                 hc->sc[0].clk_cfg = SR_FLAGS_INT_CLK;
 344                         else
 345 #endif
 346                         if (flags & SR_FLAGS_1_CLK_MSK)
 347                                 hc->sc[1].clk_cfg = (flags & SR_FLAGS_1_CLK_MSK)
 348                                     >> (SR_FLAGS_CLK_SHFT +
 349                                     SR_FLAGS_CLK_CHAN_SHFT);
 350                 break;
 351         case SR_CRD_N2PCI:
 352                 fecrp = (u_int *)(hc->sca_base + SR_FECR);
 353                 fecr = *fecrp;
 354                 for (pndx = 0; pndx < hc->numports; pndx++, sc++) {
 355                         switch (pndx) {
 356                         case 1:
 357                                 intf_sw = fecr & SR_FECR_ID1 >> SR_FE_ID1_SHFT;
 358                                 break;
 359                         case 0:
 360                         default:
 361                                 intf_sw = fecr & SR_FECR_ID0 >> SR_FE_ID0_SHFT;
 362                         }
 363
 364 #ifdef N2_TEST_SPEED
 365                         if (sr_test_speed[pndx] > 0)
 366                                 sc->clk_cfg = SR_FLAGS_INT_CLK;
 367                         else
 368 #endif
 369                                 switch (intf_sw) {
 370                                 default:
 371                                 case SR_FE_ID_RS232:
 372                                 case SR_FE_ID_HSSI:
 373                                 case SR_FE_ID_RS422:
 374                                 case SR_FE_ID_TEST:
 375                                         break;
 376
 377                                 case SR_FE_ID_V35:
 378                                         sc->clk_cfg = SR_FLAGS_EXT_SEP_CLK;
 379                                         break;
 380
 381                                 case SR_FE_ID_X21:
 382                                         sc->clk_cfg = SR_FLAGS_EXT_CLK;
 383                                         break;
 384                                 }
 385                 }
 386                 sc = hc->sc;
 387                 break;
 388         }
 389
 390         /*
 391          * Report Card configuration information before we start configuring
 392          * each channel on the card...
 393          */
 394         printf("src%d: %uK RAM (%d mempages) @ %08x-%08x, %u ports.\n",
 395                hc->cunit, hc->memsize / 1024, hc->mempages,
 396                (u_int)hc->mem_start, (u_int)hc->mem_end, hc->numports);
 397
 398         src_init(hc);
 399         sr_init_sca(hc);
 400
 401         if (BUS_SETUP_INTR(device_get_parent(device), device, hc->res_irq,
 402             INTR_TYPE_NET, srintr, hc, &hc->intr_cookie) != 0)
 403                 goto errexit;
 404
 405         /*
 406          * Now configure each port on the card.
 407          */
 408         for (unit = 0; unit < hc->numports; sc++, unit++) {
 409                 sc->hc = hc;
 410                 sc->subunit = unit;
 411                 sc->unit = next_sc_unit;
 412                 next_sc_unit++;
 413                 sc->scachan = unit % NCHAN;
 414
 415                 sr_init_rx_dmac(sc);
 416                 sr_init_tx_dmac(sc);
 417                 sr_init_msci(sc);
 418
 419                 printf("sr%d: Adapter %d, port %d.\n",
 420                        sc->unit, hc->cunit, sc->subunit);
 421
 422 #ifndef NETGRAPH
 423                 ifp = &sc->ifsppp.pp_if;
 424                 ifp->if_softc = sc;
 425                 if_initname(ifp, "sr", sc->unit);
 426                 ifp->if_mtu = PP_MTU;
 427                 ifp->if_flags = IFF_POINTOPOINT | IFF_MULTICAST;
 428                 ifp->if_ioctl = srioctl;
 429                 ifp->if_start = srstart;
 430                 ifp->if_watchdog = srwatchdog;
 431
 432                 sc->ifsppp.pp_flags = PP_KEEPALIVE;
 433                 sppp_attach((struct ifnet *)&sc->ifsppp);
 434                 if_attach(ifp);
 435
 436                 bpfattach(ifp, DLT_PPP, PPP_HEADER_LEN);
 437 #else   /* NETGRAPH */
 438                 /*
 439                  * we have found a node, make sure our 'type' is availabe.
 440                  */
 441                 if (ngsr_done_init == 0) ngsr_init(NULL);
 442                 if (ng_make_node_common(&typestruct, &sc->node) != 0)
 443                         goto errexit;
 444                 sc->node->private = sc;
 445                 callout_init(&sc->sr_timer);
 446                 sc->xmitq.ifq_maxlen = IFQ_MAXLEN;
 447                 sc->xmitq_hipri.ifq_maxlen = IFQ_MAXLEN;
 448                 sprintf(sc->nodename, "%s%d", NG_SR_NODE_TYPE, sc->unit);
 449                 if (ng_name_node(sc->node, sc->nodename)) {
 450                         ng_rmnode(sc->node);
 451                         ng_unref(sc->node);
 452                         return (0);
 453                 }
 454                 sc->running = 0;
 455 #endif  /* NETGRAPH */
 456         }
 457
 458         if (hc->mempages)
 459                 SRC_SET_OFF(hc->iobase);
 460
 461         return (0);
 462
 463 errexit:
 464         sr_deallocate_resources(device);
 465         return (ENXIO);
 466 }
 467
 468 int
 469 sr_detach(device_t device)
 470 {
 471         device_t parent = device_get_parent(device);
 472         struct sr_hardc *hc = device_get_softc(device);
 473
 474         if (hc->intr_cookie != NULL) {
 475                 if (BUS_TEARDOWN_INTR(parent, device,
 476                         hc->res_irq, hc->intr_cookie) != 0) {
 477                                 printf("intr teardown failed.. continuing\n");
 478                 }
 479                 hc->intr_cookie = NULL;
 480         }
 481
 482         /* XXX Stop the DMA. */
 483
 484         /*
 485          * deallocate any system resources we may have
 486          * allocated on behalf of this driver.
 487          */
 488         FREE(hc->sc, M_DEVBUF);
 489         hc->sc = NULL;
 490         hc->mem_start = NULL;
 491         return (sr_deallocate_resources(device));
 492 }
 493
 494 int
 495 sr_allocate_ioport(device_t device, int rid, u_long size)
 496 {
 497         struct sr_hardc *hc = device_get_softc(device);
 498
 499         hc->rid_ioport = rid;
 500         hc->res_ioport = bus_alloc_resource(device, SYS_RES_IOPORT,
 501                         &hc->rid_ioport, 0ul, ~0ul, size, RF_ACTIVE);
 502         if (hc->res_ioport == NULL) {
 503                 goto errexit;
 504         }
 505         return (0);
 506
 507 errexit:
 508         sr_deallocate_resources(device);
 509         return (ENXIO);
 510 }
 511
 512 int
 513 sr_allocate_irq(device_t device, int rid, u_long size)
 514 {
 515         struct sr_hardc *hc = device_get_softc(device);
 516
 517         hc->rid_irq = rid;
 518         hc->res_irq = bus_alloc_resource_any(device, SYS_RES_IRQ,
 519             &hc->rid_irq, RF_SHAREABLE|RF_ACTIVE);
 520         if (hc->res_irq == NULL) {
 521                 goto errexit;
 522         }
 523         return (0);
 524
 525 errexit:
 526         sr_deallocate_resources(device);
 527         return (ENXIO);
 528 }
 529
 530 int
 531 sr_allocate_memory(device_t device, int rid, u_long size)
 532 {
 533         struct sr_hardc *hc = device_get_softc(device);
 534
 535         hc->rid_memory = rid;
 536         hc->res_memory = bus_alloc_resource(device, SYS_RES_MEMORY,
 537                         &hc->rid_memory, 0ul, ~0ul, size, RF_ACTIVE);
 538         if (hc->res_memory == NULL) {
 539                 goto errexit;
 540         }
 541         return (0);
 542
 543 errexit:
 544         sr_deallocate_resources(device);
 545         return (ENXIO);
 546 }
 547
 548 int
 549 sr_allocate_plx_memory(device_t device, int rid, u_long size)
 550 {
 551         struct sr_hardc *hc = device_get_softc(device);
 552
 553         hc->rid_plx_memory = rid;
 554         hc->res_plx_memory = bus_alloc_resource(device, SYS_RES_MEMORY,
 555                         &hc->rid_plx_memory, 0ul, ~0ul, size, RF_ACTIVE);
 556         if (hc->res_plx_memory == NULL) {
 557                 goto errexit;
 558         }
 559         return (0);
 560
 561 errexit:
 562         sr_deallocate_resources(device);
 563         return (ENXIO);
 564 }
 565
 566 int
 567 sr_deallocate_resources(device_t device)
 568 {
 569         struct sr_hardc *hc = device_get_softc(device);
 570
 571         if (hc->res_irq != 0) {
 572                 bus_deactivate_resource(device, SYS_RES_IRQ,
 573                         hc->rid_irq, hc->res_irq);
 574                 bus_release_resource(device, SYS_RES_IRQ,
 575                         hc->rid_irq, hc->res_irq);
 576                 hc->res_irq = 0;
 577         }
 578         if (hc->res_ioport != 0) {
 579                 bus_deactivate_resource(device, SYS_RES_IOPORT,
 580                         hc->rid_ioport, hc->res_ioport);
 581                 bus_release_resource(device, SYS_RES_IOPORT,
 582                         hc->rid_ioport, hc->res_ioport);
 583                 hc->res_ioport = 0;
 584         }
 585         if (hc->res_memory != 0) {
 586                 bus_deactivate_resource(device, SYS_RES_MEMORY,
 587                         hc->rid_memory, hc->res_memory);
 588                 bus_release_resource(device, SYS_RES_MEMORY,
 589                         hc->rid_memory, hc->res_memory);
 590                 hc->res_memory = 0;
 591         }
 592         if (hc->res_plx_memory != 0) {
 593                 bus_deactivate_resource(device, SYS_RES_MEMORY,
 594                         hc->rid_plx_memory, hc->res_plx_memory);
 595                 bus_release_resource(device, SYS_RES_MEMORY,
 596                         hc->rid_plx_memory, hc->res_plx_memory);
 597                 hc->res_plx_memory = 0;
 598         }
 599         return (0);
 600 }
 601
 602 /*
 603  * N2 Interrupt Service Routine
 604  *
 605  * First figure out which SCA gave the interrupt.
 606  * Process it.
 607  * See if there is other interrupts pending.
 608  * Repeat until there no interrupts remain.
 609  */
 610 static void
 611 srintr(void *arg)
 612 {
 613         struct sr_hardc *hc = (struct sr_hardc *)arg;
 614         sca_regs *sca = hc->sca;        /* MSCI register tree */
 615         u_char  isr0, isr1, isr2;       /* interrupt statii captured */
 616
 617 #if BUGGY > 1
 618         printf("sr: srintr_hc(hc=%08x)\n", hc);
 619 #endif
 620
 621         /*
 622          * Since multiple interfaces may share this interrupt, we must loop
 623          * until no interrupts are still pending service.
 624          */
 625         while (1) {
 626                 /*
 627                  * Read all three interrupt status registers from the N2
 628                  * card...
 629                  */
 630                 isr0 = SRC_GET8(hc->sca_base, sca->isr0);
 631                 isr1 = SRC_GET8(hc->sca_base, sca->isr1);
 632                 isr2 = SRC_GET8(hc->sca_base, sca->isr2);
 633
 634                 /*
 635                  * If all three registers returned 0, we've finished
 636                  * processing interrupts from this device, so we can quit
 637                  * this loop...
 638                  */
 639                 if ((isr0 | isr1 | isr2) == 0)
 640                         break;
 641
 642 #if BUGGY > 2
 643                 printf("src%d: srintr_hc isr0 %x, isr1 %x, isr2 %x\n",
 644 #ifndef NETGRAPH
 645                         unit, isr0, isr1, isr2);
 646 #else
 647                         hc->cunit, isr0, isr1, isr2);
 648 #endif /* NETGRAPH */
 649 #endif
 650
 651                 /*
 652                  * Now we can dispatch the interrupts. Since we don't expect
 653                  * either MSCI or timer interrupts, we'll test for DMA
 654                  * interrupts first...
 655                  */
 656                 if (isr1)       /* DMA-initiated interrupt */
 657                         sr_dmac_intr(hc, isr1);
 658
 659                 if (isr0)       /* serial part IRQ? */
 660                         sr_msci_intr(hc, isr0);
 661
 662                 if (isr2)       /* timer-initiated interrupt */
 663                         sr_timer_intr(hc, isr2);
 664         }
 665 }
 666
 667 /*
 668  * This will only start the transmitter. It is assumed that the data
 669  * is already there.
 670  * It is normally called from srstart() or sr_dmac_intr().
 671  */
 672 static void
 673 sr_xmit(struct sr_softc *sc)
 674 {
 675         u_short cda_value;      /* starting descriptor */
 676         u_short eda_value;      /* ending descriptor */
 677         struct sr_hardc *hc;
 678 #ifndef NETGRAPH
 679         struct ifnet *ifp;      /* O/S Network Services */
 680 #endif /* NETGRAPH */
 681         dmac_channel *dmac;     /* DMA channel registers */
 682
 683 #if BUGGY > 0
 684         printf("sr: sr_xmit( sc=%08x)\n", sc);
 685 #endif
 686
 687         hc = sc->hc;
 688 #ifndef NETGRAPH
 689         ifp = &sc->ifsppp.pp_if;
 690 #endif /* NETGRAPH */
 691         dmac = &hc->sca->dmac[DMAC_TXCH(sc->scachan)];
 692
 693         /*
 694          * Get the starting and ending addresses of the chain to be
 695          * transmitted and pass these on to the DMA engine on-chip.
 696          */
 697         cda_value = sc->block[sc->txb_next_tx].txdesc + hc->mem_pstart;
 698         cda_value &= 0x00ffff;
 699         eda_value = sc->block[sc->txb_next_tx].txeda + hc->mem_pstart;
 700         eda_value &= 0x00ffff;
 701
 702         SRC_PUT16(hc->sca_base, dmac->cda, cda_value);
 703         SRC_PUT16(hc->sca_base, dmac->eda, eda_value);
 704
 705         /*
 706          * Now we'll let the DMA status register know about this change
 707          */
 708         SRC_PUT8(hc->sca_base, dmac->dsr, SCA_DSR_DE);
 709
 710         sc->xmit_busy = 1;      /* mark transmitter busy */
 711
 712 #if BUGGY > 2
 713         printf("sr%d: XMIT  cda=%04x, eda=%4x, rcda=%08lx\n",
 714                sc->unit, cda_value, eda_value,
 715                sc->block[sc->txb_next_tx].txdesc + hc->mem_pstart);
 716 #endif
 717
 718         sc->txb_next_tx++;      /* update next transmit seq# */
 719
 720         if (sc->txb_next_tx == SR_TX_BLOCKS)    /* handle wrap... */
 721                 sc->txb_next_tx = 0;
 722
 723 #ifndef NETGRAPH
 724         /*
 725          * Finally, we'll set a timout (which will start srwatchdog())
 726          * within the O/S network services layer...
 727          */
 728         ifp->if_timer = 2;      /* Value in seconds. */
 729 #else
 730         /*
 731          * Don't time out for a while.
 732          */
 733         sc->out_dog = DOG_HOLDOFF;      /* give ourself some breathing space*/
 734 #endif /* NETGRAPH */
 735 }
 736
 737 /*
 738  * This function will be called from the upper level when a user add a
 739  * packet to be send, and from the interrupt handler after a finished
 740  * transmit.
 741  *
 742  * NOTE: it should run at spl_imp().
 743  *
 744  * This function only place the data in the oncard buffers. It does not
 745  * start the transmition. sr_xmit() does that.
 746  *
 747  * Transmitter idle state is indicated by the IFF_OACTIVE flag.
 748  * The function that clears that should ensure that the transmitter
 749  * and its DMA is in a "good" idle state.
 750  */
 751 #ifndef NETGRAPH
 752 static void
 753 srstart(struct ifnet *ifp)
 754 {
 755         struct sr_softc *sc;    /* channel control structure */
 756 #else
 757 static void
 758 srstart(struct sr_softc *sc)
 759 {
 760 #endif /* NETGRAPH */
 761         struct sr_hardc *hc;    /* card control/config block */
 762         int len;                /* total length of a packet */
 763         int pkts;               /* packets placed in DPRAM */
 764         int tlen;               /* working length of pkt */
 765         u_int i;
 766         struct mbuf *mtx;       /* message buffer from O/S */
 767         u_char *txdata;         /* buffer address in DPRAM */
 768         sca_descriptor *txdesc; /* working descriptor pointr */
 769         struct buf_block *blkp;
 770
 771 #ifndef NETGRAPH
 772 #if BUGGY > 0
 773         printf("sr: srstart( ifp=%08x)\n", ifp);
 774 #endif
 775         sc = ifp->if_softc;
 776         if ((ifp->if_flags & IFF_RUNNING) == 0)
 777                 return;
 778 #endif /* NETGRAPH */
 779         hc = sc->hc;
 780         /*
 781          * It is OK to set the memory window outside the loop because all tx
 782          * buffers and descriptors are assumed to be in the same 16K window.
 783          */
 784         if (hc->mempages) {
 785                 SRC_SET_ON(hc->iobase);
 786                 SRC_SET_MEM(hc->iobase, sc->block[0].txdesc);
 787         }
 788
 789         /*
 790          * Loop to place packets into DPRAM.
 791          *
 792          * We stay in this loop until there is nothing in
 793          * the TX queue left or the tx buffers are full.
 794          */
 795 top_srstart:
 796
 797         /*
 798          * See if we have space for more packets.
 799          */
 800         if (sc->txb_inuse == SR_TX_BLOCKS) {    /* out of space? */
 801 #ifndef NETGRAPH
 802                 ifp->if_flags |= IFF_OACTIVE;   /* yes, mark active */
 803 #else
 804                 /*ifp->if_flags |= IFF_OACTIVE;*/       /* yes, mark active */
 805 #endif /* NETGRAPH */
 806
 807                 if (hc->mempages)
 808                         SRC_SET_OFF(hc->iobase);
 809
 810 #if BUGGY > 9
 811                 printf("sr%d.srstart: sc->txb_inuse=%d; DPRAM full...\n",
 812                        sc->unit, sc->txb_inuse);
 813 #endif
 814                 return;
 815         }
 816         /*
 817          * OK, the card can take more traffic.  Let's see if there's any
 818          * pending from the system...
 819          *
 820          * NOTE:
 821          * The architecture of the networking interface doesn't
 822          * actually call us like 'write()', providing an address.  We get
 823          * started, a lot like a disk strategy routine, and we actually call
 824          * back out to the system to get traffic to send...
 825          *
 826          * NOTE:
 827          * If we were gonna run through another layer, we would use a
 828          * dispatch table to select the service we're getting a packet
 829          * from...
 830          */
 831 #ifndef NETGRAPH
 832         mtx = sppp_dequeue(ifp);
 833 #else /* NETGRAPH */
 834         IF_DEQUEUE(&sc->xmitq_hipri, mtx);
 835         if (mtx == NULL) {
 836                 IF_DEQUEUE(&sc->xmitq, mtx);
 837         }
 838 #endif /* NETGRAPH */
 839         if (!mtx) {
 840                 if (hc->mempages)
 841                         SRC_SET_OFF(hc->iobase);
 842                 return;
 843         }
 844         /*
 845          * OK, we got a packet from the network services of the O/S. Now we
 846          * can move it into the DPRAM (under control of the descriptors) and
 847          * fire it off...
 848          */
 849         pkts = 0;
 850         i = 0;                  /* counts # of granules used */
 851
 852         blkp = &sc->block[sc->txb_new]; /* address of free granule */
 853         txdesc = (sca_descriptor *)
 854             (hc->mem_start + (blkp->txdesc & hc->winmsk));
 855
 856         txdata = (u_char *)(hc->mem_start
 857                             + (blkp->txstart & hc->winmsk));
 858
 859         /*
 860          * Now we'll try to install as many packets as possible into the
 861          * card's DP RAM buffers.
 862          */
 863         for (;;) {              /* perform actual copy of packet */
 864                 len = mtx->m_pkthdr.len;        /* length of message */
 865
 866 #if BUGGY > 1
 867                 printf("sr%d.srstart: mbuf @ %08lx, %d bytes\n",
 868                            sc->unit, mtx, len);
 869 #endif
 870
 871 #ifndef NETGRAPH
 872                 BPF_MTAP(ifp, mtx);
 873 #else   /* NETGRAPH */
 874                 sc->outbytes += len;
 875 #endif  /* NETGRAPH */
 876
 877                 /*
 878                  * We can perform a straight copy because the tranmit
 879                  * buffers won't wrap.
 880                  */
 881                 m_copydata(mtx, 0, len, txdata);
 882
 883                 /*
 884                  * Now we know how big the message is gonna be.  We must now
 885                  * construct the descriptors to drive this message out...
 886                  */
 887                 tlen = len;
 888                 while (tlen > SR_BUF_SIZ) {     /* loop for full granules */
 889                         txdesc->stat = 0;       /* reset bits */
 890                         txdesc->len = SR_BUF_SIZ;       /* size of granule */
 891                         tlen -= SR_BUF_SIZ;
 892
 893                         txdesc++;       /* move to next dscr */
 894                         txdata += SR_BUF_SIZ;   /* adjust data addr */
 895                         i++;
 896                 }
 897
 898                 /*
 899                  * This section handles the setting of the final piece of a
 900                  * message.
 901                  */
 902                 txdesc->stat = SCA_DESC_EOM;
 903                 txdesc->len = tlen;
 904                 pkts++;
 905
 906                 /*
 907                  * prepare for subsequent packets (if any)
 908                  */
 909                 txdesc++;
 910                 txdata += SR_BUF_SIZ;   /* next mem granule */
 911                 i++;            /* count of granules */
 912
 913                 /*
 914                  * OK, we've now placed the message into the DPRAM where it
 915                  * can be transmitted.  We'll now release the message memory
 916                  * and update the statistics...
 917                  */
 918                 m_freem(mtx);
 919 #ifndef NETGRAPH
 920                 ++sc->ifsppp.pp_if.if_opackets;
 921 #else   /* NETGRAPH */
 922                 sc->opackets++;
 923 #endif /* NETGRAPH */
 924
 925                 /*
 926                  * Check if we have space for another packet. XXX This is
 927                  * hardcoded.  A packet can't be larger than 3 buffers (3 x
 928                  * 512).
 929                  */
 930                 if ((i + 3) >= blkp->txmax) {   /* enough remains? */
 931 #if BUGGY > 9
 932                         printf("sr%d.srstart: i=%d (%d pkts); card full.\n",
 933                                sc->unit, i, pkts);
 934 #endif
 935                         break;
 936                 }
 937                 /*
 938                  * We'll pull the next message to be sent (if any)
 939                  */
 940 #ifndef NETGRAPH
 941                 mtx = sppp_dequeue(ifp);
 942 #else /* NETGRAPH */
 943                 IF_DEQUEUE(&sc->xmitq_hipri, mtx);
 944                 if (mtx == NULL) {
 945                         IF_DEQUEUE(&sc->xmitq, mtx);
 946                 }
 947 #endif /* NETGRAPH */
 948                 if (!mtx) {     /* no message?  We're done! */
 949 #if BUGGY > 9
 950                         printf("sr%d.srstart: pending=0, pkts=%d\n",
 951                                sc->unit, pkts);
 952 #endif
 953                         break;
 954                 }
 955         }
 956
 957         blkp->txtail = i;       /* record next free granule */
 958
 959         /*
 960          * Mark the last descriptor, so that the SCA know where to stop.
 961          */
 962         txdesc--;               /* back up to last descriptor in list */
 963         txdesc->stat |= SCA_DESC_EOT;   /* mark as end of list */
 964
 965         /*
 966          * Now we'll reset the transmit granule's descriptor address so we
 967          * can record this in the structure and fire it off w/ the DMA
 968          * processor of the serial chip...
 969          */
 970         txdesc = (sca_descriptor *)blkp->txdesc;
 971         blkp->txeda = (u_short)((u_int)&txdesc[i]);
 972
 973         sc->txb_inuse++;        /* update inuse status */
 974         sc->txb_new++;          /* new traffic wuz added */
 975
 976         if (sc->txb_new == SR_TX_BLOCKS)
 977                 sc->txb_new = 0;
 978
 979         /*
 980          * If the tranmitter wasn't marked as "busy" we will force it to be
 981          * started...
 982          */
 983         if (sc->xmit_busy == 0) {
 984                 sr_xmit(sc);
 985 #if BUGGY > 9
 986                 printf("sr%d.srstart: called sr_xmit()\n", sc->unit);
 987 #endif
 988         }
 989         goto top_srstart;
 990 }
 991
 992 #ifndef NETGRAPH
 993 /*
 994  * Handle ioctl's at the device level, though we *will* call up
 995  * a layer...
 996  */
 997 #if BUGGY > 2
 998 static int bug_splats[] = {0, 0, 0, 0, 0, 0, 0, 0};
 999 #endif
1000
1001 static int
1002 srioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
1003 {
1004         int s, error, was_up, should_be_up;
1005         struct sr_softc *sc = ifp->if_softc;
1006
1007 #if BUGGY > 0
1008         printf("%s: srioctl(ifp=%08x, cmd=%08x, data=%08x)\n",
1009                ifp->if_xname, ifp, cmd, data);
1010 #endif
1011
1012         was_up = ifp->if_flags & IFF_RUNNING;
1013
1014         error = sppp_ioctl(ifp, cmd, data);
1015
1016 #if BUGGY > 1
1017         printf("%s: ioctl: ifsppp.pp_flags = %08x, if_flags %08x.\n",
1018               ifp->if_xname, ((struct sppp *)ifp)->pp_flags, ifp->if_flags);
1019 #endif
1020
1021         if (error)
1022                 return error;
1023
1024         if ((cmd != SIOCSIFFLAGS) && (cmd != SIOCSIFADDR)) {
1025 #if BUGGY > 2
1026                 if (bug_splats[sc->unit]++ < 2) {
1027                         printf("sr(%d).if_addrlist = %08x\n",
1028                                sc->unit, ifp->if_addrlist);
1029                         printf("sr(%d).if_bpf = %08x\n",
1030                                sc->unit, ifp->if_bpf);
1031                         printf("sr(%d).if_init = %08x\n",
1032                                sc->unit, ifp->if_init);
1033                         printf("sr(%d).if_output = %08x\n",
1034                                sc->unit, ifp->if_output);
1035                         printf("sr(%d).if_start = %08x\n",
1036                                sc->unit, ifp->if_start);
1037                         printf("sr(%d).if_done = %08x\n",
1038                                sc->unit, ifp->if_done);
1039                         printf("sr(%d).if_ioctl = %08x\n",
1040                                sc->unit, ifp->if_ioctl);
1041                         printf("sr(%d).if_reset = %08x\n",
1042                                sc->unit, ifp->if_reset);
1043                         printf("sr(%d).if_watchdog = %08x\n",
1044                                sc->unit, ifp->if_watchdog);
1045                 }
1046 #endif
1047                 return 0;
1048         }
1049
1050         s = splimp();
1051         should_be_up = ifp->if_flags & IFF_RUNNING;
1052
1053         if (!was_up && should_be_up) {
1054                 /*
1055                  * Interface should be up -- start it.
1056                  */
1057                 sr_up(sc);
1058                 srstart(ifp);
1059
1060                 /*
1061                  * XXX Clear the IFF_UP flag so that the link will only go
1062                  * up after sppp lcp and ipcp negotiation.
1063                  */
1064                 /* ifp->if_flags &= ~IFF_UP; */
1065         } else if (was_up && !should_be_up) {
1066                 /*
1067                  * Interface should be down -- stop it.
1068                  */
1069                 sr_down(sc);
1070                 sppp_flush(ifp);
1071         }
1072         splx(s);
1073         return 0;
1074 }
1075 #endif /* NETGRAPH */
1076
1077 /*
1078  * This is to catch lost tx interrupts.
1079  */
1080 static void
1081 #ifndef NETGRAPH
1082 srwatchdog(struct ifnet *ifp)
1083 #else
1084 srwatchdog(struct sr_softc *sc)
1085 #endif /* NETGRAPH */
1086 {
1087         int     got_st0, got_st1, got_st3, got_dsr;
1088 #ifndef NETGRAPH
1089         struct sr_softc *sc = ifp->if_softc;
1090 #endif /* NETGRAPH */
1091         struct sr_hardc *hc = sc->hc;
1092         msci_channel *msci = &hc->sca->msci[sc->scachan];
1093         dmac_channel *dmac = &sc->hc->sca->dmac[sc->scachan];
1094
1095 #if BUGGY > 0
1096 #ifndef NETGRAPH
1097         printf("srwatchdog(unit=%d)\n", unit);
1098 #else
1099         printf("srwatchdog(unit=%d)\n", sc->unit);
1100 #endif /* NETGRAPH */
1101 #endif
1102
1103 #ifndef NETGRAPH
1104         if (!(ifp->if_flags & IFF_RUNNING))
1105                 return;
1106
1107         ifp->if_oerrors++;      /* update output error count */
1108 #else   /* NETGRAPH */
1109         sc->oerrors++;  /* update output error count */
1110 #endif /* NETGRAPH */
1111
1112         got_st0 = SRC_GET8(hc->sca_base, msci->st0);
1113         got_st1 = SRC_GET8(hc->sca_base, msci->st1);
1114         got_st3 = SRC_GET8(hc->sca_base, msci->st3);
1115         got_dsr = SRC_GET8(hc->sca_base, dmac->dsr);
1116
1117 #ifndef NETGRAPH
1118 #if     0
1119         if (ifp->if_flags & IFF_DEBUG)
1120 #endif
1121                 printf("sr%d: transmit failed, "
1122 #else   /* NETGRAPH */
1123         printf("sr%d: transmit failed, "
1124 #endif /* NETGRAPH */
1125                        "ST0 %02x, ST1 %02x, ST3 %02x, DSR %02x.\n",
1126                        sc->unit,
1127                        got_st0, got_st1, got_st3, got_dsr);
1128
1129         if (SRC_GET8(hc->sca_base, msci->st1) & SCA_ST1_UDRN) {
1130                 SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_TXABORT);
1131                 SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_TXENABLE);
1132                 SRC_PUT8(hc->sca_base, msci->st1, SCA_ST1_UDRN);
1133         }
1134         sc->xmit_busy = 0;
1135 #ifndef NETGRAPH
1136         ifp->if_flags &= ~IFF_OACTIVE;
1137 #else
1138         /*ifp->if_flags &= ~IFF_OACTIVE; */
1139 #endif /* NETGRAPH */
1140
1141         if (sc->txb_inuse && --sc->txb_inuse)
1142                 sr_xmit(sc);
1143
1144 #ifndef NETGRAPH
1145         srstart(ifp);   /* restart transmitter */
1146 #else
1147         srstart(sc);    /* restart transmitter */
1148 #endif /* NETGRAPH */
1149 }
1150
1151 static void
1152 sr_up(struct sr_softc *sc)
1153 {
1154         u_int *fecrp;
1155         struct sr_hardc *hc = sc->hc;
1156         sca_regs *sca = hc->sca;
1157         msci_channel *msci = &sca->msci[sc->scachan];
1158
1159 #if BUGGY > 0
1160         printf("sr_up(sc=%08x)\n", sc);
1161 #endif
1162
1163         /*
1164          * Enable transmitter and receiver. Raise DTR and RTS. Enable
1165          * interrupts.
1166          *
1167          * XXX What about using AUTO mode in msci->md0 ???
1168          */
1169         SRC_PUT8(hc->sca_base, msci->ctl,
1170                  SRC_GET8(hc->sca_base, msci->ctl) & ~SCA_CTL_RTS);
1171
1172         if (sc->scachan == 0)
1173                 switch (hc->cardtype) {
1174                 case SR_CRD_N2:
1175                         outb(hc->iobase + SR_MCR,
1176                              (inb(hc->iobase + SR_MCR) & ~SR_MCR_DTR0));
1177                         break;
1178                 case SR_CRD_N2PCI:
1179                         fecrp = (u_int *)(hc->sca_base + SR_FECR);
1180                         *fecrp &= ~SR_FECR_DTR0;
1181                         break;
1182                 }
1183         else
1184                 switch (hc->cardtype) {
1185                 case SR_CRD_N2:
1186                         outb(hc->iobase + SR_MCR,
1187                              (inb(hc->iobase + SR_MCR) & ~SR_MCR_DTR1));
1188                         break;
1189                 case SR_CRD_N2PCI:
1190                         fecrp = (u_int *)(hc->sca_base + SR_FECR);
1191                         *fecrp &= ~SR_FECR_DTR1;
1192                         break;
1193                 }
1194
1195         if (sc->scachan == 0) {
1196                 SRC_PUT8(hc->sca_base, sca->ier0,
1197                          SRC_GET8(hc->sca_base, sca->ier0) | 0x000F);
1198                 SRC_PUT8(hc->sca_base, sca->ier1,
1199                          SRC_GET8(hc->sca_base, sca->ier1) | 0x000F);
1200         } else {
1201                 SRC_PUT8(hc->sca_base, sca->ier0,
1202                          SRC_GET8(hc->sca_base, sca->ier0) | 0x00F0);
1203                 SRC_PUT8(hc->sca_base, sca->ier1,
1204                          SRC_GET8(hc->sca_base, sca->ier1) | 0x00F0);
1205         }
1206
1207         SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_RXENABLE);
1208         inb(hc->iobase);        /* XXX slow it down a bit. */
1209         SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_TXENABLE);
1210
1211 #ifndef NETGRAPH
1212 #ifdef USE_MODEMCK
1213         if (sr_watcher == 0)
1214                 sr_modemck(NULL);
1215 #endif
1216 #else   /* NETGRAPH */
1217         callout_reset(&sc->sr_timer, hz, ngsr_watchdog_frame, sc);
1218         sc->running = 1;
1219 #endif /* NETGRAPH */
1220 }
1221
1222 static void
1223 sr_down(struct sr_softc *sc)
1224 {
1225         u_int *fecrp;
1226         struct sr_hardc *hc = sc->hc;
1227         sca_regs *sca = hc->sca;
1228         msci_channel *msci = &sca->msci[sc->scachan];
1229
1230 #if BUGGY > 0
1231         printf("sr_down(sc=%08x)\n", sc);
1232 #endif
1233 #ifdef NETGRAPH
1234         callout_stop(&sc->sr_timer);
1235         sc->running = 0;
1236 #endif /* NETGRAPH */
1237
1238         /*
1239          * Disable transmitter and receiver. Lower DTR and RTS. Disable
1240          * interrupts.
1241          */
1242         SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_RXDISABLE);
1243         inb(hc->iobase);        /* XXX slow it down a bit. */
1244         SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_TXDISABLE);
1245
1246         SRC_PUT8(hc->sca_base, msci->ctl,
1247                  SRC_GET8(hc->sca_base, msci->ctl) | SCA_CTL_RTS);
1248
1249         if (sc->scachan == 0)
1250                 switch (hc->cardtype) {
1251                 case SR_CRD_N2:
1252                         outb(hc->iobase + SR_MCR,
1253                              (inb(hc->iobase + SR_MCR) | SR_MCR_DTR0));
1254                         break;
1255                 case SR_CRD_N2PCI:
1256                         fecrp = (u_int *)(hc->sca_base + SR_FECR);
1257                         *fecrp |= SR_FECR_DTR0;
1258                         break;
1259                 }
1260         else
1261                 switch (hc->cardtype) {
1262                 case SR_CRD_N2:
1263                         outb(hc->iobase + SR_MCR,
1264                              (inb(hc->iobase + SR_MCR) | SR_MCR_DTR1));
1265                         break;
1266                 case SR_CRD_N2PCI:
1267                         fecrp = (u_int *)(hc->sca_base + SR_FECR);
1268                         *fecrp |= SR_FECR_DTR1;
1269                         break;
1270                 }
1271
1272         if (sc->scachan == 0) {
1273                 SRC_PUT8(hc->sca_base, sca->ier0,
1274                          SRC_GET8(hc->sca_base, sca->ier0) & ~0x0F);
1275                 SRC_PUT8(hc->sca_base, sca->ier1,
1276                          SRC_GET8(hc->sca_base, sca->ier1) & ~0x0F);
1277         } else {
1278                 SRC_PUT8(hc->sca_base, sca->ier0,
1279                          SRC_GET8(hc->sca_base, sca->ier0) & ~0xF0);
1280                 SRC_PUT8(hc->sca_base, sca->ier1,
1281                          SRC_GET8(hc->sca_base, sca->ier1) & ~0xF0);
1282         }
1283 }
1284
1285 /*
1286  * Initialize the card, allocate memory for the sr_softc structures
1287  * and fill in the pointers.
1288  */
1289 static void
1290 src_init(struct sr_hardc *hc)
1291 {
1292         struct sr_softc *sc = hc->sc;
1293         int x;
1294         u_int chanmem;
1295         u_int bufmem;
1296         u_int next;
1297         u_int descneeded;
1298
1299 #if BUGGY > 0
1300         printf("src_init(hc=%08x)\n", hc);
1301 #endif
1302
1303         chanmem = hc->memsize / hc->numports;
1304         next = 0;
1305
1306         for (x = 0; x < hc->numports; x++, sc++) {
1307                 int blk;
1308
1309                 for (blk = 0; blk < SR_TX_BLOCKS; blk++) {
1310                         sc->block[blk].txdesc = next;
1311                         bufmem = (16 * 1024) / SR_TX_BLOCKS;
1312                         descneeded = bufmem / SR_BUF_SIZ;
1313
1314                         sc->block[blk].txstart = sc->block[blk].txdesc
1315                             + ((((descneeded * sizeof(sca_descriptor))
1316                                  / SR_BUF_SIZ) + 1)
1317                                * SR_BUF_SIZ);
1318
1319                         sc->block[blk].txend = next + bufmem;
1320                         sc->block[blk].txmax =
1321                             (sc->block[blk].txend - sc->block[blk].txstart)
1322                             / SR_BUF_SIZ;
1323                         next += bufmem;
1324
1325 #if BUGGY > 2
1326                         printf("sr%d: blk %d: txdesc %08x, txstart %08x\n",
1327                                sc->unit, blk,
1328                                sc->block[blk].txdesc, sc->block[blk].txstart);
1329 #endif
1330                 }
1331
1332                 sc->rxdesc = next;
1333                 bufmem = chanmem - (bufmem * SR_TX_BLOCKS);
1334                 descneeded = bufmem / SR_BUF_SIZ;
1335                 sc->rxstart = sc->rxdesc +
1336                     ((((descneeded * sizeof(sca_descriptor)) /
1337                        SR_BUF_SIZ) + 1) * SR_BUF_SIZ);
1338                 sc->rxend = next + bufmem;
1339                 sc->rxmax = (sc->rxend - sc->rxstart) / SR_BUF_SIZ;
1340                 next += bufmem;
1341         }
1342 }
1343
1344 /*
1345  * The things done here are channel independent.
1346  *
1347  * Configure the sca waitstates.
1348  * Configure the global interrupt registers.
1349  * Enable master dma enable.
1350  */
1351 static void
1352 sr_init_sca(struct sr_hardc *hc)
1353 {
1354         sca_regs *sca = hc->sca;
1355
1356 #if BUGGY > 0
1357         printf("sr_init_sca(hc=%08x)\n", hc);
1358 #endif
1359
1360         /*
1361          * Do the wait registers. Set everything to 0 wait states.
1362          */
1363         SRC_PUT8(hc->sca_base, sca->pabr0, 0);
1364         SRC_PUT8(hc->sca_base, sca->pabr1, 0);
1365         SRC_PUT8(hc->sca_base, sca->wcrl, 0);
1366         SRC_PUT8(hc->sca_base, sca->wcrm, 0);
1367         SRC_PUT8(hc->sca_base, sca->wcrh, 0);
1368
1369         /*
1370          * Configure the interrupt registers. Most are cleared until the
1371          * interface is configured.
1372          */
1373         SRC_PUT8(hc->sca_base, sca->ier0, 0x00);        /* MSCI interrupts. */
1374         SRC_PUT8(hc->sca_base, sca->ier1, 0x00);        /* DMAC interrupts */
1375         SRC_PUT8(hc->sca_base, sca->ier2, 0x00);        /* TIMER interrupts. */
1376         SRC_PUT8(hc->sca_base, sca->itcr, 0x00);        /* Use ivr and no intr
1377                                                          * ack */
1378         SRC_PUT8(hc->sca_base, sca->ivr, 0x40); /* Interrupt vector. */
1379         SRC_PUT8(hc->sca_base, sca->imvr, 0x40);
1380
1381         /*
1382          * Configure the timers. XXX Later
1383          */
1384
1385         /*
1386          * Set the DMA channel priority to rotate between all four channels.
1387          *
1388          * Enable all dma channels.
1389          */
1390         SRC_PUT8(hc->sca_base, sca->pcr, SCA_PCR_PR2);
1391         SRC_PUT8(hc->sca_base, sca->dmer, SCA_DMER_EN);
1392 }
1393
1394 /*
1395  * Configure the msci
1396  *
1397  * NOTE: The serial port configuration is hardcoded at the moment.
1398  */
1399 static void
1400 sr_init_msci(struct sr_softc *sc)
1401 {
1402         int portndx;            /* on-board port number */
1403         u_int mcr_v;            /* contents of modem control */
1404         u_int *fecrp;           /* pointer for PCI's MCR i/o */
1405         struct sr_hardc *hc = sc->hc;
1406         msci_channel *msci = &hc->sca->msci[sc->scachan];
1407 #ifdef N2_TEST_SPEED
1408         int br_v;               /* contents for BR divisor */
1409         int etcndx;             /* index into ETC table */
1410         int fifo_v, gotspeed;   /* final tabled speed found */
1411         int tmc_v;              /* timer control register */
1412         int wanted;             /* speed (bitrate) wanted... */
1413         struct rate_line *rtp;
1414 #endif
1415
1416         portndx = sc->scachan;
1417
1418 #if BUGGY > 0
1419         printf("sr: sr_init_msci( sc=%08x)\n", sc);
1420 #endif
1421
1422         SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_RESET);
1423         SRC_PUT8(hc->sca_base, msci->md0, SCA_MD0_CRC_1 |
1424                  SCA_MD0_CRC_CCITT |
1425                  SCA_MD0_CRC_ENABLE |
1426                  SCA_MD0_MODE_HDLC);
1427         SRC_PUT8(hc->sca_base, msci->md1, SCA_MD1_NOADDRCHK);
1428         SRC_PUT8(hc->sca_base, msci->md2, SCA_MD2_DUPLEX | SCA_MD2_NRZ);
1429
1430         /*
1431          * According to the manual I should give a reset after changing the
1432          * mode registers.
1433          */
1434         SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_RXRESET);
1435         SRC_PUT8(hc->sca_base, msci->ctl, SCA_CTL_IDLPAT |
1436                  SCA_CTL_UDRNC |
1437                  SCA_CTL_RTS);
1438
1439         /*
1440          * XXX Later we will have to support different clock settings.
1441          */
1442         switch (sc->clk_cfg) {
1443         default:
1444 #if BUGGY > 0
1445                 printf("sr%: clk_cfg=%08x, selected default clock.\n",
1446                        portndx, sc->clk_cfg);
1447 #endif
1448                 /* FALLTHROUGH */
1449         case SR_FLAGS_EXT_CLK:
1450                 /*
1451                  * For now all interfaces are programmed to use the RX clock
1452                  * for the TX clock.
1453                  */
1454
1455 #if BUGGY > 0
1456                 printf("sr%d: External Clock Selected.\n", portndx);
1457 #endif
1458
1459                 SRC_PUT8(hc->sca_base, msci->rxs,
1460                          SCA_RXS_CLK_RXC0 | SCA_RXS_DIV1);
1461                 SRC_PUT8(hc->sca_base, msci->txs,
1462                          SCA_TXS_CLK_RX | SCA_TXS_DIV1);
1463                 break;
1464
1465         case SR_FLAGS_EXT_SEP_CLK:
1466 #if BUGGY > 0
1467                 printf("sr%d: Split Clocking Selected.\n", portndx);
1468 #endif
1469
1470                 SRC_PUT8(hc->sca_base, msci->rxs,
1471                          SCA_RXS_CLK_RXC0 | SCA_RXS_DIV1);
1472                 SRC_PUT8(hc->sca_base, msci->txs,
1473                          SCA_TXS_CLK_TXC | SCA_TXS_DIV1);
1474                 break;
1475
1476         case SR_FLAGS_INT_CLK:
1477 #if BUGGY > 0
1478                 printf("sr%d: Internal Clocking selected.\n", portndx);
1479 #endif
1480
1481                 /*
1482                  * XXX I do need some code to set the baud rate here!
1483                  */
1484 #ifdef N2_TEST_SPEED
1485                 switch (hc->cardtype) {
1486                 case SR_CRD_N2PCI:
1487                         fecrp = (u_int *)(hc->sca_base + SR_FECR);
1488                         mcr_v = *fecrp;
1489                         etcndx = 2;
1490                         break;
1491                 case SR_CRD_N2:
1492                 default:
1493                         mcr_v = inb(hc->iobase + SR_MCR);
1494                         etcndx = 0;
1495                 }
1496
1497                 fifo_v = 0x10;  /* stolen from Linux version */
1498
1499                 /*
1500                  * search for appropriate speed in table, don't calc it:
1501                  */
1502                 wanted = sr_test_speed[portndx];
1503                 rtp = &n2_rates[0];     /* point to first table item */
1504
1505                 while ((rtp->target > 0)        /* search table for speed */
1506                        &&(rtp->target != wanted))
1507                         rtp++;
1508
1509                 /*
1510                  * We've searched the table for a matching speed.  If we've
1511                  * found the correct rate line, we'll get the pre-calc'd
1512                  * values for the TMC and baud rate divisor for subsequent
1513                  * use...
1514                  */
1515                 if (rtp->target > 0) {  /* use table-provided values */
1516                         gotspeed = wanted;
1517                         tmc_v = rtp->tmc_reg;
1518                         br_v = rtp->br_reg;
1519                 } else {        /* otherwise assume 1MBit comm rate */
1520                         gotspeed = 10000;
1521                         tmc_v = 5;
1522                         br_v = 1;
1523                 }
1524
1525                 /*
1526                  * Now we mask in the enable clock output for the MCR:
1527                  */
1528                 mcr_v |= etc0vals[etcndx + portndx];
1529
1530                 /*
1531                  * Now we'll program the registers with these speed- related
1532                  * contents...
1533                  */
1534                 SRC_PUT8(hc->sca_base, msci->tmc, tmc_v);
1535                 SRC_PUT8(hc->sca_base, msci->trc0, fifo_v);
1536                 SRC_PUT8(hc->sca_base, msci->rxs, SCA_RXS_CLK_INT + br_v);
1537                 SRC_PUT8(hc->sca_base, msci->txs, SCA_TXS_CLK_INT + br_v);
1538
1539                 switch (hc->cardtype) {
1540                 case SR_CRD_N2PCI:
1541                         *fecrp = mcr_v;
1542                         break;
1543                 case SR_CRD_N2:
1544                 default:
1545                         outb(hc->iobase + SR_MCR, mcr_v);
1546                 }
1547
1548 #if BUGGY > 0
1549                 if (wanted != gotspeed)
1550                         printf("sr%d: Speed wanted=%d, found=%d\n",
1551                                wanted, gotspeed);
1552
1553                 printf("sr%d: Internal Clock %dx100 BPS, tmc=%d, div=%d\n",
1554                        portndx, gotspeed, tmc_v, br_v);
1555 #endif
1556 #else
1557                 SRC_PUT8(hc->sca_base, msci->rxs,
1558                          SCA_RXS_CLK_INT | SCA_RXS_DIV1);
1559                 SRC_PUT8(hc->sca_base, msci->txs,
1560                          SCA_TXS_CLK_INT | SCA_TXS_DIV1);
1561
1562                 SRC_PUT8(hc->sca_base, msci->tmc, 5);
1563
1564                 if (portndx == 0)
1565                         switch (hc->cardtype) {
1566                         case SR_CRD_N2PCI:
1567                                 fecrp = (u_int *)(hc->sca_base + SR_FECR);
1568                                 *fecrp |= SR_FECR_ETC0;
1569                                 break;
1570                         case SR_CRD_N2:
1571                         default:
1572                                 mcr_v = inb(hc->iobase + SR_MCR);
1573                                 mcr_v |= SR_MCR_ETC0;
1574                                 outb(hc->iobase + SR_MCR, mcr_v);
1575                         }
1576                 else
1577                         switch (hc->cardtype) {
1578                         case SR_CRD_N2:
1579                                 mcr_v = inb(hc->iobase + SR_MCR);
1580                                 mcr_v |= SR_MCR_ETC1;
1581                                 outb(hc->iobase + SR_MCR, mcr_v);
1582                                 break;
1583                         case SR_CRD_N2PCI:
1584                                 fecrp = (u_int *)(hc->sca_base + SR_FECR);
1585                                 *fecrp |= SR_FECR_ETC1;
1586                                 break;
1587                         }
1588 #endif
1589         }
1590
1591         /*
1592          * XXX Disable all interrupts for now. I think if you are using the
1593          * dmac you don't use these interrupts.
1594          */
1595         SRC_PUT8(hc->sca_base, msci->ie0, 0);
1596         SRC_PUT8(hc->sca_base, msci->ie1, 0x0C);
1597         SRC_PUT8(hc->sca_base, msci->ie2, 0);
1598         SRC_PUT8(hc->sca_base, msci->fie, 0);
1599
1600         SRC_PUT8(hc->sca_base, msci->sa0, 0);
1601         SRC_PUT8(hc->sca_base, msci->sa1, 0);
1602
1603         SRC_PUT8(hc->sca_base, msci->idl, 0x7E);        /* set flags value */
1604
1605         SRC_PUT8(hc->sca_base, msci->rrc, 0x0E);
1606         SRC_PUT8(hc->sca_base, msci->trc0, 0x10);
1607         SRC_PUT8(hc->sca_base, msci->trc1, 0x1F);
1608 }
1609
1610 /*
1611  * Configure the rx dma controller.
1612  */
1613 static void
1614 sr_init_rx_dmac(struct sr_softc *sc)
1615 {
1616         struct sr_hardc *hc;
1617         dmac_channel *dmac;
1618         sca_descriptor *rxd;
1619         u_int cda_v, sarb_v, rxbuf, rxda, rxda_d;
1620
1621 #if BUGGY > 0
1622         printf("sr_init_rx_dmac(sc=%08x)\n", sc);
1623 #endif
1624
1625         hc = sc->hc;
1626         dmac = &hc->sca->dmac[DMAC_RXCH(sc->scachan)];
1627
1628         if (hc->mempages)
1629                 SRC_SET_MEM(hc->iobase, sc->rxdesc);
1630
1631         /*
1632          * This phase initializes the contents of the descriptor table
1633          * needed to construct a circular buffer...
1634          */
1635         rxd = (sca_descriptor *)(hc->mem_start + (sc->rxdesc & hc->winmsk));
1636         rxda_d = (u_int) hc->mem_start - (sc->rxdesc & ~hc->winmsk);
1637
1638         for (rxbuf = sc->rxstart;
1639              rxbuf < sc->rxend;
1640              rxbuf += SR_BUF_SIZ, rxd++) {
1641                 /*
1642                  * construct the circular chain...
1643                  */
1644                 rxda = (u_int) & rxd[1] - rxda_d + hc->mem_pstart;
1645                 rxd->cp = (u_short)(rxda & 0xffff);
1646
1647                 /*
1648                  * set the on-card buffer address...
1649                  */
1650                 rxd->bp = (u_short)((rxbuf + hc->mem_pstart) & 0xffff);
1651                 rxd->bpb = (u_char)(((rxbuf + hc->mem_pstart) >> 16) & 0xff);
1652
1653                 rxd->len = 0;   /* bytes resident w/in granule */
1654                 rxd->stat = 0xff;       /* The sca write here when finished */
1655         }
1656
1657         /*
1658          * heal the chain so that the last entry points to the first...
1659          */
1660         rxd--;
1661         rxd->cp = (u_short)((sc->rxdesc + hc->mem_pstart) & 0xffff);
1662
1663         /*
1664          * reset the reception handler's index...
1665          */
1666         sc->rxhind = 0;
1667
1668         /*
1669          * We'll now configure the receiver's DMA logic...
1670          */
1671         SRC_PUT8(hc->sca_base, dmac->dsr, 0);   /* Disable DMA transfer */
1672         SRC_PUT8(hc->sca_base, dmac->dcr, SCA_DCR_ABRT);
1673
1674         /* XXX maybe also SCA_DMR_CNTE */
1675         SRC_PUT8(hc->sca_base, dmac->dmr, SCA_DMR_TMOD | SCA_DMR_NF);
1676         SRC_PUT16(hc->sca_base, dmac->bfl, SR_BUF_SIZ);
1677
1678         cda_v = (u_short)((sc->rxdesc + hc->mem_pstart) & 0xffff);
1679         sarb_v = (u_char)(((sc->rxdesc + hc->mem_pstart) >> 16) & 0xff);
1680
1681         SRC_PUT16(hc->sca_base, dmac->cda, cda_v);
1682         SRC_PUT8(hc->sca_base, dmac->sarb, sarb_v);
1683
1684         rxd = (sca_descriptor *)sc->rxstart;
1685
1686         SRC_PUT16(hc->sca_base, dmac->eda,
1687                   (u_short)((u_int) & rxd[sc->rxmax - 1] & 0xffff));
1688
1689         SRC_PUT8(hc->sca_base, dmac->dir, 0xF0);
1690
1691
1692         SRC_PUT8(hc->sca_base, dmac->dsr, SCA_DSR_DE);  /* Enable DMA */
1693 }
1694
1695 /*
1696  * Configure the TX DMA descriptors.
1697  * Initialize the needed values and chain the descriptors.
1698  */
1699 static void
1700 sr_init_tx_dmac(struct sr_softc *sc)
1701 {
1702         int blk;
1703         u_int txbuf, txda, txda_d;
1704         struct sr_hardc *hc;
1705         sca_descriptor *txd;
1706         dmac_channel *dmac;
1707         struct buf_block *blkp;
1708         u_int x;
1709         u_int sarb_v;
1710
1711 #if BUGGY > 0
1712         printf("sr_init_tx_dmac(sc=%08x)\n", sc);
1713 #endif
1714
1715         hc = sc->hc;
1716         dmac = &hc->sca->dmac[DMAC_TXCH(sc->scachan)];
1717
1718         if (hc->mempages)
1719                 SRC_SET_MEM(hc->iobase, sc->block[0].txdesc);
1720
1721         /*
1722          * Initialize the array of descriptors for transmission
1723          */
1724         for (blk = 0; blk < SR_TX_BLOCKS; blk++) {
1725                 blkp = &sc->block[blk];
1726                 txd = (sca_descriptor *)(hc->mem_start
1727                                          + (blkp->txdesc & hc->winmsk));
1728                 txda_d = (u_int) hc->mem_start
1729                     - (blkp->txdesc & ~hc->winmsk);
1730
1731                 x = 0;
1732                 txbuf = blkp->txstart;
1733                 for (; txbuf < blkp->txend; txbuf += SR_BUF_SIZ, txd++) {
1734                         txda = (u_int) & txd[1] - txda_d + hc->mem_pstart;
1735                         txd->cp = (u_short)(txda & 0xffff);
1736
1737                         txd->bp = (u_short)((txbuf + hc->mem_pstart)
1738                                             & 0xffff);
1739                         txd->bpb = (u_char)(((txbuf + hc->mem_pstart) >> 16)
1740                                             & 0xff);
1741                         txd->len = 0;
1742                         txd->stat = 0;
1743                         x++;
1744                 }
1745
1746                 txd--;
1747                 txd->cp = (u_short)((blkp->txdesc + hc->mem_pstart)
1748                                     & 0xffff);
1749
1750                 blkp->txtail = (u_int)txd - (u_int)hc->mem_start;
1751         }
1752
1753         SRC_PUT8(hc->sca_base, dmac->dsr, 0);   /* Disable DMA */
1754         SRC_PUT8(hc->sca_base, dmac->dcr, SCA_DCR_ABRT);
1755         SRC_PUT8(hc->sca_base, dmac->dmr, SCA_DMR_TMOD | SCA_DMR_NF);
1756         SRC_PUT8(hc->sca_base, dmac->dir,
1757                  SCA_DIR_EOT | SCA_DIR_BOF | SCA_DIR_COF);
1758
1759         sarb_v = (sc->block[0].txdesc + hc->mem_pstart) >> 16;
1760         sarb_v &= 0x00ff;
1761
1762         SRC_PUT8(hc->sca_base, dmac->sarb, (u_char) sarb_v);
1763 }
1764
1765 /*
1766  * Look through the descriptors to see if there is a complete packet
1767  * available. Stop if we get to where the sca is busy.
1768  *
1769  * Return the length and status of the packet.
1770  * Return nonzero if there is a packet available.
1771  *
1772  * NOTE:
1773  * It seems that we get the interrupt a bit early. The updateing of
1774  * descriptor values is not always completed when this is called.
1775  */
1776 static int
1777 sr_packet_avail(struct sr_softc *sc, int *len, u_char *rxstat)
1778 {
1779         int granules;   /* count of granules in pkt */
1780         int wki, wko;
1781         struct sr_hardc *hc;
1782         sca_descriptor *rxdesc; /* current descriptor */
1783         sca_descriptor *endp;   /* ending descriptor */
1784         sca_descriptor *cda;    /* starting descriptor */
1785
1786         hc = sc->hc;            /* get card's information */
1787
1788         /*
1789          * set up starting descriptor by pulling that info from the DMA half
1790          * of the HD chip...
1791          */
1792         wki = DMAC_RXCH(sc->scachan);
1793         wko = SRC_GET16(hc->sca_base, hc->sca->dmac[wki].cda);
1794
1795         cda = (sca_descriptor *)(hc->mem_start + (wko & hc->winmsk));
1796
1797 #if BUGGY > 1
1798         printf("sr_packet_avail(): wki=%d, wko=%04x, cda=%08x\n",
1799                wki, wko, cda);
1800 #endif
1801
1802         /*
1803          * open the appropriate memory window and set our expectations...
1804          */
1805         if (hc->mempages) {
1806                 SRC_SET_MEM(hc->iobase, sc->rxdesc);
1807                 SRC_SET_ON(hc->iobase);
1808         }
1809         rxdesc = (sca_descriptor *)
1810             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1811         endp = rxdesc;
1812         rxdesc = &rxdesc[sc->rxhind];
1813         endp = &endp[sc->rxmax];
1814
1815         *len = 0;               /* reset result total length */
1816         granules = 0;           /* reset count of granules */
1817
1818         /*
1819          * This loop will scan descriptors, but it *will* puke up if we wrap
1820          * around to our starting point...
1821          */
1822         while (rxdesc != cda) {
1823                 *len += rxdesc->len;    /* increment result length */
1824                 granules++;
1825
1826                 /*
1827                  * If we hit a valid packet's completion we'll know we've
1828                  * got a live one, and that we can deliver the packet.
1829                  * Since we're only allowed to report a packet available,
1830                  * somebody else does that...
1831                  */
1832                 if (rxdesc->stat & SCA_DESC_EOM) {      /* End Of Message */
1833                         *rxstat = rxdesc->stat; /* return closing */
1834 #if BUGGY > 0
1835                         printf("sr%d: PKT AVAIL len %d, %x, bufs %u.\n",
1836                                sc->unit, *len, *rxstat, granules);
1837 #endif
1838                         return 1;       /* indicate success */
1839                 }
1840                 /*
1841                  * OK, this packet take up multiple granules.  Move on to
1842                  * the next descriptor so we can consider it...
1843                  */
1844                 rxdesc++;
1845
1846                 if (rxdesc == endp)     /* recognize & act on wrap point */
1847                         rxdesc = (sca_descriptor *)
1848                             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1849         }
1850
1851         /*
1852          * Nothing found in the DPRAM.  Let the caller know...
1853          */
1854         *len = 0;
1855         *rxstat = 0;
1856
1857         return 0;
1858 }
1859
1860 /*
1861  * Copy a packet from the on card memory into a provided mbuf.
1862  * Take into account that buffers wrap and that a packet may
1863  * be larger than a buffer.
1864  */
1865 static void
1866 sr_copy_rxbuf(struct mbuf *m, struct sr_softc *sc, int len)
1867 {
1868         struct sr_hardc *hc;
1869         sca_descriptor *rxdesc;
1870         u_int rxdata;
1871         u_int rxmax;
1872         u_int off = 0;
1873         u_int tlen;
1874
1875 #if BUGGY > 0
1876         printf("sr_copy_rxbuf(m=%08x,sc=%08x,len=%d)\n",
1877                m, sc, len);
1878 #endif
1879
1880         hc = sc->hc;
1881
1882         rxdata = sc->rxstart + (sc->rxhind * SR_BUF_SIZ);
1883         rxmax = sc->rxstart + (sc->rxmax * SR_BUF_SIZ);
1884
1885         rxdesc = (sca_descriptor *)
1886             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1887         rxdesc = &rxdesc[sc->rxhind];
1888
1889         /*
1890          * Using the count of bytes in the received packet, we decrement it
1891          * for each granule (controller by an SCA descriptor) to control the
1892          * looping...
1893          */
1894         while (len) {
1895                 /*
1896                  * tlen gets the length of *this* granule... ...which is
1897                  * then copied to the target buffer.
1898                  */
1899                 tlen = (len < SR_BUF_SIZ) ? len : SR_BUF_SIZ;
1900
1901                 if (hc->mempages)
1902                         SRC_SET_MEM(hc->iobase, rxdata);
1903
1904                 bcopy(hc->mem_start + (rxdata & hc->winmsk),
1905                       mtod(m, caddr_t) +off,
1906                       tlen);
1907
1908                 off += tlen;
1909                 len -= tlen;
1910
1911                 /*
1912                  * now, return to the descriptor's window in DPRAM and reset
1913                  * the descriptor we've just suctioned...
1914                  */
1915                 if (hc->mempages)
1916                         SRC_SET_MEM(hc->iobase, sc->rxdesc);
1917
1918                 rxdesc->len = 0;
1919                 rxdesc->stat = 0xff;
1920
1921                 /*
1922                  * Move on to the next granule.  If we've any remaining
1923                  * bytes to process we'll just continue in our loop...
1924                  */
1925                 rxdata += SR_BUF_SIZ;
1926                 rxdesc++;
1927
1928                 if (rxdata == rxmax) {  /* handle the wrap point */
1929                         rxdata = sc->rxstart;
1930                         rxdesc = (sca_descriptor *)
1931                             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1932                 }
1933         }
1934 }
1935
1936 /*
1937  * If single is set, just eat a packet. Otherwise eat everything up to
1938  * where cda points. Update pointers to point to the next packet.
1939  *
1940  * This handles "flushing" of a packet as received...
1941  *
1942  * If the "single" parameter is zero, all pending reeceive traffic will
1943  * be flushed out of existence.  A non-zero value will only drop the
1944  * *next* (currently) pending packet...
1945  */
1946 static void
1947 sr_eat_packet(struct sr_softc *sc, int single)
1948 {
1949         struct sr_hardc *hc;
1950         sca_descriptor *rxdesc; /* current descriptor being eval'd */
1951         sca_descriptor *endp;   /* last descriptor in chain */
1952         sca_descriptor *cda;    /* current start point */
1953         u_int loopcnt = 0;      /* count of packets flushed ??? */
1954         u_char stat;            /* captured status byte from descr */
1955
1956         hc = sc->hc;
1957         cda = (sca_descriptor *)(hc->mem_start +
1958                                  (SRC_GET16(hc->sca_base,
1959                                   hc->sca->dmac[DMAC_RXCH(sc->scachan)].cda) &
1960                                   hc->winmsk));
1961
1962         /*
1963          * loop until desc->stat == (0xff || EOM) Clear the status and
1964          * length in the descriptor. Increment the descriptor.
1965          */
1966         if (hc->mempages)
1967                 SRC_SET_MEM(hc->iobase, sc->rxdesc);
1968
1969         rxdesc = (sca_descriptor *)
1970             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1971         endp = rxdesc;
1972         rxdesc = &rxdesc[sc->rxhind];
1973         endp = &endp[sc->rxmax];
1974
1975         /*
1976          * allow loop, but abort it if we wrap completely...
1977          */
1978         while (rxdesc != cda) {
1979                 loopcnt++;
1980
1981                 if (loopcnt > sc->rxmax) {
1982                         printf("sr%d: eat pkt %d loop, cda %x, "
1983                                "rxdesc %x, stat %x.\n",
1984                                sc->unit, loopcnt, (u_int) cda, (u_int) rxdesc,
1985                                rxdesc->stat);
1986                         break;
1987                 }
1988                 stat = rxdesc->stat;
1989
1990                 rxdesc->len = 0;
1991                 rxdesc->stat = 0xff;
1992
1993                 rxdesc++;
1994                 sc->rxhind++;
1995
1996                 if (rxdesc == endp) {
1997                         rxdesc = (sca_descriptor *)
1998                             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1999                         sc->rxhind = 0;
2000                 }
2001                 if (single && (stat == SCA_DESC_EOM))
2002                         break;
2003         }
2004
2005         /*
2006          * Update the eda to the previous descriptor.
2007          */
2008         rxdesc = (sca_descriptor *)sc->rxdesc;
2009         rxdesc = &rxdesc[(sc->rxhind + sc->rxmax - 2) % sc->rxmax];
2010
2011         SRC_PUT16(hc->sca_base,
2012                   hc->sca->dmac[DMAC_RXCH(sc->scachan)].eda,
2013                   (u_short)((u_int)(rxdesc + hc->mem_pstart) & 0xffff));
2014 }
2015
2016 /*
2017  * While there is packets available in the rx buffer, read them out
2018  * into mbufs and ship them off.
2019  */
2020 static void
2021 sr_get_packets(struct sr_softc *sc)
2022 {
2023         u_char rxstat;          /* acquired status byte */
2024         int i;
2025         int pkts;               /* count of packets found */
2026         int rxndx;              /* rcv buffer index */
2027         int tries;              /* settling time counter */
2028         u_int len;              /* length of pending packet */
2029         struct sr_hardc *hc;    /* card-level information */
2030         sca_descriptor *rxdesc; /* descriptor in memory */
2031 #ifndef NETGRAPH
2032         struct ifnet *ifp;      /* network intf ctl table */
2033 #endif /* NETGRAPH */
2034         struct mbuf *m = NULL;  /* message buffer */
2035
2036 #if BUGGY > 0
2037         printf("sr_get_packets(sc=%08x)\n", sc);
2038 #endif
2039
2040         hc = sc->hc;
2041 #ifndef NETGRAPH
2042         ifp = &sc->ifsppp.pp_if;
2043 #endif /* NETGRAPH */
2044
2045         if (hc->mempages) {
2046                 SRC_SET_MEM(hc->iobase, sc->rxdesc);
2047                 SRC_SET_ON(hc->iobase); /* enable shared memory */
2048         }
2049         pkts = 0;               /* reset count of found packets */
2050
2051         /*
2052          * for each complete packet in the receiving pool, process each
2053          * packet...
2054          */
2055         while (sr_packet_avail(sc, &len, &rxstat)) {    /* packet pending? */
2056                 /*
2057                  * I have seen situations where we got the interrupt but the
2058                  * status value wasn't deposited.  This code should allow
2059                  * the status byte's value to settle...
2060                  */
2061
2062                 tries = 5;
2063
2064                 while ((rxstat == 0x00ff)
2065                        && --tries)
2066                         sr_packet_avail(sc, &len, &rxstat);
2067
2068 #if BUGGY > 1
2069                 printf("sr_packet_avail() returned len=%d, rxstat=%02ux\n",
2070                        len, rxstat);
2071 #endif
2072
2073                 pkts++;
2074 #ifdef NETGRAPH
2075                 sc->inbytes += len;
2076                 sc->inlast = 0;
2077 #endif /* NETGRAPH */
2078
2079                 /*
2080                  * OK, we've settled the incoming message status. We can now
2081                  * process it...
2082                  */
2083                 if (((rxstat & SCA_DESC_ERRORS) == 0) && (len < MCLBYTES)) {
2084 #if BUGGY > 1
2085                         printf("sr%d: sr_get_packet() rxstat=%02x, len=%d\n",
2086                                sc->unit, rxstat, len);
2087 #endif
2088
2089                         MGETHDR(m, MB_DONTWAIT, MT_DATA);
2090                         if (m == NULL) {
2091                                 /*
2092                                  * eat (flush) packet if get mbuf fail!!
2093                                  */
2094                                 sr_eat_packet(sc, 1);
2095                                 continue;
2096                         }
2097                         /*
2098                          * construct control information for pass-off
2099                          */
2100 #ifndef NETGRAPH
2101                         m->m_pkthdr.rcvif = ifp;
2102 #else
2103                         m->m_pkthdr.rcvif = NULL;
2104 #endif /* NETGRAPH */
2105                         m->m_pkthdr.len = m->m_len = len;
2106                         if (len > MHLEN) {
2107                                 MCLGET(m, MB_DONTWAIT);
2108                                 if ((m->m_flags & M_EXT) == 0) {
2109                                         /*
2110                                          * We couldn't get a big enough
2111                                          * message packet, so we'll send the
2112                                          * packet to /dev/null...
2113                                          */
2114                                         m_freem(m);
2115                                         sr_eat_packet(sc, 1);
2116                                         continue;
2117                                 }
2118                         }
2119                         /*
2120                          * OK, we've got a good message buffer.  Now we can
2121                          * copy the received message into it
2122                          */
2123                         sr_copy_rxbuf(m, sc, len);      /* copy from DPRAM */
2124
2125 #ifndef NETGRAPH
2126                         BPF_MTAP(ifp, m);
2127
2128 #if BUGGY > 3
2129                         {
2130                                 u_char *bp;
2131
2132                                 bp = (u_char *)m;
2133                                 printf("sr%d: rcvd=%02x%02x%02x%02x%02x%02x\n",
2134                                        sc->unit,
2135                                        bp[0], bp[1], bp[2],
2136                                        bp[4], bp[5], bp[6]);
2137                         }
2138 #endif
2139                         sppp_input(ifp, m);
2140                         ifp->if_ipackets++;
2141
2142 #else   /* NETGRAPH */
2143 #if BUGGY > 3
2144                         {
2145                                 u_char *bp;
2146
2147                                 bp = mtod(m,u_char *);
2148                                 printf("sr%d: rd=%02x:%02x:%02x:%02x:%02x:%02x",
2149                                        sc->unit,
2150                                        bp[0], bp[1], bp[2],
2151                                        bp[4], bp[5], bp[6]);
2152                                 printf(":%02x:%02x:%02x:%02x:%02x:%02x\n",
2153                                        bp[6], bp[7], bp[8],
2154                                        bp[9], bp[10], bp[11]);
2155                         }
2156 #endif
2157                         ng_queue_data(sc->hook, m, NULL);
2158                         sc->ipackets++;
2159 #endif /* NETGRAPH */
2160                         /*
2161                          * Update the eda to the previous descriptor.
2162                          */
2163                         i = (len + SR_BUF_SIZ - 1) / SR_BUF_SIZ;
2164                         sc->rxhind = (sc->rxhind + i) % sc->rxmax;
2165
2166                         rxdesc = (sca_descriptor *)sc->rxdesc;
2167                         rxndx = (sc->rxhind + sc->rxmax - 2) % sc->rxmax;
2168                         rxdesc = &rxdesc[rxndx];
2169
2170                         SRC_PUT16(hc->sca_base,
2171                                   hc->sca->dmac[DMAC_RXCH(sc->scachan)].eda,
2172                                   (u_short)((u_int)(rxdesc + hc->mem_pstart)
2173                                              & 0xffff));
2174
2175                 } else {
2176                         int got_st3, got_cda, got_eda;
2177                         int tries = 5;
2178
2179                         while ((rxstat == 0xff) && --tries)
2180                                 sr_packet_avail(sc, &len, &rxstat);
2181
2182                         /*
2183                          * It look like we get an interrupt early
2184                          * sometimes and then the status is not
2185                          * filled in yet.
2186                          */
2187                         if (tries && (tries != 5))
2188                                 continue;
2189
2190                         /*
2191                          * This chunk of code handles the error packets.
2192                          * We'll log them for posterity...
2193                          */
2194                         sr_eat_packet(sc, 1);
2195
2196 #ifndef NETGRAPH
2197                         ifp->if_ierrors++;
2198 #else
2199                         sc->ierrors[0]++;
2200 #endif /* NETGRAPH */
2201
2202                         got_st3 = SRC_GET8(hc->sca_base,
2203                                   hc->sca->msci[sc->scachan].st3);
2204                         got_cda = SRC_GET16(hc->sca_base,
2205                                   hc->sca->dmac[DMAC_RXCH(sc->scachan)].cda);
2206                         got_eda = SRC_GET16(hc->sca_base,
2207                                   hc->sca->dmac[DMAC_RXCH(sc->scachan)].eda);
2208
2209 #if BUGGY > 0
2210                         printf("sr%d: Receive error chan %d, "
2211                                "stat %02x, msci st3 %02x,"
2212                                "rxhind %d, cda %04x, eda %04x.\n",
2213                                sc->unit, sc->scachan, rxstat,
2214                                got_st3, sc->rxhind, got_cda, got_eda);
2215 #endif
2216                 }
2217         }
2218
2219 #if BUGGY > 0
2220         printf("sr%d: sr_get_packets() found %d packet(s)\n",
2221                sc->unit, pkts);
2222 #endif
2223
2224         if (hc->mempages)
2225                 SRC_SET_OFF(hc->iobase);
2226 }
2227
2228 /*
2229  * All DMA interrupts come here.
2230  *
2231  * Each channel has two interrupts.
2232  * Interrupt A for errors and Interrupt B for normal stuff like end
2233  * of transmit or receive dmas.
2234  */
2235 static void
2236 sr_dmac_intr(struct sr_hardc *hc, u_char isr1)
2237 {
2238         u_char dsr;             /* contents of DMA Stat Reg */
2239         u_char dotxstart;       /* enables for tranmit part */
2240         int mch;                /* channel being processed */
2241         struct sr_softc *sc;    /* channel's softc structure */
2242         sca_regs *sca = hc->sca;
2243         dmac_channel *dmac;     /* dma structure of chip */
2244
2245 #if BUGGY > 0
2246         printf("sr_dmac_intr(hc=%08x,isr1=%04x)\n", hc, isr1);
2247 #endif
2248
2249         mch = 0;                /* assume chan0 on card */
2250         dotxstart = isr1;       /* copy for xmitter starts */
2251
2252         /*
2253          * Shortcut if there is no interrupts for dma channel 0 or 1.
2254          * Skip processing for channel 0 if no incoming hit
2255          */
2256         if ((isr1 & 0x0F) == 0) {
2257                 mch = 1;
2258                 isr1 >>= 4;
2259         }
2260         do {
2261                 sc = &hc->sc[mch];
2262
2263                 /*
2264                  * Transmit channel - DMA Status Register Evaluation
2265                  */
2266                 if (isr1 & 0x0C) {
2267                         dmac = &sca->dmac[DMAC_TXCH(mch)];
2268
2269                         /*
2270                          * get the DMA Status Register contents and write
2271                          * back to reset interrupt...
2272                          */
2273                         dsr = SRC_GET8(hc->sca_base, dmac->dsr);
2274                         SRC_PUT8(hc->sca_base, dmac->dsr, dsr);
2275
2276                         /*
2277                          * Check for (& process) a Counter overflow
2278                          */
2279                         if (dsr & SCA_DSR_COF) {
2280                                 printf("sr%d: TX DMA Counter overflow, "
2281                                        "txpacket no %lu.\n",
2282 #ifndef NETGRAPH
2283                                        sc->unit, sc->ifsppp.pp_if.if_opackets);
2284                                 sc->ifsppp.pp_if.if_oerrors++;
2285 #else
2286                                        sc->unit, sc->opackets);
2287                                 sc->oerrors++;
2288 #endif /* NETGRAPH */
2289                         }
2290                         /*
2291                          * Check for (& process) a Buffer overflow
2292                          */
2293                         if (dsr & SCA_DSR_BOF) {
2294                                 printf("sr%d: TX DMA Buffer overflow, "
2295                                        "txpacket no %lu, dsr %02x, "
2296                                        "cda %04x, eda %04x.\n",
2297 #ifndef NETGRAPH
2298                                        sc->unit, sc->ifsppp.pp_if.if_opackets,
2299 #else
2300                                        sc->unit, sc->opackets,
2301 #endif /* NETGRAPH */
2302                                        dsr,
2303                                        SRC_GET16(hc->sca_base, dmac->cda),
2304                                        SRC_GET16(hc->sca_base, dmac->eda));
2305 #ifndef NETGRAPH
2306                                 sc->ifsppp.pp_if.if_oerrors++;
2307 #else
2308                                 sc->oerrors++;
2309 #endif /* NETGRAPH */
2310                         }
2311                         /*
2312                          * Check for (& process) an End of Transfer (OK)
2313                          */
2314                         if (dsr & SCA_DSR_EOT) {
2315                                 /*
2316                                  * This should be the most common case.
2317                                  *
2318                                  * Clear the IFF_OACTIVE flag.
2319                                  *
2320                                  * Call srstart to start a new transmit if
2321                                  * there is data to transmit.
2322                                  */
2323 #if BUGGY > 0
2324                                 printf("sr%d: TX Completed OK\n", sc->unit);
2325 #endif
2326                                 sc->xmit_busy = 0;
2327 #ifndef NETGRAPH
2328                                 sc->ifsppp.pp_if.if_flags &= ~IFF_OACTIVE;
2329                                 sc->ifsppp.pp_if.if_timer = 0;
2330 #else
2331                                 /* XXX may need to mark tx inactive? */
2332                                 sc->out_deficit++;
2333                                 sc->out_dog = DOG_HOLDOFF;
2334 #endif /* NETGRAPH */
2335
2336                                 if (sc->txb_inuse && --sc->txb_inuse)
2337                                         sr_xmit(sc);
2338                         }
2339                 }
2340                 /*
2341                  * Receive channel processing of DMA Status Register
2342                  */
2343                 if (isr1 & 0x03) {
2344                         dmac = &sca->dmac[DMAC_RXCH(mch)];
2345
2346                         dsr = SRC_GET8(hc->sca_base, dmac->dsr);
2347                         SRC_PUT8(hc->sca_base, dmac->dsr, dsr);
2348
2349                         /*
2350                          * End of frame processing (MSG OK?)
2351                          */
2352                         if (dsr & SCA_DSR_EOM) {
2353 #if BUGGY > 0
2354                                 int tt, ind;
2355
2356 #ifndef NETGRAPH
2357                                 tt = sc->ifsppp.pp_if.if_ipackets;
2358 #else   /* NETGRAPH */
2359                                 tt = sc->ipackets;
2360 #endif /* NETGRAPH */
2361                                 ind = sc->rxhind;
2362 #endif
2363
2364                                 sr_get_packets(sc);
2365 #if BUGGY > 0
2366 #ifndef NETGRAPH
2367                                 if (tt == sc->ifsppp.pp_if.if_ipackets)
2368 #else   /* NETGRAPH */
2369                                 if (tt == sc->ipackets)
2370 #endif /* NETGRAPH */
2371                                 {
2372                                         sca_descriptor *rxdesc;
2373                                         int i;
2374
2375                                         printf("SR: RXINTR isr1 %x, dsr %x, "
2376                                                "no data %d pkts, orxind %d.\n",
2377                                                dotxstart, dsr, tt, ind);
2378                                         printf("SR: rxdesc %x, rxstart %x, "
2379                                                "rxend %x, rxhind %d, "
2380                                                "rxmax %d.\n",
2381                                                sc->rxdesc, sc->rxstart,
2382                                                sc->rxend, sc->rxhind,
2383                                                sc->rxmax);
2384                                         printf("SR: cda %x, eda %x.\n",
2385                                             SRC_GET16(hc->sca_base, dmac->cda),
2386                                             SRC_GET16(hc->sca_base, dmac->eda));
2387
2388                                         if (hc->mempages) {
2389                                                 SRC_SET_ON(hc->iobase);
2390                                                 SRC_SET_MEM(hc->iobase, sc->rxdesc);
2391                                         }
2392                                         rxdesc = (sca_descriptor *)
2393                                                  (hc->mem_start +
2394                                                   (sc->rxdesc & hc->winmsk));
2395                                         rxdesc = &rxdesc[sc->rxhind];
2396
2397                                         for (i = 0; i < 3; i++, rxdesc++)
2398                                                 printf("SR: rxdesc->stat %x, "
2399                                                        "len %d.\n",
2400                                                        rxdesc->stat,
2401                                                        rxdesc->len);
2402
2403                                         if (hc->mempages)
2404                                                 SRC_SET_OFF(hc->iobase);
2405                                 }
2406 #endif /* BUGGY */
2407                         }
2408                         /*
2409                          * Check for Counter overflow
2410                          */
2411                         if (dsr & SCA_DSR_COF) {
2412                                 printf("sr%d: RX DMA Counter overflow, "
2413                                        "rxpkts %lu.\n",
2414 #ifndef NETGRAPH
2415                                        sc->unit, sc->ifsppp.pp_if.if_ipackets);
2416                                 sc->ifsppp.pp_if.if_ierrors++;
2417 #else   /* NETGRAPH */
2418                                        sc->unit, sc->ipackets);
2419                                 sc->ierrors[1]++;
2420 #endif /* NETGRAPH */
2421                         }
2422                         /*
2423                          * Check for Buffer overflow
2424                          */
2425                         if (dsr & SCA_DSR_BOF) {
2426                                 printf("sr%d: RX DMA Buffer overflow, "
2427                                        "rxpkts %lu, rxind %d, "
2428                                        "cda %x, eda %x, dsr %x.\n",
2429 #ifndef NETGRAPH
2430                                        sc->unit, sc->ifsppp.pp_if.if_ipackets,
2431 #else   /* NETGRAPH */
2432                                        sc->unit, sc->ipackets,
2433 #endif /* NETGRAPH */
2434                                        sc->rxhind,
2435                                        SRC_GET16(hc->sca_base, dmac->cda),
2436                                        SRC_GET16(hc->sca_base, dmac->eda),
2437                                        dsr);
2438
2439                                 /*
2440                                  * Make sure we eat as many as possible.
2441                                  * Then get the system running again.
2442                                  */
2443                                 if (hc->mempages)
2444                                         SRC_SET_ON(hc->iobase);
2445
2446                                 sr_eat_packet(sc, 0);
2447 #ifndef NETGRAPH
2448                                 sc->ifsppp.pp_if.if_ierrors++;
2449 #else   /* NETGRAPH */
2450                                 sc->ierrors[2]++;
2451 #endif /* NETGRAPH */
2452
2453                                 SRC_PUT8(hc->sca_base,
2454                                          sca->msci[mch].cmd,
2455                                          SCA_CMD_RXMSGREJ);
2456
2457                                 SRC_PUT8(hc->sca_base, dmac->dsr, SCA_DSR_DE);
2458
2459 #if BUGGY > 0
2460                                 printf("sr%d: RX DMA Buffer overflow, "
2461                                        "rxpkts %lu, rxind %d, "
2462                                        "cda %x, eda %x, dsr %x. After\n",
2463                                        sc->unit,
2464 #ifndef NETGRAPH
2465                                        sc->ipackets,
2466 #else   /* NETGRAPH */
2467                                        sc->ifsppp.pp_if.if_ipackets,
2468 #endif /* NETGRAPH */
2469                                        sc->rxhind,
2470                                        SRC_GET16(hc->sca_base, dmac->cda),
2471                                        SRC_GET16(hc->sca_base, dmac->eda),
2472                                        SRC_GET8(hc->sca_base, dmac->dsr));
2473 #endif
2474
2475                                 if (hc->mempages)
2476                                         SRC_SET_OFF(hc->iobase);
2477                         }
2478                         /*
2479                          * End of Transfer
2480                          */
2481                         if (dsr & SCA_DSR_EOT) {
2482                                 /*
2483                                  * If this happen, it means that we are
2484                                  * receiving faster than what the processor
2485                                  * can handle.
2486                                  *
2487                                  * XXX We should enable the dma again.
2488                                  */
2489                                 printf("sr%d: RX End of xfer, rxpkts %lu.\n",
2490                                        sc->unit,
2491 #ifndef NETGRAPH
2492                                        sc->ifsppp.pp_if.if_ipackets);
2493                                 sc->ifsppp.pp_if.if_ierrors++;
2494 #else
2495                                        sc->ipackets);
2496                                 sc->ierrors[3]++;
2497 #endif /* NETGRAPH */
2498                         }
2499                 }
2500                 isr1 >>= 4;     /* process next half of ISR */
2501                 mch++;          /* and move to next channel */
2502         } while ((mch < NCHAN) && isr1);        /* loop for each chn */
2503
2504         /*
2505          * Now that we have done all the urgent things, see if we can fill
2506          * the transmit buffers.
2507          */
2508         for (mch = 0; mch < NCHAN; mch++) {
2509                 if (dotxstart & 0x0C) { /* TX initiation enabled? */
2510                         sc = &hc->sc[mch];
2511 #ifndef NETGRAPH
2512                         srstart(&sc->ifsppp.pp_if);
2513 #else
2514                         srstart(sc);
2515 #endif /* NETGRAPH */
2516                 }
2517                 dotxstart >>= 4;/* shift for next channel */
2518         }
2519 }
2520 #ifndef NETGRAPH
2521 #ifdef USE_MODEMCK
2522 /*
2523  * Perform timeout on an FR channel
2524  *
2525  * Establish a periodic check of open N2 ports;  If
2526  * a port is open/active, its DCD state is checked
2527  * and a loss of DCD is recognized (and eventually
2528  * processed).
2529  */
2530 static void
2531 sr_modemck(void *arg)
2532 {
2533         u_int s;
2534         int card;               /* card index in table */
2535         int cards;              /* card list index */
2536         int mch;                /* channel on card */
2537         u_char dcd_v;           /* Data Carrier Detect */
2538         u_char got_st0;         /* contents of ST0 */
2539         u_char got_st1;         /* contents of ST1 */
2540         u_char got_st2;         /* contents of ST2 */
2541         u_char got_st3;         /* contents of ST3 */
2542         struct sr_hardc *hc;    /* card's configuration */
2543         struct sr_hardc *Card[16];/* up to 16 cards in system */
2544         struct sr_softc *sc;    /* channel's softc structure */
2545         struct ifnet *ifp;      /* interface control table */
2546         msci_channel *msci;     /* regs specific to channel */
2547
2548         s = splimp();
2549
2550 #if     0
2551         if (sr_opens == 0) {    /* count of "up" channels */
2552                 sr_watcher = 0; /* indicate no watcher */
2553                 splx(s);
2554                 return;
2555         }
2556 #endif
2557
2558         sr_watcher = 1;         /* mark that we're online */
2559
2560         /*
2561          * Now we'll need a list of cards to process.  Since we can handle
2562          * both ISA and PCI cards (and I didn't think of making this logic
2563          * global YET) we'll generate a single table of card table
2564          * addresses.
2565          */
2566         cards = 0;
2567
2568         for (card = 0; card < NSR; card++) {
2569                 hc = &sr_hardc[card];
2570
2571                 if (hc->sc == (void *)0)
2572                         continue;
2573
2574                 Card[cards++] = hc;
2575         }
2576
2577         hc = sr_hardc_pci;
2578
2579         while (hc) {
2580                 Card[cards++] = hc;
2581                 hc = hc->next;
2582         }
2583
2584         /*
2585          * OK, we've got work we can do.  Let's do it... (Please note that
2586          * this code _only_ deals w/ ISA cards)
2587          */
2588         for (card = 0; card < cards; card++) {
2589                 hc = Card[card];/* get card table */
2590
2591                 for (mch = 0; mch < hc->numports; mch++) {
2592                         sc = &hc->sc[mch];
2593
2594                         ifp = &sc->ifsppp.pp_if;
2595
2596                         /*
2597                          * if this channel isn't "up", skip it
2598                          */
2599                         if ((ifp->if_flags & IFF_UP) == 0)
2600                                 continue;
2601
2602                         /*
2603                          * OK, now we can go looking at this channel's
2604                          * actual register contents...
2605                          */
2606                         msci = &hc->sca->msci[sc->scachan];
2607
2608                         /*
2609                          * OK, now we'll look into the actual status of this
2610                          * channel...
2611                          *
2612                          * I suck in more registers than strictly needed
2613                          */
2614                         got_st0 = SRC_GET8(hc->sca_base, msci->st0);
2615                         got_st1 = SRC_GET8(hc->sca_base, msci->st1);
2616                         got_st2 = SRC_GET8(hc->sca_base, msci->st2);
2617                         got_st3 = SRC_GET8(hc->sca_base, msci->st3);
2618
2619                         /*
2620                          * We want to see if the DCD signal is up (DCD is
2621                          * true if zero)
2622                          */
2623                         dcd_v = (got_st3 & SCA_ST3_DCD) == 0;
2624
2625                         if (dcd_v == 0)
2626                                 printf("sr%d: DCD lost\n", sc->unit);
2627                 }
2628         }
2629
2630         /*
2631          * OK, now set up for the next modem signal checking pass...
2632          */
2633         timeout(sr_modemck, NULL, hz);
2634
2635         splx(s);
2636 }
2637 #endif
2638 #else   /* NETGRAPH */
2639 /*
2640  * If a port is open/active, it's DCD state is checked
2641  * and a loss of DCD is recognized (and eventually processed?).
2642  */
2643 static void
2644 sr_modemck(struct sr_softc *sc )
2645 {
2646         u_int s;
2647         u_char got_st3;                 /* contents of ST3 */
2648         struct sr_hardc *hc = sc->hc;   /* card's configuration */
2649         msci_channel *msci;             /* regs specific to channel */
2650
2651         s = splimp();
2652
2653
2654         if (sc->running == 0)
2655                 return;
2656         /*
2657          * OK, now we can go looking at this channel's register contents...
2658          */
2659         msci = &hc->sca->msci[sc->scachan];
2660         got_st3 = SRC_GET8(hc->sca_base, msci->st3);
2661
2662         /*
2663          * We want to see if the DCD signal is up (DCD is true if zero)
2664          */
2665         sc->dcd = (got_st3 & SCA_ST3_DCD) == 0;
2666         splx(s);
2667 }
2668
2669 #endif  /* NETGRAPH */
2670 static void
2671 sr_msci_intr(struct sr_hardc *hc, u_char isr0)
2672 {
2673         printf("src%d: SRINTR: MSCI\n", hc->cunit);
2674 }
2675
2676 static void
2677 sr_timer_intr(struct sr_hardc *hc, u_char isr2)
2678 {
2679         printf("src%d: SRINTR: TIMER\n", hc->cunit);
2680 }
2681
2682 #ifdef  NETGRAPH
2683 /*****************************************
2684  * Device timeout/watchdog routine.
2685  * called once per second.
2686  * checks to see that if activity was expected, that it hapenned.
2687  * At present we only look to see if expected output was completed.
2688  */
2689 static void
2690 ngsr_watchdog_frame(void * arg)
2691 {
2692         struct sr_softc * sc = arg;
2693         int s;
2694         int     speed;
2695
2696         if (sc->running == 0)
2697                 return; /* if we are not running let timeouts die */
2698         /*
2699          * calculate the apparent throughputs
2700          *  XXX a real hack
2701          */
2702         s = splimp();
2703         speed = sc->inbytes - sc->lastinbytes;
2704         sc->lastinbytes = sc->inbytes;
2705         if ( sc->inrate < speed )
2706                 sc->inrate = speed;
2707         speed = sc->outbytes - sc->lastoutbytes;
2708         sc->lastoutbytes = sc->outbytes;
2709         if ( sc->outrate < speed )
2710                 sc->outrate = speed;
2711         sc->inlast++;
2712         splx(s);
2713
2714         if ((sc->inlast > QUITE_A_WHILE)
2715         && (sc->out_deficit > LOTS_OF_PACKETS)) {
2716                 log(LOG_ERR, "sr%d: No response from remote end\n", sc->unit);
2717                 s = splimp();
2718                 sr_down(sc);
2719                 sr_up(sc);
2720                 sc->inlast = sc->out_deficit = 0;
2721                 splx(s);
2722         } else if ( sc->xmit_busy ) { /* no TX -> no TX timeouts */
2723                 if (sc->out_dog == 0) {
2724                         log(LOG_ERR, "sr%d: Transmit failure.. no clock?\n",
2725                                         sc->unit);
2726                         s = splimp();
2727                         srwatchdog(sc);
2728 #if 0
2729                         sr_down(sc);
2730                         sr_up(sc);
2731 #endif
2732                         splx(s);
2733                         sc->inlast = sc->out_deficit = 0;
2734                 } else {
2735                         sc->out_dog--;
2736                 }
2737         }
2738         sr_modemck(sc);         /* update the DCD status */
2739         callout_reset(&sc->sr_timer, hz, ngsr_watchdog_frame, sc);
2740 }
2741
2742 /***********************************************************************
2743  * This section contains the methods for the Netgraph interface
2744  ***********************************************************************/
2745 /*
2746  * It is not possible or allowable to create a node of this type.
2747  * If the hardware exists, it will already have created it.
2748  */
2749 static  int
2750 ngsr_constructor(node_p *nodep)
2751 {
2752         return (EINVAL);
2753 }
2754
2755 /*
2756  * give our ok for a hook to be added...
2757  * If we are not running this should kick the device into life.
2758  * The hook's private info points to our stash of info about that
2759  * channel.
2760  */
2761 static int
2762 ngsr_newhook(node_p node, hook_p hook, const char *name)
2763 {
2764         struct sr_softc *       sc = node->private;
2765
2766         /*
2767          * check if it's our friend the debug hook
2768          */
2769         if (strcmp(name, NG_SR_HOOK_DEBUG) == 0) {
2770                 hook->private = NULL; /* paranoid */
2771                 sc->debug_hook = hook;
2772                 return (0);
2773         }
2774
2775         /*
2776          * Check for raw mode hook.
2777          */
2778         if (strcmp(name, NG_SR_HOOK_RAW) != 0) {
2779                 return (EINVAL);
2780         }
2781         hook->private = sc;
2782         sc->hook = hook;
2783         sc->datahooks++;
2784         sr_up(sc);
2785         return (0);
2786 }
2787
2788 /*
2789  * incoming messages.
2790  * Just respond to the generic TEXT_STATUS message
2791  */
2792 static  int
2793 ngsr_rcvmsg(node_p node,
2794         struct ng_mesg *msg, const char *retaddr, struct ng_mesg **resp)
2795 {
2796         struct sr_softc *       sc;
2797         int error = 0;
2798
2799         sc = node->private;
2800         switch (msg->header.typecookie) {
2801             case        NG_SR_COOKIE:
2802                 error = EINVAL;
2803                 break;
2804             case        NGM_GENERIC_COOKIE:
2805                 switch(msg->header.cmd) {
2806                     case NGM_TEXT_STATUS: {
2807                             char        *arg;
2808                             int pos = 0;
2809                             int resplen = sizeof(struct ng_mesg) + 512;
2810                             MALLOC(*resp, struct ng_mesg *, resplen,
2811                                         M_NETGRAPH, M_INTWAIT | M_ZERO);
2812                             if (*resp == NULL) {
2813                                 error = ENOMEM;
2814                                 break;
2815                             }
2816                             arg = (*resp)->data;
2817
2818                             /*
2819                              * Put in the throughput information.
2820                              */
2821                             pos = sprintf(arg, "%ld bytes in, %ld bytes out\n"
2822                             "highest rate seen: %ld B/S in, %ld B/S out\n",
2823                             sc->inbytes, sc->outbytes,
2824                             sc->inrate, sc->outrate);
2825                             pos += sprintf(arg + pos,
2826                                 "%ld output errors\n",
2827                                 sc->oerrors);
2828                             pos += sprintf(arg + pos,
2829                                 "ierrors = %ld, %ld, %ld, %ld, %ld, %ld\n",
2830                                 sc->ierrors[0],
2831                                 sc->ierrors[1],
2832                                 sc->ierrors[2],
2833                                 sc->ierrors[3],
2834                                 sc->ierrors[4],
2835                                 sc->ierrors[5]);
2836
2837                             (*resp)->header.version = NG_VERSION;
2838                             (*resp)->header.arglen = strlen(arg) + 1;
2839                             (*resp)->header.token = msg->header.token;
2840                             (*resp)->header.typecookie = NG_SR_COOKIE;
2841                             (*resp)->header.cmd = msg->header.cmd;
2842                             strncpy((*resp)->header.cmdstr, "status",
2843                                         NG_CMDSTRLEN);
2844                         }
2845                         break;
2846                     default:
2847                         error = EINVAL;
2848                         break;
2849                     }
2850                 break;
2851             default:
2852                 error = EINVAL;
2853                 break;
2854         }
2855         free(msg, M_NETGRAPH);
2856         return (error);
2857 }
2858
2859 /*
2860  * get data from another node and transmit it to the correct channel
2861  */
2862 static  int
2863 ngsr_rcvdata(hook_p hook, struct mbuf *m, meta_p meta)
2864 {
2865         int s;
2866         int error = 0;
2867         struct sr_softc * sc = hook->node->private;
2868         struct ifqueue  *xmitq_p;
2869
2870         /*
2871          * data doesn't come in from just anywhere (e.g control hook)
2872          */
2873         if ( hook->private == NULL) {
2874                 error = ENETDOWN;
2875                 goto bad;
2876         }
2877
2878         /*
2879          * Now queue the data for when it can be sent
2880          */
2881         if (meta && meta->priority > 0) {
2882                 xmitq_p = (&sc->xmitq_hipri);
2883         } else {
2884                 xmitq_p = (&sc->xmitq);
2885         }
2886         s = splimp();
2887         if (IF_QFULL(xmitq_p)) {
2888                 IF_DROP(xmitq_p);
2889                 splx(s);
2890                 error = ENOBUFS;
2891                 goto bad;
2892         }
2893         IF_ENQUEUE(xmitq_p, m);
2894         srstart(sc);
2895         splx(s);
2896         return (0);
2897
2898 bad:
2899         /*
2900          * It was an error case.
2901          * check if we need to free the mbuf, and then return the error
2902          */
2903         NG_FREE_DATA(m, meta);
2904         return (error);
2905 }
2906
2907 /*
2908  * do local shutdown processing..
2909  * this node will refuse to go away, unless the hardware says to..
2910  * don't unref the node, or remove our name. just clear our links up.
2911  */
2912 static  int
2913 ngsr_rmnode(node_p node)
2914 {
2915         struct sr_softc * sc = node->private;
2916
2917         sr_down(sc);
2918         ng_cutlinks(node);
2919         node->flags &= ~NG_INVALID; /* bounce back to life */
2920         return (0);
2921 }
2922
2923 /* already linked */
2924 static  int
2925 ngsr_connect(hook_p hook)
2926 {
2927         /* be really amiable and just say "YUP that's OK by me! " */
2928         return (0);
2929 }
2930
2931 /*
2932  * notify on hook disconnection (destruction)
2933  *
2934  * Invalidate the private data associated with this dlci.
2935  * For this type, removal of the last link resets tries to destroy the node.
2936  * As the device still exists, the shutdown method will not actually
2937  * destroy the node, but reset the device and leave it 'fresh' :)
2938  *
2939  * The node removal code will remove all references except that owned by the
2940  * driver.
2941  */
2942 static  int
2943 ngsr_disconnect(hook_p hook)
2944 {
2945         struct sr_softc * sc = hook->node->private;
2946         int     s;
2947         /*
2948          * If it's the data hook, then free resources etc.
2949          */
2950         if (hook->private) {
2951                 s = splimp();
2952                 sc->datahooks--;
2953                 if (sc->datahooks == 0)
2954                         sr_down(sc);
2955                 splx(s);
2956         } else {
2957                 sc->debug_hook = NULL;
2958         }
2959         return (0);
2960 }
2961
2962 /*
2963  * called during bootup
2964  * or LKM loading to put this type into the list of known modules
2965  */
2966 static void
2967 ngsr_init(void *ignored)
2968 {
2969         if (ng_newtype(&typestruct))
2970                 printf("ngsr install failed\n");
2971         ngsr_done_init = 1;
2972 }
2973 #endif /* NETGRAPH */
2974
2975 /*
2976  ********************************* END ************************************
2977  */