1 /******************************************************************************
3 Copyright (c) 2001-2010, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
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10 this list of conditions and the following disclaimer.
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
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16 3. Neither the name of the Intel Corporation nor the names of its
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18 this software without specific prior written permission.
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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32 ******************************************************************************/
35 #ifndef _DRAGONFLY_OS_H_
36 #define _DRAGONFLY_OS_H_
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/spinlock.h>
41 #include <sys/spinlock2.h>
42 #include <sys/kernel.h>
44 #include <bus/pci/pcivar.h>
45 #include <bus/pci/pcireg.h>
48 #define ASSERT(x) if(!(x)) panic("EM: x")
50 #define usec_delay(x) DELAY(x)
51 #define msec_delay(x) DELAY(1000*(x))
52 #define msec_delay_irq(x) DELAY(1000*(x))
54 #define MSGOUT(S, A, B) kprintf(S "\n", A, B)
55 #define DEBUGFUNC(F) DEBUGOUT(F);
57 #define DEBUGOUT1(S,A)
58 #define DEBUGOUT2(S,A,B)
59 #define DEBUGOUT3(S,A,B,C)
60 #define DEBUGOUT7(S,A,B,C,D,E,F,G)
67 #define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */
68 #define PCI_COMMAND_REGISTER PCIR_COMMAND
70 /* Mutex used in the shared code */
71 #define E1000_MUTEX struct spinlock
72 #define E1000_MUTEX_INIT(spin) spin_init(spin)
73 #define E1000_MUTEX_DESTROY(spin) spin_uninit(spin)
74 #define E1000_MUTEX_LOCK(spin) spin_lock_wr(spin)
75 #define E1000_MUTEX_TRYLOCK(spin) spin_trylock_wr(spin)
76 #define E1000_MUTEX_UNLOCK(spin) spin_unlock_wr(spin)
86 typedef boolean_t bool;
93 #if __FreeBSD_version < 800000 /* Now in HEAD */
94 #if defined(__i386__) || defined(__amd64__)
95 #define mb() __asm volatile("mfence" ::: "memory")
96 #define wmb() __asm volatile("sfence" ::: "memory")
97 #define rmb() __asm volatile("lfence" ::: "memory")
103 #endif /*__FreeBSD_version < 800000 */
105 #if defined(__i386__) || defined(__amd64__)
107 void prefetch(void *x)
109 __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
117 bus_space_tag_t mem_bus_space_tag;
118 bus_space_handle_t mem_bus_space_handle;
119 bus_space_tag_t io_bus_space_tag;
120 bus_space_handle_t io_bus_space_handle;
121 bus_space_tag_t flash_bus_space_tag;
122 bus_space_handle_t flash_bus_space_handle;
126 #define E1000_REGISTER(hw, reg) (((hw)->mac.type >= e1000_82543) \
127 ? reg : e1000_translate_register_82542(reg))
129 #define E1000_WRITE_FLUSH(a) E1000_READ_REG(a, E1000_STATUS)
131 /* Read from an absolute offset in the adapter's memory space */
132 #define E1000_READ_OFFSET(hw, offset) \
133 bus_space_read_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
134 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, offset)
136 /* Write to an absolute offset in the adapter's memory space */
137 #define E1000_WRITE_OFFSET(hw, offset, value) \
138 bus_space_write_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
139 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, offset, value)
141 /* Register READ/WRITE macros */
143 #define E1000_READ_REG(hw, reg) \
144 bus_space_read_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
145 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \
146 E1000_REGISTER(hw, reg))
148 #define E1000_WRITE_REG(hw, reg, value) \
149 bus_space_write_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
150 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \
151 E1000_REGISTER(hw, reg), value)
153 #define E1000_READ_REG_ARRAY(hw, reg, index) \
154 bus_space_read_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
155 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \
156 E1000_REGISTER(hw, reg) + ((index)<< 2))
158 #define E1000_WRITE_REG_ARRAY(hw, reg, index, value) \
159 bus_space_write_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
160 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \
161 E1000_REGISTER(hw, reg) + ((index)<< 2), value)
163 #define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY
164 #define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY
166 #define E1000_READ_REG_ARRAY_BYTE(hw, reg, index) \
167 bus_space_read_1(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
168 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \
169 E1000_REGISTER(hw, reg) + index)
171 #define E1000_WRITE_REG_ARRAY_BYTE(hw, reg, index, value) \
172 bus_space_write_1(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
173 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \
174 E1000_REGISTER(hw, reg) + index, value)
176 #define E1000_WRITE_REG_ARRAY_WORD(hw, reg, index, value) \
177 bus_space_write_2(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
178 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \
179 E1000_REGISTER(hw, reg) + (index << 1), value)
181 #define E1000_WRITE_REG_IO(hw, reg, value) do {\
182 bus_space_write_4(((struct e1000_osdep *)(hw)->back)->io_bus_space_tag, \
183 ((struct e1000_osdep *)(hw)->back)->io_bus_space_handle, \
184 (hw)->io_base, reg); \
185 bus_space_write_4(((struct e1000_osdep *)(hw)->back)->io_bus_space_tag, \
186 ((struct e1000_osdep *)(hw)->back)->io_bus_space_handle, \
187 (hw)->io_base + 4, value); } while (0)
189 #define E1000_READ_FLASH_REG(hw, reg) \
190 bus_space_read_4(((struct e1000_osdep *)(hw)->back)->flash_bus_space_tag, \
191 ((struct e1000_osdep *)(hw)->back)->flash_bus_space_handle, reg)
193 #define E1000_READ_FLASH_REG16(hw, reg) \
194 bus_space_read_2(((struct e1000_osdep *)(hw)->back)->flash_bus_space_tag, \
195 ((struct e1000_osdep *)(hw)->back)->flash_bus_space_handle, reg)
197 #define E1000_WRITE_FLASH_REG(hw, reg, value) \
198 bus_space_write_4(((struct e1000_osdep *)(hw)->back)->flash_bus_space_tag, \
199 ((struct e1000_osdep *)(hw)->back)->flash_bus_space_handle, reg, value)
201 #define E1000_WRITE_FLASH_REG16(hw, reg, value) \
202 bus_space_write_2(((struct e1000_osdep *)(hw)->back)->flash_bus_space_tag, \
203 ((struct e1000_osdep *)(hw)->back)->flash_bus_space_handle, reg, value)
205 #endif /* _DRAGONFLY_OS_H_ */