1 /* RTL simplification functions for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
25 #include "coretypes.h"
31 #include "hard-reg-set.h"
34 #include "insn-config.h"
43 /* Simplification and canonicalization of RTL. */
45 /* Much code operates on (low, high) pairs; the low value is an
46 unsigned wide int, the high value a signed wide int. We
47 occasionally need to sign extend from low to high as if low were a
49 #define HWI_SIGN_EXTEND(low) \
50 ((((HOST_WIDE_INT) low) < 0) ? ((HOST_WIDE_INT) -1) : ((HOST_WIDE_INT) 0))
52 static rtx neg_const_int (enum machine_mode, rtx);
53 static int simplify_plus_minus_op_data_cmp (const void *, const void *);
54 static rtx simplify_plus_minus (enum rtx_code, enum machine_mode, rtx,
56 static rtx simplify_immed_subreg (enum machine_mode, rtx, enum machine_mode,
58 static bool associative_constant_p (rtx);
59 static rtx simplify_associative_operation (enum rtx_code, enum machine_mode,
62 /* Negate a CONST_INT rtx, truncating (because a conversion from a
63 maximally negative number can overflow). */
65 neg_const_int (enum machine_mode mode, rtx i)
67 return gen_int_mode (- INTVAL (i), mode);
71 /* Make a binary operation by properly ordering the operands and
72 seeing if the expression folds. */
75 simplify_gen_binary (enum rtx_code code, enum machine_mode mode, rtx op0,
80 /* Put complex operands first and constants second if commutative. */
81 if (GET_RTX_CLASS (code) == 'c'
82 && swap_commutative_operands_p (op0, op1))
83 tem = op0, op0 = op1, op1 = tem;
85 /* If this simplifies, do it. */
86 tem = simplify_binary_operation (code, mode, op0, op1);
90 /* Handle addition and subtraction specially. Otherwise, just form
93 if (code == PLUS || code == MINUS)
95 tem = simplify_plus_minus (code, mode, op0, op1, 1);
100 return gen_rtx_fmt_ee (code, mode, op0, op1);
103 /* If X is a MEM referencing the constant pool, return the real value.
104 Otherwise return X. */
106 avoid_constant_pool_reference (rtx x)
109 enum machine_mode cmode;
111 switch (GET_CODE (x))
117 /* Handle float extensions of constant pool references. */
119 c = avoid_constant_pool_reference (tmp);
120 if (c != tmp && GET_CODE (c) == CONST_DOUBLE)
124 REAL_VALUE_FROM_CONST_DOUBLE (d, c);
125 return CONST_DOUBLE_FROM_REAL_VALUE (d, GET_MODE (x));
135 /* Call target hook to avoid the effects of -fpic etc.... */
136 addr = (*targetm.delegitimize_address) (addr);
138 if (GET_CODE (addr) == LO_SUM)
139 addr = XEXP (addr, 1);
141 if (GET_CODE (addr) != SYMBOL_REF
142 || ! CONSTANT_POOL_ADDRESS_P (addr))
145 c = get_pool_constant (addr);
146 cmode = get_pool_mode (addr);
148 /* If we're accessing the constant in a different mode than it was
149 originally stored, attempt to fix that up via subreg simplifications.
150 If that fails we have no choice but to return the original memory. */
151 if (cmode != GET_MODE (x))
153 c = simplify_subreg (GET_MODE (x), c, cmode, 0);
160 /* Make a unary operation by first seeing if it folds and otherwise making
161 the specified operation. */
164 simplify_gen_unary (enum rtx_code code, enum machine_mode mode, rtx op,
165 enum machine_mode op_mode)
169 /* If this simplifies, use it. */
170 if ((tem = simplify_unary_operation (code, mode, op, op_mode)) != 0)
173 return gen_rtx_fmt_e (code, mode, op);
176 /* Likewise for ternary operations. */
179 simplify_gen_ternary (enum rtx_code code, enum machine_mode mode,
180 enum machine_mode op0_mode, rtx op0, rtx op1, rtx op2)
184 /* If this simplifies, use it. */
185 if (0 != (tem = simplify_ternary_operation (code, mode, op0_mode,
189 return gen_rtx_fmt_eee (code, mode, op0, op1, op2);
192 /* Likewise, for relational operations.
193 CMP_MODE specifies mode comparison is done in.
197 simplify_gen_relational (enum rtx_code code, enum machine_mode mode,
198 enum machine_mode cmp_mode, rtx op0, rtx op1)
202 if (cmp_mode == VOIDmode)
203 cmp_mode = GET_MODE (op0);
204 if (cmp_mode == VOIDmode)
205 cmp_mode = GET_MODE (op1);
207 if (cmp_mode != VOIDmode)
209 tem = simplify_relational_operation (code, cmp_mode, op0, op1);
213 #ifdef FLOAT_STORE_FLAG_VALUE
214 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
217 if (tem == const0_rtx)
218 return CONST0_RTX (mode);
219 if (tem != const_true_rtx)
221 val = FLOAT_STORE_FLAG_VALUE (mode);
222 return CONST_DOUBLE_FROM_REAL_VALUE (val, mode);
229 /* For the following tests, ensure const0_rtx is op1. */
230 if (swap_commutative_operands_p (op0, op1)
231 || (op0 == const0_rtx && op1 != const0_rtx))
232 tem = op0, op0 = op1, op1 = tem, code = swap_condition (code);
234 /* If op0 is a compare, extract the comparison arguments from it. */
235 if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
236 return simplify_gen_relational (code, mode, VOIDmode,
237 XEXP (op0, 0), XEXP (op0, 1));
239 /* If op0 is a comparison, extract the comparison arguments form it. */
240 if (GET_RTX_CLASS (GET_CODE (op0)) == '<' && op1 == const0_rtx)
244 if (GET_MODE (op0) == mode)
246 return simplify_gen_relational (GET_CODE (op0), mode, VOIDmode,
247 XEXP (op0, 0), XEXP (op0, 1));
251 enum rtx_code new = reversed_comparison_code (op0, NULL_RTX);
253 return simplify_gen_relational (new, mode, VOIDmode,
254 XEXP (op0, 0), XEXP (op0, 1));
258 return gen_rtx_fmt_ee (code, mode, op0, op1);
261 /* Replace all occurrences of OLD in X with NEW and try to simplify the
262 resulting RTX. Return a new RTX which is as simplified as possible. */
265 simplify_replace_rtx (rtx x, rtx old, rtx new)
267 enum rtx_code code = GET_CODE (x);
268 enum machine_mode mode = GET_MODE (x);
269 enum machine_mode op_mode;
272 /* If X is OLD, return NEW. Otherwise, if this is an expression, try
273 to build a new expression substituting recursively. If we can't do
274 anything, return our input. */
279 switch (GET_RTX_CLASS (code))
283 op_mode = GET_MODE (op0);
284 op0 = simplify_replace_rtx (op0, old, new);
285 if (op0 == XEXP (x, 0))
287 return simplify_gen_unary (code, mode, op0, op_mode);
291 op0 = simplify_replace_rtx (XEXP (x, 0), old, new);
292 op1 = simplify_replace_rtx (XEXP (x, 1), old, new);
293 if (op0 == XEXP (x, 0) && op1 == XEXP (x, 1))
295 return simplify_gen_binary (code, mode, op0, op1);
300 op_mode = GET_MODE (op0) != VOIDmode ? GET_MODE (op0) : GET_MODE (op1);
301 op0 = simplify_replace_rtx (op0, old, new);
302 op1 = simplify_replace_rtx (op1, old, new);
303 if (op0 == XEXP (x, 0) && op1 == XEXP (x, 1))
305 return simplify_gen_relational (code, mode, op_mode, op0, op1);
310 op_mode = GET_MODE (op0);
311 op0 = simplify_replace_rtx (op0, old, new);
312 op1 = simplify_replace_rtx (XEXP (x, 1), old, new);
313 op2 = simplify_replace_rtx (XEXP (x, 2), old, new);
314 if (op0 == XEXP (x, 0) && op1 == XEXP (x, 1) && op2 == XEXP (x, 2))
316 if (op_mode == VOIDmode)
317 op_mode = GET_MODE (op0);
318 return simplify_gen_ternary (code, mode, op_mode, op0, op1, op2);
321 /* The only case we try to handle is a SUBREG. */
324 op0 = simplify_replace_rtx (SUBREG_REG (x), old, new);
325 if (op0 == SUBREG_REG (x))
327 op0 = simplify_gen_subreg (GET_MODE (x), op0,
328 GET_MODE (SUBREG_REG (x)),
330 return op0 ? op0 : x;
337 op0 = simplify_replace_rtx (XEXP (x, 0), old, new);
338 if (op0 == XEXP (x, 0))
340 return replace_equiv_address_nv (x, op0);
342 else if (code == LO_SUM)
344 op0 = simplify_replace_rtx (XEXP (x, 0), old, new);
345 op1 = simplify_replace_rtx (XEXP (x, 1), old, new);
347 /* (lo_sum (high x) x) -> x */
348 if (GET_CODE (op0) == HIGH && rtx_equal_p (XEXP (op0, 0), op1))
351 if (op0 == XEXP (x, 0) && op1 == XEXP (x, 1))
353 return gen_rtx_LO_SUM (mode, op0, op1);
355 else if (code == REG)
357 if (REG_P (old) && REGNO (x) == REGNO (old))
368 /* Try to simplify a unary operation CODE whose output mode is to be
369 MODE with input operand OP whose mode was originally OP_MODE.
370 Return zero if no simplification can be made. */
372 simplify_unary_operation (enum rtx_code code, enum machine_mode mode,
373 rtx op, enum machine_mode op_mode)
375 unsigned int width = GET_MODE_BITSIZE (mode);
376 rtx trueop = avoid_constant_pool_reference (op);
378 if (code == VEC_DUPLICATE)
380 if (!VECTOR_MODE_P (mode))
382 if (GET_MODE (trueop) != VOIDmode
383 && !VECTOR_MODE_P (GET_MODE (trueop))
384 && GET_MODE_INNER (mode) != GET_MODE (trueop))
386 if (GET_MODE (trueop) != VOIDmode
387 && VECTOR_MODE_P (GET_MODE (trueop))
388 && GET_MODE_INNER (mode) != GET_MODE_INNER (GET_MODE (trueop)))
390 if (GET_CODE (trueop) == CONST_INT || GET_CODE (trueop) == CONST_DOUBLE
391 || GET_CODE (trueop) == CONST_VECTOR)
393 int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
394 unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
395 rtvec v = rtvec_alloc (n_elts);
398 if (GET_CODE (trueop) != CONST_VECTOR)
399 for (i = 0; i < n_elts; i++)
400 RTVEC_ELT (v, i) = trueop;
403 enum machine_mode inmode = GET_MODE (trueop);
404 int in_elt_size = GET_MODE_SIZE (GET_MODE_INNER (inmode));
405 unsigned in_n_elts = (GET_MODE_SIZE (inmode) / in_elt_size);
407 if (in_n_elts >= n_elts || n_elts % in_n_elts)
409 for (i = 0; i < n_elts; i++)
410 RTVEC_ELT (v, i) = CONST_VECTOR_ELT (trueop, i % in_n_elts);
412 return gen_rtx_CONST_VECTOR (mode, v);
415 else if (GET_CODE (op) == CONST)
416 return simplify_unary_operation (code, mode, XEXP (op, 0), op_mode);
418 if (VECTOR_MODE_P (mode) && GET_CODE (trueop) == CONST_VECTOR)
420 int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
421 unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
422 enum machine_mode opmode = GET_MODE (trueop);
423 int op_elt_size = GET_MODE_SIZE (GET_MODE_INNER (opmode));
424 unsigned op_n_elts = (GET_MODE_SIZE (opmode) / op_elt_size);
425 rtvec v = rtvec_alloc (n_elts);
428 if (op_n_elts != n_elts)
431 for (i = 0; i < n_elts; i++)
433 rtx x = simplify_unary_operation (code, GET_MODE_INNER (mode),
434 CONST_VECTOR_ELT (trueop, i),
435 GET_MODE_INNER (opmode));
438 RTVEC_ELT (v, i) = x;
440 return gen_rtx_CONST_VECTOR (mode, v);
443 /* The order of these tests is critical so that, for example, we don't
444 check the wrong mode (input vs. output) for a conversion operation,
445 such as FIX. At some point, this should be simplified. */
447 if (code == FLOAT && GET_MODE (trueop) == VOIDmode
448 && (GET_CODE (trueop) == CONST_DOUBLE || GET_CODE (trueop) == CONST_INT))
450 HOST_WIDE_INT hv, lv;
453 if (GET_CODE (trueop) == CONST_INT)
454 lv = INTVAL (trueop), hv = HWI_SIGN_EXTEND (lv);
456 lv = CONST_DOUBLE_LOW (trueop), hv = CONST_DOUBLE_HIGH (trueop);
458 REAL_VALUE_FROM_INT (d, lv, hv, mode);
459 d = real_value_truncate (mode, d);
460 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
462 else if (code == UNSIGNED_FLOAT && GET_MODE (trueop) == VOIDmode
463 && (GET_CODE (trueop) == CONST_DOUBLE
464 || GET_CODE (trueop) == CONST_INT))
466 HOST_WIDE_INT hv, lv;
469 if (GET_CODE (trueop) == CONST_INT)
470 lv = INTVAL (trueop), hv = HWI_SIGN_EXTEND (lv);
472 lv = CONST_DOUBLE_LOW (trueop), hv = CONST_DOUBLE_HIGH (trueop);
474 if (op_mode == VOIDmode)
476 /* We don't know how to interpret negative-looking numbers in
477 this case, so don't try to fold those. */
481 else if (GET_MODE_BITSIZE (op_mode) >= HOST_BITS_PER_WIDE_INT * 2)
484 hv = 0, lv &= GET_MODE_MASK (op_mode);
486 REAL_VALUE_FROM_UNSIGNED_INT (d, lv, hv, mode);
487 d = real_value_truncate (mode, d);
488 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
491 if (GET_CODE (trueop) == CONST_INT
492 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
494 HOST_WIDE_INT arg0 = INTVAL (trueop);
508 val = (arg0 >= 0 ? arg0 : - arg0);
512 /* Don't use ffs here. Instead, get low order bit and then its
513 number. If arg0 is zero, this will return 0, as desired. */
514 arg0 &= GET_MODE_MASK (mode);
515 val = exact_log2 (arg0 & (- arg0)) + 1;
519 arg0 &= GET_MODE_MASK (mode);
520 if (arg0 == 0 && CLZ_DEFINED_VALUE_AT_ZERO (mode, val))
523 val = GET_MODE_BITSIZE (mode) - floor_log2 (arg0) - 1;
527 arg0 &= GET_MODE_MASK (mode);
530 /* Even if the value at zero is undefined, we have to come
531 up with some replacement. Seems good enough. */
532 if (! CTZ_DEFINED_VALUE_AT_ZERO (mode, val))
533 val = GET_MODE_BITSIZE (mode);
536 val = exact_log2 (arg0 & -arg0);
540 arg0 &= GET_MODE_MASK (mode);
543 val++, arg0 &= arg0 - 1;
547 arg0 &= GET_MODE_MASK (mode);
550 val++, arg0 &= arg0 - 1;
559 /* When zero-extending a CONST_INT, we need to know its
561 if (op_mode == VOIDmode)
563 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
565 /* If we were really extending the mode,
566 we would have to distinguish between zero-extension
567 and sign-extension. */
568 if (width != GET_MODE_BITSIZE (op_mode))
572 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
573 val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
579 if (op_mode == VOIDmode)
581 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
583 /* If we were really extending the mode,
584 we would have to distinguish between zero-extension
585 and sign-extension. */
586 if (width != GET_MODE_BITSIZE (op_mode))
590 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
593 = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
595 & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1)))
596 val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
613 val = trunc_int_for_mode (val, mode);
615 return GEN_INT (val);
618 /* We can do some operations on integer CONST_DOUBLEs. Also allow
619 for a DImode operation on a CONST_INT. */
620 else if (GET_MODE (trueop) == VOIDmode
621 && width <= HOST_BITS_PER_WIDE_INT * 2
622 && (GET_CODE (trueop) == CONST_DOUBLE
623 || GET_CODE (trueop) == CONST_INT))
625 unsigned HOST_WIDE_INT l1, lv;
626 HOST_WIDE_INT h1, hv;
628 if (GET_CODE (trueop) == CONST_DOUBLE)
629 l1 = CONST_DOUBLE_LOW (trueop), h1 = CONST_DOUBLE_HIGH (trueop);
631 l1 = INTVAL (trueop), h1 = HWI_SIGN_EXTEND (l1);
641 neg_double (l1, h1, &lv, &hv);
646 neg_double (l1, h1, &lv, &hv);
658 lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & -h1) + 1;
661 lv = exact_log2 (l1 & -l1) + 1;
667 lv = GET_MODE_BITSIZE (mode) - floor_log2 (h1) - 1
668 - HOST_BITS_PER_WIDE_INT;
670 lv = GET_MODE_BITSIZE (mode) - floor_log2 (l1) - 1;
671 else if (! CLZ_DEFINED_VALUE_AT_ZERO (mode, lv))
672 lv = GET_MODE_BITSIZE (mode);
678 lv = exact_log2 (l1 & -l1);
680 lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & -h1);
681 else if (! CTZ_DEFINED_VALUE_AT_ZERO (mode, lv))
682 lv = GET_MODE_BITSIZE (mode);
705 /* This is just a change-of-mode, so do nothing. */
710 if (op_mode == VOIDmode)
713 if (GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
717 lv = l1 & GET_MODE_MASK (op_mode);
721 if (op_mode == VOIDmode
722 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
726 lv = l1 & GET_MODE_MASK (op_mode);
727 if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT
728 && (lv & ((HOST_WIDE_INT) 1
729 << (GET_MODE_BITSIZE (op_mode) - 1))) != 0)
730 lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
732 hv = HWI_SIGN_EXTEND (lv);
743 return immed_double_const (lv, hv, mode);
746 else if (GET_CODE (trueop) == CONST_DOUBLE
747 && GET_MODE_CLASS (mode) == MODE_FLOAT)
749 REAL_VALUE_TYPE d, t;
750 REAL_VALUE_FROM_CONST_DOUBLE (d, trueop);
755 if (HONOR_SNANS (mode) && real_isnan (&d))
757 real_sqrt (&t, mode, &d);
761 d = REAL_VALUE_ABS (d);
764 d = REAL_VALUE_NEGATE (d);
767 d = real_value_truncate (mode, d);
770 /* All this does is change the mode. */
773 real_arithmetic (&d, FIX_TRUNC_EXPR, &d, NULL);
779 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
782 else if (GET_CODE (trueop) == CONST_DOUBLE
783 && GET_MODE_CLASS (GET_MODE (trueop)) == MODE_FLOAT
784 && GET_MODE_CLASS (mode) == MODE_INT
785 && width <= 2*HOST_BITS_PER_WIDE_INT && width > 0)
787 /* Although the overflow semantics of RTL's FIX and UNSIGNED_FIX
788 operators are intentionally left unspecified (to ease implementation
789 by target backends), for consistency, this routine implements the
790 same semantics for constant folding as used by the middle-end. */
792 HOST_WIDE_INT xh, xl, th, tl;
793 REAL_VALUE_TYPE x, t;
794 REAL_VALUE_FROM_CONST_DOUBLE (x, trueop);
798 if (REAL_VALUE_ISNAN (x))
801 /* Test against the signed upper bound. */
802 if (width > HOST_BITS_PER_WIDE_INT)
804 th = ((unsigned HOST_WIDE_INT) 1
805 << (width - HOST_BITS_PER_WIDE_INT - 1)) - 1;
811 tl = ((unsigned HOST_WIDE_INT) 1 << (width - 1)) - 1;
813 real_from_integer (&t, VOIDmode, tl, th, 0);
814 if (REAL_VALUES_LESS (t, x))
821 /* Test against the signed lower bound. */
822 if (width > HOST_BITS_PER_WIDE_INT)
824 th = (HOST_WIDE_INT) -1 << (width - HOST_BITS_PER_WIDE_INT - 1);
830 tl = (HOST_WIDE_INT) -1 << (width - 1);
832 real_from_integer (&t, VOIDmode, tl, th, 0);
833 if (REAL_VALUES_LESS (x, t))
839 REAL_VALUE_TO_INT (&xl, &xh, x);
843 if (REAL_VALUE_ISNAN (x) || REAL_VALUE_NEGATIVE (x))
846 /* Test against the unsigned upper bound. */
847 if (width == 2*HOST_BITS_PER_WIDE_INT)
852 else if (width >= HOST_BITS_PER_WIDE_INT)
854 th = ((unsigned HOST_WIDE_INT) 1
855 << (width - HOST_BITS_PER_WIDE_INT)) - 1;
861 tl = ((unsigned HOST_WIDE_INT) 1 << width) - 1;
863 real_from_integer (&t, VOIDmode, tl, th, 1);
864 if (REAL_VALUES_LESS (t, x))
871 REAL_VALUE_TO_INT (&xl, &xh, x);
877 return immed_double_const (xl, xh, mode);
880 /* This was formerly used only for non-IEEE float.
881 eggert@twinsun.com says it is safe for IEEE also. */
884 enum rtx_code reversed;
887 /* There are some simplifications we can do even if the operands
892 /* (not (not X)) == X. */
893 if (GET_CODE (op) == NOT)
896 /* (not (eq X Y)) == (ne X Y), etc. */
897 if (GET_RTX_CLASS (GET_CODE (op)) == '<'
898 && (mode == BImode || STORE_FLAG_VALUE == -1)
899 && ((reversed = reversed_comparison_code (op, NULL_RTX))
901 return simplify_gen_relational (reversed, mode, VOIDmode,
902 XEXP (op, 0), XEXP (op, 1));
904 /* (not (plus X -1)) can become (neg X). */
905 if (GET_CODE (op) == PLUS
906 && XEXP (op, 1) == constm1_rtx)
907 return simplify_gen_unary (NEG, mode, XEXP (op, 0), mode);
909 /* Similarly, (not (neg X)) is (plus X -1). */
910 if (GET_CODE (op) == NEG)
911 return plus_constant (XEXP (op, 0), -1);
913 /* (not (xor X C)) for C constant is (xor X D) with D = ~C. */
914 if (GET_CODE (op) == XOR
915 && GET_CODE (XEXP (op, 1)) == CONST_INT
916 && (temp = simplify_unary_operation (NOT, mode,
919 return simplify_gen_binary (XOR, mode, XEXP (op, 0), temp);
922 /* (not (ashift 1 X)) is (rotate ~1 X). We used to do this for
923 operands other than 1, but that is not valid. We could do a
924 similar simplification for (not (lshiftrt C X)) where C is
925 just the sign bit, but this doesn't seem common enough to
927 if (GET_CODE (op) == ASHIFT
928 && XEXP (op, 0) == const1_rtx)
930 temp = simplify_gen_unary (NOT, mode, const1_rtx, mode);
931 return simplify_gen_binary (ROTATE, mode, temp, XEXP (op, 1));
934 /* If STORE_FLAG_VALUE is -1, (not (comparison X Y)) can be done
935 by reversing the comparison code if valid. */
936 if (STORE_FLAG_VALUE == -1
937 && GET_RTX_CLASS (GET_CODE (op)) == '<'
938 && (reversed = reversed_comparison_code (op, NULL_RTX))
940 return simplify_gen_relational (reversed, mode, VOIDmode,
941 XEXP (op, 0), XEXP (op, 1));
943 /* (not (ashiftrt foo C)) where C is the number of bits in FOO
944 minus 1 is (ge foo (const_int 0)) if STORE_FLAG_VALUE is -1,
945 so we can perform the above simplification. */
947 if (STORE_FLAG_VALUE == -1
948 && GET_CODE (op) == ASHIFTRT
949 && GET_CODE (XEXP (op, 1)) == CONST_INT
950 && INTVAL (XEXP (op, 1)) == GET_MODE_BITSIZE (mode) - 1)
951 return simplify_gen_relational (GE, mode, VOIDmode,
952 XEXP (op, 0), const0_rtx);
957 /* (neg (neg X)) == X. */
958 if (GET_CODE (op) == NEG)
961 /* (neg (plus X 1)) can become (not X). */
962 if (GET_CODE (op) == PLUS
963 && XEXP (op, 1) == const1_rtx)
964 return simplify_gen_unary (NOT, mode, XEXP (op, 0), mode);
966 /* Similarly, (neg (not X)) is (plus X 1). */
967 if (GET_CODE (op) == NOT)
968 return plus_constant (XEXP (op, 0), 1);
970 /* (neg (minus X Y)) can become (minus Y X). This transformation
971 isn't safe for modes with signed zeros, since if X and Y are
972 both +0, (minus Y X) is the same as (minus X Y). If the
973 rounding mode is towards +infinity (or -infinity) then the two
974 expressions will be rounded differently. */
975 if (GET_CODE (op) == MINUS
976 && !HONOR_SIGNED_ZEROS (mode)
977 && !HONOR_SIGN_DEPENDENT_ROUNDING (mode))
978 return simplify_gen_binary (MINUS, mode, XEXP (op, 1),
981 if (GET_CODE (op) == PLUS
982 && !HONOR_SIGNED_ZEROS (mode)
983 && !HONOR_SIGN_DEPENDENT_ROUNDING (mode))
985 /* (neg (plus A C)) is simplified to (minus -C A). */
986 if (GET_CODE (XEXP (op, 1)) == CONST_INT
987 || GET_CODE (XEXP (op, 1)) == CONST_DOUBLE)
989 temp = simplify_unary_operation (NEG, mode, XEXP (op, 1),
992 return simplify_gen_binary (MINUS, mode, temp,
996 /* (neg (plus A B)) is canonicalized to (minus (neg A) B). */
997 temp = simplify_gen_unary (NEG, mode, XEXP (op, 0), mode);
998 return simplify_gen_binary (MINUS, mode, temp, XEXP (op, 1));
1001 /* (neg (mult A B)) becomes (mult (neg A) B).
1002 This works even for floating-point values. */
1003 if (GET_CODE (op) == MULT
1004 && !HONOR_SIGN_DEPENDENT_ROUNDING (mode))
1006 temp = simplify_gen_unary (NEG, mode, XEXP (op, 0), mode);
1007 return simplify_gen_binary (MULT, mode, temp, XEXP (op, 1));
1010 /* NEG commutes with ASHIFT since it is multiplication. Only do
1011 this if we can then eliminate the NEG (e.g., if the operand
1013 if (GET_CODE (op) == ASHIFT)
1015 temp = simplify_unary_operation (NEG, mode, XEXP (op, 0),
1018 return simplify_gen_binary (ASHIFT, mode, temp,
1025 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
1026 becomes just the MINUS if its mode is MODE. This allows
1027 folding switch statements on machines using casesi (such as
1029 if (GET_CODE (op) == TRUNCATE
1030 && GET_MODE (XEXP (op, 0)) == mode
1031 && GET_CODE (XEXP (op, 0)) == MINUS
1032 && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF
1033 && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF)
1034 return XEXP (op, 0);
1036 /* Check for a sign extension of a subreg of a promoted
1037 variable, where the promotion is sign-extended, and the
1038 target mode is the same as the variable's promotion. */
1039 if (GET_CODE (op) == SUBREG
1040 && SUBREG_PROMOTED_VAR_P (op)
1041 && ! SUBREG_PROMOTED_UNSIGNED_P (op)
1042 && GET_MODE (XEXP (op, 0)) == mode)
1043 return XEXP (op, 0);
1045 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
1046 if (! POINTERS_EXTEND_UNSIGNED
1047 && mode == Pmode && GET_MODE (op) == ptr_mode
1049 || (GET_CODE (op) == SUBREG
1050 && GET_CODE (SUBREG_REG (op)) == REG
1051 && REG_POINTER (SUBREG_REG (op))
1052 && GET_MODE (SUBREG_REG (op)) == Pmode)))
1053 return convert_memory_address (Pmode, op);
1058 /* Check for a zero extension of a subreg of a promoted
1059 variable, where the promotion is zero-extended, and the
1060 target mode is the same as the variable's promotion. */
1061 if (GET_CODE (op) == SUBREG
1062 && SUBREG_PROMOTED_VAR_P (op)
1063 && SUBREG_PROMOTED_UNSIGNED_P (op)
1064 && GET_MODE (XEXP (op, 0)) == mode)
1065 return XEXP (op, 0);
1067 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
1068 if (POINTERS_EXTEND_UNSIGNED > 0
1069 && mode == Pmode && GET_MODE (op) == ptr_mode
1071 || (GET_CODE (op) == SUBREG
1072 && GET_CODE (SUBREG_REG (op)) == REG
1073 && REG_POINTER (SUBREG_REG (op))
1074 && GET_MODE (SUBREG_REG (op)) == Pmode)))
1075 return convert_memory_address (Pmode, op);
1087 /* Subroutine of simplify_associative_operation. Return true if rtx OP
1088 is a suitable integer or floating point immediate constant. */
1090 associative_constant_p (rtx op)
1092 if (GET_CODE (op) == CONST_INT
1093 || GET_CODE (op) == CONST_DOUBLE)
1095 op = avoid_constant_pool_reference (op);
1096 return GET_CODE (op) == CONST_INT
1097 || GET_CODE (op) == CONST_DOUBLE;
1100 /* Subroutine of simplify_binary_operation to simplify an associative
1101 binary operation CODE with result mode MODE, operating on OP0 and OP1.
1102 Return 0 if no simplification is possible. */
1104 simplify_associative_operation (enum rtx_code code, enum machine_mode mode,
1109 /* Simplify (x op c1) op c2 as x op (c1 op c2). */
1110 if (GET_CODE (op0) == code
1111 && associative_constant_p (op1)
1112 && associative_constant_p (XEXP (op0, 1)))
1114 tem = simplify_binary_operation (code, mode, XEXP (op0, 1), op1);
1117 return simplify_gen_binary (code, mode, XEXP (op0, 0), tem);
1120 /* Simplify (x op c1) op (y op c2) as (x op y) op (c1 op c2). */
1121 if (GET_CODE (op0) == code
1122 && GET_CODE (op1) == code
1123 && associative_constant_p (XEXP (op0, 1))
1124 && associative_constant_p (XEXP (op1, 1)))
1126 rtx c = simplify_binary_operation (code, mode,
1127 XEXP (op0, 1), XEXP (op1, 1));
1130 tem = simplify_gen_binary (code, mode, XEXP (op0, 0), XEXP (op1, 0));
1131 return simplify_gen_binary (code, mode, tem, c);
1134 /* Canonicalize (x op c) op y as (x op y) op c. */
1135 if (GET_CODE (op0) == code
1136 && associative_constant_p (XEXP (op0, 1)))
1138 tem = simplify_gen_binary (code, mode, XEXP (op0, 0), op1);
1139 return simplify_gen_binary (code, mode, tem, XEXP (op0, 1));
1142 /* Canonicalize x op (y op c) as (x op y) op c. */
1143 if (GET_CODE (op1) == code
1144 && associative_constant_p (XEXP (op1, 1)))
1146 tem = simplify_gen_binary (code, mode, op0, XEXP (op1, 0));
1147 return simplify_gen_binary (code, mode, tem, XEXP (op1, 1));
1153 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
1154 and OP1. Return 0 if no simplification is possible.
1156 Don't use this for relational operations such as EQ or LT.
1157 Use simplify_relational_operation instead. */
1159 simplify_binary_operation (enum rtx_code code, enum machine_mode mode,
1162 HOST_WIDE_INT arg0, arg1, arg0s, arg1s;
1164 unsigned int width = GET_MODE_BITSIZE (mode);
1166 rtx trueop0 = avoid_constant_pool_reference (op0);
1167 rtx trueop1 = avoid_constant_pool_reference (op1);
1169 /* Relational operations don't work here. We must know the mode
1170 of the operands in order to do the comparison correctly.
1171 Assuming a full word can give incorrect results.
1172 Consider comparing 128 with -128 in QImode. */
1174 if (GET_RTX_CLASS (code) == '<')
1177 /* Make sure the constant is second. */
1178 if (GET_RTX_CLASS (code) == 'c'
1179 && swap_commutative_operands_p (trueop0, trueop1))
1181 tem = op0, op0 = op1, op1 = tem;
1182 tem = trueop0, trueop0 = trueop1, trueop1 = tem;
1185 if (VECTOR_MODE_P (mode)
1186 && GET_CODE (trueop0) == CONST_VECTOR
1187 && GET_CODE (trueop1) == CONST_VECTOR)
1189 int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
1190 unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
1191 enum machine_mode op0mode = GET_MODE (trueop0);
1192 int op0_elt_size = GET_MODE_SIZE (GET_MODE_INNER (op0mode));
1193 unsigned op0_n_elts = (GET_MODE_SIZE (op0mode) / op0_elt_size);
1194 enum machine_mode op1mode = GET_MODE (trueop1);
1195 int op1_elt_size = GET_MODE_SIZE (GET_MODE_INNER (op1mode));
1196 unsigned op1_n_elts = (GET_MODE_SIZE (op1mode) / op1_elt_size);
1197 rtvec v = rtvec_alloc (n_elts);
1200 if (op0_n_elts != n_elts || op1_n_elts != n_elts)
1203 for (i = 0; i < n_elts; i++)
1205 rtx x = simplify_binary_operation (code, GET_MODE_INNER (mode),
1206 CONST_VECTOR_ELT (trueop0, i),
1207 CONST_VECTOR_ELT (trueop1, i));
1210 RTVEC_ELT (v, i) = x;
1213 return gen_rtx_CONST_VECTOR (mode, v);
1216 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1217 && GET_CODE (trueop0) == CONST_DOUBLE
1218 && GET_CODE (trueop1) == CONST_DOUBLE
1219 && mode == GET_MODE (op0) && mode == GET_MODE (op1))
1221 REAL_VALUE_TYPE f0, f1, value;
1223 REAL_VALUE_FROM_CONST_DOUBLE (f0, trueop0);
1224 REAL_VALUE_FROM_CONST_DOUBLE (f1, trueop1);
1225 f0 = real_value_truncate (mode, f0);
1226 f1 = real_value_truncate (mode, f1);
1228 if (HONOR_SNANS (mode)
1229 && (REAL_VALUE_ISNAN (f0) || REAL_VALUE_ISNAN (f1)))
1233 && REAL_VALUES_EQUAL (f1, dconst0)
1234 && (flag_trapping_math || ! MODE_HAS_INFINITIES (mode)))
1237 if (MODE_HAS_INFINITIES (mode) && HONOR_NANS (mode)
1238 && flag_trapping_math
1239 && REAL_VALUE_ISINF (f0) && REAL_VALUE_ISINF (f1))
1241 int s0 = REAL_VALUE_NEGATIVE (f0);
1242 int s1 = REAL_VALUE_NEGATIVE (f1);
1247 /* Inf + -Inf = NaN plus exception. */
1252 /* Inf - Inf = NaN plus exception. */
1257 /* Inf / Inf = NaN plus exception. */
1264 if (code == MULT && MODE_HAS_INFINITIES (mode) && HONOR_NANS (mode)
1265 && flag_trapping_math
1266 && ((REAL_VALUE_ISINF (f0) && REAL_VALUES_EQUAL (f1, dconst0))
1267 || (REAL_VALUE_ISINF (f1) && REAL_VALUES_EQUAL (f0, dconst0))))
1268 /* Inf * 0 = NaN plus exception. */
1271 REAL_ARITHMETIC (value, rtx_to_tree_code (code), f0, f1);
1273 value = real_value_truncate (mode, value);
1274 return CONST_DOUBLE_FROM_REAL_VALUE (value, mode);
1277 /* We can fold some multi-word operations. */
1278 if (GET_MODE_CLASS (mode) == MODE_INT
1279 && width == HOST_BITS_PER_WIDE_INT * 2
1280 && (GET_CODE (trueop0) == CONST_DOUBLE
1281 || GET_CODE (trueop0) == CONST_INT)
1282 && (GET_CODE (trueop1) == CONST_DOUBLE
1283 || GET_CODE (trueop1) == CONST_INT))
1285 unsigned HOST_WIDE_INT l1, l2, lv;
1286 HOST_WIDE_INT h1, h2, hv;
1288 if (GET_CODE (trueop0) == CONST_DOUBLE)
1289 l1 = CONST_DOUBLE_LOW (trueop0), h1 = CONST_DOUBLE_HIGH (trueop0);
1291 l1 = INTVAL (trueop0), h1 = HWI_SIGN_EXTEND (l1);
1293 if (GET_CODE (trueop1) == CONST_DOUBLE)
1294 l2 = CONST_DOUBLE_LOW (trueop1), h2 = CONST_DOUBLE_HIGH (trueop1);
1296 l2 = INTVAL (trueop1), h2 = HWI_SIGN_EXTEND (l2);
1301 /* A - B == A + (-B). */
1302 neg_double (l2, h2, &lv, &hv);
1305 /* Fall through.... */
1308 add_double (l1, h1, l2, h2, &lv, &hv);
1312 mul_double (l1, h1, l2, h2, &lv, &hv);
1315 case DIV: case MOD: case UDIV: case UMOD:
1316 /* We'd need to include tree.h to do this and it doesn't seem worth
1321 lv = l1 & l2, hv = h1 & h2;
1325 lv = l1 | l2, hv = h1 | h2;
1329 lv = l1 ^ l2, hv = h1 ^ h2;
1335 && ((unsigned HOST_WIDE_INT) l1
1336 < (unsigned HOST_WIDE_INT) l2)))
1345 && ((unsigned HOST_WIDE_INT) l1
1346 > (unsigned HOST_WIDE_INT) l2)))
1353 if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2
1355 && ((unsigned HOST_WIDE_INT) l1
1356 < (unsigned HOST_WIDE_INT) l2)))
1363 if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2
1365 && ((unsigned HOST_WIDE_INT) l1
1366 > (unsigned HOST_WIDE_INT) l2)))
1372 case LSHIFTRT: case ASHIFTRT:
1374 case ROTATE: case ROTATERT:
1375 #ifdef SHIFT_COUNT_TRUNCATED
1376 if (SHIFT_COUNT_TRUNCATED)
1377 l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0;
1380 if (h2 != 0 || l2 >= GET_MODE_BITSIZE (mode))
1383 if (code == LSHIFTRT || code == ASHIFTRT)
1384 rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
1386 else if (code == ASHIFT)
1387 lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 1);
1388 else if (code == ROTATE)
1389 lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
1390 else /* code == ROTATERT */
1391 rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
1398 return immed_double_const (lv, hv, mode);
1401 if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT
1402 || width > HOST_BITS_PER_WIDE_INT || width == 0)
1404 /* Even if we can't compute a constant result,
1405 there are some cases worth simplifying. */
1410 /* Maybe simplify x + 0 to x. The two expressions are equivalent
1411 when x is NaN, infinite, or finite and nonzero. They aren't
1412 when x is -0 and the rounding mode is not towards -infinity,
1413 since (-0) + 0 is then 0. */
1414 if (!HONOR_SIGNED_ZEROS (mode) && trueop1 == CONST0_RTX (mode))
1417 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)). These
1418 transformations are safe even for IEEE. */
1419 if (GET_CODE (op0) == NEG)
1420 return simplify_gen_binary (MINUS, mode, op1, XEXP (op0, 0));
1421 else if (GET_CODE (op1) == NEG)
1422 return simplify_gen_binary (MINUS, mode, op0, XEXP (op1, 0));
1424 /* (~a) + 1 -> -a */
1425 if (INTEGRAL_MODE_P (mode)
1426 && GET_CODE (op0) == NOT
1427 && trueop1 == const1_rtx)
1428 return simplify_gen_unary (NEG, mode, XEXP (op0, 0), mode);
1430 /* Handle both-operands-constant cases. We can only add
1431 CONST_INTs to constants since the sum of relocatable symbols
1432 can't be handled by most assemblers. Don't add CONST_INT
1433 to CONST_INT since overflow won't be computed properly if wider
1434 than HOST_BITS_PER_WIDE_INT. */
1436 if (CONSTANT_P (op0) && GET_MODE (op0) != VOIDmode
1437 && GET_CODE (op1) == CONST_INT)
1438 return plus_constant (op0, INTVAL (op1));
1439 else if (CONSTANT_P (op1) && GET_MODE (op1) != VOIDmode
1440 && GET_CODE (op0) == CONST_INT)
1441 return plus_constant (op1, INTVAL (op0));
1443 /* See if this is something like X * C - X or vice versa or
1444 if the multiplication is written as a shift. If so, we can
1445 distribute and make a new multiply, shift, or maybe just
1446 have X (if C is 2 in the example above). But don't make
1447 real multiply if we didn't have one before. */
1449 if (! FLOAT_MODE_P (mode))
1451 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
1452 rtx lhs = op0, rhs = op1;
1455 if (GET_CODE (lhs) == NEG)
1456 coeff0 = -1, lhs = XEXP (lhs, 0);
1457 else if (GET_CODE (lhs) == MULT
1458 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
1460 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
1463 else if (GET_CODE (lhs) == ASHIFT
1464 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
1465 && INTVAL (XEXP (lhs, 1)) >= 0
1466 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
1468 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
1469 lhs = XEXP (lhs, 0);
1472 if (GET_CODE (rhs) == NEG)
1473 coeff1 = -1, rhs = XEXP (rhs, 0);
1474 else if (GET_CODE (rhs) == MULT
1475 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
1477 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
1480 else if (GET_CODE (rhs) == ASHIFT
1481 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
1482 && INTVAL (XEXP (rhs, 1)) >= 0
1483 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
1485 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
1486 rhs = XEXP (rhs, 0);
1489 if (rtx_equal_p (lhs, rhs))
1491 tem = simplify_gen_binary (MULT, mode, lhs,
1492 GEN_INT (coeff0 + coeff1));
1493 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
1497 /* If one of the operands is a PLUS or a MINUS, see if we can
1498 simplify this by the associative law.
1499 Don't use the associative law for floating point.
1500 The inaccuracy makes it nonassociative,
1501 and subtle programs can break if operations are associated. */
1503 if (INTEGRAL_MODE_P (mode)
1504 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
1505 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS
1506 || (GET_CODE (op0) == CONST
1507 && GET_CODE (XEXP (op0, 0)) == PLUS)
1508 || (GET_CODE (op1) == CONST
1509 && GET_CODE (XEXP (op1, 0)) == PLUS))
1510 && (tem = simplify_plus_minus (code, mode, op0, op1, 0)) != 0)
1513 /* Reassociate floating point addition only when the user
1514 specifies unsafe math optimizations. */
1515 if (FLOAT_MODE_P (mode)
1516 && flag_unsafe_math_optimizations)
1518 tem = simplify_associative_operation (code, mode, op0, op1);
1526 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
1527 using cc0, in which case we want to leave it as a COMPARE
1528 so we can distinguish it from a register-register-copy.
1530 In IEEE floating point, x-0 is not the same as x. */
1532 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
1533 || ! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations)
1534 && trueop1 == CONST0_RTX (mode))
1538 /* Convert (compare (gt (flags) 0) (lt (flags) 0)) to (flags). */
1539 if (((GET_CODE (op0) == GT && GET_CODE (op1) == LT)
1540 || (GET_CODE (op0) == GTU && GET_CODE (op1) == LTU))
1541 && XEXP (op0, 1) == const0_rtx && XEXP (op1, 1) == const0_rtx)
1543 rtx xop00 = XEXP (op0, 0);
1544 rtx xop10 = XEXP (op1, 0);
1547 if (GET_CODE (xop00) == CC0 && GET_CODE (xop10) == CC0)
1549 if (GET_CODE (xop00) == REG && GET_CODE (xop10) == REG
1550 && GET_MODE (xop00) == GET_MODE (xop10)
1551 && REGNO (xop00) == REGNO (xop10)
1552 && GET_MODE_CLASS (GET_MODE (xop00)) == MODE_CC
1553 && GET_MODE_CLASS (GET_MODE (xop10)) == MODE_CC)
1560 /* We can't assume x-x is 0 even with non-IEEE floating point,
1561 but since it is zero except in very strange circumstances, we
1562 will treat it as zero with -funsafe-math-optimizations. */
1563 if (rtx_equal_p (trueop0, trueop1)
1564 && ! side_effects_p (op0)
1565 && (! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations))
1566 return CONST0_RTX (mode);
1568 /* Change subtraction from zero into negation. (0 - x) is the
1569 same as -x when x is NaN, infinite, or finite and nonzero.
1570 But if the mode has signed zeros, and does not round towards
1571 -infinity, then 0 - 0 is 0, not -0. */
1572 if (!HONOR_SIGNED_ZEROS (mode) && trueop0 == CONST0_RTX (mode))
1573 return simplify_gen_unary (NEG, mode, op1, mode);
1575 /* (-1 - a) is ~a. */
1576 if (trueop0 == constm1_rtx)
1577 return simplify_gen_unary (NOT, mode, op1, mode);
1579 /* Subtracting 0 has no effect unless the mode has signed zeros
1580 and supports rounding towards -infinity. In such a case,
1582 if (!(HONOR_SIGNED_ZEROS (mode)
1583 && HONOR_SIGN_DEPENDENT_ROUNDING (mode))
1584 && trueop1 == CONST0_RTX (mode))
1587 /* See if this is something like X * C - X or vice versa or
1588 if the multiplication is written as a shift. If so, we can
1589 distribute and make a new multiply, shift, or maybe just
1590 have X (if C is 2 in the example above). But don't make
1591 real multiply if we didn't have one before. */
1593 if (! FLOAT_MODE_P (mode))
1595 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
1596 rtx lhs = op0, rhs = op1;
1599 if (GET_CODE (lhs) == NEG)
1600 coeff0 = -1, lhs = XEXP (lhs, 0);
1601 else if (GET_CODE (lhs) == MULT
1602 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
1604 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
1607 else if (GET_CODE (lhs) == ASHIFT
1608 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
1609 && INTVAL (XEXP (lhs, 1)) >= 0
1610 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
1612 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
1613 lhs = XEXP (lhs, 0);
1616 if (GET_CODE (rhs) == NEG)
1617 coeff1 = - 1, rhs = XEXP (rhs, 0);
1618 else if (GET_CODE (rhs) == MULT
1619 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
1621 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
1624 else if (GET_CODE (rhs) == ASHIFT
1625 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
1626 && INTVAL (XEXP (rhs, 1)) >= 0
1627 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
1629 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
1630 rhs = XEXP (rhs, 0);
1633 if (rtx_equal_p (lhs, rhs))
1635 tem = simplify_gen_binary (MULT, mode, lhs,
1636 GEN_INT (coeff0 - coeff1));
1637 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
1641 /* (a - (-b)) -> (a + b). True even for IEEE. */
1642 if (GET_CODE (op1) == NEG)
1643 return simplify_gen_binary (PLUS, mode, op0, XEXP (op1, 0));
1645 /* (-x - c) may be simplified as (-c - x). */
1646 if (GET_CODE (op0) == NEG
1647 && (GET_CODE (op1) == CONST_INT
1648 || GET_CODE (op1) == CONST_DOUBLE))
1650 tem = simplify_unary_operation (NEG, mode, op1, mode);
1652 return simplify_gen_binary (MINUS, mode, tem, XEXP (op0, 0));
1655 /* If one of the operands is a PLUS or a MINUS, see if we can
1656 simplify this by the associative law.
1657 Don't use the associative law for floating point.
1658 The inaccuracy makes it nonassociative,
1659 and subtle programs can break if operations are associated. */
1661 if (INTEGRAL_MODE_P (mode)
1662 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
1663 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS
1664 || (GET_CODE (op0) == CONST
1665 && GET_CODE (XEXP (op0, 0)) == PLUS)
1666 || (GET_CODE (op1) == CONST
1667 && GET_CODE (XEXP (op1, 0)) == PLUS))
1668 && (tem = simplify_plus_minus (code, mode, op0, op1, 0)) != 0)
1671 /* Don't let a relocatable value get a negative coeff. */
1672 if (GET_CODE (op1) == CONST_INT && GET_MODE (op0) != VOIDmode)
1673 return simplify_gen_binary (PLUS, mode,
1675 neg_const_int (mode, op1));
1677 /* (x - (x & y)) -> (x & ~y) */
1678 if (GET_CODE (op1) == AND)
1680 if (rtx_equal_p (op0, XEXP (op1, 0)))
1682 tem = simplify_gen_unary (NOT, mode, XEXP (op1, 1),
1683 GET_MODE (XEXP (op1, 1)));
1684 return simplify_gen_binary (AND, mode, op0, tem);
1686 if (rtx_equal_p (op0, XEXP (op1, 1)))
1688 tem = simplify_gen_unary (NOT, mode, XEXP (op1, 0),
1689 GET_MODE (XEXP (op1, 0)));
1690 return simplify_gen_binary (AND, mode, op0, tem);
1696 if (trueop1 == constm1_rtx)
1697 return simplify_gen_unary (NEG, mode, op0, mode);
1699 /* Maybe simplify x * 0 to 0. The reduction is not valid if
1700 x is NaN, since x * 0 is then also NaN. Nor is it valid
1701 when the mode has signed zeros, since multiplying a negative
1702 number by 0 will give -0, not 0. */
1703 if (!HONOR_NANS (mode)
1704 && !HONOR_SIGNED_ZEROS (mode)
1705 && trueop1 == CONST0_RTX (mode)
1706 && ! side_effects_p (op0))
1709 /* In IEEE floating point, x*1 is not equivalent to x for
1711 if (!HONOR_SNANS (mode)
1712 && trueop1 == CONST1_RTX (mode))
1715 /* Convert multiply by constant power of two into shift unless
1716 we are still generating RTL. This test is a kludge. */
1717 if (GET_CODE (trueop1) == CONST_INT
1718 && (val = exact_log2 (INTVAL (trueop1))) >= 0
1719 /* If the mode is larger than the host word size, and the
1720 uppermost bit is set, then this isn't a power of two due
1721 to implicit sign extension. */
1722 && (width <= HOST_BITS_PER_WIDE_INT
1723 || val != HOST_BITS_PER_WIDE_INT - 1)
1724 && ! rtx_equal_function_value_matters)
1725 return simplify_gen_binary (ASHIFT, mode, op0, GEN_INT (val));
1727 /* x*2 is x+x and x*(-1) is -x */
1728 if (GET_CODE (trueop1) == CONST_DOUBLE
1729 && GET_MODE_CLASS (GET_MODE (trueop1)) == MODE_FLOAT
1730 && GET_MODE (op0) == mode)
1733 REAL_VALUE_FROM_CONST_DOUBLE (d, trueop1);
1735 if (REAL_VALUES_EQUAL (d, dconst2))
1736 return simplify_gen_binary (PLUS, mode, op0, copy_rtx (op0));
1738 if (REAL_VALUES_EQUAL (d, dconstm1))
1739 return simplify_gen_unary (NEG, mode, op0, mode);
1742 /* Reassociate multiplication, but for floating point MULTs
1743 only when the user specifies unsafe math optimizations. */
1744 if (! FLOAT_MODE_P (mode)
1745 || flag_unsafe_math_optimizations)
1747 tem = simplify_associative_operation (code, mode, op0, op1);
1754 if (trueop1 == const0_rtx)
1756 if (GET_CODE (trueop1) == CONST_INT
1757 && ((INTVAL (trueop1) & GET_MODE_MASK (mode))
1758 == GET_MODE_MASK (mode)))
1760 if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
1762 /* A | (~A) -> -1 */
1763 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
1764 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
1765 && ! side_effects_p (op0)
1766 && GET_MODE_CLASS (mode) != MODE_CC)
1768 tem = simplify_associative_operation (code, mode, op0, op1);
1774 if (trueop1 == const0_rtx)
1776 if (GET_CODE (trueop1) == CONST_INT
1777 && ((INTVAL (trueop1) & GET_MODE_MASK (mode))
1778 == GET_MODE_MASK (mode)))
1779 return simplify_gen_unary (NOT, mode, op0, mode);
1780 if (trueop0 == trueop1 && ! side_effects_p (op0)
1781 && GET_MODE_CLASS (mode) != MODE_CC)
1783 tem = simplify_associative_operation (code, mode, op0, op1);
1789 if (trueop1 == const0_rtx && ! side_effects_p (op0))
1791 if (GET_CODE (trueop1) == CONST_INT
1792 && ((INTVAL (trueop1) & GET_MODE_MASK (mode))
1793 == GET_MODE_MASK (mode)))
1795 if (trueop0 == trueop1 && ! side_effects_p (op0)
1796 && GET_MODE_CLASS (mode) != MODE_CC)
1799 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
1800 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
1801 && ! side_effects_p (op0)
1802 && GET_MODE_CLASS (mode) != MODE_CC)
1804 tem = simplify_associative_operation (code, mode, op0, op1);
1810 /* Convert divide by power of two into shift (divide by 1 handled
1812 if (GET_CODE (trueop1) == CONST_INT
1813 && (arg1 = exact_log2 (INTVAL (trueop1))) > 0)
1814 return simplify_gen_binary (LSHIFTRT, mode, op0, GEN_INT (arg1));
1816 /* Fall through.... */
1819 if (trueop1 == CONST1_RTX (mode))
1821 /* On some platforms DIV uses narrower mode than its
1823 rtx x = gen_lowpart_common (mode, op0);
1826 else if (mode != GET_MODE (op0) && GET_MODE (op0) != VOIDmode)
1827 return gen_lowpart_SUBREG (mode, op0);
1832 /* Maybe change 0 / x to 0. This transformation isn't safe for
1833 modes with NaNs, since 0 / 0 will then be NaN rather than 0.
1834 Nor is it safe for modes with signed zeros, since dividing
1835 0 by a negative number gives -0, not 0. */
1836 if (!HONOR_NANS (mode)
1837 && !HONOR_SIGNED_ZEROS (mode)
1838 && trueop0 == CONST0_RTX (mode)
1839 && ! side_effects_p (op1))
1842 /* Change division by a constant into multiplication. Only do
1843 this with -funsafe-math-optimizations. */
1844 else if (GET_CODE (trueop1) == CONST_DOUBLE
1845 && GET_MODE_CLASS (GET_MODE (trueop1)) == MODE_FLOAT
1846 && trueop1 != CONST0_RTX (mode)
1847 && flag_unsafe_math_optimizations)
1850 REAL_VALUE_FROM_CONST_DOUBLE (d, trueop1);
1852 if (! REAL_VALUES_EQUAL (d, dconst0))
1854 REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d);
1855 tem = CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
1856 return simplify_gen_binary (MULT, mode, op0, tem);
1862 /* Handle modulus by power of two (mod with 1 handled below). */
1863 if (GET_CODE (trueop1) == CONST_INT
1864 && exact_log2 (INTVAL (trueop1)) > 0)
1865 return simplify_gen_binary (AND, mode, op0,
1866 GEN_INT (INTVAL (op1) - 1));
1868 /* Fall through.... */
1871 if ((trueop0 == const0_rtx || trueop1 == const1_rtx)
1872 && ! side_effects_p (op0) && ! side_effects_p (op1))
1879 /* Rotating ~0 always results in ~0. */
1880 if (GET_CODE (trueop0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT
1881 && (unsigned HOST_WIDE_INT) INTVAL (trueop0) == GET_MODE_MASK (mode)
1882 && ! side_effects_p (op1))
1885 /* Fall through.... */
1889 if (trueop1 == const0_rtx)
1891 if (trueop0 == const0_rtx && ! side_effects_p (op1))
1896 if (width <= HOST_BITS_PER_WIDE_INT
1897 && GET_CODE (trueop1) == CONST_INT
1898 && INTVAL (trueop1) == (HOST_WIDE_INT) 1 << (width -1)
1899 && ! side_effects_p (op0))
1901 if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
1903 tem = simplify_associative_operation (code, mode, op0, op1);
1909 if (width <= HOST_BITS_PER_WIDE_INT
1910 && GET_CODE (trueop1) == CONST_INT
1911 && ((unsigned HOST_WIDE_INT) INTVAL (trueop1)
1912 == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1)
1913 && ! side_effects_p (op0))
1915 if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
1917 tem = simplify_associative_operation (code, mode, op0, op1);
1923 if (trueop1 == const0_rtx && ! side_effects_p (op0))
1925 if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
1927 tem = simplify_associative_operation (code, mode, op0, op1);
1933 if (trueop1 == constm1_rtx && ! side_effects_p (op0))
1935 if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
1937 tem = simplify_associative_operation (code, mode, op0, op1);
1946 /* ??? There are simplifications that can be done. */
1950 if (!VECTOR_MODE_P (mode))
1952 if (!VECTOR_MODE_P (GET_MODE (trueop0))
1954 != GET_MODE_INNER (GET_MODE (trueop0)))
1955 || GET_CODE (trueop1) != PARALLEL
1956 || XVECLEN (trueop1, 0) != 1
1957 || GET_CODE (XVECEXP (trueop1, 0, 0)) != CONST_INT)
1960 if (GET_CODE (trueop0) == CONST_VECTOR)
1961 return CONST_VECTOR_ELT (trueop0, INTVAL (XVECEXP (trueop1, 0, 0)));
1965 if (!VECTOR_MODE_P (GET_MODE (trueop0))
1966 || (GET_MODE_INNER (mode)
1967 != GET_MODE_INNER (GET_MODE (trueop0)))
1968 || GET_CODE (trueop1) != PARALLEL)
1971 if (GET_CODE (trueop0) == CONST_VECTOR)
1973 int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
1974 unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
1975 rtvec v = rtvec_alloc (n_elts);
1978 if (XVECLEN (trueop1, 0) != (int) n_elts)
1980 for (i = 0; i < n_elts; i++)
1982 rtx x = XVECEXP (trueop1, 0, i);
1984 if (GET_CODE (x) != CONST_INT)
1986 RTVEC_ELT (v, i) = CONST_VECTOR_ELT (trueop0, INTVAL (x));
1989 return gen_rtx_CONST_VECTOR (mode, v);
1995 enum machine_mode op0_mode = (GET_MODE (trueop0) != VOIDmode
1996 ? GET_MODE (trueop0)
1997 : GET_MODE_INNER (mode));
1998 enum machine_mode op1_mode = (GET_MODE (trueop1) != VOIDmode
1999 ? GET_MODE (trueop1)
2000 : GET_MODE_INNER (mode));
2002 if (!VECTOR_MODE_P (mode)
2003 || (GET_MODE_SIZE (op0_mode) + GET_MODE_SIZE (op1_mode)
2004 != GET_MODE_SIZE (mode)))
2007 if ((VECTOR_MODE_P (op0_mode)
2008 && (GET_MODE_INNER (mode)
2009 != GET_MODE_INNER (op0_mode)))
2010 || (!VECTOR_MODE_P (op0_mode)
2011 && GET_MODE_INNER (mode) != op0_mode))
2014 if ((VECTOR_MODE_P (op1_mode)
2015 && (GET_MODE_INNER (mode)
2016 != GET_MODE_INNER (op1_mode)))
2017 || (!VECTOR_MODE_P (op1_mode)
2018 && GET_MODE_INNER (mode) != op1_mode))
2021 if ((GET_CODE (trueop0) == CONST_VECTOR
2022 || GET_CODE (trueop0) == CONST_INT
2023 || GET_CODE (trueop0) == CONST_DOUBLE)
2024 && (GET_CODE (trueop1) == CONST_VECTOR
2025 || GET_CODE (trueop1) == CONST_INT
2026 || GET_CODE (trueop1) == CONST_DOUBLE))
2028 int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
2029 unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
2030 rtvec v = rtvec_alloc (n_elts);
2032 unsigned in_n_elts = 1;
2034 if (VECTOR_MODE_P (op0_mode))
2035 in_n_elts = (GET_MODE_SIZE (op0_mode) / elt_size);
2036 for (i = 0; i < n_elts; i++)
2040 if (!VECTOR_MODE_P (op0_mode))
2041 RTVEC_ELT (v, i) = trueop0;
2043 RTVEC_ELT (v, i) = CONST_VECTOR_ELT (trueop0, i);
2047 if (!VECTOR_MODE_P (op1_mode))
2048 RTVEC_ELT (v, i) = trueop1;
2050 RTVEC_ELT (v, i) = CONST_VECTOR_ELT (trueop1,
2055 return gen_rtx_CONST_VECTOR (mode, v);
2067 /* Get the integer argument values in two forms:
2068 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
2070 arg0 = INTVAL (trueop0);
2071 arg1 = INTVAL (trueop1);
2073 if (width < HOST_BITS_PER_WIDE_INT)
2075 arg0 &= ((HOST_WIDE_INT) 1 << width) - 1;
2076 arg1 &= ((HOST_WIDE_INT) 1 << width) - 1;
2079 if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1)))
2080 arg0s |= ((HOST_WIDE_INT) (-1) << width);
2083 if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1)))
2084 arg1s |= ((HOST_WIDE_INT) (-1) << width);
2092 /* Compute the value of the arithmetic. */
2097 val = arg0s + arg1s;
2101 val = arg0s - arg1s;
2105 val = arg0s * arg1s;
2110 || (arg0s == (HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
2113 val = arg0s / arg1s;
2118 || (arg0s == (HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
2121 val = arg0s % arg1s;
2126 || (arg0s == (HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
2129 val = (unsigned HOST_WIDE_INT) arg0 / arg1;
2134 || (arg0s == (HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
2137 val = (unsigned HOST_WIDE_INT) arg0 % arg1;
2153 /* If shift count is undefined, don't fold it; let the machine do
2154 what it wants. But truncate it if the machine will do that. */
2158 #ifdef SHIFT_COUNT_TRUNCATED
2159 if (SHIFT_COUNT_TRUNCATED)
2163 val = ((unsigned HOST_WIDE_INT) arg0) >> arg1;
2170 #ifdef SHIFT_COUNT_TRUNCATED
2171 if (SHIFT_COUNT_TRUNCATED)
2175 val = ((unsigned HOST_WIDE_INT) arg0) << arg1;
2182 #ifdef SHIFT_COUNT_TRUNCATED
2183 if (SHIFT_COUNT_TRUNCATED)
2187 val = arg0s >> arg1;
2189 /* Bootstrap compiler may not have sign extended the right shift.
2190 Manually extend the sign to insure bootstrap cc matches gcc. */
2191 if (arg0s < 0 && arg1 > 0)
2192 val |= ((HOST_WIDE_INT) -1) << (HOST_BITS_PER_WIDE_INT - arg1);
2201 val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1))
2202 | (((unsigned HOST_WIDE_INT) arg0) >> arg1));
2210 val = ((((unsigned HOST_WIDE_INT) arg0) << arg1)
2211 | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1)));
2215 /* Do nothing here. */
2219 val = arg0s <= arg1s ? arg0s : arg1s;
2223 val = ((unsigned HOST_WIDE_INT) arg0
2224 <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
2228 val = arg0s > arg1s ? arg0s : arg1s;
2232 val = ((unsigned HOST_WIDE_INT) arg0
2233 > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
2240 /* ??? There are simplifications that can be done. */
2247 val = trunc_int_for_mode (val, mode);
2249 return GEN_INT (val);
2252 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
2255 Rather than test for specific case, we do this by a brute-force method
2256 and do all possible simplifications until no more changes occur. Then
2257 we rebuild the operation.
2259 If FORCE is true, then always generate the rtx. This is used to
2260 canonicalize stuff emitted from simplify_gen_binary. Note that this
2261 can still fail if the rtx is too complex. It won't fail just because
2262 the result is not 'simpler' than the input, however. */
2264 struct simplify_plus_minus_op_data
2271 simplify_plus_minus_op_data_cmp (const void *p1, const void *p2)
2273 const struct simplify_plus_minus_op_data *d1 = p1;
2274 const struct simplify_plus_minus_op_data *d2 = p2;
2276 return (commutative_operand_precedence (d2->op)
2277 - commutative_operand_precedence (d1->op));
2281 simplify_plus_minus (enum rtx_code code, enum machine_mode mode, rtx op0,
2284 struct simplify_plus_minus_op_data ops[8];
2286 int n_ops = 2, input_ops = 2, input_consts = 0, n_consts;
2290 memset (ops, 0, sizeof ops);
2292 /* Set up the two operands and then expand them until nothing has been
2293 changed. If we run out of room in our array, give up; this should
2294 almost never happen. */
2299 ops[1].neg = (code == MINUS);
2305 for (i = 0; i < n_ops; i++)
2307 rtx this_op = ops[i].op;
2308 int this_neg = ops[i].neg;
2309 enum rtx_code this_code = GET_CODE (this_op);
2318 ops[n_ops].op = XEXP (this_op, 1);
2319 ops[n_ops].neg = (this_code == MINUS) ^ this_neg;
2322 ops[i].op = XEXP (this_op, 0);
2328 ops[i].op = XEXP (this_op, 0);
2329 ops[i].neg = ! this_neg;
2335 && GET_CODE (XEXP (this_op, 0)) == PLUS
2336 && CONSTANT_P (XEXP (XEXP (this_op, 0), 0))
2337 && CONSTANT_P (XEXP (XEXP (this_op, 0), 1)))
2339 ops[i].op = XEXP (XEXP (this_op, 0), 0);
2340 ops[n_ops].op = XEXP (XEXP (this_op, 0), 1);
2341 ops[n_ops].neg = this_neg;
2349 /* ~a -> (-a - 1) */
2352 ops[n_ops].op = constm1_rtx;
2353 ops[n_ops++].neg = this_neg;
2354 ops[i].op = XEXP (this_op, 0);
2355 ops[i].neg = !this_neg;
2363 ops[i].op = neg_const_int (mode, this_op);
2376 /* If we only have two operands, we can't do anything. */
2377 if (n_ops <= 2 && !force)
2380 /* Count the number of CONSTs we didn't split above. */
2381 for (i = 0; i < n_ops; i++)
2382 if (GET_CODE (ops[i].op) == CONST)
2385 /* Now simplify each pair of operands until nothing changes. The first
2386 time through just simplify constants against each other. */
2393 for (i = 0; i < n_ops - 1; i++)
2394 for (j = i + 1; j < n_ops; j++)
2396 rtx lhs = ops[i].op, rhs = ops[j].op;
2397 int lneg = ops[i].neg, rneg = ops[j].neg;
2399 if (lhs != 0 && rhs != 0
2400 && (! first || (CONSTANT_P (lhs) && CONSTANT_P (rhs))))
2402 enum rtx_code ncode = PLUS;
2408 tem = lhs, lhs = rhs, rhs = tem;
2410 else if (swap_commutative_operands_p (lhs, rhs))
2411 tem = lhs, lhs = rhs, rhs = tem;
2413 tem = simplify_binary_operation (ncode, mode, lhs, rhs);
2415 /* Reject "simplifications" that just wrap the two
2416 arguments in a CONST. Failure to do so can result
2417 in infinite recursion with simplify_binary_operation
2418 when it calls us to simplify CONST operations. */
2420 && ! (GET_CODE (tem) == CONST
2421 && GET_CODE (XEXP (tem, 0)) == ncode
2422 && XEXP (XEXP (tem, 0), 0) == lhs
2423 && XEXP (XEXP (tem, 0), 1) == rhs)
2424 /* Don't allow -x + -1 -> ~x simplifications in the
2425 first pass. This allows us the chance to combine
2426 the -1 with other constants. */
2428 && GET_CODE (tem) == NOT
2429 && XEXP (tem, 0) == rhs))
2432 if (GET_CODE (tem) == NEG)
2433 tem = XEXP (tem, 0), lneg = !lneg;
2434 if (GET_CODE (tem) == CONST_INT && lneg)
2435 tem = neg_const_int (mode, tem), lneg = 0;
2439 ops[j].op = NULL_RTX;
2449 /* Pack all the operands to the lower-numbered entries. */
2450 for (i = 0, j = 0; j < n_ops; j++)
2455 /* Sort the operations based on swap_commutative_operands_p. */
2456 qsort (ops, n_ops, sizeof (*ops), simplify_plus_minus_op_data_cmp);
2458 /* Create (minus -C X) instead of (neg (const (plus X C))). */
2460 && GET_CODE (ops[1].op) == CONST_INT
2461 && CONSTANT_P (ops[0].op)
2463 return gen_rtx_fmt_ee (MINUS, mode, ops[1].op, ops[0].op);
2465 /* We suppressed creation of trivial CONST expressions in the
2466 combination loop to avoid recursion. Create one manually now.
2467 The combination loop should have ensured that there is exactly
2468 one CONST_INT, and the sort will have ensured that it is last
2469 in the array and that any other constant will be next-to-last. */
2472 && GET_CODE (ops[n_ops - 1].op) == CONST_INT
2473 && CONSTANT_P (ops[n_ops - 2].op))
2475 rtx value = ops[n_ops - 1].op;
2476 if (ops[n_ops - 1].neg ^ ops[n_ops - 2].neg)
2477 value = neg_const_int (mode, value);
2478 ops[n_ops - 2].op = plus_constant (ops[n_ops - 2].op, INTVAL (value));
2482 /* Count the number of CONSTs that we generated. */
2484 for (i = 0; i < n_ops; i++)
2485 if (GET_CODE (ops[i].op) == CONST)
2488 /* Give up if we didn't reduce the number of operands we had. Make
2489 sure we count a CONST as two operands. If we have the same
2490 number of operands, but have made more CONSTs than before, this
2491 is also an improvement, so accept it. */
2493 && (n_ops + n_consts > input_ops
2494 || (n_ops + n_consts == input_ops && n_consts <= input_consts)))
2497 /* Put a non-negated operand first, if possible. */
2499 for (i = 0; i < n_ops && ops[i].neg; i++)
2502 ops[0].op = gen_rtx_NEG (mode, ops[0].op);
2511 /* Now make the result by performing the requested operations. */
2513 for (i = 1; i < n_ops; i++)
2514 result = gen_rtx_fmt_ee (ops[i].neg ? MINUS : PLUS,
2515 mode, result, ops[i].op);
2520 /* Like simplify_binary_operation except used for relational operators.
2521 MODE is the mode of the operands, not that of the result. If MODE
2522 is VOIDmode, both operands must also be VOIDmode and we compare the
2523 operands in "infinite precision".
2525 If no simplification is possible, this function returns zero. Otherwise,
2526 it returns either const_true_rtx or const0_rtx. */
2529 simplify_relational_operation (enum rtx_code code, enum machine_mode mode,
2532 int equal, op0lt, op0ltu, op1lt, op1ltu;
2537 if (mode == VOIDmode
2538 && (GET_MODE (op0) != VOIDmode
2539 || GET_MODE (op1) != VOIDmode))
2542 /* If op0 is a compare, extract the comparison arguments from it. */
2543 if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
2544 op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
2546 trueop0 = avoid_constant_pool_reference (op0);
2547 trueop1 = avoid_constant_pool_reference (op1);
2549 /* We can't simplify MODE_CC values since we don't know what the
2550 actual comparison is. */
2551 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC || CC0_P (op0))
2554 /* Make sure the constant is second. */
2555 if (swap_commutative_operands_p (trueop0, trueop1))
2557 tem = op0, op0 = op1, op1 = tem;
2558 tem = trueop0, trueop0 = trueop1, trueop1 = tem;
2559 code = swap_condition (code);
2562 /* For integer comparisons of A and B maybe we can simplify A - B and can
2563 then simplify a comparison of that with zero. If A and B are both either
2564 a register or a CONST_INT, this can't help; testing for these cases will
2565 prevent infinite recursion here and speed things up.
2567 If CODE is an unsigned comparison, then we can never do this optimization,
2568 because it gives an incorrect result if the subtraction wraps around zero.
2569 ANSI C defines unsigned operations such that they never overflow, and
2570 thus such cases can not be ignored. */
2572 if (INTEGRAL_MODE_P (mode) && trueop1 != const0_rtx
2573 && ! ((GET_CODE (op0) == REG || GET_CODE (trueop0) == CONST_INT)
2574 && (GET_CODE (op1) == REG || GET_CODE (trueop1) == CONST_INT))
2575 && 0 != (tem = simplify_binary_operation (MINUS, mode, op0, op1))
2576 /* We cannot do this for == or != if tem is a nonzero address. */
2577 && ((code != EQ && code != NE) || ! nonzero_address_p (tem))
2578 && code != GTU && code != GEU && code != LTU && code != LEU)
2579 return simplify_relational_operation (signed_condition (code),
2580 mode, tem, const0_rtx);
2582 if (flag_unsafe_math_optimizations && code == ORDERED)
2583 return const_true_rtx;
2585 if (flag_unsafe_math_optimizations && code == UNORDERED)
2588 /* For modes without NaNs, if the two operands are equal, we know the
2589 result except if they have side-effects. */
2590 if (! HONOR_NANS (GET_MODE (trueop0))
2591 && rtx_equal_p (trueop0, trueop1)
2592 && ! side_effects_p (trueop0))
2593 equal = 1, op0lt = 0, op0ltu = 0, op1lt = 0, op1ltu = 0;
2595 /* If the operands are floating-point constants, see if we can fold
2597 else if (GET_CODE (trueop0) == CONST_DOUBLE
2598 && GET_CODE (trueop1) == CONST_DOUBLE
2599 && GET_MODE_CLASS (GET_MODE (trueop0)) == MODE_FLOAT)
2601 REAL_VALUE_TYPE d0, d1;
2603 REAL_VALUE_FROM_CONST_DOUBLE (d0, trueop0);
2604 REAL_VALUE_FROM_CONST_DOUBLE (d1, trueop1);
2606 /* Comparisons are unordered iff at least one of the values is NaN. */
2607 if (REAL_VALUE_ISNAN (d0) || REAL_VALUE_ISNAN (d1))
2617 return const_true_rtx;
2630 equal = REAL_VALUES_EQUAL (d0, d1);
2631 op0lt = op0ltu = REAL_VALUES_LESS (d0, d1);
2632 op1lt = op1ltu = REAL_VALUES_LESS (d1, d0);
2635 /* Otherwise, see if the operands are both integers. */
2636 else if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode)
2637 && (GET_CODE (trueop0) == CONST_DOUBLE
2638 || GET_CODE (trueop0) == CONST_INT)
2639 && (GET_CODE (trueop1) == CONST_DOUBLE
2640 || GET_CODE (trueop1) == CONST_INT))
2642 int width = GET_MODE_BITSIZE (mode);
2643 HOST_WIDE_INT l0s, h0s, l1s, h1s;
2644 unsigned HOST_WIDE_INT l0u, h0u, l1u, h1u;
2646 /* Get the two words comprising each integer constant. */
2647 if (GET_CODE (trueop0) == CONST_DOUBLE)
2649 l0u = l0s = CONST_DOUBLE_LOW (trueop0);
2650 h0u = h0s = CONST_DOUBLE_HIGH (trueop0);
2654 l0u = l0s = INTVAL (trueop0);
2655 h0u = h0s = HWI_SIGN_EXTEND (l0s);
2658 if (GET_CODE (trueop1) == CONST_DOUBLE)
2660 l1u = l1s = CONST_DOUBLE_LOW (trueop1);
2661 h1u = h1s = CONST_DOUBLE_HIGH (trueop1);
2665 l1u = l1s = INTVAL (trueop1);
2666 h1u = h1s = HWI_SIGN_EXTEND (l1s);
2669 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
2670 we have to sign or zero-extend the values. */
2671 if (width != 0 && width < HOST_BITS_PER_WIDE_INT)
2673 l0u &= ((HOST_WIDE_INT) 1 << width) - 1;
2674 l1u &= ((HOST_WIDE_INT) 1 << width) - 1;
2676 if (l0s & ((HOST_WIDE_INT) 1 << (width - 1)))
2677 l0s |= ((HOST_WIDE_INT) (-1) << width);
2679 if (l1s & ((HOST_WIDE_INT) 1 << (width - 1)))
2680 l1s |= ((HOST_WIDE_INT) (-1) << width);
2682 if (width != 0 && width <= HOST_BITS_PER_WIDE_INT)
2683 h0u = h1u = 0, h0s = HWI_SIGN_EXTEND (l0s), h1s = HWI_SIGN_EXTEND (l1s);
2685 equal = (h0u == h1u && l0u == l1u);
2686 op0lt = (h0s < h1s || (h0s == h1s && l0u < l1u));
2687 op1lt = (h1s < h0s || (h1s == h0s && l1u < l0u));
2688 op0ltu = (h0u < h1u || (h0u == h1u && l0u < l1u));
2689 op1ltu = (h1u < h0u || (h1u == h0u && l1u < l0u));
2692 /* Otherwise, there are some code-specific tests we can make. */
2698 if (trueop1 == const0_rtx && nonzero_address_p (op0))
2703 if (trueop1 == const0_rtx && nonzero_address_p (op0))
2704 return const_true_rtx;
2708 /* Unsigned values are never negative. */
2709 if (trueop1 == const0_rtx)
2710 return const_true_rtx;
2714 if (trueop1 == const0_rtx)
2719 /* Unsigned values are never greater than the largest
2721 if (GET_CODE (trueop1) == CONST_INT
2722 && (unsigned HOST_WIDE_INT) INTVAL (trueop1) == GET_MODE_MASK (mode)
2723 && INTEGRAL_MODE_P (mode))
2724 return const_true_rtx;
2728 if (GET_CODE (trueop1) == CONST_INT
2729 && (unsigned HOST_WIDE_INT) INTVAL (trueop1) == GET_MODE_MASK (mode)
2730 && INTEGRAL_MODE_P (mode))
2735 /* Optimize abs(x) < 0.0. */
2736 if (trueop1 == CONST0_RTX (mode) && !HONOR_SNANS (mode))
2738 tem = GET_CODE (trueop0) == FLOAT_EXTEND ? XEXP (trueop0, 0)
2740 if (GET_CODE (tem) == ABS)
2746 /* Optimize abs(x) >= 0.0. */
2747 if (trueop1 == CONST0_RTX (mode) && !HONOR_NANS (mode))
2749 tem = GET_CODE (trueop0) == FLOAT_EXTEND ? XEXP (trueop0, 0)
2751 if (GET_CODE (tem) == ABS)
2752 return const_true_rtx;
2757 /* Optimize ! (abs(x) < 0.0). */
2758 if (trueop1 == CONST0_RTX (mode))
2760 tem = GET_CODE (trueop0) == FLOAT_EXTEND ? XEXP (trueop0, 0)
2762 if (GET_CODE (tem) == ABS)
2763 return const_true_rtx;
2774 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
2780 return equal ? const_true_rtx : const0_rtx;
2783 return ! equal ? const_true_rtx : const0_rtx;
2786 return op0lt ? const_true_rtx : const0_rtx;
2789 return op1lt ? const_true_rtx : const0_rtx;
2791 return op0ltu ? const_true_rtx : const0_rtx;
2793 return op1ltu ? const_true_rtx : const0_rtx;
2796 return equal || op0lt ? const_true_rtx : const0_rtx;
2799 return equal || op1lt ? const_true_rtx : const0_rtx;
2801 return equal || op0ltu ? const_true_rtx : const0_rtx;
2803 return equal || op1ltu ? const_true_rtx : const0_rtx;
2805 return const_true_rtx;
2813 /* Simplify CODE, an operation with result mode MODE and three operands,
2814 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
2815 a constant. Return 0 if no simplifications is possible. */
2818 simplify_ternary_operation (enum rtx_code code, enum machine_mode mode,
2819 enum machine_mode op0_mode, rtx op0, rtx op1,
2822 unsigned int width = GET_MODE_BITSIZE (mode);
2824 /* VOIDmode means "infinite" precision. */
2826 width = HOST_BITS_PER_WIDE_INT;
2832 if (GET_CODE (op0) == CONST_INT
2833 && GET_CODE (op1) == CONST_INT
2834 && GET_CODE (op2) == CONST_INT
2835 && ((unsigned) INTVAL (op1) + (unsigned) INTVAL (op2) <= width)
2836 && width <= (unsigned) HOST_BITS_PER_WIDE_INT)
2838 /* Extracting a bit-field from a constant */
2839 HOST_WIDE_INT val = INTVAL (op0);
2841 if (BITS_BIG_ENDIAN)
2842 val >>= (GET_MODE_BITSIZE (op0_mode)
2843 - INTVAL (op2) - INTVAL (op1));
2845 val >>= INTVAL (op2);
2847 if (HOST_BITS_PER_WIDE_INT != INTVAL (op1))
2849 /* First zero-extend. */
2850 val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1;
2851 /* If desired, propagate sign bit. */
2852 if (code == SIGN_EXTRACT
2853 && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1))))
2854 val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1);
2857 /* Clear the bits that don't belong in our mode,
2858 unless they and our sign bit are all one.
2859 So we get either a reasonable negative value or a reasonable
2860 unsigned value for this mode. */
2861 if (width < HOST_BITS_PER_WIDE_INT
2862 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
2863 != ((HOST_WIDE_INT) (-1) << (width - 1))))
2864 val &= ((HOST_WIDE_INT) 1 << width) - 1;
2866 return GEN_INT (val);
2871 if (GET_CODE (op0) == CONST_INT)
2872 return op0 != const0_rtx ? op1 : op2;
2874 /* Convert c ? a : a into "a". */
2875 if (rtx_equal_p (op1, op2) && ! side_effects_p (op0))
2878 /* Convert a != b ? a : b into "a". */
2879 if (GET_CODE (op0) == NE
2880 && ! side_effects_p (op0)
2881 && ! HONOR_NANS (mode)
2882 && ! HONOR_SIGNED_ZEROS (mode)
2883 && ((rtx_equal_p (XEXP (op0, 0), op1)
2884 && rtx_equal_p (XEXP (op0, 1), op2))
2885 || (rtx_equal_p (XEXP (op0, 0), op2)
2886 && rtx_equal_p (XEXP (op0, 1), op1))))
2889 /* Convert a == b ? a : b into "b". */
2890 if (GET_CODE (op0) == EQ
2891 && ! side_effects_p (op0)
2892 && ! HONOR_NANS (mode)
2893 && ! HONOR_SIGNED_ZEROS (mode)
2894 && ((rtx_equal_p (XEXP (op0, 0), op1)
2895 && rtx_equal_p (XEXP (op0, 1), op2))
2896 || (rtx_equal_p (XEXP (op0, 0), op2)
2897 && rtx_equal_p (XEXP (op0, 1), op1))))
2900 if (GET_RTX_CLASS (GET_CODE (op0)) == '<' && ! side_effects_p (op0))
2902 enum machine_mode cmp_mode = (GET_MODE (XEXP (op0, 0)) == VOIDmode
2903 ? GET_MODE (XEXP (op0, 1))
2904 : GET_MODE (XEXP (op0, 0)));
2906 if (cmp_mode == VOIDmode)
2907 cmp_mode = op0_mode;
2908 temp = simplify_relational_operation (GET_CODE (op0), cmp_mode,
2909 XEXP (op0, 0), XEXP (op0, 1));
2911 /* See if any simplifications were possible. */
2912 if (temp == const0_rtx)
2914 else if (temp == const_true_rtx)
2919 /* Look for happy constants in op1 and op2. */
2920 if (GET_CODE (op1) == CONST_INT && GET_CODE (op2) == CONST_INT)
2922 HOST_WIDE_INT t = INTVAL (op1);
2923 HOST_WIDE_INT f = INTVAL (op2);
2925 if (t == STORE_FLAG_VALUE && f == 0)
2926 code = GET_CODE (op0);
2927 else if (t == 0 && f == STORE_FLAG_VALUE)
2930 tmp = reversed_comparison_code (op0, NULL_RTX);
2938 return gen_rtx_fmt_ee (code, mode, XEXP (op0, 0), XEXP (op0, 1));
2944 if (GET_MODE (op0) != mode
2945 || GET_MODE (op1) != mode
2946 || !VECTOR_MODE_P (mode))
2948 op2 = avoid_constant_pool_reference (op2);
2949 if (GET_CODE (op2) == CONST_INT)
2951 int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
2952 unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
2953 int mask = (1 << n_elts) - 1;
2955 if (!(INTVAL (op2) & mask))
2957 if ((INTVAL (op2) & mask) == mask)
2960 op0 = avoid_constant_pool_reference (op0);
2961 op1 = avoid_constant_pool_reference (op1);
2962 if (GET_CODE (op0) == CONST_VECTOR
2963 && GET_CODE (op1) == CONST_VECTOR)
2965 rtvec v = rtvec_alloc (n_elts);
2968 for (i = 0; i < n_elts; i++)
2969 RTVEC_ELT (v, i) = (INTVAL (op2) & (1 << i)
2970 ? CONST_VECTOR_ELT (op0, i)
2971 : CONST_VECTOR_ELT (op1, i));
2972 return gen_rtx_CONST_VECTOR (mode, v);
2984 /* Evaluate a SUBREG of a CONST_INT or CONST_DOUBLE or CONST_VECTOR,
2985 returning another CONST_INT or CONST_DOUBLE or CONST_VECTOR.
2987 Works by unpacking OP into a collection of 8-bit values
2988 represented as a little-endian array of 'unsigned char', selecting by BYTE,
2989 and then repacking them again for OUTERMODE. */
2992 simplify_immed_subreg (enum machine_mode outermode, rtx op,
2993 enum machine_mode innermode, unsigned int byte)
2995 /* We support up to 512-bit values (for V8DFmode). */
2999 value_mask = (1 << value_bit) - 1
3001 unsigned char value[max_bitsize / value_bit];
3010 rtvec result_v = NULL;
3011 enum mode_class outer_class;
3012 enum machine_mode outer_submode;
3014 /* Some ports misuse CCmode. */
3015 if (GET_MODE_CLASS (outermode) == MODE_CC && GET_CODE (op) == CONST_INT)
3018 /* Unpack the value. */
3020 if (GET_CODE (op) == CONST_VECTOR)
3022 num_elem = CONST_VECTOR_NUNITS (op);
3023 elems = &CONST_VECTOR_ELT (op, 0);
3024 elem_bitsize = GET_MODE_BITSIZE (GET_MODE_INNER (innermode));
3030 elem_bitsize = max_bitsize;
3033 if (BITS_PER_UNIT % value_bit != 0)
3034 abort (); /* Too complicated; reducing value_bit may help. */
3035 if (elem_bitsize % BITS_PER_UNIT != 0)
3036 abort (); /* I don't know how to handle endianness of sub-units. */
3038 for (elem = 0; elem < num_elem; elem++)
3041 rtx el = elems[elem];
3043 /* Vectors are kept in target memory order. (This is probably
3046 unsigned byte = (elem * elem_bitsize) / BITS_PER_UNIT;
3047 unsigned ibyte = (((num_elem - 1 - elem) * elem_bitsize)
3049 unsigned word_byte = WORDS_BIG_ENDIAN ? ibyte : byte;
3050 unsigned subword_byte = BYTES_BIG_ENDIAN ? ibyte : byte;
3051 unsigned bytele = (subword_byte % UNITS_PER_WORD
3052 + (word_byte / UNITS_PER_WORD) * UNITS_PER_WORD);
3053 vp = value + (bytele * BITS_PER_UNIT) / value_bit;
3056 switch (GET_CODE (el))
3060 i < HOST_BITS_PER_WIDE_INT && i < elem_bitsize;
3062 *vp++ = INTVAL (el) >> i;
3063 /* CONST_INTs are always logically sign-extended. */
3064 for (; i < elem_bitsize; i += value_bit)
3065 *vp++ = INTVAL (el) < 0 ? -1 : 0;
3069 if (GET_MODE (el) == VOIDmode)
3071 /* If this triggers, someone should have generated a
3072 CONST_INT instead. */
3073 if (elem_bitsize <= HOST_BITS_PER_WIDE_INT)
3076 for (i = 0; i < HOST_BITS_PER_WIDE_INT; i += value_bit)
3077 *vp++ = CONST_DOUBLE_LOW (el) >> i;
3078 while (i < HOST_BITS_PER_WIDE_INT * 2 && i < elem_bitsize)
3081 = CONST_DOUBLE_HIGH (el) >> (i - HOST_BITS_PER_WIDE_INT);
3084 /* It shouldn't matter what's done here, so fill it with
3086 for (; i < max_bitsize; i += value_bit)
3089 else if (GET_MODE_CLASS (GET_MODE (el)) == MODE_FLOAT)
3091 long tmp[max_bitsize / 32];
3092 int bitsize = GET_MODE_BITSIZE (GET_MODE (el));
3094 if (bitsize > elem_bitsize)
3096 if (bitsize % value_bit != 0)
3099 real_to_target (tmp, CONST_DOUBLE_REAL_VALUE (el),
3102 /* real_to_target produces its result in words affected by
3103 FLOAT_WORDS_BIG_ENDIAN. However, we ignore this,
3104 and use WORDS_BIG_ENDIAN instead; see the documentation
3105 of SUBREG in rtl.texi. */
3106 for (i = 0; i < bitsize; i += value_bit)
3109 if (WORDS_BIG_ENDIAN)
3110 ibase = bitsize - 1 - i;
3113 *vp++ = tmp[ibase / 32] >> i % 32;
3116 /* It shouldn't matter what's done here, so fill it with
3118 for (; i < elem_bitsize; i += value_bit)
3130 /* Now, pick the right byte to start with. */
3131 /* Renumber BYTE so that the least-significant byte is byte 0. A special
3132 case is paradoxical SUBREGs, which shouldn't be adjusted since they
3133 will already have offset 0. */
3134 if (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode))
3136 unsigned ibyte = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode)
3138 unsigned word_byte = WORDS_BIG_ENDIAN ? ibyte : byte;
3139 unsigned subword_byte = BYTES_BIG_ENDIAN ? ibyte : byte;
3140 byte = (subword_byte % UNITS_PER_WORD
3141 + (word_byte / UNITS_PER_WORD) * UNITS_PER_WORD);
3144 /* BYTE should still be inside OP. (Note that BYTE is unsigned,
3145 so if it's become negative it will instead be very large.) */
3146 if (byte >= GET_MODE_SIZE (innermode))
3149 /* Convert from bytes to chunks of size value_bit. */
3150 value_start = byte * (BITS_PER_UNIT / value_bit);
3152 /* Re-pack the value. */
3154 if (VECTOR_MODE_P (outermode))
3156 num_elem = GET_MODE_NUNITS (outermode);
3157 result_v = rtvec_alloc (num_elem);
3158 elems = &RTVEC_ELT (result_v, 0);
3159 outer_submode = GET_MODE_INNER (outermode);
3165 outer_submode = outermode;
3168 outer_class = GET_MODE_CLASS (outer_submode);
3169 elem_bitsize = GET_MODE_BITSIZE (outer_submode);
3171 if (elem_bitsize % value_bit != 0)
3173 if (elem_bitsize + value_start * value_bit > max_bitsize)
3176 for (elem = 0; elem < num_elem; elem++)
3180 /* Vectors are stored in target memory order. (This is probably
3183 unsigned byte = (elem * elem_bitsize) / BITS_PER_UNIT;
3184 unsigned ibyte = (((num_elem - 1 - elem) * elem_bitsize)
3186 unsigned word_byte = WORDS_BIG_ENDIAN ? ibyte : byte;
3187 unsigned subword_byte = BYTES_BIG_ENDIAN ? ibyte : byte;
3188 unsigned bytele = (subword_byte % UNITS_PER_WORD
3189 + (word_byte / UNITS_PER_WORD) * UNITS_PER_WORD);
3190 vp = value + value_start + (bytele * BITS_PER_UNIT) / value_bit;
3193 switch (outer_class)
3196 case MODE_PARTIAL_INT:
3198 unsigned HOST_WIDE_INT hi = 0, lo = 0;
3201 i < HOST_BITS_PER_WIDE_INT && i < elem_bitsize;
3203 lo |= (HOST_WIDE_INT)(*vp++ & value_mask) << i;
3204 for (; i < elem_bitsize; i += value_bit)
3205 hi |= ((HOST_WIDE_INT)(*vp++ & value_mask)
3206 << (i - HOST_BITS_PER_WIDE_INT));
3208 /* immed_double_const doesn't call trunc_int_for_mode. I don't
3210 if (elem_bitsize <= HOST_BITS_PER_WIDE_INT)
3211 elems[elem] = gen_int_mode (lo, outer_submode);
3213 elems[elem] = immed_double_const (lo, hi, outer_submode);
3220 long tmp[max_bitsize / 32];
3222 /* real_from_target wants its input in words affected by
3223 FLOAT_WORDS_BIG_ENDIAN. However, we ignore this,
3224 and use WORDS_BIG_ENDIAN instead; see the documentation
3225 of SUBREG in rtl.texi. */
3226 for (i = 0; i < max_bitsize / 32; i++)
3228 for (i = 0; i < elem_bitsize; i += value_bit)
3231 if (WORDS_BIG_ENDIAN)
3232 ibase = elem_bitsize - 1 - i;
3235 tmp[ibase / 32] |= (*vp++ & value_mask) << i % 32;
3238 real_from_target (&r, tmp, outer_submode);
3239 elems[elem] = CONST_DOUBLE_FROM_REAL_VALUE (r, outer_submode);
3247 if (VECTOR_MODE_P (outermode))
3248 return gen_rtx_CONST_VECTOR (outermode, result_v);
3253 /* Simplify SUBREG:OUTERMODE(OP:INNERMODE, BYTE)
3254 Return 0 if no simplifications are possible. */
3256 simplify_subreg (enum machine_mode outermode, rtx op,
3257 enum machine_mode innermode, unsigned int byte)
3259 /* Little bit of sanity checking. */
3260 if (innermode == VOIDmode || outermode == VOIDmode
3261 || innermode == BLKmode || outermode == BLKmode)
3264 if (GET_MODE (op) != innermode
3265 && GET_MODE (op) != VOIDmode)
3268 if (byte % GET_MODE_SIZE (outermode)
3269 || byte >= GET_MODE_SIZE (innermode))
3272 if (outermode == innermode && !byte)
3275 if (GET_CODE (op) == CONST_INT
3276 || GET_CODE (op) == CONST_DOUBLE
3277 || GET_CODE (op) == CONST_VECTOR)
3278 return simplify_immed_subreg (outermode, op, innermode, byte);
3280 /* Changing mode twice with SUBREG => just change it once,
3281 or not at all if changing back op starting mode. */
3282 if (GET_CODE (op) == SUBREG)
3284 enum machine_mode innermostmode = GET_MODE (SUBREG_REG (op));
3285 int final_offset = byte + SUBREG_BYTE (op);
3288 if (outermode == innermostmode
3289 && byte == 0 && SUBREG_BYTE (op) == 0)
3290 return SUBREG_REG (op);
3292 /* The SUBREG_BYTE represents offset, as if the value were stored
3293 in memory. Irritating exception is paradoxical subreg, where
3294 we define SUBREG_BYTE to be 0. On big endian machines, this
3295 value should be negative. For a moment, undo this exception. */
3296 if (byte == 0 && GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
3298 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
3299 if (WORDS_BIG_ENDIAN)
3300 final_offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3301 if (BYTES_BIG_ENDIAN)
3302 final_offset += difference % UNITS_PER_WORD;
3304 if (SUBREG_BYTE (op) == 0
3305 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3307 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3308 if (WORDS_BIG_ENDIAN)
3309 final_offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3310 if (BYTES_BIG_ENDIAN)
3311 final_offset += difference % UNITS_PER_WORD;
3314 /* See whether resulting subreg will be paradoxical. */
3315 if (GET_MODE_SIZE (innermostmode) > GET_MODE_SIZE (outermode))
3317 /* In nonparadoxical subregs we can't handle negative offsets. */
3318 if (final_offset < 0)
3320 /* Bail out in case resulting subreg would be incorrect. */
3321 if (final_offset % GET_MODE_SIZE (outermode)
3322 || (unsigned) final_offset >= GET_MODE_SIZE (innermostmode))
3328 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (outermode));
3330 /* In paradoxical subreg, see if we are still looking on lower part.
3331 If so, our SUBREG_BYTE will be 0. */
3332 if (WORDS_BIG_ENDIAN)
3333 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3334 if (BYTES_BIG_ENDIAN)
3335 offset += difference % UNITS_PER_WORD;
3336 if (offset == final_offset)
3342 /* Recurse for further possible simplifications. */
3343 new = simplify_subreg (outermode, SUBREG_REG (op),
3344 GET_MODE (SUBREG_REG (op)),
3348 return gen_rtx_SUBREG (outermode, SUBREG_REG (op), final_offset);
3351 /* SUBREG of a hard register => just change the register number
3352 and/or mode. If the hard register is not valid in that mode,
3353 suppress this simplification. If the hard register is the stack,
3354 frame, or argument pointer, leave this as a SUBREG. */
3357 && (! REG_FUNCTION_VALUE_P (op)
3358 || ! rtx_equal_function_value_matters)
3359 && REGNO (op) < FIRST_PSEUDO_REGISTER
3360 #ifdef CANNOT_CHANGE_MODE_CLASS
3361 && ! (REG_CANNOT_CHANGE_MODE_P (REGNO (op), innermode, outermode)
3362 && GET_MODE_CLASS (innermode) != MODE_COMPLEX_INT
3363 && GET_MODE_CLASS (innermode) != MODE_COMPLEX_FLOAT)
3365 && ((reload_completed && !frame_pointer_needed)
3366 || (REGNO (op) != FRAME_POINTER_REGNUM
3367 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
3368 && REGNO (op) != HARD_FRAME_POINTER_REGNUM
3371 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3372 && REGNO (op) != ARG_POINTER_REGNUM
3374 && REGNO (op) != STACK_POINTER_REGNUM
3375 && subreg_offset_representable_p (REGNO (op), innermode,
3378 rtx tem = gen_rtx_SUBREG (outermode, op, byte);
3379 int final_regno = subreg_hard_regno (tem, 0);
3381 /* ??? We do allow it if the current REG is not valid for
3382 its mode. This is a kludge to work around how float/complex
3383 arguments are passed on 32-bit SPARC and should be fixed. */
3384 if (HARD_REGNO_MODE_OK (final_regno, outermode)
3385 || ! HARD_REGNO_MODE_OK (REGNO (op), innermode))
3387 rtx x = gen_rtx_REG_offset (op, outermode, final_regno, byte);
3389 /* Propagate original regno. We don't have any way to specify
3390 the offset inside original regno, so do so only for lowpart.
3391 The information is used only by alias analysis that can not
3392 grog partial register anyway. */
3394 if (subreg_lowpart_offset (outermode, innermode) == byte)
3395 ORIGINAL_REGNO (x) = ORIGINAL_REGNO (op);
3400 /* If we have a SUBREG of a register that we are replacing and we are
3401 replacing it with a MEM, make a new MEM and try replacing the
3402 SUBREG with it. Don't do this if the MEM has a mode-dependent address
3403 or if we would be widening it. */
3405 if (GET_CODE (op) == MEM
3406 && ! mode_dependent_address_p (XEXP (op, 0))
3407 /* Allow splitting of volatile memory references in case we don't
3408 have instruction to move the whole thing. */
3409 && (! MEM_VOLATILE_P (op)
3410 || ! have_insn_for (SET, innermode))
3411 && GET_MODE_SIZE (outermode) <= GET_MODE_SIZE (GET_MODE (op)))
3412 return adjust_address_nv (op, outermode, byte);
3414 /* Handle complex values represented as CONCAT
3415 of real and imaginary part. */
3416 if (GET_CODE (op) == CONCAT)
3418 int is_realpart = byte < (unsigned int) GET_MODE_UNIT_SIZE (innermode);
3419 rtx part = is_realpart ? XEXP (op, 0) : XEXP (op, 1);
3420 unsigned int final_offset;
3423 final_offset = byte % (GET_MODE_UNIT_SIZE (innermode));
3424 res = simplify_subreg (outermode, part, GET_MODE (part), final_offset);
3427 /* We can at least simplify it by referring directly to the relevant part. */
3428 return gen_rtx_SUBREG (outermode, part, final_offset);
3434 /* Make a SUBREG operation or equivalent if it folds. */
3437 simplify_gen_subreg (enum machine_mode outermode, rtx op,
3438 enum machine_mode innermode, unsigned int byte)
3441 /* Little bit of sanity checking. */
3442 if (innermode == VOIDmode || outermode == VOIDmode
3443 || innermode == BLKmode || outermode == BLKmode)
3446 if (GET_MODE (op) != innermode
3447 && GET_MODE (op) != VOIDmode)
3450 if (byte % GET_MODE_SIZE (outermode)
3451 || byte >= GET_MODE_SIZE (innermode))
3454 if (GET_CODE (op) == QUEUED)
3457 new = simplify_subreg (outermode, op, innermode, byte);
3461 if (GET_CODE (op) == SUBREG || GET_MODE (op) == VOIDmode)
3464 return gen_rtx_SUBREG (outermode, op, byte);
3466 /* Simplify X, an rtx expression.
3468 Return the simplified expression or NULL if no simplifications
3471 This is the preferred entry point into the simplification routines;
3472 however, we still allow passes to call the more specific routines.
3474 Right now GCC has three (yes, three) major bodies of RTL simplification
3475 code that need to be unified.
3477 1. fold_rtx in cse.c. This code uses various CSE specific
3478 information to aid in RTL simplification.
3480 2. simplify_rtx in combine.c. Similar to fold_rtx, except that
3481 it uses combine specific information to aid in RTL
3484 3. The routines in this file.
3487 Long term we want to only have one body of simplification code; to
3488 get to that state I recommend the following steps:
3490 1. Pour over fold_rtx & simplify_rtx and move any simplifications
3491 which are not pass dependent state into these routines.
3493 2. As code is moved by #1, change fold_rtx & simplify_rtx to
3494 use this routine whenever possible.
3496 3. Allow for pass dependent state to be provided to these
3497 routines and add simplifications based on the pass dependent
3498 state. Remove code from cse.c & combine.c that becomes
3501 It will take time, but ultimately the compiler will be easier to
3502 maintain and improve. It's totally silly that when we add a
3503 simplification that it needs to be added to 4 places (3 for RTL
3504 simplification and 1 for tree simplification. */
3507 simplify_rtx (rtx x)
3509 enum rtx_code code = GET_CODE (x);
3510 enum machine_mode mode = GET_MODE (x);
3513 switch (GET_RTX_CLASS (code))
3516 return simplify_unary_operation (code, mode,
3517 XEXP (x, 0), GET_MODE (XEXP (x, 0)));
3519 if (swap_commutative_operands_p (XEXP (x, 0), XEXP (x, 1)))
3520 return simplify_gen_binary (code, mode, XEXP (x, 1), XEXP (x, 0));
3522 /* Fall through.... */
3525 return simplify_binary_operation (code, mode, XEXP (x, 0), XEXP (x, 1));
3529 return simplify_ternary_operation (code, mode, GET_MODE (XEXP (x, 0)),
3530 XEXP (x, 0), XEXP (x, 1),
3534 temp = simplify_relational_operation (code,
3535 ((GET_MODE (XEXP (x, 0))
3537 ? GET_MODE (XEXP (x, 0))
3538 : GET_MODE (XEXP (x, 1))),
3539 XEXP (x, 0), XEXP (x, 1));
3540 #ifdef FLOAT_STORE_FLAG_VALUE
3541 if (temp != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3543 if (temp == const0_rtx)
3544 temp = CONST0_RTX (mode);
3546 temp = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE (mode),
3554 return simplify_gen_subreg (mode, SUBREG_REG (x),
3555 GET_MODE (SUBREG_REG (x)),
3557 if (code == CONSTANT_P_RTX)
3559 if (CONSTANT_P (XEXP (x, 0)))
3567 /* Convert (lo_sum (high FOO) FOO) to FOO. */
3568 if (GET_CODE (XEXP (x, 0)) == HIGH
3569 && rtx_equal_p (XEXP (XEXP (x, 0), 0), XEXP (x, 1)))