1 /* $FreeBSD: src/sys/dev/snc/dp83932var.h,v 1.1.2.2 2003/02/11 08:52:00 nyan Exp $ */
2 /* $DragonFly: src/sys/dev/netif/snc/Attic/dp83932var.h,v 1.4 2004/02/12 00:00:18 dillon Exp $ */
3 /* $NecBSD: dp83932var.h,v 1.3 1999/01/24 01:39:51 kmatsuda Exp $ */
4 /* $NetBSD: if_snvar.h,v 1.12 1998/05/01 03:42:47 scottr Exp $ */
7 * [NetBSD for NEC PC-98 series]
8 * Copyright (c) 1997, 1998, 1999
9 * Kouichi Matsuda. All rights reserved.
12 * Copyright (c) 1991 Algorithmics Ltd (http://www.algor.co.uk)
13 * You may use, copy, and modify this program so long as you retain the
18 * if_snvar.h -- National Semiconductor DP8393X (SONIC) NetBSD/mac68k vars
21 * Modified for NetBSD/pc98 1.2.1 from NetBSD/mac68k 1.2D by Kouichi Matsuda.
22 * Make adapted for NEC PC-9801-83, 84, PC-9801-103, 104, PC-9801N-25 and
23 * PC-9801N-J02, J02R, which uses National Semiconductor DP83934AVQB as
24 * Ethernet Controller and National Semiconductor NS46C46 as
25 * (64 * 16 bits) Microwire Serial EEPROM.
28 /* borrow from arch/mac68k/dev/if_mcvar.h for debug. */
33 #define integrate static __inline
37 /* NetBSD Emulation */
39 #define splhardnet splnet
42 #define splhardnet splimp
44 #define NBPG PAGE_SIZE
47 #define PGOFSET PAGE_MASK
49 typedef unsigned long ulong;
50 #define delay(x) DELAY(x)
58 * SONIC buffers need to be aligned 16 or 32 bit aligned.
59 * These macros calculate and verify alignment.
61 #define ROUNDUP(p, N) (((int) p + N - 1) & ~(N - 1))
63 #define SOALIGN(m, array) (m ? (ROUNDUP(array, 4)) : (ROUNDUP(array, 2)))
65 #define LOWER(x) ((unsigned)(x) & 0xffff)
66 #define UPPER(x) ((unsigned)(x) >> 16)
69 * Memory access macros. Since we handle SONIC in 16 bit mode (PB5X0)
70 * and 32 bit mode (everything else) using a single GENERIC kernel
71 * binary, all structures have to be accessed using macros which can
72 * adjust the offsets appropriately.
74 /* m is not sc->bitmode, we treat m as sc. */
75 #define SWO(m, a, o, x) (*(m)->sc_writetodesc)((m), (a), (o), (x))
76 #define SRO(m, a, o) (*(m)->sc_readfromdesc)((m), (a), (o))
79 * Register access macros. We use bus_space_* to talk to the Sonic
80 * registers. A mapping table is used in case a particular configuration
81 * hooked the regs up at non-word offsets.
83 #define NIC_GET(sc, reg) (*(sc)->sc_nic_get)(sc, reg)
84 #define NIC_PUT(sc, reg, val) (*(sc)->sc_nic_put)(sc, reg, val)
86 #define SONIC_GETDMA(p) (p)
88 /* pc98 does not have any write buffers to flush... */
92 * buffer sizes in 32 bit mode
93 * 1 TXpkt is 4 hdr words + (3 * FRAGMAX) + 1 link word == 23 words == 92 bytes
95 * 1 RxPkt is 7 words == 28 bytes
96 * 1 Rda is 4 words == 16 bytes
98 * The CDA is 17 words == 68 bytes
100 * total space in page 0 = NTDA * 92 + NRRA * 16 + NRDA * 28 + 68
103 #define NRBA 16 /* # receive buffers < NRRA */
104 #define RBAMASK (NRBA-1)
105 #define NTDA 16 /* # transmit descriptors */
106 #define NRRA 64 /* # receive resource descriptors */
107 #define RRAMASK (NRRA-1) /* the reason why NRRA must be power of two */
109 #define FCSSIZE 4 /* size of FCS appended to packets */
112 * maximum receive packet size plus 2 byte pad to make each
113 * one aligned. 4 byte slop (required for eobc)
115 #define RBASIZE(sc) (sizeof(struct ether_header) + ETHERMTU + FCSSIZE + \
116 ((sc)->bitmode ? 6 : 2))
119 * transmit buffer area
121 #define TXBSIZE 1536 /* 6*2^8 -- the same size as the 8390 TXBUF */
123 #define SN_NPAGES 2 + NRBA + (NTDA/2)
128 struct mbuf *mtd_mbuf;
132 * The snc_softc for PC-98 if_snc.
134 typedef struct snc_softc {
135 struct arpcom sc_ethercom;
136 #define sc_if sc_ethercom.ac_if /* network visible interface */
140 struct resource * ioport;
142 struct resource * iomem;
144 struct resource * irq;
148 bus_space_tag_t sc_iot; /* bus identifier for io */
149 bus_space_tag_t sc_memt; /* bus identifier for mem */
150 bus_space_handle_t sc_ioh; /* io handle */
151 bus_space_handle_t sc_memh; /* bus memory handle */
153 int bitmode; /* 32 bit mode == 1, 16 == 0 */
155 u_int16_t sncr_dcr; /* DCR for this instance */
156 u_int16_t sncr_dcr2; /* DCR2 for this instance */
158 int sc_rramark; /* index into v_rra of wp */
159 u_int32_t v_rra[NRRA]; /* DMA addresses of v_rra */
160 u_int32_t v_rea; /* ptr to the end of the rra space */
162 int sc_rxmark; /* current hw pos in rda ring */
163 int sc_rdamark; /* current sw pos in rda ring */
164 int sc_nrda; /* total number of RDAs */
167 u_int32_t rbuf[NRBA];
169 struct mtd mtda[NTDA];
170 int mtd_hw; /* idx of first mtd given to hw */
171 int mtd_prev; /* idx of last mtd given to hardware */
172 int mtd_free; /* next free mtd to use */
174 * offset of tlink of last txp given
175 * to SONIC. Need to clear EOL on
176 * this word to add a desc.
178 int mtd_pint; /* Counter to set TXP_PINT */
182 u_int8_t curbank; /* current window bank */
184 struct ifmedia sc_media; /* supported media information */
187 * NIC register access functions:
189 u_int16_t (*sc_nic_get)
190 (struct snc_softc *, u_int8_t);
192 (struct snc_softc *, u_int8_t, u_int16_t);
197 * copy to/from descriptor
198 * copy to/from buffer
199 * zero bytes in buffer
201 void (*sc_writetodesc)
202 (struct snc_softc *, u_int32_t, u_int32_t, u_int16_t);
203 u_int16_t (*sc_readfromdesc)
204 (struct snc_softc *, u_int32_t, u_int32_t);
206 (struct snc_softc *, void *, u_int32_t, size_t);
207 void (*sc_copyfrombuf)
208 (struct snc_softc *, void *, u_int32_t, size_t);
210 (struct snc_softc *, u_int32_t, size_t);
213 * Machine-dependent functions:
215 * hardware reset hook - may be NULL
216 * hardware init hook - may be NULL
217 * media change hook - may be NULL
219 void (*sc_hwreset) (struct snc_softc *);
220 void (*sc_hwinit) (struct snc_softc *);
221 int (*sc_mediachange) (struct snc_softc *);
222 void (*sc_mediastatus) (struct snc_softc *,
223 struct ifmediareq *);
225 int sc_enabled; /* boolean; power enabled on interface */
227 int (*sc_enable) (struct snc_softc *);
228 void (*sc_disable) (struct snc_softc *);
230 void *sc_sh; /* shutdownhook cookie */
234 rndsource_element_t rnd_source;
239 * Accessing SONIC data structures and registers as 32 bit values
240 * makes code endianess independent. The SONIC is however always in
241 * bigendian mode so it is necessary to ensure that data structures shared
242 * between the CPU and the SONIC are always in bigendian order.
246 * Receive Resource Descriptor
247 * This structure describes the buffers into which packets
248 * will be received. Note that more than one packet may be
249 * packed into a single buffer if constraints permit.
251 #define RXRSRC_PTRLO 0 /* buffer address LO */
252 #define RXRSRC_PTRHI 1 /* buffer address HI */
253 #define RXRSRC_WCLO 2 /* buffer size (16bit words) LO */
254 #define RXRSRC_WCHI 3 /* buffer size (16bit words) HI */
256 #define RXRSRC_SIZE(sc) (sc->bitmode ? (4 * 4) : (4 * 2))
260 * This structure holds information about packets received.
262 #define RXPKT_STATUS 0
263 #define RXPKT_BYTEC 1
264 #define RXPKT_PTRLO 2
265 #define RXPKT_PTRHI 3
266 #define RXPKT_SEQNO 4
267 #define RXPKT_RLINK 5
268 #define RXPKT_INUSE 6
269 #define RXPKT_SIZE(sc) (sc->bitmode ? (7 * 4) : (7 * 2))
271 #define RBASEQ(x) (((x)>>8)&0xff)
272 #define PSNSEQ(x) ((x) & 0xff)
275 * Transmit Descriptor
276 * This structure holds information about packets to be transmitted.
278 #define FRAGMAX 8 /* maximum number of fragments in a packet */
280 #define TXP_STATUS 0 /* + transmitted packet status */
281 #define TXP_CONFIG 1 /* transmission configuration */
282 #define TXP_PKTSIZE 2 /* entire packet size in bytes */
283 #define TXP_FRAGCNT 3 /* # fragments in packet */
285 #define TXP_FRAGOFF 4 /* offset to first fragment */
286 #define TXP_FRAGSIZE 3 /* size of each fragment desc */
287 #define TXP_FPTRLO 0 /* ptr to packet fragment LO */
288 #define TXP_FPTRHI 1 /* ptr to packet fragment HI */
289 #define TXP_FSIZE 2 /* fragment size */
291 #define TXP_WORDS (TXP_FRAGOFF + (FRAGMAX*TXP_FRAGSIZE) + 1) /* 1 for tlink */
292 #define TXP_SIZE(sc) ((sc->bitmode) ? (TXP_WORDS*4) : (TXP_WORDS*2))
294 #define EOL 0x0001 /* end of list marker for link fields */
297 * CDA, the CAM descriptor area. The SONIC has a 16 entry CAM to
298 * match incoming addresses against. It is programmed via DMA
299 * from a memory region.
301 #define MAXCAM 16 /* number of user entries in CAM */
302 #define CDA_CAMDESC 4 /* # words i na descriptor */
303 #define CDA_CAMEP 0 /* CAM Address Port 0 xx-xx-xx-xx-YY-YY */
304 #define CDA_CAMAP0 1 /* CAM Address Port 1 xx-xx-YY-YY-xx-xx */
305 #define CDA_CAMAP1 2 /* CAM Address Port 2 YY-YY-xx-xx-xx-xx */
307 #define CDA_ENABLE 64 /* mask enabling CAM entries */
308 #define CDA_SIZE(sc) ((4*16 + 1) * ((sc->bitmode) ? 4 : 2))
310 void sncconfig (struct snc_softc *, int *, int, int, u_int8_t *);
311 void sncintr (void *);
312 void sncshutdown (void *);