1 /* $NetBSD: i82365.c,v 1.25 1999/10/15 06:07:27 haya Exp $ */
2 /* $FreeBSD: src/sys/dev/pcic/i82365.c,v 1.37 2002/11/17 04:52:37 imp Exp $ */
3 /* $DragonFly: src/sys/dev/pccard/pcic/Attic/i82365.c,v 1.1 2004/02/10 07:55:47 joerg Exp $ */
6 * Copyright (c) 1997 Marc Horowitz. All rights reserved.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Marc Horowitz.
19 * 4. The name of the author may not be used to endorse or promote products
20 * derived from this software without specific prior written permission.
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/malloc.h>
37 #include <sys/module.h>
38 #include <sys/kernel.h>
39 #include <sys/queue.h>
40 #include <sys/types.h>
43 #include <machine/bus.h>
45 #include <machine/resource.h>
47 #include <machine/clock.h>
50 #include <sys/unistd.h>
51 #include <sys/kthread.h>
53 /* We shouldn't need to include the following, but sadly we do for now */
55 #include <bus/pccard/pccardreg.h>
56 #include <bus/pccard/pccardvar.h>
58 #include <dev/pccard/pcic/i82365reg.h>
59 #include <dev/pccard/pcic/i82365var.h>
67 #define DPRINTF(arg) if (pcic_debug) printf arg; else ;
68 #define DEVPRINTF(arg) if (pcic_debug) device_printf arg; else ;
71 #define DEVPRINTF(arg)
74 #define VERBOSE(arg) if (bootverbose) printf arg; else ;
76 #define N(a) (sizeof(a)/sizeof(a[0]))
78 #define PCIC_VENDOR_UNKNOWN 0
79 #define PCIC_VENDOR_I82365SLR0 1
80 #define PCIC_VENDOR_I82365SLR1 2
81 #define PCIC_VENDOR_CIRRUS_PD6710 3
82 #define PCIC_VENDOR_CIRRUS_PD672X 4
84 #define PCIC_H2SOFTC(h) ((struct pcic_softc *)h->sc)
86 * Individual drivers will allocate their own memory and io regions. Memory
87 * regions must be a multiple of 4k, aligned on a 4k boundary.
90 #define PCIC_MEM_ALIGN PCIC_MEM_PAGESIZE
92 static void pcic_init_socket(struct pcic_handle *);
93 static void pcic_intr_socket(struct pcic_handle *);
95 static int pcic_activate(device_t dev);
96 static void pcic_intr(void *arg);
98 static void pcic_attach_card(struct pcic_handle *);
99 static void pcic_detach_card(struct pcic_handle *);
101 static void pcic_chip_do_mem_map(struct pcic_handle *, int);
102 static void pcic_chip_do_io_map(struct pcic_handle *, int);
104 void pcic_create_event_thread(void *);
105 void pcic_event_thread(void *);
107 void pcic_queue_event(struct pcic_handle *, int);
109 static void pcic_wait_ready(struct pcic_handle *);
111 static u_int8_t st_pcic_read(struct pcic_handle *, int);
112 static void st_pcic_write(struct pcic_handle *, int, u_int8_t);
114 /* XXX Should really be dynamic XXX */
115 static struct pcic_handle *handles[20];
116 static struct pcic_handle **lasthandle = handles;
118 static struct pcic_handle *
119 pcic_get_handle(device_t dev, device_t child)
123 while (child && device_get_parent(child) != dev)
124 child = device_get_parent(child);
127 return ((struct pcic_handle *) device_get_ivars(child));
131 pcic_ident_ok(int ident)
133 /* this is very empirical and heuristic */
135 if ((ident == 0) || (ident == 0xff) || (ident & PCIC_IDENT_ZERO))
138 if ((ident & PCIC_IDENT_IFTYPE_MASK) != PCIC_IDENT_IFTYPE_MEM_AND_IO) {
140 printf("pcic: does not support memory and I/O cards, "
141 "ignored (ident=%0x)\n", ident);
149 pcic_vendor(struct pcic_handle *h)
154 * the chip_id of the cirrus toggles between 11 and 00 after a write.
158 pcic_write(h, PCIC_CIRRUS_CHIP_INFO, 0);
159 reg = pcic_read(h, -1);
161 if ((reg & PCIC_CIRRUS_CHIP_INFO_CHIP_ID) ==
162 PCIC_CIRRUS_CHIP_INFO_CHIP_ID) {
163 reg = pcic_read(h, -1);
164 if ((reg & PCIC_CIRRUS_CHIP_INFO_CHIP_ID) == 0) {
165 if (reg & PCIC_CIRRUS_CHIP_INFO_SLOTS)
166 return (PCIC_VENDOR_CIRRUS_PD672X);
168 return (PCIC_VENDOR_CIRRUS_PD6710);
172 reg = pcic_read(h, PCIC_IDENT);
174 if ((reg & PCIC_IDENT_REV_MASK) == PCIC_IDENT_REV_I82365SLR0)
175 return (PCIC_VENDOR_I82365SLR0);
177 return (PCIC_VENDOR_I82365SLR1);
179 return (PCIC_VENDOR_UNKNOWN);
183 pcic_vendor_to_string(int vendor)
186 case PCIC_VENDOR_I82365SLR0:
187 return ("Intel 82365SL Revision 0");
188 case PCIC_VENDOR_I82365SLR1:
189 return ("Intel 82365SL Revision 1");
190 case PCIC_VENDOR_CIRRUS_PD6710:
191 return ("Cirrus PD6710");
192 case PCIC_VENDOR_CIRRUS_PD672X:
193 return ("Cirrus PD672X");
196 return ("Unknown controller");
200 pcic_activate(device_t dev)
202 struct pcic_softc *sc = PCIC_SOFTC(dev);
206 sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->port_rid,
207 0, ~0, PCIC_IOSIZE, RF_ACTIVE);
209 device_printf(dev, "Cannot allocate ioport\n");
214 sc->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irq_rid,
215 0, ~0, 1, RF_ACTIVE);
217 sc->irq = rman_get_start(sc->irq_res);
218 if ((err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC,
219 pcic_intr, sc, &sc->intrhand)) != 0) {
220 device_printf(dev, "Cannot setup intr\n");
221 pcic_deactivate(dev);
225 printf("Polling not supported\n");
230 /* XXX This might not be needed in future, get it directly from
233 sc->mem_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &sc->mem_rid,
234 0, ~0, 1 << 13, RF_ACTIVE);
235 if (sc->mem_res == NULL) {
236 device_printf(dev, "Cannot allocate mem\n");
237 pcic_deactivate(dev);
241 sc->iot = rman_get_bustag(sc->port_res);
242 sc->ioh = rman_get_bushandle(sc->port_res);;
243 sc->memt = rman_get_bustag(sc->mem_res);
244 sc->memh = rman_get_bushandle(sc->mem_res);;
250 pcic_deactivate(device_t dev)
252 struct pcic_softc *sc = PCIC_SOFTC(dev);
255 bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
258 bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid,
262 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid,
266 bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid,
273 pcic_attach(device_t dev)
275 struct pcic_softc *sc = PCIC_SOFTC(dev);
276 struct pcic_handle *h;
277 int vendor, count, i, reg, error;
281 /* Activate our resources */
282 if ((error = pcic_activate(dev)) != 0) {
283 printf("pcic_attach (active) returns %d\n", error);
287 /* now check for each controller/socket */
290 * this could be done with a loop, but it would violate the
291 * abstraction... --- unknown
292 * I don't see the abstraction... --imp
297 VERBOSE(("pcic ident regs:"));
299 sc->handle[0].sc = sc;
300 sc->handle[0].sock = C0SA;
301 /* initialise pcic_read and pcic_write functions */
302 sc->handle[0].ph_read = st_pcic_read;
303 sc->handle[0].ph_write = st_pcic_write;
304 sc->handle[0].ph_bus_t = sc->iot;
305 sc->handle[0].ph_bus_h = sc->ioh;
306 if (pcic_ident_ok(reg = pcic_read(&sc->handle[0], PCIC_IDENT))) {
307 sc->handle[0].flags = PCIC_FLAG_SOCKETP;
310 sc->handle[0].flags = 0;
312 sc->handle[0].laststate = PCIC_LASTSTATE_EMPTY;
314 VERBOSE((" 0x%02x", reg));
316 sc->handle[1].sc = sc;
317 sc->handle[1].sock = C0SB;
318 /* initialise pcic_read and pcic_write functions */
319 sc->handle[1].ph_read = st_pcic_read;
320 sc->handle[1].ph_write = st_pcic_write;
321 sc->handle[1].ph_bus_t = sc->iot;
322 sc->handle[1].ph_bus_h = sc->ioh;
323 if (pcic_ident_ok(reg = pcic_read(&sc->handle[1], PCIC_IDENT))) {
324 sc->handle[1].flags = PCIC_FLAG_SOCKETP;
327 sc->handle[1].flags = 0;
329 sc->handle[1].laststate = PCIC_LASTSTATE_EMPTY;
331 VERBOSE((" 0x%02x", reg));
334 * The CL-PD6729 has only one controller and always returns 0
335 * if you try to read from the second one. Maybe pcic_ident_ok
336 * shouldn't accept 0?
338 sc->handle[2].sc = sc;
339 sc->handle[2].sock = C1SA;
340 /* initialise pcic_read and pcic_write functions */
341 sc->handle[2].ph_read = st_pcic_read;
342 sc->handle[2].ph_write = st_pcic_write;
343 sc->handle[2].ph_bus_t = sc->iot;
344 sc->handle[2].ph_bus_h = sc->ioh;
345 if (pcic_vendor(&sc->handle[0]) != PCIC_VENDOR_CIRRUS_PD672X ||
346 pcic_read(&sc->handle[2], PCIC_IDENT) != 0) {
347 if (pcic_ident_ok(reg = pcic_read(&sc->handle[2],
349 sc->handle[2].flags = PCIC_FLAG_SOCKETP;
352 sc->handle[2].flags = 0;
354 sc->handle[2].laststate = PCIC_LASTSTATE_EMPTY;
356 VERBOSE((" 0x%02x", reg));
358 sc->handle[3].sc = sc;
359 sc->handle[3].sock = C1SB;
360 /* initialise pcic_read and pcic_write functions */
361 sc->handle[3].ph_read = st_pcic_read;
362 sc->handle[3].ph_write = st_pcic_write;
363 sc->handle[3].ph_bus_t = sc->iot;
364 sc->handle[3].ph_bus_h = sc->ioh;
365 if (pcic_ident_ok(reg = pcic_read(&sc->handle[3],
367 sc->handle[3].flags = PCIC_FLAG_SOCKETP;
370 sc->handle[3].flags = 0;
372 sc->handle[3].laststate = PCIC_LASTSTATE_EMPTY;
374 VERBOSE((" 0x%02x\n", reg));
376 sc->handle[2].flags = 0;
377 sc->handle[3].flags = 0;
381 printf("pcic_attach: attach found no sockets\n");
385 /* establish the interrupt */
387 /* XXX block interrupts? */
389 for (i = 0; i < PCIC_NSLOTS; i++) {
391 * this should work, but w/o it, setting tty flags hangs at
394 if (sc->handle[i].flags & PCIC_FLAG_SOCKETP)
396 STAILQ_INIT(&sc->handle[i].events);
397 pcic_write(&sc->handle[i], PCIC_CSC_INTR, 0);
398 pcic_read(&sc->handle[i], PCIC_CSC);
402 if ((sc->handle[0].flags & PCIC_FLAG_SOCKETP) ||
403 (sc->handle[1].flags & PCIC_FLAG_SOCKETP)) {
404 vendor = pcic_vendor(&sc->handle[0]);
406 device_printf(dev, "controller 0 (%s) has ",
407 pcic_vendor_to_string(vendor));
409 if ((sc->handle[0].flags & PCIC_FLAG_SOCKETP) &&
410 (sc->handle[1].flags & PCIC_FLAG_SOCKETP))
411 printf("sockets A and B\n");
412 else if (sc->handle[0].flags & PCIC_FLAG_SOCKETP)
413 printf("socket A only\n");
415 printf("socket B only\n");
417 if (sc->handle[0].flags & PCIC_FLAG_SOCKETP)
418 sc->handle[0].vendor = vendor;
419 if (sc->handle[1].flags & PCIC_FLAG_SOCKETP)
420 sc->handle[1].vendor = vendor;
422 if ((sc->handle[2].flags & PCIC_FLAG_SOCKETP) ||
423 (sc->handle[3].flags & PCIC_FLAG_SOCKETP)) {
424 vendor = pcic_vendor(&sc->handle[2]);
426 device_printf(dev, "controller 1 (%s) has ",
427 pcic_vendor_to_string(vendor));
429 if ((sc->handle[2].flags & PCIC_FLAG_SOCKETP) &&
430 (sc->handle[3].flags & PCIC_FLAG_SOCKETP))
431 printf("sockets A and B\n");
432 else if (sc->handle[2].flags & PCIC_FLAG_SOCKETP)
433 printf("socket A only\n");
435 printf("socket B only\n");
437 if (sc->handle[2].flags & PCIC_FLAG_SOCKETP)
438 sc->handle[2].vendor = vendor;
439 if (sc->handle[3].flags & PCIC_FLAG_SOCKETP)
440 sc->handle[3].vendor = vendor;
443 for (i = 0; i < PCIC_NSLOTS; i++) {
444 if ((sc->handle[i].flags & PCIC_FLAG_SOCKETP) == 0)
447 /* initialize the rest of the handle */
453 h->dev = device_add_child(dev, "pccard", -1);
454 device_set_ivars(h->dev, h);
459 * Probe and attach any children as were configured above.
461 error = bus_generic_attach(dev);
463 pcic_deactivate(dev);
468 pcic_create_event_thread(void *arg)
470 struct pcic_handle *h = arg;
487 panic("pcic_create_event_thread: unknown pcic socket");
490 if (kthread_create(pcic_event_thread, h, &h->event_thread,
491 "%s,%s", device_get_name(PCIC_H2SOFTC(h)->dev), cs)) {
492 device_printf(PCIC_H2SOFTC(h)->dev,
493 "cannot create event thread for sock 0x%02x\n", h->sock);
494 panic("pcic_create_event_thread");
499 pcic_event_thread(void *arg)
501 struct pcic_handle *h = arg;
502 struct pcic_event *pe;
504 struct pcic_softc *sc = h->sc;
506 while (h->shutdown == 0) {
508 if ((pe = STAILQ_FIRST(&h->events)) == NULL) {
510 (void) tsleep(&h->events, 0, "pcicev", 0);
514 /* sleep .25s to be enqueued chatterling interrupts */
515 (void) tsleep((caddr_t)pcic_event_thread, 0, "pcicss", hz/4);
518 STAILQ_REMOVE_HEAD_UNTIL(&h->events, pe, pe_q);
521 switch (pe->pe_type) {
522 case PCIC_EVENT_INSERTION:
525 struct pcic_event *pe1, *pe2;
527 if ((pe1 = STAILQ_FIRST(&h->events)) == NULL)
529 if (pe1->pe_type != PCIC_EVENT_REMOVAL)
531 if ((pe2 = STAILQ_NEXT(pe1, pe_q)) == NULL)
533 if (pe2->pe_type == PCIC_EVENT_INSERTION) {
534 STAILQ_REMOVE_HEAD_UNTIL(&h->events, pe1, pe_q);
536 STAILQ_REMOVE_HEAD_UNTIL(&h->events, pe2, pe_q);
542 DEVPRINTF((h->dev, "insertion event\n"));
546 case PCIC_EVENT_REMOVAL:
549 struct pcic_event *pe1, *pe2;
551 if ((pe1 = STAILQ_FIRST(&h->events)) == NULL)
553 if (pe1->pe_type != PCIC_EVENT_INSERTION)
555 if ((pe2 = STAILQ_NEXT(pe1, pe_q)) == NULL)
557 if (pe2->pe_type == PCIC_EVENT_REMOVAL) {
558 STAILQ_REMOVE_HEAD_UNTIL(&h->events, pe1, pe_q);
560 STAILQ_REMOVE_HEAD_UNTIL(&h->events, pe2, pe_q);
566 DEVPRINTF((h->dev, "removal event\n"));
571 panic("pcic_event_thread: unknown event %d",
577 h->event_thread = NULL;
579 /* In case parent is waiting for us to exit. */
586 pcic_init_socket(struct pcic_handle *h)
589 struct pcic_softc *sc = h->sc;
592 * queue creation of a kernel thread to handle insert/removal events.
596 /* set up the card to interrupt on card detect */
598 pcic_write(h, PCIC_CSC_INTR, (sc->irq << PCIC_CSC_INTR_IRQ_SHIFT) |
599 PCIC_CSC_INTR_CD_ENABLE);
600 pcic_write(h, PCIC_INTR, 0);
601 pcic_read(h, PCIC_CSC);
603 /* unsleep the cirrus controller */
605 if ((h->vendor == PCIC_VENDOR_CIRRUS_PD6710) ||
606 (h->vendor == PCIC_VENDOR_CIRRUS_PD672X)) {
607 reg = pcic_read(h, PCIC_CIRRUS_MISC_CTL_2);
608 if (reg & PCIC_CIRRUS_MISC_CTL_2_SUSPEND) {
609 DEVPRINTF((sc->dev, "socket %02x was suspended\n",
611 reg &= ~PCIC_CIRRUS_MISC_CTL_2_SUSPEND;
612 pcic_write(h, PCIC_CIRRUS_MISC_CTL_2, reg);
615 h->laststate = PCIC_LASTSTATE_EMPTY;
619 /* Should do this later */
620 /* maybe as part of interrupt routing verification */
621 if ((reg & PCIC_IF_STATUS_CARDDETECT_MASK) ==
622 PCIC_IF_STATUS_CARDDETECT_PRESENT) {
624 h->laststate = PCIC_LASTSTATE_PRESENT;
626 h->laststate = PCIC_LASTSTATE_EMPTY;
634 struct pcic_softc *sc = arg;
637 for (i = 0; i < PCIC_NSLOTS; i++)
638 if (sc->handle[i].flags & PCIC_FLAG_SOCKETP)
639 pcic_intr_socket(&sc->handle[i]);
643 pcic_intr_socket(struct pcic_handle *h)
647 cscreg = pcic_read(h, PCIC_CSC);
649 cscreg &= (PCIC_CSC_GPI | PCIC_CSC_CD | PCIC_CSC_READY |
650 PCIC_CSC_BATTWARN | PCIC_CSC_BATTDEAD);
652 if (cscreg & PCIC_CSC_GPI) {
653 DEVPRINTF((h->dev, "%02x GPI\n", h->sock));
655 if (cscreg & PCIC_CSC_CD) {
658 statreg = pcic_read(h, PCIC_IF_STATUS);
660 DEVPRINTF((h->dev, "%02x CD %x\n", h->sock, statreg));
662 if ((statreg & PCIC_IF_STATUS_CARDDETECT_MASK) ==
663 PCIC_IF_STATUS_CARDDETECT_PRESENT) {
664 if (h->laststate != PCIC_LASTSTATE_PRESENT) {
666 "enqueing INSERTION event\n"));
667 pcic_queue_event(h, PCIC_EVENT_INSERTION);
669 h->laststate = PCIC_LASTSTATE_PRESENT;
671 if (h->laststate == PCIC_LASTSTATE_PRESENT) {
672 /* Deactivate the card now. */
673 DEVPRINTF((h->dev, "detaching card\n"));
675 DEVPRINTF((h->dev,"enqueing REMOVAL event\n"));
676 pcic_queue_event(h, PCIC_EVENT_REMOVAL);
678 h->laststate = ((statreg & PCIC_IF_STATUS_CARDDETECT_MASK) == 0)
679 ? PCIC_LASTSTATE_EMPTY : PCIC_LASTSTATE_HALF;
682 if (cscreg & PCIC_CSC_READY) {
683 DEVPRINTF((h->dev, "%02x READY\n", h->sock));
684 /* shouldn't happen */
686 if (cscreg & PCIC_CSC_BATTWARN) {
687 DEVPRINTF((h->dev, "%02x BATTWARN\n", h->sock));
689 if (cscreg & PCIC_CSC_BATTDEAD) {
690 DEVPRINTF((h->dev, "%02x BATTDEAD\n", h->sock));
695 pcic_queue_event(struct pcic_handle *h, int event)
697 struct pcic_event *pe;
700 pe = malloc(sizeof(*pe), M_TEMP, M_NOWAIT);
702 panic("pcic_queue_event: can't allocate event");
706 STAILQ_INSERT_TAIL(&h->events, pe, pe_q);
712 pcic_attach_card(struct pcic_handle *h)
714 if (!(h->flags & PCIC_FLAG_CARDP)) {
715 /* call the MI attach function */
716 CARD_ATTACH_CARD(h->dev);
717 h->flags |= PCIC_FLAG_CARDP;
719 DPRINTF(("pcic_attach_card: already attached\n"));
724 pcic_detach_card(struct pcic_handle *h)
726 if (h->flags & PCIC_FLAG_CARDP) {
727 h->flags &= ~PCIC_FLAG_CARDP;
728 /* call the MI detach function */
729 CARD_DETACH_CARD(h->dev);
734 pcic_chip_mem_alloc(struct pcic_handle *h, struct resource *r, bus_size_t size,
735 struct pccard_mem_handle *pcmhp)
737 bus_space_handle_t memh;
741 struct pcic_softc *sc = h->sc;
743 /* out of sc->memh, allocate as many pages as necessary */
745 /* convert size to PCIC pages */
746 sizepg = (size + (PCIC_MEM_ALIGN - 1)) / PCIC_MEM_ALIGN;
747 if (sizepg > PCIC_MAX_MEM_PAGES)
750 mask = (1 << sizepg) - 1;
752 addr = rman_get_start(r);
754 pcmhp->memt = sc->memt;
758 pcmhp->realsize = sizepg * PCIC_MEM_PAGESIZE;
763 pcic_chip_mem_free(struct pcic_handle *h, struct pccard_mem_handle *pcmhp)
767 static struct mem_map_index_st {
768 int sysmem_start_lsb;
769 int sysmem_start_msb;
775 } mem_map_index[] = {
777 PCIC_SYSMEM_ADDR0_START_LSB,
778 PCIC_SYSMEM_ADDR0_START_MSB,
779 PCIC_SYSMEM_ADDR0_STOP_LSB,
780 PCIC_SYSMEM_ADDR0_STOP_MSB,
781 PCIC_CARDMEM_ADDR0_LSB,
782 PCIC_CARDMEM_ADDR0_MSB,
783 PCIC_ADDRWIN_ENABLE_MEM0,
786 PCIC_SYSMEM_ADDR1_START_LSB,
787 PCIC_SYSMEM_ADDR1_START_MSB,
788 PCIC_SYSMEM_ADDR1_STOP_LSB,
789 PCIC_SYSMEM_ADDR1_STOP_MSB,
790 PCIC_CARDMEM_ADDR1_LSB,
791 PCIC_CARDMEM_ADDR1_MSB,
792 PCIC_ADDRWIN_ENABLE_MEM1,
795 PCIC_SYSMEM_ADDR2_START_LSB,
796 PCIC_SYSMEM_ADDR2_START_MSB,
797 PCIC_SYSMEM_ADDR2_STOP_LSB,
798 PCIC_SYSMEM_ADDR2_STOP_MSB,
799 PCIC_CARDMEM_ADDR2_LSB,
800 PCIC_CARDMEM_ADDR2_MSB,
801 PCIC_ADDRWIN_ENABLE_MEM2,
804 PCIC_SYSMEM_ADDR3_START_LSB,
805 PCIC_SYSMEM_ADDR3_START_MSB,
806 PCIC_SYSMEM_ADDR3_STOP_LSB,
807 PCIC_SYSMEM_ADDR3_STOP_MSB,
808 PCIC_CARDMEM_ADDR3_LSB,
809 PCIC_CARDMEM_ADDR3_MSB,
810 PCIC_ADDRWIN_ENABLE_MEM3,
813 PCIC_SYSMEM_ADDR4_START_LSB,
814 PCIC_SYSMEM_ADDR4_START_MSB,
815 PCIC_SYSMEM_ADDR4_STOP_LSB,
816 PCIC_SYSMEM_ADDR4_STOP_MSB,
817 PCIC_CARDMEM_ADDR4_LSB,
818 PCIC_CARDMEM_ADDR4_MSB,
819 PCIC_ADDRWIN_ENABLE_MEM4,
824 pcic_chip_do_mem_map(struct pcic_handle *h, int win)
828 pcic_write(h, mem_map_index[win].sysmem_start_lsb,
829 (h->mem[win].addr >> PCIC_SYSMEM_ADDRX_SHIFT) & 0xff);
830 pcic_write(h, mem_map_index[win].sysmem_start_msb,
831 ((h->mem[win].addr >> (PCIC_SYSMEM_ADDRX_SHIFT + 8)) &
832 PCIC_SYSMEM_ADDRX_START_MSB_ADDR_MASK));
835 /* XXX do I want 16 bit all the time? */
836 PCIC_SYSMEM_ADDRX_START_MSB_DATASIZE_16BIT;
839 pcic_write(h, mem_map_index[win].sysmem_stop_lsb,
840 ((h->mem[win].addr + h->mem[win].size) >>
841 PCIC_SYSMEM_ADDRX_SHIFT) & 0xff);
842 pcic_write(h, mem_map_index[win].sysmem_stop_msb,
843 (((h->mem[win].addr + h->mem[win].size) >>
844 (PCIC_SYSMEM_ADDRX_SHIFT + 8)) &
845 PCIC_SYSMEM_ADDRX_STOP_MSB_ADDR_MASK) |
846 PCIC_SYSMEM_ADDRX_STOP_MSB_WAIT2);
848 pcic_write(h, mem_map_index[win].cardmem_lsb,
849 (h->mem[win].offset >> PCIC_CARDMEM_ADDRX_SHIFT) & 0xff);
850 pcic_write(h, mem_map_index[win].cardmem_msb,
851 ((h->mem[win].offset >> (PCIC_CARDMEM_ADDRX_SHIFT + 8)) &
852 PCIC_CARDMEM_ADDRX_MSB_ADDR_MASK) |
853 ((h->mem[win].kind == PCCARD_MEM_ATTR) ?
854 PCIC_CARDMEM_ADDRX_MSB_REGACTIVE_ATTR : 0));
856 reg = pcic_read(h, PCIC_ADDRWIN_ENABLE);
857 reg |= (mem_map_index[win].memenable | PCIC_ADDRWIN_ENABLE_MEMCS16);
858 pcic_write(h, PCIC_ADDRWIN_ENABLE, reg);
864 int r1, r2, r3, r4, r5, r6;
866 r1 = pcic_read(h, mem_map_index[win].sysmem_start_msb);
867 r2 = pcic_read(h, mem_map_index[win].sysmem_start_lsb);
868 r3 = pcic_read(h, mem_map_index[win].sysmem_stop_msb);
869 r4 = pcic_read(h, mem_map_index[win].sysmem_stop_lsb);
870 r5 = pcic_read(h, mem_map_index[win].cardmem_msb);
871 r6 = pcic_read(h, mem_map_index[win].cardmem_lsb);
873 DPRINTF(("pcic_chip_do_mem_map window %d: %02x%02x %02x%02x "
874 "%02x%02x\n", win, r1, r2, r3, r4, r5, r6));
880 pcic_chip_mem_map(struct pcic_handle *h, int kind, bus_addr_t card_addr,
881 bus_size_t size, struct pccard_mem_handle *pcmhp, bus_addr_t *offsetp,
889 for (i = 0; i < N(mem_map_index); i++) {
890 if ((h->memalloc & (1 << i)) == 0) {
892 h->memalloc |= (1 << i);
901 busaddr = pcmhp->addr;
904 * compute the address offset to the pccard address space for the
905 * pcic. this is intentionally signed. The masks and shifts below
906 * will cause TRT to happen in the pcic registers. Deal with making
907 * sure the address is aligned, and return the alignment offset.
910 *offsetp = card_addr % PCIC_MEM_ALIGN;
911 card_addr -= *offsetp;
913 DPRINTF(("pcic_chip_mem_map window %d bus %lx+%lx+%lx at card addr "
914 "%lx\n", win, (u_long) busaddr, (u_long) * offsetp, (u_long) size,
915 (u_long) card_addr));
918 * include the offset in the size, and decrement size by one, since
919 * the hw wants start/stop
921 size += *offsetp - 1;
923 card_offset = (((long) card_addr) - ((long) busaddr));
925 h->mem[win].addr = busaddr;
926 h->mem[win].size = size;
927 h->mem[win].offset = card_offset;
928 h->mem[win].kind = kind;
930 pcic_chip_do_mem_map(h, win);
936 pcic_chip_mem_unmap(struct pcic_handle *h, int window)
940 if (window >= N(mem_map_index))
941 panic("pcic_chip_mem_unmap: window out of range");
943 reg = pcic_read(h, PCIC_ADDRWIN_ENABLE);
944 reg &= ~mem_map_index[window].memenable;
945 pcic_write(h, PCIC_ADDRWIN_ENABLE, reg);
947 h->memalloc &= ~(1 << window);
951 pcic_chip_io_alloc(struct pcic_handle *h, bus_addr_t start, bus_size_t size,
952 bus_size_t align, struct pccard_io_handle *pcihp)
955 bus_space_handle_t ioh;
960 * Allocate some arbitrary I/O space.
966 DPRINTF(("pcic_chip_io_alloc map port %lx+%lx\n",
967 (u_long) ioaddr, (u_long) size));
969 flags |= PCCARD_IO_ALLOCATED;
971 DPRINTF(("pcic_chip_io_alloc alloc port %lx+%lx\n",
972 (u_long) ioaddr, (u_long) size));
977 pcihp->addr = ioaddr;
979 pcihp->flags = flags;
985 pcic_chip_io_free(struct pcic_handle *h, struct pccard_io_handle *pcihp)
990 static struct io_map_index_st {
997 int ioctlbits[3]; /* indexed by PCCARD_WIDTH_* */
1000 PCIC_IOADDR0_START_LSB,
1001 PCIC_IOADDR0_START_MSB,
1002 PCIC_IOADDR0_STOP_LSB,
1003 PCIC_IOADDR0_STOP_MSB,
1004 PCIC_ADDRWIN_ENABLE_IO0,
1005 PCIC_IOCTL_IO0_WAITSTATE | PCIC_IOCTL_IO0_ZEROWAIT |
1006 PCIC_IOCTL_IO0_IOCS16SRC_MASK | PCIC_IOCTL_IO0_DATASIZE_MASK,
1008 PCIC_IOCTL_IO0_IOCS16SRC_CARD,
1009 PCIC_IOCTL_IO0_IOCS16SRC_DATASIZE |
1010 PCIC_IOCTL_IO0_DATASIZE_8BIT,
1011 PCIC_IOCTL_IO0_IOCS16SRC_DATASIZE |
1012 PCIC_IOCTL_IO0_DATASIZE_16BIT,
1016 PCIC_IOADDR1_START_LSB,
1017 PCIC_IOADDR1_START_MSB,
1018 PCIC_IOADDR1_STOP_LSB,
1019 PCIC_IOADDR1_STOP_MSB,
1020 PCIC_ADDRWIN_ENABLE_IO1,
1021 PCIC_IOCTL_IO1_WAITSTATE | PCIC_IOCTL_IO1_ZEROWAIT |
1022 PCIC_IOCTL_IO1_IOCS16SRC_MASK | PCIC_IOCTL_IO1_DATASIZE_MASK,
1024 PCIC_IOCTL_IO1_IOCS16SRC_CARD,
1025 PCIC_IOCTL_IO1_IOCS16SRC_DATASIZE |
1026 PCIC_IOCTL_IO1_DATASIZE_8BIT,
1027 PCIC_IOCTL_IO1_IOCS16SRC_DATASIZE |
1028 PCIC_IOCTL_IO1_DATASIZE_16BIT,
1034 pcic_chip_do_io_map(struct pcic_handle *h, int win)
1038 DPRINTF(("pcic_chip_do_io_map win %d addr %lx size %lx width %d\n",
1039 win, (long) h->io[win].addr, (long) h->io[win].size,
1040 h->io[win].width * 8));
1042 pcic_write(h, io_map_index[win].start_lsb, h->io[win].addr & 0xff);
1043 pcic_write(h, io_map_index[win].start_msb,
1044 (h->io[win].addr >> 8) & 0xff);
1046 pcic_write(h, io_map_index[win].stop_lsb,
1047 (h->io[win].addr + h->io[win].size - 1) & 0xff);
1048 pcic_write(h, io_map_index[win].stop_msb,
1049 ((h->io[win].addr + h->io[win].size - 1) >> 8) & 0xff);
1051 reg = pcic_read(h, PCIC_IOCTL);
1052 reg &= ~io_map_index[win].ioctlmask;
1053 reg |= io_map_index[win].ioctlbits[h->io[win].width];
1054 pcic_write(h, PCIC_IOCTL, reg);
1056 reg = pcic_read(h, PCIC_ADDRWIN_ENABLE);
1057 reg |= io_map_index[win].ioenable;
1058 pcic_write(h, PCIC_ADDRWIN_ENABLE, reg);
1062 pcic_chip_io_map(struct pcic_handle *h, int width, bus_addr_t offset,
1063 bus_size_t size, struct pccard_io_handle *pcihp, int *windowp)
1065 bus_addr_t ioaddr = pcihp->addr + offset;
1068 static char *width_names[] = { "auto", "io8", "io16" };
1071 /* XXX Sanity check offset/size. */
1074 for (i = 0; i < N(io_map_index); i++) {
1075 if ((h->ioalloc & (1 << i)) == 0) {
1077 h->ioalloc |= (1 << i);
1087 DPRINTF(("pcic_chip_io_map window %d %s port %lx+%lx\n",
1088 win, width_names[width], (u_long) ioaddr, (u_long) size));
1090 h->io[win].addr = ioaddr;
1091 h->io[win].size = size;
1092 h->io[win].width = width;
1094 pcic_chip_do_io_map(h, win);
1100 pcic_chip_io_unmap(struct pcic_handle *h, int window)
1104 if (window >= N(io_map_index))
1105 panic("pcic_chip_io_unmap: window out of range");
1107 reg = pcic_read(h, PCIC_ADDRWIN_ENABLE);
1108 reg &= ~io_map_index[window].ioenable;
1109 pcic_write(h, PCIC_ADDRWIN_ENABLE, reg);
1111 h->ioalloc &= ~(1 << window);
1115 pcic_wait_ready(struct pcic_handle *h)
1119 for (i = 0; i < 10000; i++) {
1120 if (pcic_read(h, PCIC_IF_STATUS) & PCIC_IF_STATUS_READY)
1125 if ((i>5000) && (i%100 == 99))
1132 printf("pcic_wait_ready: ready never happened, status = %02x\n",
1133 pcic_read(h, PCIC_IF_STATUS));
1138 pcic_enable_socket(device_t dev, device_t child)
1140 struct pcic_handle *h = pcic_get_handle(dev, child);
1141 int cardtype, reg, win;
1143 /* this bit is mostly stolen from pcic_attach_card */
1145 /* power down the socket to reset it, clear the card reset pin */
1147 pcic_write(h, PCIC_PWRCTL, 0);
1150 * wait 300ms until power fails (Tpf). Then, wait 100ms since
1151 * we are changing Vcc (Toff).
1153 DELAY((300 + 100) * 1000);
1155 #ifdef VADEM_POWER_HACK
1156 bus_space_write_1(sc->iot, sc->ioh, PCIC_REG_INDEX, 0x0e);
1157 bus_space_write_1(sc->iot, sc->ioh, PCIC_REG_INDEX, 0x37);
1158 printf("prcr = %02x\n", pcic_read(h, 0x02));
1159 printf("cvsr = %02x\n", pcic_read(h, 0x2f));
1160 printf("DANGER WILL ROBINSON! Changing voltage select!\n");
1161 pcic_write(h, 0x2f, pcic_read(h, 0x2f) & ~0x03);
1162 printf("cvsr = %02x\n", pcic_read(h, 0x2f));
1165 /* power up the socket */
1167 pcic_write(h, PCIC_PWRCTL, PCIC_PWRCTL_DISABLE_RESETDRV
1168 | PCIC_PWRCTL_PWR_ENABLE);
1171 * wait 100ms until power raise (Tpr) and 20ms to become
1172 * stable (Tsu(Vcc)).
1174 * some machines require some more time to be settled
1175 * (300ms is added here).
1177 DELAY((100 + 20 + 300) * 1000);
1179 pcic_write(h, PCIC_PWRCTL, PCIC_PWRCTL_DISABLE_RESETDRV | PCIC_PWRCTL_OE
1180 | PCIC_PWRCTL_PWR_ENABLE);
1181 pcic_write(h, PCIC_INTR, 0);
1184 * hold RESET at least 10us.
1188 /* clear the reset flag */
1190 pcic_write(h, PCIC_INTR, PCIC_INTR_RESET);
1192 /* wait 20ms as per pc card standard (r2.01) section 4.3.6 */
1196 /* wait for the chip to finish initializing */
1199 reg = pcic_read(h, PCIC_IF_STATUS);
1200 if (!(reg & PCIC_IF_STATUS_POWERACTIVE)) {
1201 printf("pcic_chip_socket_enable: status %x", reg);
1207 /* zero out the address windows */
1208 pcic_write(h, PCIC_ADDRWIN_ENABLE, 0);
1210 /* set the card type */
1211 CARD_GET_TYPE(h->dev, &cardtype);
1213 reg = pcic_read(h, PCIC_INTR);
1214 reg &= ~(PCIC_INTR_CARDTYPE_MASK | PCIC_INTR_IRQ_MASK | PCIC_INTR_ENABLE);
1215 reg |= ((cardtype == PCCARD_IFTYPE_IO) ?
1216 PCIC_INTR_CARDTYPE_IO :
1217 PCIC_INTR_CARDTYPE_MEM);
1219 pcic_write(h, PCIC_INTR, reg);
1221 DEVPRINTF((h->dev, "pcic_chip_socket_enable cardtype %s %02x\n",
1222 ((cardtype == PCCARD_IFTYPE_IO) ? "io" : "mem"), reg));
1224 /* reinstall all the memory and io mappings */
1226 for (win = 0; win < PCIC_MEM_WINS; win++)
1227 if (h->memalloc & (1 << win))
1228 pcic_chip_do_mem_map(h, win);
1230 for (win = 0; win < PCIC_IO_WINS; win++)
1231 if (h->ioalloc & (1 << win))
1232 pcic_chip_do_io_map(h, win);
1238 pcic_disable_socket(device_t dev, device_t child)
1240 struct pcic_handle *h = pcic_get_handle(dev, child);
1242 /* power down the socket */
1244 pcic_write(h, PCIC_PWRCTL, 0);
1247 * wait 300ms until power fails (Tpf).
1255 st_pcic_read(struct pcic_handle *h, int idx)
1258 bus_space_write_1(h->ph_bus_t, h->ph_bus_h, PCIC_REG_INDEX,
1261 return bus_space_read_1(h->ph_bus_t, h->ph_bus_h, PCIC_REG_DATA);
1265 st_pcic_write(struct pcic_handle *h, int idx, u_int8_t data)
1268 bus_space_write_1(h->ph_bus_t, h->ph_bus_h, PCIC_REG_INDEX,
1272 bus_space_write_1(h->ph_bus_t, h->ph_bus_h, PCIC_REG_DATA, data);
1276 pcic_activate_resource(device_t dev, device_t child, int type, int rid,
1283 struct pcic_handle *h = pcic_get_handle(dev, child);
1285 sz = rman_get_size(r);
1287 case SYS_RES_IOPORT:
1289 err = pcic_chip_io_map(h, 0, 0, sz, &h->io[rid], &win);
1291 pcic_chip_io_free(h, &h->io[rid]);
1295 case SYS_RES_MEMORY:
1296 err = pcic_chip_mem_map(h, 0, 0, sz, &h->mem[rid], &off, &win);
1298 pcic_chip_mem_free(h, &h->mem[rid]);
1305 err = bus_generic_activate_resource(device_get_parent(dev), child,
1311 pcic_deactivate_resource(device_t dev, device_t child, int type, int rid,
1314 struct pcic_handle *h = pcic_get_handle(dev, child);
1318 case SYS_RES_IOPORT:
1319 pcic_chip_io_unmap(h, rid);
1321 case SYS_RES_MEMORY:
1322 pcic_chip_mem_unmap(h, rid);
1326 err = bus_generic_deactivate_resource(device_get_parent(dev), child,
1332 pcic_setup_intr(device_t dev, device_t child, struct resource *irqres,
1333 int flags, driver_intr_t intr, void *arg, void **cookiep)
1335 struct pcic_handle *h = pcic_get_handle(dev, child);
1340 err = bus_generic_setup_intr(device_get_parent(dev), child, irqres,
1341 flags, intr, arg, cookiep);
1345 irq = rman_get_start(irqres);
1346 reg = pcic_read(h, PCIC_INTR);
1347 reg &= ~(PCIC_INTR_IRQ_MASK | PCIC_INTR_ENABLE);
1349 pcic_write(h, PCIC_INTR, reg);
1353 device_printf(dev, "card irq %d\n", irq);
1359 pcic_teardown_intr(device_t dev, device_t child, struct resource *irq,
1363 struct pcic_handle *h = pcic_get_handle(dev, child);
1367 reg = pcic_read(h, PCIC_INTR);
1368 reg &= ~(PCIC_INTR_IRQ_MASK | PCIC_INTR_ENABLE);
1369 pcic_write(h, PCIC_INTR, reg);
1371 return (bus_generic_teardown_intr(device_get_parent(dev), child, irq,
1376 pcic_alloc_resource(device_t dev, device_t child, int type, int *rid,
1377 u_long start, u_long end, u_long count, u_int flags)
1382 struct pcic_handle *h = pcic_get_handle(dev, child);
1384 /* Nearly default */
1385 if (type == SYS_RES_MEMORY && start == 0 && end == ~0 && count != 1) {
1386 start = 0xd0000; /* XXX */
1390 r = bus_generic_alloc_resource(dev, child, type, rid, start, end,
1394 sz = rman_get_size(r);
1396 case SYS_RES_IOPORT:
1397 err = pcic_chip_io_alloc(h, rman_get_start(r), sz, 0,
1400 bus_generic_release_resource(dev, child, type, *rid,
1405 case SYS_RES_MEMORY:
1406 err = pcic_chip_mem_alloc(h, r, sz, &h->mem[*rid]);
1408 bus_generic_release_resource(dev, child, type, *rid,
1420 pcic_release_resource(device_t dev, device_t child, int type, int rid,
1423 struct pcic_handle *h = pcic_get_handle(dev, child);
1426 case SYS_RES_IOPORT:
1427 pcic_chip_io_free(h, &h->io[rid]);
1429 case SYS_RES_MEMORY:
1430 pcic_chip_mem_free(h, &h->mem[rid]);
1434 return bus_generic_release_resource(dev, child, type, rid, r);
1438 pcic_suspend(device_t dev)
1441 * Do nothing for now, maybe in time do what FreeBSD's current
1442 * pccard code does and detach my children. That's the safest thing
1443 * to do since we don't want to wake up and have different hardware
1451 pcic_resume(device_t dev)
1453 /* Need to port pcic_power from newer netbsd versions of this file */
1459 pcic_set_res_flags(device_t dev, device_t child, int type, int rid,
1462 struct pcic_handle *h = pcic_get_handle(dev, child);
1464 if (type != SYS_RES_MEMORY)
1466 h->mem[rid].kind = PCCARD_MEM_ATTR;
1467 pcic_chip_do_mem_map(h, rid);
1473 pcic_set_memory_offset(device_t dev, device_t child, int rid, u_int32_t offset,
1481 pcic_start_threads(void *arg)
1483 struct pcic_handle **walker;
1486 pcic_create_event_thread(*walker++);
1491 pcic_detach(device_t dev)
1498 pcic_deactivate(dev);
1499 ret = bus_generic_detach(dev);
1503 * Normally, one wouldn't delete the children. However, detach
1504 * merely detaches the children w/o deleting them. So if
1505 * we were to reattach, we add additional children and wind up
1506 * with duplicates. So, we remove them here following the
1507 * implicit "if you add it in attach, you should delete it in
1508 * detach" rule that may or may not be documented.
1510 device_get_children(dev, &kids, &nkids);
1511 for (i = 0; i < nkids; i++) {
1512 if ((ret = device_delete_child(dev, kids[i])) != 0)
1513 device_printf(dev, "delete of %s failed: %d\n",
1514 device_get_nameunit(kids[i]), ret);
1520 SYSINIT(pcic, SI_SUB_KTHREAD_IDLE, SI_ORDER_ANY, pcic_start_threads, 0);
1521 MODULE_VERSION(pcic, 1);