2 * Device driver for Specialix range (SI/XIO) of serial line multiplexors.
3 * 'C' definitions for Specialix serial multiplex driver.
5 * Copyright (C) 1990, 1992, 1998 Specialix International,
6 * Copyright (C) 1993, Andy Rutter <andy@acronym.co.uk>
7 * Copyright (C) 1995, Peter Wemm <peter@netplex.com.au>
9 * Derived from: SunOS 4.x version
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notices, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notices, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by Andy Rutter of
22 * Advanced Methods and Tools Ltd. based on original information
23 * from Specialix International.
24 * 4. Neither the name of Advanced Methods and Tools, nor Specialix
25 * International may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
28 * THIS SOFTWARE IS PROVIDED BY ``AS IS'' AND ANY EXPRESS OR IMPLIED
29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
30 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
31 * NO EVENT SHALL THE AUTHORS BE LIABLE.
33 * $FreeBSD: src/sys/dev/si/si.h,v 1.16 2000/01/24 07:24:00 peter Exp $
34 * $DragonFly: src/sys/dev/serial/si/si.h,v 1.3 2004/09/18 19:54:27 dillon Exp $
37 #include <sys/callout.h>
40 * Macro to turn a device number into various parameters, and test for
42 * max of 4 controllers with up to 32 ports per controller.
43 * minor device allocation is:
50 #define SI_MAXPORTPERCARD 32
51 #define SI_MAXCONTROLLER 4
55 * breakup of minor device number:
56 * lowest 5 bits: port number on card 0x1f
57 * next 2 bits: card number 0x60
58 * top bit: callout 0x80
59 * next 8 bits is the major number
60 * next 2 bits select initial/lock states
61 * next 1 bit selects the master control device
64 #define SI_PORT_MASK 0x1f
65 #define SI_CARD_MASK 0x60
66 #define SI_TTY_MASK 0x7f
67 #define SI_CALLOUT_MASK 0x80
68 #define SI_INIT_STATE_MASK 0x10000
69 #define SI_LOCK_STATE_MASK 0x20000
70 #define SI_STATE_MASK 0x30000
71 #define SI_CONTROLDEV_MASK 0x40000
72 #define SI_SPECIAL_MASK 0x70000
74 #define SI_CARDSHIFT 5
75 #define SI_PORT(m) (m & SI_PORT_MASK)
76 #define SI_CARD(m) ((m & SI_CARD_MASK) >> SI_CARDSHIFT)
77 #define SI_TTY(m) (m & SI_TTY_MASK)
79 #define IS_CALLOUT(m) (m & SI_CALLOUT_MASK)
80 #define IS_STATE(m) (m & SI_STATE_MASK)
81 #define IS_CONTROLDEV(m) (m & SI_CONTROLDEV_MASK)
82 #define IS_SPECIAL(m) (m & SI_SPECIAL_MASK)
84 #define MINOR2SC(m) ((struct si_softc *)devclass_get_softc(si_devclass, SI_CARD(m)))
85 #define MINOR2PP(m) (MINOR2SC((m))->sc_ports + SI_PORT((m)))
86 #define MINOR2TP(m) (MINOR2PP((m))->sp_tty)
87 #define TP2PP(tp) (MINOR2PP(SI_TTY(minor((tp)->t_dev))))
89 /* Buffer parameters */
90 #define SI_BUFFERSIZE 256
92 typedef unsigned char BYTE; /* Type cast for unsigned 8 bit */
93 typedef unsigned short WORD; /* Type cast for unsigned 16 bit */
97 * Hardware `registers', stored in the shared memory.
98 * These are related to the firmware running on the Z280.
106 BYTE rx_int_count; /* isr_count on Jet */
107 BYTE main_count; /* spare on Z-280 */
115 * Per module control structure, stored in shared memory.
118 WORD sm_next; /* Next module */
119 BYTE sm_type; /* Number of channels */
120 BYTE sm_number; /* Module number on cable */
121 BYTE sm_dsr; /* Private dsr copy */
122 BYTE sm_res[0x80 - 5]; /* Reserve space to 128 bytes */
126 * The 'next' pointer & with 0x7fff + SI base addres give
127 * the address of the next module block if fitted. (else 0)
128 * Note that next points to the TX buffer so 0x60 must be
129 * subtracted to find the true base.
133 #define TA4_ASIC 0x0A
134 #define TA8_ASIC 0x0B
139 * Per channel(port) control structure, stored in shared memory.
145 WORD next; /* Next Channel */
146 WORD addr_uart; /* Uart address */
147 WORD module; /* address of module struct */
148 BYTE type; /* Uart type */
151 * Uart type specific stuff
153 BYTE x_status; /* XON / XOFF status */
154 BYTE c_status; /* cooking status */
155 BYTE hi_rxipos; /* stuff into rx buff */
156 BYTE hi_rxopos; /* stuff out of rx buffer */
157 BYTE hi_txopos; /* Stuff into tx ptr */
158 BYTE hi_txipos; /* ditto out */
159 BYTE hi_stat; /* Command register */
160 BYTE dsr_bit; /* Magic bit for DSR */
161 BYTE txon; /* TX XON char */
162 BYTE txoff; /* ditto XOFF */
163 BYTE rxon; /* RX XON char */
164 BYTE rxoff; /* ditto XOFF */
165 BYTE hi_mr1; /* mode 1 image */
166 BYTE hi_mr2; /* mode 2 image */
167 BYTE hi_csr; /* clock register */
168 BYTE hi_op; /* Op control */
169 BYTE hi_ip; /* Input pins */
170 BYTE hi_state; /* status */
171 BYTE hi_prtcl; /* Protocol */
172 BYTE hi_txon; /* host copy tx xon stuff */
176 BYTE close_prev; /* Was channel previously closed */
177 BYTE hi_break; /* host copy break process */
178 BYTE break_state; /* local copy ditto */
179 BYTE hi_mask; /* Mask for CS7 etc. */
180 BYTE mask_z280; /* Z280's copy */
182 BYTE hi_txbuf[SI_BUFFERSIZE];
183 BYTE hi_rxbuf[SI_BUFFERSIZE];
188 * Register definitions
192 * Break input control register definitions
194 #define BR_IGN 0x01 /* Ignore any received breaks */
195 #define BR_INT 0x02 /* Interrupt on received break */
196 #define BR_PARMRK 0x04 /* Enable parmrk parity error processing */
197 #define BR_PARIGN 0x08 /* Ignore chars with parity errors */
200 * Protocol register provided by host for XON/XOFF and cooking
202 #define SP_TANY 0x01 /* Tx XON any char */
203 #define SP_TXEN 0x02 /* Tx XON/XOFF enabled */
204 #define SP_CEN 0x04 /* Cooking enabled */
205 #define SP_RXEN 0x08 /* Rx XON/XOFF enabled */
206 #define SP_DCEN 0x20 /* DCD / DTR check */
207 #define SP_PAEN 0x80 /* Parity checking enabled */
210 * HOST STATUS / COMMAND REGISTER
212 #define IDLE_OPEN 0x00 /* Default mode, TX and RX polled
213 buffer updated etc */
214 #define LOPEN 0x02 /* Local open command (no modem ctl */
215 #define MOPEN 0x04 /* Open and monitor modem lines (blocks
217 #define MPEND 0x06 /* Wating for DCD */
218 #define CONFIG 0x08 /* Channel config has changed */
219 #define CLOSE 0x0A /* Close channel */
220 #define SBREAK 0x0C /* Start break */
221 #define EBREAK 0x0E /* End break */
222 #define IDLE_CLOSE 0x10 /* Closed channel */
223 #define IDLE_BREAK 0x12 /* In a break */
224 #define FCLOSE 0x14 /* Force a close */
225 #define RESUME 0x16 /* Clear a pending xoff */
226 #define WFLUSH 0x18 /* Flush output buffer */
227 #define RFLUSH 0x1A /* Flush input buffer */
230 * Host status register
232 #define ST_BREAK 0x01 /* Break received (clear with config) */
235 * OUTPUT PORT REGISTER
237 #define OP_CTS 0x01 /* Enable CTS */
238 #define OP_DSR 0x02 /* Enable DSR */
240 * INPUT PORT REGISTER
242 #define IP_DCD 0x04 /* DCD High */
243 #define IP_DTR 0x20 /* DTR High */
244 #define IP_RTS 0x02 /* RTS High */
245 #define IP_RI 0x40 /* RI High */
248 * Mode register and uart specific stuff
253 #define MR1_5_BITS 0x00
254 #define MR1_6_BITS 0x01
255 #define MR1_7_BITS 0x02
256 #define MR1_8_BITS 0x03
261 #define MR1_EVEN 0x00
265 #define MR1_WITH 0x00
266 #define MR1_FORCE 0x08
267 #define MR1_NONE 0x10
268 #define MR1_SPECIAL 0x18
272 #define MR1_CHAR 0x00
273 #define MR1_BLOCK 0x20
275 * Request to send line automatic control
277 #define MR1_CTSCONT 0x80
283 * Number of stop bits
285 #define MR2_1_STOP 0x07
286 #define MR2_2_STOP 0x0F
288 * Clear to send automatic testing before character sent
290 #define MR2_RTSCONT 0x10
292 * Reset RTS automatically after sending character?
294 #define MR2_CTSCONT 0x20
298 #define MR2_NORMAL 0x00
299 #define MR2_AUTO 0x40
300 #define MR2_LOCAL 0x80
301 #define MR2_REMOTE 0xC0
304 * CLOCK SELECT REGISTER - this and the code assumes ispeed == ospeed
307 * Clocking rates are in lower and upper nibbles.. R = upper, T = lower
310 #define CLK110 0x1 /* 110 on XIO!! */
311 #define CLK38400 0x2 /* out of sequence */
319 #define CLK7200 0xa /* unchecked */
325 * Per-port (channel) soft information structure, stored in the driver.
326 * This is visible via ioctl()'s.
329 volatile struct si_channel *sp_ccb;
331 int sp_pend; /* pending command */
332 int sp_last_hi_ip; /* cached DCD */
334 int sp_active_out; /* callout is open */
335 int sp_dtr_wait; /* DTR holddown in hz */
336 int sp_delta_overflows;
337 u_int sp_wopeners; /* # procs waiting DCD */
338 u_char sp_hotchar; /* ldisc specific ASAP char */
340 struct termios sp_iin;
341 struct termios sp_iout;
343 struct termios sp_lin;
344 struct termios sp_lout;
345 struct callout lstart_ch; /* For canceling our timeout */
347 int sp_debug; /* debug mask */
352 #define SS_CLOSED 0x0000
353 #define SS_OPEN 0x0001 /* Port is active */
361 #define SS_LSTART 0x0100 /* lstart timeout pending */
362 #define SS_INLSTART 0x0200 /* running an lstart induced t_oproc */
363 #define SS_CLOSING 0x0400 /* in the middle of a siclose() */
365 #define SS_WAITWRITE 0x1000
366 #define SS_BLOCKWRITE 0x2000
367 #define SS_DTR_OFF 0x4000 /* DTR held off */
372 #define SI_NOWAIT 0x00 /* Don't wait for command */
373 #define SI_WAIT 0x01 /* Wait for complete */
376 * Extensive debugging stuff - manipulated using siconfig(8)
378 #define DBG_ENTRY 0x00000001
379 #define DBG_DRAIN 0x00000002
380 #define DBG_OPEN 0x00000004
381 #define DBG_CLOSE 0x00000008
382 #define DBG_READ 0x00000010
383 #define DBG_WRITE 0x00000020
384 #define DBG_PARAM 0x00000040
385 #define DBG_INTR 0x00000080
386 #define DBG_IOCTL 0x00000100
388 #define DBG_SELECT 0x00000400
389 #define DBG_OPTIM 0x00000800
390 #define DBG_START 0x00001000
391 #define DBG_EXIT 0x00002000
392 #define DBG_FAIL 0x00004000
393 #define DBG_STOP 0x00008000
394 #define DBG_AUTOBOOT 0x00010000
395 #define DBG_MODEM 0x00020000
396 #define DBG_DOWNLOAD 0x00040000
397 #define DBG_LSTART 0x00080000
398 #define DBG_POLL 0x00100000
399 #define DBG_ALL 0xffffffff
405 * struct for use by Specialix ioctls - used by siconfig(8)
409 sid_port:5, /* 0 - 31 ports per card */
410 sid_card:2, /* 0 - 3 cards */
411 sid_control:1; /* controlling device (all cards) */
419 #define tc_card tc_dev.sid_card
420 #define tc_port tc_dev.sid_port
421 #define tc_int tc_action.x_int
422 #define tc_dbglvl tc_action.x_dbglvl
428 struct si_port x_siport;
429 struct si_channel x_ccb;
432 #define tc_siport tc_action.x_siport
433 #define tc_ccb tc_action.x_ccb
434 #define tc_tty tc_action.x_tty
438 #define TCSIDEBUG _IOW('S', 96, struct si_tcsi) /* Toggle debug */
439 #define TCSIRXIT _IOW('S', 97, struct si_tcsi) /* RX int throttle */
440 #define TCSIIT _IOW('S', 98, struct si_tcsi) /* TX int throttle */
447 #define TCSISTATE _IOWR('S', 105, struct si_tcsi) /* get current state of RTS
450 #define TCSIPORTS _IOR('S', 107, int) /* Number of ports found */
451 #define TCSISDBG_LEVEL _IOW('S', 108, struct si_tcsi) /* equivalent of TCSIDEBUG which sets a
452 * particular debug level (DBG_??? bit
453 * mask), default is 0xffff */
454 #define TCSIGDBG_LEVEL _IOWR('S', 109, struct si_tcsi)
455 #define TCSIGRXIT _IOWR('S', 110, struct si_tcsi)
456 #define TCSIGIT _IOWR('S', 111, struct si_tcsi)
464 #define TCSISDBG_ALL _IOW('S', 118, int) /* set global debug level */
465 #define TCSIGDBG_ALL _IOR('S', 119, int) /* get global debug level */
471 #define TCSIMODULES _IOR('S', 124, int) /* Number of modules found */
473 /* Various stats and monitoring hooks per tty device */
474 #define TCSI_PORT _IOWR('S', 125, struct si_pstat) /* get si_port */
475 #define TCSI_CCB _IOWR('S', 126, struct si_pstat) /* get si_ccb */
476 #define TCSI_TTY _IOWR('S', 127, struct si_pstat) /* get tty struct */
478 #define IOCTL_MAX 127
480 #define IS_SI_IOCTL(cmd) ((u_int)((cmd)&0xff00) == ('S'<<8) && \
481 (u_int)((cmd)&0xff) >= IOCTL_MIN && \
482 (u_int)((cmd)&0xff) <= IOCTL_MAX)
484 #define CONTROLDEV "/dev/si_control"