Merge from vendor branch GPERF:
[dragonfly.git] / sys / dev / disk / aic7xxx / ahc_pci.c
1 /*
2  * FreeBSD, PCI product support functions
3  *
4  * Copyright (c) 1995-2001 Justin T. Gibbs
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions, and the following disclaimer,
12  *    without modification, immediately at the beginning of the file.
13  * 2. The name of the author may not be used to endorse or promote products
14  *    derived from this software without specific prior written permission.
15  *
16  * Alternatively, this software may be distributed under the terms of the
17  * GNU Public License ("GPL").
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
23  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29  * SUCH DAMAGE.
30  *
31  * $Id: //depot/aic7xxx/freebsd/dev/aic7xxx/ahc_pci.c#13 $
32  *
33  * $FreeBSD: src/sys/dev/aic7xxx/ahc_pci.c,v 1.29.2.14 2003/06/10 03:26:07 gibbs Exp $
34  * $DragonFly: src/sys/dev/disk/aic7xxx/ahc_pci.c,v 1.5 2004/03/15 01:10:42 dillon Exp $
35  */
36
37 #include "aic7xxx_osm.h"
38
39 #define AHC_PCI_IOADDR  PCIR_MAPS       /* I/O Address */
40 #define AHC_PCI_MEMADDR (PCIR_MAPS + 4) /* Mem I/O Address */
41
42 static int ahc_pci_probe(device_t dev);
43 static int ahc_pci_attach(device_t dev);
44
45 static device_method_t ahc_pci_device_methods[] = {
46         /* Device interface */
47         DEVMETHOD(device_probe,         ahc_pci_probe),
48         DEVMETHOD(device_attach,        ahc_pci_attach),
49         DEVMETHOD(device_detach,        ahc_detach),
50         { 0, 0 }
51 };
52
53 static driver_t ahc_pci_driver = {
54         "ahc",
55         ahc_pci_device_methods,
56         sizeof(struct ahc_softc)
57 };
58
59 DRIVER_MODULE(ahc_pci, pci, ahc_pci_driver, ahc_devclass, 0, 0);
60 DRIVER_MODULE(ahc_pci, cardbus, ahc_pci_driver, ahc_devclass, 0, 0);
61 MODULE_DEPEND(ahc_pci, ahc, 1, 1, 1);
62 MODULE_VERSION(ahc_pci, 1);
63
64 static int
65 ahc_pci_probe(device_t dev)
66 {
67         struct  ahc_pci_identity *entry;
68
69         entry = ahc_find_pci_device(dev);
70         if (entry != NULL) {
71                 device_set_desc(dev, entry->name);
72                 return (0);
73         }
74         return (ENXIO);
75 }
76
77 static int
78 ahc_pci_attach(device_t dev)
79 {
80         struct   ahc_pci_identity *entry;
81         struct   ahc_softc *ahc;
82         char    *name;
83         int      error;
84
85         entry = ahc_find_pci_device(dev);
86         if (entry == NULL)
87                 return (ENXIO);
88
89         /*
90          * Allocate a softc for this card and
91          * set it up for attachment by our
92          * common detect routine.
93          */
94         name = malloc(strlen(device_get_nameunit(dev)) + 1, M_DEVBUF, M_WAITOK);
95         strcpy(name, device_get_nameunit(dev));
96         ahc = ahc_alloc(dev, name);
97         if (ahc == NULL)
98                 return (ENOMEM);
99
100         ahc_set_unit(ahc, device_get_unit(dev));
101
102         /*
103          * Should we bother disabling 39Bit addressing
104          * based on installed memory?
105          */
106         if (sizeof(bus_addr_t) > 4)
107                 ahc->flags |= AHC_39BIT_ADDRESSING;
108
109         /* Allocate a dmatag for our SCB DMA maps */
110         /* XXX Should be a child of the PCI bus dma tag */
111         error = bus_dma_tag_create(/*parent*/NULL, /*alignment*/1,
112                                    /*boundary*/0,
113                                    (ahc->flags & AHC_39BIT_ADDRESSING)
114                                    ? 0x7FFFFFFFFFULL
115                                    : BUS_SPACE_MAXADDR_32BIT,
116                                    /*highaddr*/BUS_SPACE_MAXADDR,
117                                    /*filter*/NULL, /*filterarg*/NULL,
118                                    /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
119                                    /*nsegments*/AHC_NSEG,
120                                    /*maxsegsz*/AHC_MAXTRANSFER_SIZE,
121                                    /*flags*/0,
122                                    &ahc->parent_dmat);
123
124         if (error != 0) {
125                 printf("ahc_pci_attach: Could not allocate DMA tag "
126                        "- error %d\n", error);
127                 ahc_free(ahc);
128                 return (ENOMEM);
129         }
130         ahc->dev_softc = dev;
131         error = ahc_pci_config(ahc, entry);
132         if (error != 0) {
133                 ahc_free(ahc);
134                 return (error);
135         }
136
137         ahc_attach(ahc);
138         return (0);
139 }
140
141 int
142 ahc_pci_map_registers(struct ahc_softc *ahc)
143 {
144         struct  resource *regs;
145         u_int   command;
146         int     regs_type;
147         int     regs_id;
148         int     allow_memio;
149
150         command = ahc_pci_read_config(ahc->dev_softc, PCIR_COMMAND, /*bytes*/1);
151         regs = NULL;
152         regs_type = 0;
153         regs_id = 0;
154
155         /* Retrieve the per-device 'allow_memio' hint */
156         if (resource_int_value(device_get_name(ahc->dev_softc),
157                                device_get_unit(ahc->dev_softc),
158                                "allow_memio", &allow_memio) != 0) {
159                 if (bootverbose)
160                         device_printf(ahc->dev_softc, "Defaulting to MEMIO ");
161 #ifdef AHC_ALLOW_MEMIO
162                 if (bootverbose)
163                         printf("on\n");
164                 allow_memio = 1;
165 #else
166                 if (bootverbose)
167                         printf("off\n");
168                 allow_memio = 0;
169 #endif
170         }
171
172         if ((allow_memio != 0) && (command & PCIM_CMD_MEMEN) != 0) {
173
174                 regs_type = SYS_RES_MEMORY;
175                 regs_id = AHC_PCI_MEMADDR;
176                 regs = bus_alloc_resource(ahc->dev_softc, regs_type,
177                                           &regs_id, 0, ~0, 1, RF_ACTIVE);
178                 if (regs != NULL) {
179                         ahc->tag = rman_get_bustag(regs);
180                         ahc->bsh = rman_get_bushandle(regs);
181
182                         /*
183                          * Do a quick test to see if memory mapped
184                          * I/O is functioning correctly.
185                          */
186                         if (ahc_pci_test_register_access(ahc) != 0) {
187                                 device_printf(ahc->dev_softc,
188                                        "PCI Device %d:%d:%d failed memory "
189                                        "mapped test.  Using PIO.\n",
190                                        ahc_get_pci_bus(ahc->dev_softc),
191                                        ahc_get_pci_slot(ahc->dev_softc),
192                                        ahc_get_pci_function(ahc->dev_softc));
193                                 bus_release_resource(ahc->dev_softc, regs_type,
194                                                      regs_id, regs);
195                                 regs = NULL;
196                         } else {
197                                 command &= ~PCIM_CMD_PORTEN;
198                                 ahc_pci_write_config(ahc->dev_softc,
199                                                      PCIR_COMMAND,
200                                                      command, /*bytes*/1);
201                         }
202                 }
203         }
204
205         if (regs == NULL && (command & PCIM_CMD_PORTEN) != 0) {
206                 regs_type = SYS_RES_IOPORT;
207                 regs_id = AHC_PCI_IOADDR;
208                 regs = bus_alloc_resource(ahc->dev_softc, regs_type,
209                                           &regs_id, 0, ~0, 1, RF_ACTIVE);
210                 if (regs != NULL) {
211                         ahc->tag = rman_get_bustag(regs);
212                         ahc->bsh = rman_get_bushandle(regs);
213                         command &= ~PCIM_CMD_MEMEN;
214                         ahc_pci_write_config(ahc->dev_softc, PCIR_COMMAND,
215                                              command, /*bytes*/1);
216                 }
217         }
218         if (regs == NULL) {
219                 device_printf(ahc->dev_softc,
220                               "can't allocate register resources\n");
221                 return (ENOMEM);
222         }
223         ahc->platform_data->regs_res_type = regs_type;
224         ahc->platform_data->regs_res_id = regs_id;
225         ahc->platform_data->regs = regs;
226         return (0);
227 }
228
229 int
230 ahc_pci_map_int(struct ahc_softc *ahc)
231 {
232         int zero;
233
234         zero = 0;
235         ahc->platform_data->irq =
236             bus_alloc_resource(ahc->dev_softc, SYS_RES_IRQ, &zero,
237                                0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
238         if (ahc->platform_data->irq == NULL) {
239                 device_printf(ahc->dev_softc,
240                               "bus_alloc_resource() failed to allocate IRQ\n");
241                 return (ENOMEM);
242         }
243         ahc->platform_data->irq_res_type = SYS_RES_IRQ;
244         return (ahc_map_int(ahc));
245 }
246
247 void
248 ahc_power_state_change(struct ahc_softc *ahc, ahc_power_state new_state)
249 {
250         uint32_t cap;
251         u_int cap_offset;
252
253         /*
254          * Traverse the capability list looking for
255          * the power management capability.
256          */
257         cap = 0;
258         cap_offset = ahc_pci_read_config(ahc->dev_softc,
259                                          PCIR_CAP_PTR, /*bytes*/1);
260         while (cap_offset != 0) {
261
262                 cap = ahc_pci_read_config(ahc->dev_softc,
263                                           cap_offset, /*bytes*/4);
264                 if ((cap & 0xFF) == 1
265                  && ((cap >> 16) & 0x3) > 0) {
266                         uint32_t pm_control;
267
268                         pm_control = ahc_pci_read_config(ahc->dev_softc,
269                                                          cap_offset + 4,
270                                                          /*bytes*/2);
271                         pm_control &= ~0x3;
272                         pm_control |= new_state;
273                         ahc_pci_write_config(ahc->dev_softc,
274                                              cap_offset + 4,
275                                              pm_control, /*bytes*/2);
276                         break;
277                 }
278                 cap_offset = (cap >> 8) & 0xFF;
279         }
280 }