2 * FreeBSD, PCI product support functions
4 * Copyright (c) 1995-2001 Justin T. Gibbs
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions, and the following disclaimer,
12 * without modification, immediately at the beginning of the file.
13 * 2. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU Public License ("GPL").
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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31 * $Id: //depot/aic7xxx/freebsd/dev/aic7xxx/ahc_pci.c#13 $
33 * $FreeBSD: src/sys/dev/aic7xxx/ahc_pci.c,v 1.29.2.14 2003/06/10 03:26:07 gibbs Exp $
34 * $DragonFly: src/sys/dev/disk/aic7xxx/ahc_pci.c,v 1.5 2004/03/15 01:10:42 dillon Exp $
37 #include "aic7xxx_osm.h"
39 #define AHC_PCI_IOADDR PCIR_MAPS /* I/O Address */
40 #define AHC_PCI_MEMADDR (PCIR_MAPS + 4) /* Mem I/O Address */
42 static int ahc_pci_probe(device_t dev);
43 static int ahc_pci_attach(device_t dev);
45 static device_method_t ahc_pci_device_methods[] = {
46 /* Device interface */
47 DEVMETHOD(device_probe, ahc_pci_probe),
48 DEVMETHOD(device_attach, ahc_pci_attach),
49 DEVMETHOD(device_detach, ahc_detach),
53 static driver_t ahc_pci_driver = {
55 ahc_pci_device_methods,
56 sizeof(struct ahc_softc)
59 DRIVER_MODULE(ahc_pci, pci, ahc_pci_driver, ahc_devclass, 0, 0);
60 DRIVER_MODULE(ahc_pci, cardbus, ahc_pci_driver, ahc_devclass, 0, 0);
61 MODULE_DEPEND(ahc_pci, ahc, 1, 1, 1);
62 MODULE_VERSION(ahc_pci, 1);
65 ahc_pci_probe(device_t dev)
67 struct ahc_pci_identity *entry;
69 entry = ahc_find_pci_device(dev);
71 device_set_desc(dev, entry->name);
78 ahc_pci_attach(device_t dev)
80 struct ahc_pci_identity *entry;
81 struct ahc_softc *ahc;
85 entry = ahc_find_pci_device(dev);
90 * Allocate a softc for this card and
91 * set it up for attachment by our
92 * common detect routine.
94 name = malloc(strlen(device_get_nameunit(dev)) + 1, M_DEVBUF, M_WAITOK);
95 strcpy(name, device_get_nameunit(dev));
96 ahc = ahc_alloc(dev, name);
100 ahc_set_unit(ahc, device_get_unit(dev));
103 * Should we bother disabling 39Bit addressing
104 * based on installed memory?
106 if (sizeof(bus_addr_t) > 4)
107 ahc->flags |= AHC_39BIT_ADDRESSING;
109 /* Allocate a dmatag for our SCB DMA maps */
110 /* XXX Should be a child of the PCI bus dma tag */
111 error = bus_dma_tag_create(/*parent*/NULL, /*alignment*/1,
113 (ahc->flags & AHC_39BIT_ADDRESSING)
115 : BUS_SPACE_MAXADDR_32BIT,
116 /*highaddr*/BUS_SPACE_MAXADDR,
117 /*filter*/NULL, /*filterarg*/NULL,
118 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
119 /*nsegments*/AHC_NSEG,
120 /*maxsegsz*/AHC_MAXTRANSFER_SIZE,
125 printf("ahc_pci_attach: Could not allocate DMA tag "
126 "- error %d\n", error);
130 ahc->dev_softc = dev;
131 error = ahc_pci_config(ahc, entry);
142 ahc_pci_map_registers(struct ahc_softc *ahc)
144 struct resource *regs;
150 command = ahc_pci_read_config(ahc->dev_softc, PCIR_COMMAND, /*bytes*/1);
155 /* Retrieve the per-device 'allow_memio' hint */
156 if (resource_int_value(device_get_name(ahc->dev_softc),
157 device_get_unit(ahc->dev_softc),
158 "allow_memio", &allow_memio) != 0) {
160 device_printf(ahc->dev_softc, "Defaulting to MEMIO ");
161 #ifdef AHC_ALLOW_MEMIO
172 if ((allow_memio != 0) && (command & PCIM_CMD_MEMEN) != 0) {
174 regs_type = SYS_RES_MEMORY;
175 regs_id = AHC_PCI_MEMADDR;
176 regs = bus_alloc_resource(ahc->dev_softc, regs_type,
177 ®s_id, 0, ~0, 1, RF_ACTIVE);
179 ahc->tag = rman_get_bustag(regs);
180 ahc->bsh = rman_get_bushandle(regs);
183 * Do a quick test to see if memory mapped
184 * I/O is functioning correctly.
186 if (ahc_pci_test_register_access(ahc) != 0) {
187 device_printf(ahc->dev_softc,
188 "PCI Device %d:%d:%d failed memory "
189 "mapped test. Using PIO.\n",
190 ahc_get_pci_bus(ahc->dev_softc),
191 ahc_get_pci_slot(ahc->dev_softc),
192 ahc_get_pci_function(ahc->dev_softc));
193 bus_release_resource(ahc->dev_softc, regs_type,
197 command &= ~PCIM_CMD_PORTEN;
198 ahc_pci_write_config(ahc->dev_softc,
200 command, /*bytes*/1);
205 if (regs == NULL && (command & PCIM_CMD_PORTEN) != 0) {
206 regs_type = SYS_RES_IOPORT;
207 regs_id = AHC_PCI_IOADDR;
208 regs = bus_alloc_resource(ahc->dev_softc, regs_type,
209 ®s_id, 0, ~0, 1, RF_ACTIVE);
211 ahc->tag = rman_get_bustag(regs);
212 ahc->bsh = rman_get_bushandle(regs);
213 command &= ~PCIM_CMD_MEMEN;
214 ahc_pci_write_config(ahc->dev_softc, PCIR_COMMAND,
215 command, /*bytes*/1);
219 device_printf(ahc->dev_softc,
220 "can't allocate register resources\n");
223 ahc->platform_data->regs_res_type = regs_type;
224 ahc->platform_data->regs_res_id = regs_id;
225 ahc->platform_data->regs = regs;
230 ahc_pci_map_int(struct ahc_softc *ahc)
235 ahc->platform_data->irq =
236 bus_alloc_resource(ahc->dev_softc, SYS_RES_IRQ, &zero,
237 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
238 if (ahc->platform_data->irq == NULL) {
239 device_printf(ahc->dev_softc,
240 "bus_alloc_resource() failed to allocate IRQ\n");
243 ahc->platform_data->irq_res_type = SYS_RES_IRQ;
244 return (ahc_map_int(ahc));
248 ahc_power_state_change(struct ahc_softc *ahc, ahc_power_state new_state)
254 * Traverse the capability list looking for
255 * the power management capability.
258 cap_offset = ahc_pci_read_config(ahc->dev_softc,
259 PCIR_CAP_PTR, /*bytes*/1);
260 while (cap_offset != 0) {
262 cap = ahc_pci_read_config(ahc->dev_softc,
263 cap_offset, /*bytes*/4);
264 if ((cap & 0xFF) == 1
265 && ((cap >> 16) & 0x3) > 0) {
268 pm_control = ahc_pci_read_config(ahc->dev_softc,
272 pm_control |= new_state;
273 ahc_pci_write_config(ahc->dev_softc,
275 pm_control, /*bytes*/2);
278 cap_offset = (cap >> 8) & 0xFF;