drm: Import drm2+i915 work from FreeBSD
[dragonfly.git] / sys / dev / drm2 / i915 / intel_lvds.c
1 /*
2  * Copyright © 2006-2007 Intel Corporation
3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22  * DEALINGS IN THE SOFTWARE.
23  *
24  * Authors:
25  *      Eric Anholt <eric@anholt.net>
26  *      Dave Airlie <airlied@linux.ie>
27  *      Jesse Barnes <jesse.barnes@intel.com>
28  */
29
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD: src/sys/dev/drm2/i915/intel_lvds.c,v 1.1 2012/05/22 11:07:44 kib Exp $");
32
33 #include <dev/drm2/drmP.h>
34 #include <dev/drm2/drm.h>
35 #include <dev/drm2/drm_crtc.h>
36 #include <dev/drm2/drm_edid.h>
37 #include <dev/drm2/i915/i915_drm.h>
38 #include <dev/drm2/i915/i915_drv.h>
39 #include <dev/drm2/i915/intel_drv.h>
40
41 /* Private structure for the integrated LVDS support */
42 struct intel_lvds {
43         struct intel_encoder base;
44
45         struct edid *edid;
46
47         int fitting_mode;
48         u32 pfit_control;
49         u32 pfit_pgm_ratios;
50         bool pfit_dirty;
51
52         struct drm_display_mode *fixed_mode;
53 };
54
55 static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
56 {
57         return container_of(encoder, struct intel_lvds, base.base);
58 }
59
60 static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
61 {
62         return container_of(intel_attached_encoder(connector),
63                             struct intel_lvds, base);
64 }
65
66 /**
67  * Sets the power state for the panel.
68  */
69 static void intel_lvds_enable(struct intel_lvds *intel_lvds)
70 {
71         struct drm_device *dev = intel_lvds->base.base.dev;
72         struct drm_i915_private *dev_priv = dev->dev_private;
73         u32 ctl_reg, lvds_reg, stat_reg;
74
75         if (HAS_PCH_SPLIT(dev)) {
76                 ctl_reg = PCH_PP_CONTROL;
77                 lvds_reg = PCH_LVDS;
78                 stat_reg = PCH_PP_STATUS;
79         } else {
80                 ctl_reg = PP_CONTROL;
81                 lvds_reg = LVDS;
82                 stat_reg = PP_STATUS;
83         }
84
85         I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
86
87         if (intel_lvds->pfit_dirty) {
88                 /*
89                  * Enable automatic panel scaling so that non-native modes
90                  * fill the screen.  The panel fitter should only be
91                  * adjusted whilst the pipe is disabled, according to
92                  * register description and PRM.
93                  */
94                 DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
95                               intel_lvds->pfit_control,
96                               intel_lvds->pfit_pgm_ratios);
97
98                 I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
99                 I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
100                 intel_lvds->pfit_dirty = false;
101         }
102
103         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
104         POSTING_READ(lvds_reg);
105         if (_intel_wait_for(dev,
106             (I915_READ(stat_reg) & PP_ON) == 0, 1000,
107             1, "915lvds"))
108                 DRM_ERROR("timed out waiting for panel to power off\n");
109
110         intel_panel_enable_backlight(dev);
111 }
112
113 static void intel_lvds_disable(struct intel_lvds *intel_lvds)
114 {
115         struct drm_device *dev = intel_lvds->base.base.dev;
116         struct drm_i915_private *dev_priv = dev->dev_private;
117         u32 ctl_reg, lvds_reg, stat_reg;
118
119         if (HAS_PCH_SPLIT(dev)) {
120                 ctl_reg = PCH_PP_CONTROL;
121                 lvds_reg = PCH_LVDS;
122                 stat_reg = PCH_PP_STATUS;
123         } else {
124                 ctl_reg = PP_CONTROL;
125                 lvds_reg = LVDS;
126                 stat_reg = PP_STATUS;
127         }
128
129         intel_panel_disable_backlight(dev);
130
131         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
132         if (_intel_wait_for(dev,
133             (I915_READ(stat_reg) & PP_ON) == 0, 1000,
134             1, "915lvo"))
135                 DRM_ERROR("timed out waiting for panel to power off\n");
136
137         if (intel_lvds->pfit_control) {
138                 I915_WRITE(PFIT_CONTROL, 0);
139                 intel_lvds->pfit_dirty = true;
140         }
141
142         I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
143         POSTING_READ(lvds_reg);
144 }
145
146 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
147 {
148         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
149
150         if (mode == DRM_MODE_DPMS_ON)
151                 intel_lvds_enable(intel_lvds);
152         else
153                 intel_lvds_disable(intel_lvds);
154
155         /* XXX: We never power down the LVDS pairs. */
156 }
157
158 static int intel_lvds_mode_valid(struct drm_connector *connector,
159                                  struct drm_display_mode *mode)
160 {
161         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
162         struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
163
164         if (mode->hdisplay > fixed_mode->hdisplay)
165                 return MODE_PANEL;
166         if (mode->vdisplay > fixed_mode->vdisplay)
167                 return MODE_PANEL;
168
169         return MODE_OK;
170 }
171
172 static void
173 centre_horizontally(struct drm_display_mode *mode,
174                     int width)
175 {
176         u32 border, sync_pos, blank_width, sync_width;
177
178         /* keep the hsync and hblank widths constant */
179         sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
180         blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
181         sync_pos = (blank_width - sync_width + 1) / 2;
182
183         border = (mode->hdisplay - width + 1) / 2;
184         border += border & 1; /* make the border even */
185
186         mode->crtc_hdisplay = width;
187         mode->crtc_hblank_start = width + border;
188         mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
189
190         mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
191         mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
192
193         mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
194 }
195
196 static void
197 centre_vertically(struct drm_display_mode *mode,
198                   int height)
199 {
200         u32 border, sync_pos, blank_width, sync_width;
201
202         /* keep the vsync and vblank widths constant */
203         sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
204         blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
205         sync_pos = (blank_width - sync_width + 1) / 2;
206
207         border = (mode->vdisplay - height + 1) / 2;
208
209         mode->crtc_vdisplay = height;
210         mode->crtc_vblank_start = height + border;
211         mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
212
213         mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
214         mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
215
216         mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
217 }
218
219 static inline u32 panel_fitter_scaling(u32 source, u32 target)
220 {
221         /*
222          * Floating point operation is not supported. So the FACTOR
223          * is defined, which can avoid the floating point computation
224          * when calculating the panel ratio.
225          */
226 #define ACCURACY 12
227 #define FACTOR (1 << ACCURACY)
228         u32 ratio = source * FACTOR / target;
229         return (FACTOR * ratio + FACTOR/2) / FACTOR;
230 }
231
232 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
233                                   struct drm_display_mode *mode,
234                                   struct drm_display_mode *adjusted_mode)
235 {
236         struct drm_device *dev = encoder->dev;
237         struct drm_i915_private *dev_priv = dev->dev_private;
238         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
239         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
240         struct drm_encoder *tmp_encoder;
241         u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
242         int pipe;
243
244         /* Should never happen!! */
245         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
246                 DRM_ERROR("Can't support LVDS on pipe A\n");
247                 return false;
248         }
249
250         /* Should never happen!! */
251         list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
252                 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
253                         DRM_ERROR("Can't enable LVDS and another "
254                                "encoder on the same pipe\n");
255                         return false;
256                 }
257         }
258
259         /*
260          * We have timings from the BIOS for the panel, put them in
261          * to the adjusted mode.  The CRTC will be set up for this mode,
262          * with the panel scaling set up to source from the H/VDisplay
263          * of the original mode.
264          */
265         intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
266
267         if (HAS_PCH_SPLIT(dev)) {
268                 intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
269                                         mode, adjusted_mode);
270                 return true;
271         }
272
273         /* Native modes don't need fitting */
274         if (adjusted_mode->hdisplay == mode->hdisplay &&
275             adjusted_mode->vdisplay == mode->vdisplay)
276                 goto out;
277
278         /* 965+ wants fuzzy fitting */
279         if (INTEL_INFO(dev)->gen >= 4)
280                 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
281                                  PFIT_FILTER_FUZZY);
282
283         /*
284          * Enable automatic panel scaling for non-native modes so that they fill
285          * the screen.  Should be enabled before the pipe is enabled, according
286          * to register description and PRM.
287          * Change the value here to see the borders for debugging
288          */
289         for_each_pipe(pipe)
290                 I915_WRITE(BCLRPAT(pipe), 0);
291
292         drm_mode_set_crtcinfo(adjusted_mode, 0);
293
294         switch (intel_lvds->fitting_mode) {
295         case DRM_MODE_SCALE_CENTER:
296                 /*
297                  * For centered modes, we have to calculate border widths &
298                  * heights and modify the values programmed into the CRTC.
299                  */
300                 centre_horizontally(adjusted_mode, mode->hdisplay);
301                 centre_vertically(adjusted_mode, mode->vdisplay);
302                 border = LVDS_BORDER_ENABLE;
303                 break;
304
305         case DRM_MODE_SCALE_ASPECT:
306                 /* Scale but preserve the aspect ratio */
307                 if (INTEL_INFO(dev)->gen >= 4) {
308                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
309                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
310
311                         /* 965+ is easy, it does everything in hw */
312                         if (scaled_width > scaled_height)
313                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
314                         else if (scaled_width < scaled_height)
315                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
316                         else if (adjusted_mode->hdisplay != mode->hdisplay)
317                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
318                 } else {
319                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
320                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
321                         /*
322                          * For earlier chips we have to calculate the scaling
323                          * ratio by hand and program it into the
324                          * PFIT_PGM_RATIO register
325                          */
326                         if (scaled_width > scaled_height) { /* pillar */
327                                 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
328
329                                 border = LVDS_BORDER_ENABLE;
330                                 if (mode->vdisplay != adjusted_mode->vdisplay) {
331                                         u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
332                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
333                                                             bits << PFIT_VERT_SCALE_SHIFT);
334                                         pfit_control |= (PFIT_ENABLE |
335                                                          VERT_INTERP_BILINEAR |
336                                                          HORIZ_INTERP_BILINEAR);
337                                 }
338                         } else if (scaled_width < scaled_height) { /* letter */
339                                 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
340
341                                 border = LVDS_BORDER_ENABLE;
342                                 if (mode->hdisplay != adjusted_mode->hdisplay) {
343                                         u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
344                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
345                                                             bits << PFIT_VERT_SCALE_SHIFT);
346                                         pfit_control |= (PFIT_ENABLE |
347                                                          VERT_INTERP_BILINEAR |
348                                                          HORIZ_INTERP_BILINEAR);
349                                 }
350                         } else
351                                 /* Aspects match, Let hw scale both directions */
352                                 pfit_control |= (PFIT_ENABLE |
353                                                  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
354                                                  VERT_INTERP_BILINEAR |
355                                                  HORIZ_INTERP_BILINEAR);
356                 }
357                 break;
358
359         case DRM_MODE_SCALE_FULLSCREEN:
360                 /*
361                  * Full scaling, even if it changes the aspect ratio.
362                  * Fortunately this is all done for us in hw.
363                  */
364                 if (mode->vdisplay != adjusted_mode->vdisplay ||
365                     mode->hdisplay != adjusted_mode->hdisplay) {
366                         pfit_control |= PFIT_ENABLE;
367                         if (INTEL_INFO(dev)->gen >= 4)
368                                 pfit_control |= PFIT_SCALING_AUTO;
369                         else
370                                 pfit_control |= (VERT_AUTO_SCALE |
371                                                  VERT_INTERP_BILINEAR |
372                                                  HORIZ_AUTO_SCALE |
373                                                  HORIZ_INTERP_BILINEAR);
374                 }
375                 break;
376
377         default:
378                 break;
379         }
380
381 out:
382         /* If not enabling scaling, be consistent and always use 0. */
383         if ((pfit_control & PFIT_ENABLE) == 0) {
384                 pfit_control = 0;
385                 pfit_pgm_ratios = 0;
386         }
387
388         /* Make sure pre-965 set dither correctly */
389         if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
390                 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
391
392         if (pfit_control != intel_lvds->pfit_control ||
393             pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
394                 intel_lvds->pfit_control = pfit_control;
395                 intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
396                 intel_lvds->pfit_dirty = true;
397         }
398         dev_priv->lvds_border_bits = border;
399
400         /*
401          * XXX: It would be nice to support lower refresh rates on the
402          * panels to reduce power consumption, and perhaps match the
403          * user's requested refresh rate.
404          */
405
406         return true;
407 }
408
409 static void intel_lvds_prepare(struct drm_encoder *encoder)
410 {
411         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
412
413         /*
414          * Prior to Ironlake, we must disable the pipe if we want to adjust
415          * the panel fitter. However at all other times we can just reset
416          * the registers regardless.
417          */
418         if (!HAS_PCH_SPLIT(encoder->dev) && intel_lvds->pfit_dirty)
419                 intel_lvds_disable(intel_lvds);
420 }
421
422 static void intel_lvds_commit(struct drm_encoder *encoder)
423 {
424         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
425
426         /* Always do a full power on as we do not know what state
427          * we were left in.
428          */
429         intel_lvds_enable(intel_lvds);
430 }
431
432 static void intel_lvds_mode_set(struct drm_encoder *encoder,
433                                 struct drm_display_mode *mode,
434                                 struct drm_display_mode *adjusted_mode)
435 {
436         /*
437          * The LVDS pin pair will already have been turned on in the
438          * intel_crtc_mode_set since it has a large impact on the DPLL
439          * settings.
440          */
441 }
442
443 /**
444  * Detect the LVDS connection.
445  *
446  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
447  * connected and closed means disconnected.  We also send hotplug events as
448  * needed, using lid status notification from the input layer.
449  */
450 static enum drm_connector_status
451 intel_lvds_detect(struct drm_connector *connector, bool force)
452 {
453         struct drm_device *dev = connector->dev;
454         enum drm_connector_status status;
455
456         status = intel_panel_detect(dev);
457         if (status != connector_status_unknown)
458                 return status;
459
460         return connector_status_connected;
461 }
462
463 /**
464  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
465  */
466 static int intel_lvds_get_modes(struct drm_connector *connector)
467 {
468         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
469         struct drm_device *dev = connector->dev;
470         struct drm_display_mode *mode;
471
472         if (intel_lvds->edid)
473                 return drm_add_edid_modes(connector, intel_lvds->edid);
474
475         mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
476         if (mode == NULL)
477                 return 0;
478
479         drm_mode_probed_add(connector, mode);
480         return 1;
481 }
482
483 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
484 {
485         DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
486         return 1;
487 }
488
489 /* The GPU hangs up on these systems if modeset is performed on LID open */
490 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
491         {
492                 .callback = intel_no_modeset_on_lid_dmi_callback,
493                 .ident = "Toshiba Tecra A11",
494                 .matches = {
495                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
496                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
497                 },
498         },
499
500         { }     /* terminating entry */
501 };
502
503 #ifdef NOTYET
504 /*
505  * Lid events. Note the use of 'modeset_on_lid':
506  *  - we set it on lid close, and reset it on open
507  *  - we use it as a "only once" bit (ie we ignore
508  *    duplicate events where it was already properly
509  *    set/reset)
510  *  - the suspend/resume paths will also set it to
511  *    zero, since they restore the mode ("lid open").
512  */
513 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
514                             void *unused)
515 {
516         struct drm_i915_private *dev_priv =
517                 container_of(nb, struct drm_i915_private, lid_notifier);
518         struct drm_device *dev = dev_priv->dev;
519         struct drm_connector *connector = dev_priv->int_lvds_connector;
520
521         if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
522                 return NOTIFY_OK;
523
524         /*
525          * check and update the status of LVDS connector after receiving
526          * the LID nofication event.
527          */
528         if (connector)
529                 connector->status = connector->funcs->detect(connector,
530                                                              false);
531
532         /* Don't force modeset on machines where it causes a GPU lockup */
533         if (dmi_check_system(intel_no_modeset_on_lid))
534                 return NOTIFY_OK;
535         if (!acpi_lid_open()) {
536                 dev_priv->modeset_on_lid = 1;
537                 return NOTIFY_OK;
538         }
539
540         if (!dev_priv->modeset_on_lid)
541                 return NOTIFY_OK;
542
543         dev_priv->modeset_on_lid = 0;
544
545         mutex_lock(&dev->mode_config.mutex);
546         drm_helper_resume_force_mode(dev);
547         mutex_unlock(&dev->mode_config.mutex);
548
549         return NOTIFY_OK;
550 }
551 #endif
552
553 /**
554  * intel_lvds_destroy - unregister and free LVDS structures
555  * @connector: connector to free
556  *
557  * Unregister the DDC bus for this connector then free the driver private
558  * structure.
559  */
560 static void intel_lvds_destroy(struct drm_connector *connector)
561 {
562         struct drm_device *dev = connector->dev;
563 #if 0
564         struct drm_i915_private *dev_priv = dev->dev_private;
565 #endif
566
567         intel_panel_destroy_backlight(dev);
568
569 #if 0
570         if (dev_priv->lid_notifier.notifier_call)
571                 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
572 #endif
573 #if 0
574         drm_sysfs_connector_remove(connector);
575 #endif
576         drm_connector_cleanup(connector);
577         free(connector, DRM_MEM_KMS);
578 }
579
580 static int intel_lvds_set_property(struct drm_connector *connector,
581                                    struct drm_property *property,
582                                    uint64_t value)
583 {
584         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
585         struct drm_device *dev = connector->dev;
586
587         if (property == dev->mode_config.scaling_mode_property) {
588                 struct drm_crtc *crtc = intel_lvds->base.base.crtc;
589
590                 if (value == DRM_MODE_SCALE_NONE) {
591                         DRM_DEBUG_KMS("no scaling not supported\n");
592                         return -EINVAL;
593                 }
594
595                 if (intel_lvds->fitting_mode == value) {
596                         /* the LVDS scaling property is not changed */
597                         return 0;
598                 }
599                 intel_lvds->fitting_mode = value;
600                 if (crtc && crtc->enabled) {
601                         /*
602                          * If the CRTC is enabled, the display will be changed
603                          * according to the new panel fitting mode.
604                          */
605                         drm_crtc_helper_set_mode(crtc, &crtc->mode,
606                                 crtc->x, crtc->y, crtc->fb);
607                 }
608         }
609
610         return 0;
611 }
612
613 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
614         .dpms = intel_lvds_dpms,
615         .mode_fixup = intel_lvds_mode_fixup,
616         .prepare = intel_lvds_prepare,
617         .mode_set = intel_lvds_mode_set,
618         .commit = intel_lvds_commit,
619 };
620
621 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
622         .get_modes = intel_lvds_get_modes,
623         .mode_valid = intel_lvds_mode_valid,
624         .best_encoder = intel_best_encoder,
625 };
626
627 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
628         .dpms = drm_helper_connector_dpms,
629         .detect = intel_lvds_detect,
630         .fill_modes = drm_helper_probe_single_connector_modes,
631         .set_property = intel_lvds_set_property,
632         .destroy = intel_lvds_destroy,
633 };
634
635 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
636         .destroy = intel_encoder_destroy,
637 };
638
639 static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
640 {
641         DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
642         return 1;
643 }
644
645 /* These systems claim to have LVDS, but really don't */
646 static const struct dmi_system_id intel_no_lvds[] = {
647         {
648                 .callback = intel_no_lvds_dmi_callback,
649                 .ident = "Apple Mac Mini (Core series)",
650                 .matches = {
651                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
652                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
653                 },
654         },
655         {
656                 .callback = intel_no_lvds_dmi_callback,
657                 .ident = "Apple Mac Mini (Core 2 series)",
658                 .matches = {
659                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
660                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
661                 },
662         },
663         {
664                 .callback = intel_no_lvds_dmi_callback,
665                 .ident = "MSI IM-945GSE-A",
666                 .matches = {
667                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
668                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
669                 },
670         },
671         {
672                 .callback = intel_no_lvds_dmi_callback,
673                 .ident = "Dell Studio Hybrid",
674                 .matches = {
675                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
676                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
677                 },
678         },
679         {
680                 .callback = intel_no_lvds_dmi_callback,
681                 .ident = "Dell OptiPlex FX170",
682                 .matches = {
683                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
684                         DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
685                 },
686         },
687         {
688                 .callback = intel_no_lvds_dmi_callback,
689                 .ident = "AOpen Mini PC",
690                 .matches = {
691                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
692                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
693                 },
694         },
695         {
696                 .callback = intel_no_lvds_dmi_callback,
697                 .ident = "AOpen Mini PC MP915",
698                 .matches = {
699                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
700                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
701                 },
702         },
703         {
704                 .callback = intel_no_lvds_dmi_callback,
705                 .ident = "AOpen i915GMm-HFS",
706                 .matches = {
707                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
708                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
709                 },
710         },
711         {
712                 .callback = intel_no_lvds_dmi_callback,
713                 .ident = "AOpen i45GMx-I",
714                 .matches = {
715                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
716                         DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
717                 },
718         },
719         {
720                 .callback = intel_no_lvds_dmi_callback,
721                 .ident = "Aopen i945GTt-VFA",
722                 .matches = {
723                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
724                 },
725         },
726         {
727                 .callback = intel_no_lvds_dmi_callback,
728                 .ident = "Clientron U800",
729                 .matches = {
730                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
731                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
732                 },
733         },
734         {
735                 .callback = intel_no_lvds_dmi_callback,
736                 .ident = "Clientron E830",
737                 .matches = {
738                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
739                         DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
740                 },
741         },
742         {
743                 .callback = intel_no_lvds_dmi_callback,
744                 .ident = "Asus EeeBox PC EB1007",
745                 .matches = {
746                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
747                         DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
748                 },
749         },
750         {
751                 .callback = intel_no_lvds_dmi_callback,
752                 .ident = "Asus AT5NM10T-I",
753                 .matches = {
754                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
755                         DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
756                 },
757         },
758         {
759                 .callback = intel_no_lvds_dmi_callback,
760                 .ident = "Hewlett-Packard t5745",
761                 .matches = {
762                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
763                         DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
764                 },
765         },
766         {
767                 .callback = intel_no_lvds_dmi_callback,
768                 .ident = "Hewlett-Packard st5747",
769                 .matches = {
770                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
771                         DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
772                 },
773         },
774         {
775                 .callback = intel_no_lvds_dmi_callback,
776                 .ident = "MSI Wind Box DC500",
777                 .matches = {
778                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
779                         DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
780                 },
781         },
782
783         { }     /* terminating entry */
784 };
785
786 /**
787  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
788  * @dev: drm device
789  * @connector: LVDS connector
790  *
791  * Find the reduced downclock for LVDS in EDID.
792  */
793 static void intel_find_lvds_downclock(struct drm_device *dev,
794                                       struct drm_display_mode *fixed_mode,
795                                       struct drm_connector *connector)
796 {
797         struct drm_i915_private *dev_priv = dev->dev_private;
798         struct drm_display_mode *scan;
799         int temp_downclock;
800
801         temp_downclock = fixed_mode->clock;
802         list_for_each_entry(scan, &connector->probed_modes, head) {
803                 /*
804                  * If one mode has the same resolution with the fixed_panel
805                  * mode while they have the different refresh rate, it means
806                  * that the reduced downclock is found for the LVDS. In such
807                  * case we can set the different FPx0/1 to dynamically select
808                  * between low and high frequency.
809                  */
810                 if (scan->hdisplay == fixed_mode->hdisplay &&
811                     scan->hsync_start == fixed_mode->hsync_start &&
812                     scan->hsync_end == fixed_mode->hsync_end &&
813                     scan->htotal == fixed_mode->htotal &&
814                     scan->vdisplay == fixed_mode->vdisplay &&
815                     scan->vsync_start == fixed_mode->vsync_start &&
816                     scan->vsync_end == fixed_mode->vsync_end &&
817                     scan->vtotal == fixed_mode->vtotal) {
818                         if (scan->clock < temp_downclock) {
819                                 /*
820                                  * The downclock is already found. But we
821                                  * expect to find the lower downclock.
822                                  */
823                                 temp_downclock = scan->clock;
824                         }
825                 }
826         }
827         if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
828                 /* We found the downclock for LVDS. */
829                 dev_priv->lvds_downclock_avail = 1;
830                 dev_priv->lvds_downclock = temp_downclock;
831                 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
832                               "Normal clock %dKhz, downclock %dKhz\n",
833                               fixed_mode->clock, temp_downclock);
834         }
835 }
836
837 /*
838  * Enumerate the child dev array parsed from VBT to check whether
839  * the LVDS is present.
840  * If it is present, return 1.
841  * If it is not present, return false.
842  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
843  */
844 static bool lvds_is_present_in_vbt(struct drm_device *dev,
845                                    u8 *i2c_pin)
846 {
847         struct drm_i915_private *dev_priv = dev->dev_private;
848         int i;
849
850         if (!dev_priv->child_dev_num)
851                 return true;
852
853         for (i = 0; i < dev_priv->child_dev_num; i++) {
854                 struct child_device_config *child = dev_priv->child_dev + i;
855
856                 /* If the device type is not LFP, continue.
857                  * We have to check both the new identifiers as well as the
858                  * old for compatibility with some BIOSes.
859                  */
860                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
861                     child->device_type != DEVICE_TYPE_LFP)
862                         continue;
863
864                 if (child->i2c_pin)
865                     *i2c_pin = child->i2c_pin;
866
867                 /* However, we cannot trust the BIOS writers to populate
868                  * the VBT correctly.  Since LVDS requires additional
869                  * information from AIM blocks, a non-zero addin offset is
870                  * a good indicator that the LVDS is actually present.
871                  */
872                 if (child->addin_offset)
873                         return true;
874
875                 /* But even then some BIOS writers perform some black magic
876                  * and instantiate the device without reference to any
877                  * additional data.  Trust that if the VBT was written into
878                  * the OpRegion then they have validated the LVDS's existence.
879                  */
880                 if (dev_priv->opregion.vbt)
881                         return true;
882         }
883
884         return false;
885 }
886
887 static bool intel_lvds_supported(struct drm_device *dev)
888 {
889         /* With the introduction of the PCH we gained a dedicated
890          * LVDS presence pin, use it. */
891         if (HAS_PCH_SPLIT(dev))
892                 return true;
893
894         /* Otherwise LVDS was only attached to mobile products,
895          * except for the inglorious 830gm */
896         return IS_MOBILE(dev) && !IS_I830(dev);
897 }
898
899 /**
900  * intel_lvds_init - setup LVDS connectors on this device
901  * @dev: drm device
902  *
903  * Create the connector, register the LVDS DDC bus, and try to figure out what
904  * modes we can display on the LVDS panel (if present).
905  */
906 bool intel_lvds_init(struct drm_device *dev)
907 {
908         struct drm_i915_private *dev_priv = dev->dev_private;
909         struct intel_lvds *intel_lvds;
910         struct intel_encoder *intel_encoder;
911         struct intel_connector *intel_connector;
912         struct drm_connector *connector;
913         struct drm_encoder *encoder;
914         struct drm_display_mode *scan; /* *modes, *bios_mode; */
915         struct drm_crtc *crtc;
916         u32 lvds;
917         int pipe;
918         u8 pin;
919
920         if (!intel_lvds_supported(dev))
921                 return false;
922
923         /* Skip init on machines we know falsely report LVDS */
924         if (dmi_check_system(intel_no_lvds))
925                 return false;
926
927         pin = GMBUS_PORT_PANEL;
928         if (!lvds_is_present_in_vbt(dev, &pin)) {
929                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
930                 return false;
931         }
932
933         if (HAS_PCH_SPLIT(dev)) {
934                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
935                         return false;
936                 if (dev_priv->edp.support) {
937                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
938                         return false;
939                 }
940         }
941
942         intel_lvds = malloc(sizeof(struct intel_lvds), DRM_MEM_KMS,
943             M_WAITOK | M_ZERO);
944         intel_connector = malloc(sizeof(struct intel_connector), DRM_MEM_KMS,
945             M_WAITOK | M_ZERO);
946
947         if (!HAS_PCH_SPLIT(dev)) {
948                 intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
949         }
950
951         intel_encoder = &intel_lvds->base;
952         encoder = &intel_encoder->base;
953         connector = &intel_connector->base;
954         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
955                            DRM_MODE_CONNECTOR_LVDS);
956
957         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
958                          DRM_MODE_ENCODER_LVDS);
959
960         intel_connector_attach_encoder(intel_connector, intel_encoder);
961         intel_encoder->type = INTEL_OUTPUT_LVDS;
962
963         intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
964         if (HAS_PCH_SPLIT(dev))
965                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
966         else
967                 intel_encoder->crtc_mask = (1 << 1);
968
969         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
970         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
971         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
972         connector->interlace_allowed = false;
973         connector->doublescan_allowed = false;
974
975         /* create the scaling mode property */
976         drm_mode_create_scaling_mode_property(dev);
977         /*
978          * the initial panel fitting mode will be FULL_SCREEN.
979          */
980
981         drm_connector_attach_property(&intel_connector->base,
982                                       dev->mode_config.scaling_mode_property,
983                                       DRM_MODE_SCALE_ASPECT);
984         intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
985         /*
986          * LVDS discovery:
987          * 1) check for EDID on DDC
988          * 2) check for VBT data
989          * 3) check to see if LVDS is already on
990          *    if none of the above, no panel
991          * 4) make sure lid is open
992          *    if closed, act like it's not there for now
993          */
994
995         /*
996          * Attempt to get the fixed panel mode from DDC.  Assume that the
997          * preferred mode is the right one.
998          */
999         intel_lvds->edid = drm_get_edid(connector, dev_priv->gmbus[pin]);
1000         if (intel_lvds->edid) {
1001                 if (drm_add_edid_modes(connector,
1002                                        intel_lvds->edid)) {
1003                         drm_mode_connector_update_edid_property(connector,
1004                                                                 intel_lvds->edid);
1005                 } else {
1006                         free(intel_lvds->edid, DRM_MEM_KMS);
1007                         intel_lvds->edid = NULL;
1008                 }
1009         }
1010         if (!intel_lvds->edid) {
1011                 /* Didn't get an EDID, so
1012                  * Set wide sync ranges so we get all modes
1013                  * handed to valid_mode for checking
1014                  */
1015                 connector->display_info.min_vfreq = 0;
1016                 connector->display_info.max_vfreq = 200;
1017                 connector->display_info.min_hfreq = 0;
1018                 connector->display_info.max_hfreq = 200;
1019         }
1020
1021         list_for_each_entry(scan, &connector->probed_modes, head) {
1022                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1023                         intel_lvds->fixed_mode =
1024                                 drm_mode_duplicate(dev, scan);
1025                         intel_find_lvds_downclock(dev,
1026                                                   intel_lvds->fixed_mode,
1027                                                   connector);
1028                         goto out;
1029                 }
1030         }
1031
1032         /* Failed to get EDID, what about VBT? */
1033         if (dev_priv->lfp_lvds_vbt_mode) {
1034                 intel_lvds->fixed_mode =
1035                         drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
1036                 if (intel_lvds->fixed_mode) {
1037                         intel_lvds->fixed_mode->type |=
1038                                 DRM_MODE_TYPE_PREFERRED;
1039                         goto out;
1040                 }
1041         }
1042
1043         /*
1044          * If we didn't get EDID, try checking if the panel is already turned
1045          * on.  If so, assume that whatever is currently programmed is the
1046          * correct mode.
1047          */
1048
1049         /* Ironlake: FIXME if still fail, not try pipe mode now */
1050         if (HAS_PCH_SPLIT(dev))
1051                 goto failed;
1052
1053         lvds = I915_READ(LVDS);
1054         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1055         crtc = intel_get_crtc_for_pipe(dev, pipe);
1056
1057         if (crtc && (lvds & LVDS_PORT_EN)) {
1058                 intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
1059                 if (intel_lvds->fixed_mode) {
1060                         intel_lvds->fixed_mode->type |=
1061                                 DRM_MODE_TYPE_PREFERRED;
1062                         goto out;
1063                 }
1064         }
1065
1066         /* If we still don't have a mode after all that, give up. */
1067         if (!intel_lvds->fixed_mode)
1068                 goto failed;
1069
1070 out:
1071         if (HAS_PCH_SPLIT(dev)) {
1072                 u32 pwm;
1073
1074                 pipe = (I915_READ(PCH_LVDS) & LVDS_PIPEB_SELECT) ? 1 : 0;
1075
1076                 /* make sure PWM is enabled and locked to the LVDS pipe */
1077                 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1078                 if (pipe == 0 && (pwm & PWM_PIPE_B))
1079                         I915_WRITE(BLC_PWM_CPU_CTL2, pwm & ~PWM_ENABLE);
1080                 if (pipe)
1081                         pwm |= PWM_PIPE_B;
1082                 else
1083                         pwm &= ~PWM_PIPE_B;
1084                 I915_WRITE(BLC_PWM_CPU_CTL2, pwm | PWM_ENABLE);
1085
1086                 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1087                 pwm |= PWM_PCH_ENABLE;
1088                 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1089                 /*
1090                  * Unlock registers and just
1091                  * leave them unlocked
1092                  */
1093                 I915_WRITE(PCH_PP_CONTROL,
1094                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
1095         } else {
1096                 /*
1097                  * Unlock registers and just
1098                  * leave them unlocked
1099                  */
1100                 I915_WRITE(PP_CONTROL,
1101                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
1102         }
1103 #ifdef NOTYET
1104         dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1105         if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1106                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1107                 dev_priv->lid_notifier.notifier_call = NULL;
1108         }
1109 #endif
1110         /* keep the LVDS connector */
1111         dev_priv->int_lvds_connector = connector;
1112 #if 0
1113         drm_sysfs_connector_add(connector);
1114 #endif
1115         intel_panel_setup_backlight(dev);
1116         return true;
1117
1118 failed:
1119         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1120         drm_connector_cleanup(connector);
1121         drm_encoder_cleanup(encoder);
1122         free(intel_lvds, DRM_MEM_KMS);
1123         free(intel_connector, DRM_MEM_KMS);
1124         return false;
1125 }