2 * Copyright (c) 1995 HD Associates, Inc.
7 * Pepperell, MA 01463-0276
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by HD Associates, Inc.
21 * 4. The name of HD Associates, Inc.
22 * may not be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY HD ASSOCIATES ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
41 * $FreeBSD: src/sys/i386/isa/labpc.c,v 1.35 1999/09/25 18:24:08 phk Exp $
42 * $DragonFly: src/sys/dev/misc/labpc/labpc.c,v 1.2 2003/06/17 04:28:37 dillon Exp $
47 #include "opt_debug_outb.h"
48 #include <sys/param.h>
50 #include <sys/systm.h>
52 #include <sys/kernel.h>
53 #include <sys/malloc.h>
55 #define b_actf b_act.tqe_next
56 #include <sys/dataacq.h>
60 #include <machine/clock.h>
63 #include <i386/isa/isa_device.h>
70 #define LABPC_MIN_TMO (hz)
73 #ifndef LABPC_DEFAULT_HERZ
74 #define LABPC_DEFAULT_HERZ 500
80 * S: SCAN bit for scan enable.
81 * I: INTERVAL for interval support
82 * D: 1: Digital I/O, 0: Analog I/O
85 * input: channel must be 0 to 7.
86 * output: channel must be 0 to 2
89 * 2: Alternate channel 0 then 1
92 * input: Channel must be 0 to 2.
93 * output: Channel must be 0 to 2.
99 #define UNIT(dev) (((minor(dev) & 0xB0) >> 6) & 0x3)
101 #define SCAN(dev) ((minor(dev) & 0x20) >> 5)
102 #define INTERVAL(dev) ((minor(dev) & 0x10) >> 4)
103 #define DIGITAL(dev) ((minor(dev) & 0x08) >> 3)
108 #define CHAN(dev) (minor(dev) & 0x7)
110 /* History: Derived from "dt2811.c" March 1995
116 #define DROPPED_INPUT 0x100
120 #define BUSY 0x00000001
126 struct buf start_queue; /* Start queue */
127 struct buf *last; /* End of start queue */
130 long tmo; /* Timeout in Herz */
131 long min_tmo; /* Timeout in Herz */
136 dev_t dev; /* Copy of device */
138 void (*starter)(struct ctlr *ctlr, long count);
139 void (*stop)(struct ctlr *ctlr);
140 void (*intr)(struct ctlr *ctlr);
142 /* Digital I/O support. Copy of Data Control Register for 8255:
144 u_char dcr_val, dcr_is;
147 * Handle for canceling our timeout.
149 struct callout_handle ch;
151 /* Device configuration structure:
156 /* loutb is a slow outb for debugging. The overrun test may fail
157 * with this for some slower processors.
159 static __inline void loutb(int port, u_char val)
165 #define loutb(port, val) outb(port, val)
168 static struct ctlr **labpcs; /* XXX: Should be dynamic */
170 /* CR_EXPR: A macro that sets the shadow register in addition to
171 * sending out the data.
173 #define CR_EXPR(LABPC, CR, EXPR) do { \
174 (LABPC)->cr_image[CR - 1] EXPR ; \
175 loutb(((LABPC)->base + ( (CR == 4) ? (0x0F) : (CR - 1))), ((LABPC)->cr_image[(CR - 1)])); \
178 #define CR_CLR(LABPC, CR) CR_EXPR(LABPC, CR, &=0)
179 #define CR_REFRESH(LABPC, CR) CR_EXPR(LABPC, CR, &=0xff)
180 #define CR_SET(LABPC, CR, EXPR) CR_EXPR(LABPC, CR, = EXPR)
182 /* Configuration and Status Register Group.
184 #define CR1(LABPC) ((LABPC)->base + 0x00) /* Page 4-5 */
186 #define GAINMASK 0x70
187 #define GAIN(LABPC, SEL) do { \
188 (LABPC)->cr_image[1 - 1] &= ~GAINMASK; \
189 (LABPC)->cr_image[1 - 1] |= (SEL << 4); \
190 loutb((LABPC)->base + (1 - 1), (LABPC)->cr_image[(1 - 1)]); \
195 #define MA(LABPC, SEL) do { \
196 (LABPC)->cr_image[1 - 1] &= ~MAMASK; \
197 (LABPC)->cr_image[1 - 1] |= SEL; \
198 loutb((LABPC)->base + (1 - 1), (LABPC)->cr_image[(1 - 1)]); \
201 #define STATUS(LABPC) ((LABPC)->base + 0x00) /* Page 4-7 */
202 #define LABPCPLUS 0x80
203 #define EXTGATA0 0x40
207 #define OVERFLOW 0x04
211 #define CR2(LABPC) ((LABPC)->base + 0x01) /* Page 4-9 */
220 #define SWTRIGGERRED(LABPC) ((LABPC->cr_image[1]) & SWTRIG)
222 #define CR3(LABPC) ((LABPC)->base + 0x02) /* Page 4-11 */
223 #define FIFOINTEN 0x20
224 #define ERRINTEN 0x10
225 #define CNTINTEN 0x08
227 #define DIOINTEN 0x02
230 #define ALLINTEN 0x3E
231 #define FIFOINTENABLED(LABPC) ((LABPC->cr_image[2]) & FIFOINTEN)
233 #define CR4(LABPC) ((LABPC)->base + 0x0F) /* Page 4-13 */
240 /* Analog Input Register Group
242 #define ADFIFO(LABPC) ((LABPC)->base + 0x0A) /* Page 4-16 */
243 #define ADCLEAR(LABPC) ((LABPC)->base + 0x08) /* Page 4-18 */
244 #define ADSTART(LABPC) ((LABPC)->base + 0x03) /* Page 4-19 */
245 #define DMATCICLR(LABPC) ((LABPC)->base + 0x0A) /* Page 4-20 */
247 /* Analog Output Register Group
249 #define DAC0L(LABPC) ((LABPC)->base + 0x04) /* Page 4-22 */
250 #define DAC0H(LABPC) ((LABPC)->base + 0x05) /* Page 4-22 */
251 #define DAC1L(LABPC) ((LABPC)->base + 0x06) /* Page 4-22 */
252 #define DAC1H(LABPC) ((LABPC)->base + 0x07) /* Page 4-22 */
256 #define A0DATA(LABPC) ((LABPC)->base + 0x14)
257 #define A1DATA(LABPC) ((LABPC)->base + 0x15)
258 #define A2DATA(LABPC) ((LABPC)->base + 0x16)
259 #define AMODE(LABPC) ((LABPC)->base + 0x17)
261 #define TICR(LABPC) ((LABPC)->base + 0x0c)
263 #define B0DATA(LABPC) ((LABPC)->base + 0x18)
264 #define B1DATA(LABPC) ((LABPC)->base + 0x19)
265 #define B2DATA(LABPC) ((LABPC)->base + 0x1A)
266 #define BMODE(LABPC) ((LABPC)->base + 0x1B)
271 #define PORTX(LABPC, X) ((LABPC)->base + 0x10 + X)
273 #define PORTA(LABPC) PORTX(LABPC, 0)
274 #define PORTB(LABPC) PORTX(LABPC, 1)
275 #define PORTC(LABPC) PORTX(LABPC, 2)
277 #define DCR(LABPC) ((LABPC)->base + 0x13)
279 static int labpcattach(struct isa_device *dev);
280 static int labpcprobe(struct isa_device *dev);
281 struct isa_driver labpcdriver =
282 { labpcprobe, labpcattach, "labpc", 0 };
284 static d_open_t labpcopen;
285 static d_close_t labpcclose;
286 static d_ioctl_t labpcioctl;
287 static d_strategy_t labpcstrategy;
289 #define CDEV_MAJOR 66
290 static struct cdevsw labpc_cdevsw = {
291 /* open */ labpcopen,
292 /* close */ labpcclose,
294 /* write */ physwrite,
295 /* ioctl */ labpcioctl,
298 /* strategy */ labpcstrategy,
300 /* maj */ CDEV_MAJOR,
307 static ointhand2_t labpcintr;
308 static void start(struct ctlr *ctlr);
311 bp_done(struct buf *bp, int err)
315 if (err || bp->b_resid)
317 bp->b_flags |= B_ERROR;
323 static void tmo_stop(void *p);
326 done_and_start_next(struct ctlr *ctlr, struct buf *bp, int err)
328 bp->b_resid = ctlr->data_end - ctlr->data;
332 ctlr->start_queue.b_actf = bp->b_actf;
335 untimeout(tmo_stop, ctlr, ctlr->ch);
341 ad_clear(struct ctlr *ctlr)
344 loutb(ADCLEAR(ctlr), 0);
345 for (i = 0; i < 10000 && (inb(STATUS(ctlr)) & GATA0); i++)
347 (void)inb(ADFIFO(ctlr));
348 (void)inb(ADFIFO(ctlr));
351 /* reset: Reset the board following the sequence on page 5-1
354 reset(struct ctlr *ctlr)
358 CR_CLR(ctlr, 3); /* Turn off interrupts first */
365 loutb(AMODE(ctlr), 0x34);
366 loutb(A0DATA(ctlr),0x0A);
367 loutb(A0DATA(ctlr),0x00);
369 loutb(DMATCICLR(ctlr), 0x00);
370 loutb(TICR(ctlr), 0x00);
374 loutb(DAC0L(ctlr), 0);
375 loutb(DAC0H(ctlr), 0);
376 loutb(DAC1L(ctlr), 0);
377 loutb(DAC1H(ctlr), 0);
382 /* overrun: slam the start convert register and OVERRUN should get set:
385 overrun(struct ctlr *ctlr)
389 u_char status = inb(STATUS(ctlr));
390 for (i = 0; ((status & OVERRUN) == 0) && i < 100; i++)
392 loutb(ADSTART(ctlr), 1);
393 status = inb(STATUS(ctlr));
402 if (NLABPC > MAX_UNITS)
405 labpcs = malloc(NLABPC * sizeof(struct ctlr *), M_DEVBUF, M_NOWAIT);
408 bzero(labpcs, NLABPC * sizeof(struct ctlr *));
411 cdevsw_add(&labpc_cdevsw);
416 labpcprobe(struct isa_device *dev)
419 struct ctlr scratch, *ctlr;
424 if (labpcinit() == 0)
426 printf("labpcprobe: init failed\n");
433 printf("Too many LAB-PCs. Reconfigure O/S.\n");
436 ctlr = &scratch; /* Need somebody with the right base for the macros */
437 ctlr->base = dev->id_iobase;
439 /* XXX: There really isn't a perfect way to probe this board.
440 * Here is my best attempt:
444 /* After reset none of these bits should be set:
446 status = inb(STATUS(ctlr));
447 if (status & (GATA0 | OVERFLOW | DAVAIL | OVERRUN))
450 /* Now try to overrun the board FIFO and get the overrun bit set:
452 status = overrun(ctlr);
454 if ((status & OVERRUN) == 0) /* No overrun bit set? */
457 /* Assume we have a board.
461 if ( (labpcs[unit] = malloc(sizeof(struct ctlr), M_DEVBUF, M_NOWAIT)) )
463 struct ctlr *l = labpcs[unit];
465 bzero(l, sizeof(struct ctlr));
466 l->base = ctlr->base;
467 dev->id_unit = l->unit = unit;
474 printf("labpc%d: Can't malloc.\n", unit);
479 /* attach: Set things in a normal state.
482 labpcattach(struct isa_device *dev)
484 struct ctlr *ctlr = labpcs[dev->id_unit];
486 dev->id_ointr = labpcintr;
487 callout_handle_init(&ctlr->ch);
488 ctlr->sample_us = (1000000.0 / (double)LABPC_DEFAULT_HERZ) + .50;
491 ctlr->min_tmo = LABPC_MIN_TMO;
493 ctlr->dcr_val = 0x80;
495 loutb(DCR(ctlr), ctlr->dcr_val);
497 make_dev(&labpc_cdevsw, 0, 0, 0, 0600, "labpc%d", dev->id_unit);
503 static void null_intr (struct ctlr *ctlr) { }
504 static void null_start(struct ctlr *ctlr, long count) { }
505 static void null_stop (struct ctlr *ctlr) { }
508 trigger(struct ctlr *ctlr)
510 CR_EXPR(ctlr, 2, |= SWTRIG);
514 ad_start(struct ctlr *ctlr, long count)
516 if (!SWTRIGGERRED(ctlr)) {
517 int chan = CHAN(ctlr->dev);
518 CR_EXPR(ctlr, 1, &= ~SCANEN);
519 CR_EXPR(ctlr, 2, &= ~TBSEL);
522 GAIN(ctlr, ctlr->gains[chan]);
525 CR_EXPR(ctlr, 1, |= SCANEN);
527 loutb(AMODE(ctlr), 0x34);
528 loutb(A0DATA(ctlr), (u_char)((ctlr->sample_us & 0xff)));
529 loutb(A0DATA(ctlr), (u_char)((ctlr->sample_us >> 8)&0xff));
530 loutb(AMODE(ctlr), 0x70);
536 ctlr->tmo = ((count + 16) * (long)ctlr->sample_us * hz) / 1000000 +
541 ad_interval_start(struct ctlr *ctlr, long count)
543 int chan = CHAN(ctlr->dev);
544 int n_frames = count / (chan + 1);
546 if (!SWTRIGGERRED(ctlr)) {
547 CR_EXPR(ctlr, 1, &= ~SCANEN);
548 CR_EXPR(ctlr, 2, &= ~TBSEL);
551 GAIN(ctlr, ctlr->gains[chan]);
553 /* XXX: Is it really possible that you clear INTSCAN as
554 * the documentation says? That seems pretty unlikely.
556 CR_EXPR(ctlr, 4, &= ~INTSCAN); /* XXX: Is this possible? */
558 /* Program the sample interval counter to run as fast as
561 loutb(AMODE(ctlr), 0x34);
562 loutb(A0DATA(ctlr), (u_char)(0x02));
563 loutb(A0DATA(ctlr), (u_char)(0x00));
564 loutb(AMODE(ctlr), 0x70);
566 /* Program the interval scanning counter to run at the sample
569 loutb(BMODE(ctlr), 0x74);
570 loutb(B1DATA(ctlr), (u_char)((ctlr->sample_us & 0xff)));
571 loutb(B1DATA(ctlr), (u_char)((ctlr->sample_us >> 8)&0xff));
572 CR_EXPR(ctlr, 1, |= SCANEN);
578 /* Each frame time takes two microseconds per channel times
579 * the number of channels being sampled plus the sample period.
581 ctlr->tmo = ((n_frames + 16) *
582 ((long)ctlr->sample_us + (chan + 1 ) * 2 ) * hz) / 1000000 +
587 all_stop(struct ctlr *ctlr)
595 struct ctlr *ctlr = (struct ctlr *)p;
602 printf("labpc?: Null ctlr struct?\n");
607 printf("labpc%d: timeout", ctlr->unit);
611 bp = ctlr->start_queue.b_actf;
614 printf(", Null bp.\n");
621 done_and_start_next(ctlr, bp, ETIMEDOUT);
626 static void ad_intr(struct ctlr *ctlr)
630 if (ctlr->cr_image[2] == 0)
632 if (ctlr->cleared_intr)
634 ctlr->cleared_intr = 0;
638 printf("ad_intr (should not happen) interrupt with interrupts off\n");
639 printf("status %x, cr3 %x\n", inb(STATUS(ctlr)), ctlr->cr_image[2]);
643 while ( (status = (inb(STATUS(ctlr)) & (DAVAIL|OVERRUN|OVERFLOW)) ) )
645 if ((status & (OVERRUN|OVERFLOW)))
647 struct buf *bp = ctlr->start_queue.b_actf;
649 printf("ad_intr: error: bp %p, data %p, status %x",
650 (void *)bp, (void *)ctlr->data, status);
652 if (status & OVERRUN)
653 printf(" Conversion overrun (multiple A-D trigger)");
655 if (status & OVERFLOW)
656 printf(" FIFO overflow");
662 done_and_start_next(ctlr, bp, EIO);
667 printf("ad_intr: (should not happen) error between records\n");
668 ctlr->err = status; /* Set overrun condition */
672 else /* FIFO interrupt */
674 struct buf *bp = ctlr->start_queue.b_actf;
678 *ctlr->data++ = inb(ADFIFO(ctlr));
679 if (ctlr->data == ctlr->data_end) /* Normal completion */
681 done_and_start_next(ctlr, bp, 0);
685 else /* Interrupt with no where to put the data. */
687 printf("ad_intr: (should not happen) dropped input.\n");
688 (void)inb(ADFIFO(ctlr));
690 printf("bp %p, status %x, cr3 %x\n",
691 (void *)bp, status, ctlr->cr_image[2]);
693 ctlr->err = DROPPED_INPUT;
700 static void labpcintr(int unit)
702 struct ctlr *ctlr = labpcs[unit];
706 /* lockout_multiple_opens: Return whether or not we can open again, or
707 * if the new mode is inconsistent with an already opened mode.
708 * We only permit multiple opens for digital I/O now.
712 lockout_multiple_open(dev_t current, dev_t next)
714 return ! (DIGITAL(current) && DIGITAL(next));
718 labpcopen(dev_t dev, int flags, int fmt, struct proc *p)
720 u_short unit = UNIT(dev);
724 if (unit >= MAX_UNITS)
732 /* Don't allow another open if we have to change modes.
735 if ( (ctlr->flags & BUSY) == 0)
744 ctlr->intr = null_intr;
745 ctlr->starter = null_start;
746 ctlr->stop = null_stop;
748 else if (lockout_multiple_open(ctlr->dev, dev))
755 labpcclose(dev_t dev, int flags, int fmt, struct proc *p)
757 struct ctlr *ctlr = labpcs[UNIT(dev)];
761 ctlr->flags &= ~BUSY;
767 * Start: Start a frame going in or out.
770 start(struct ctlr *ctlr)
774 if ((bp = ctlr->start_queue.b_actf) == 0)
776 /* We must turn off FIFO interrupts when there is no
777 * place to put the data. We have to get back to
778 * reading before the FIFO overflows.
780 CR_EXPR(ctlr, 3, &= ~(FIFOINTEN|ERRINTEN));
781 ctlr->cleared_intr = 1;
782 ctlr->start_queue.b_bcount = 0;
786 ctlr->data = (u_char *)bp->b_data;
787 ctlr->data_end = ctlr->data + bp->b_bcount;
791 printf("labpc start: (should not happen) error between records.\n");
792 done_and_start_next(ctlr, bp, EIO);
798 printf("labpc start: (should not happen) NULL data pointer.\n");
799 done_and_start_next(ctlr, bp, EIO);
804 (*ctlr->starter)(ctlr, bp->b_bcount);
806 if (!FIFOINTENABLED(ctlr)) /* We can store the data again */
808 CR_EXPR(ctlr, 3, |= (FIFOINTEN|ERRINTEN));
810 /* Don't wait for the interrupts to fill things up.
815 ctlr->ch = timeout(tmo_stop, ctlr, ctlr->tmo);
819 ad_strategy(struct buf *bp, struct ctlr *ctlr)
826 if (ctlr->start_queue.b_bcount)
828 ctlr->last->b_actf = bp;
833 ctlr->start_queue.b_bcount = 1;
834 ctlr->start_queue.b_actf = bp;
841 /* da_strategy: Send data to the D-A. The CHAN field should be
844 * 2: Alternate port 0 then port 1
848 * 1. There is no state for CHAN field 2:
849 * the first sample in each buffer goes to channel 0.
851 * 2. No interrupt support yet.
854 da_strategy(struct buf *bp, struct ctlr *ctlr)
861 switch(CHAN(bp->b_dev))
871 case 2: /* Device 2 handles both ports interleaved. */
872 if (bp->b_bcount <= 2)
878 len = bp->b_bcount / 2;
879 data = (u_char *)bp->b_data;
881 for (i = 0; i < len; i++)
883 loutb(DAC0H(ctlr), *data++);
884 loutb(DAC0L(ctlr), *data++);
885 loutb(DAC1H(ctlr), *data++);
886 loutb(DAC1L(ctlr), *data++);
889 bp->b_resid = bp->b_bcount & 3;
898 /* Port 0 or 1 falls through to here.
900 if (bp->b_bcount & 1) /* Odd transfers are illegal */
904 data = (u_char *)bp->b_data;
906 for (i = 0; i < len; i++)
908 loutb(port + 1, *data++);
909 loutb(port, *data++);
917 /* Input masks for MODE 0 of the ports treating PC as a single
918 * 8 bit port. Set these bits to set the port to input.
920 /* A B lowc highc combined */
921 static u_char set_input[] = { 0x10, 0x02, 0x01, 0x08, 0x09 };
923 static void flush_dcr(struct ctlr *ctlr)
925 if (ctlr->dcr_is != ctlr->dcr_val)
927 loutb(DCR(ctlr), ctlr->dcr_val);
928 ctlr->dcr_is = ctlr->dcr_val;
932 /* do: Digital output
935 digital_out_strategy(struct buf *bp, struct ctlr *ctlr)
941 int chan = CHAN(bp->b_dev);
943 ctlr->dcr_val &= ~set_input[chan]; /* Digital out: Clear bit */
946 port = PORTX(ctlr, chan);
949 data = (u_char *)bp->b_data;
951 for (i = 0; i < len; i++)
953 loutb(port, *data++);
961 /* digital_in_strategy: Digital input
964 digital_in_strategy(struct buf *bp, struct ctlr *ctlr)
970 int chan = CHAN(bp->b_dev);
972 ctlr->dcr_val |= set_input[chan]; /* Digital in: Set bit */
974 port = PORTX(ctlr, chan);
977 data = (u_char *)bp->b_data;
979 for (i = 0; i < len; i++)
991 labpcstrategy(struct buf *bp)
993 struct ctlr *ctlr = labpcs[UNIT(bp->b_dev)];
995 if (DIGITAL(bp->b_dev)) {
996 if (bp->b_flags & B_READ) {
997 ctlr->starter = null_start;
998 ctlr->stop = all_stop;
999 ctlr->intr = null_intr;
1000 digital_in_strategy(bp, ctlr);
1004 ctlr->starter = null_start;
1005 ctlr->stop = all_stop;
1006 ctlr->intr = null_intr;
1007 digital_out_strategy(bp, ctlr);
1011 if (bp->b_flags & B_READ) {
1013 ctlr->starter = INTERVAL(ctlr->dev) ? ad_interval_start : ad_start;
1014 ctlr->stop = all_stop;
1015 ctlr->intr = ad_intr;
1016 ad_strategy(bp, ctlr);
1020 ctlr->starter = null_start;
1021 ctlr->stop = all_stop;
1022 ctlr->intr = null_intr;
1023 da_strategy(bp, ctlr);
1029 labpcioctl(dev_t dev, u_long cmd, caddr_t arg, int mode, struct proc *p)
1031 struct ctlr *ctlr = labpcs[UNIT(dev)];
1035 case AD_MICRO_PERIOD_SET:
1037 /* XXX I'm only supporting what I have to, which is
1038 * no slow periods. You can't get any slower than 15 Hz
1039 * with the current setup. To go slower you'll need to
1040 * support TCINTEN in CR3.
1043 long sample_us = *(long *)arg;
1045 if (sample_us > 65535)
1048 ctlr->sample_us = sample_us;
1052 case AD_MICRO_PERIOD_GET:
1053 *(long *)arg = ctlr->sample_us;
1064 case AD_SUPPORTED_GAINS:
1066 static double gains[] = {1., 1.25, 2., 5., 10., 20., 50., 100.};
1067 copyout(gains, *(caddr_t *)arg, sizeof(gains));
1074 copyin(*(caddr_t *)arg, ctlr->gains, sizeof(ctlr->gains));
1080 copyout(ctlr->gains, *(caddr_t *)arg, sizeof(ctlr->gains));