sys/dev/sound/pci/hda/hdac.c

   1 /*-
   2  * Copyright (c) 2006 Stephane E. Potvin <sepotvin@videotron.ca>
   3  * Copyright (c) 2006 Ariff Abdullah <ariff@FreeBSD.org>
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  25  * SUCH DAMAGE.
  26  *
  27  * $FreeBSD: src/sys/dev/sound/pci/hda/hdac.c,v 1.36.2.8 2007/11/30 15:11:42 ariff Exp $
  28  */
  29
  30 /*
  31  * Intel High Definition Audio (Controller) driver for FreeBSD. Be advised
  32  * that this driver still in its early stage, and possible of rewrite are
  33  * pretty much guaranteed. There are supposedly several distinct parent/child
  34  * busses to make this "perfect", but as for now and for the sake of
  35  * simplicity, everything is gobble up within single source.
  36  *
  37  * List of subsys:
  38  *     1) HDA Controller support
  39  *     2) HDA Codecs support, which may include
  40  *        - HDA
  41  *        - Modem
  42  *        - HDMI
  43  *     3) Widget parser - the real magic of why this driver works on so
  44  *        many hardwares with minimal vendor specific quirk. The original
  45  *        parser was written using Ruby and can be found at
  46  *        http://people.freebsd.org/~ariff/HDA/parser.rb . This crude
  47  *        ruby parser take the verbose dmesg dump as its input. Refer to
  48  *        http://www.microsoft.com/whdc/device/audio/default.mspx for various
  49  *        interesting documents, especially UAA (Universal Audio Architecture).
  50  *     4) Possible vendor specific support.
  51  *        (snd_hda_intel, snd_hda_ati, etc..)
  52  *
  53  * Thanks to Ahmad Ubaidah Omar @ Defenxis Sdn. Bhd. for the
  54  * Compaq V3000 with Conexant HDA.
  55  *
  56  *    * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
  57  *    *                                                                 *
  58  *    *        This driver is a collaborative effort made by:           *
  59  *    *                                                                 *
  60  *    *          Stephane E. Potvin <sepotvin@videotron.ca>             *
  61  *    *               Andrea Bittau <a.bittau@cs.ucl.ac.uk>             *
  62  *    *               Wesley Morgan <morganw@chemikals.org>             *
  63  *    *              Daniel Eischen <deischen@FreeBSD.org>              *
  64  *    *             Maxime Guillaud <bsd-ports@mguillaud.net>           *
  65  *    *              Ariff Abdullah <ariff@FreeBSD.org>                 *
  66  *    *                                                                 *
  67  *    *   ....and various people from freebsd-multimedia@FreeBSD.org    *
  68  *    *                                                                 *
  69  *    * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
  70  */
  71
  72 #include <dev/sound/pcm/sound.h>
  73 #include <bus/pci/pcireg.h>
  74 #include <bus/pci/pcivar.h>
  75
  76 #include <sys/ctype.h>
  77 #include <sys/taskqueue.h>
  78
  79 #include <dev/sound/pci/hda/hdac_private.h>
  80 #include <dev/sound/pci/hda/hdac_reg.h>
  81 #include <dev/sound/pci/hda/hda_reg.h>
  82 #include <dev/sound/pci/hda/hdac.h>
  83
  84 #include "mixer_if.h"
  85
  86 #define HDA_DRV_TEST_REV        "20071129_0050"
  87 #define HDA_WIDGET_PARSER_REV   1
  88
  89 static int hda_debug
  90 #ifdef HDA_DEBUG
  91         = 1
  92 #endif
  93         ;
  94 #define HDA_BOOTVERBOSE(stmt)   do {                    \
  95         if (hda_debug && bootverbose != 0) {            \
  96                 stmt                                    \
  97         }                                               \
  98 } while(0)
  99
 100 #if 1
 101 #undef HDAC_INTR_EXTRA
 102 #define HDAC_INTR_EXTRA         1
 103 #endif
 104
 105 #define hdac_lock(sc)           snd_mtxlock((sc)->lock)
 106 #define hdac_unlock(sc)         snd_mtxunlock((sc)->lock)
 107 #define hdac_lockassert(sc)     snd_mtxassert((sc)->lock)
 108 #define hdac_lockowned(sc)      (1)/* mtx_owned((sc)->lock) */
 109
 110 #if 0 /* TODO: No uncacheable DMA support in DragonFly. */
 111 #include <machine/specialreg.h>
 112 #define HDAC_DMA_ATTR(sc, v, s, attr)   do {                            \
 113         vm_offset_t va = (vm_offset_t)(v);                              \
 114         vm_size_t sz = (vm_size_t)(s);                                  \
 115         if ((sc) != NULL && ((sc)->flags & HDAC_F_DMA_NOCACHE) &&       \
 116             va != 0 && sz != 0)                                         \
 117                 (void)pmap_change_attr(va, sz, (attr));                 \
 118 } while(0)
 119 #else
 120 #define HDAC_DMA_ATTR(...)
 121 #endif
 122
 123 #define HDA_FLAG_MATCH(fl, v)   (((fl) & (v)) == (v))
 124 #define HDA_DEV_MATCH(fl, v)    ((fl) == (v) || \
 125                                 (fl) == 0xffffffff || \
 126                                 (((fl) & 0xffff0000) == 0xffff0000 && \
 127                                 ((fl) & 0x0000ffff) == ((v) & 0x0000ffff)) || \
 128                                 (((fl) & 0x0000ffff) == 0x0000ffff && \
 129                                 ((fl) & 0xffff0000) == ((v) & 0xffff0000)))
 130 #define HDA_MATCH_ALL           0xffffffff
 131 #define HDAC_INVALID            0xffffffff
 132
 133 /* Default controller / jack sense poll: 250ms */
 134 #define HDAC_POLL_INTERVAL      max(hz >> 2, 1)
 135
 136 /*
 137  * Make room for possible 4096 playback/record channels, in 100 years to come.
 138  */
 139 #define HDAC_TRIGGER_NONE       0x00000000
 140 #define HDAC_TRIGGER_PLAY       0x00000fff
 141 #define HDAC_TRIGGER_REC        0x00fff000
 142 #define HDAC_TRIGGER_UNSOL      0x80000000
 143
 144 #define HDA_MODEL_CONSTRUCT(vendor, model)      \
 145                 (((uint32_t)(model) << 16) | ((vendor##_VENDORID) & 0xffff))
 146
 147 /* Controller models */
 148
 149 /* Intel */
 150 #define INTEL_VENDORID          0x8086
 151 #define HDA_INTEL_82801F        HDA_MODEL_CONSTRUCT(INTEL, 0x2668)
 152 #define HDA_INTEL_63XXESB       HDA_MODEL_CONSTRUCT(INTEL, 0x269a)
 153 #define HDA_INTEL_82801G        HDA_MODEL_CONSTRUCT(INTEL, 0x27d8)
 154 #define HDA_INTEL_82801H        HDA_MODEL_CONSTRUCT(INTEL, 0x284b)
 155 #define HDA_INTEL_82801I        HDA_MODEL_CONSTRUCT(INTEL, 0x293e)
 156 #define HDA_INTEL_ALL           HDA_MODEL_CONSTRUCT(INTEL, 0xffff)
 157
 158 /* Nvidia */
 159 #define NVIDIA_VENDORID         0x10de
 160 #define HDA_NVIDIA_MCP51        HDA_MODEL_CONSTRUCT(NVIDIA, 0x026c)
 161 #define HDA_NVIDIA_MCP55        HDA_MODEL_CONSTRUCT(NVIDIA, 0x0371)
 162 #define HDA_NVIDIA_MCP61_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x03e4)
 163 #define HDA_NVIDIA_MCP61_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x03f0)
 164 #define HDA_NVIDIA_MCP65_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x044a)
 165 #define HDA_NVIDIA_MCP65_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x044b)
 166 #define HDA_NVIDIA_MCP67_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x055c)
 167 #define HDA_NVIDIA_MCP67_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x055d)
 168 #define HDA_NVIDIA_ALL          HDA_MODEL_CONSTRUCT(NVIDIA, 0xffff)
 169
 170 /* ATI */
 171 #define ATI_VENDORID            0x1002
 172 #define HDA_ATI_SB450           HDA_MODEL_CONSTRUCT(ATI, 0x437b)
 173 #define HDA_ATI_SB600           HDA_MODEL_CONSTRUCT(ATI, 0x4383)
 174 #define HDA_ATI_ALL             HDA_MODEL_CONSTRUCT(ATI, 0xffff)
 175
 176 /* VIA */
 177 #define VIA_VENDORID            0x1106
 178 #define HDA_VIA_VT82XX          HDA_MODEL_CONSTRUCT(VIA, 0x3288)
 179 #define HDA_VIA_ALL             HDA_MODEL_CONSTRUCT(VIA, 0xffff)
 180
 181 /* SiS */
 182 #define SIS_VENDORID            0x1039
 183 #define HDA_SIS_966             HDA_MODEL_CONSTRUCT(SIS, 0x7502)
 184 #define HDA_SIS_ALL             HDA_MODEL_CONSTRUCT(SIS, 0xffff)
 185
 186 /* OEM/subvendors */
 187
 188 /* Intel */
 189 #define INTEL_D101GGC_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xd600)
 190
 191 /* HP/Compaq */
 192 #define HP_VENDORID             0x103c
 193 #define HP_V3000_SUBVENDOR      HDA_MODEL_CONSTRUCT(HP, 0x30b5)
 194 #define HP_NX7400_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30a2)
 195 #define HP_NX6310_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30aa)
 196 #define HP_NX6325_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30b0)
 197 #define HP_XW4300_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x3013)
 198 #define HP_3010_SUBVENDOR       HDA_MODEL_CONSTRUCT(HP, 0x3010)
 199 #define HP_DV5000_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30a5)
 200 #define HP_DC7700_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x2802)
 201 #define HP_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(HP, 0xffff)
 202 /* What is wrong with XN 2563 anyway? (Got the picture ?) */
 203 #define HP_NX6325_SUBVENDORX    0x103c30b0
 204
 205 /* Dell */
 206 #define DELL_VENDORID           0x1028
 207 #define DELL_D820_SUBVENDOR     HDA_MODEL_CONSTRUCT(DELL, 0x01cc)
 208 #define DELL_I1300_SUBVENDOR    HDA_MODEL_CONSTRUCT(DELL, 0x01c9)
 209 #define DELL_XPSM1210_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x01d7)
 210 #define DELL_OPLX745_SUBVENDOR  HDA_MODEL_CONSTRUCT(DELL, 0x01da)
 211 #define DELL_ALL_SUBVENDOR      HDA_MODEL_CONSTRUCT(DELL, 0xffff)
 212
 213 /* Clevo */
 214 #define CLEVO_VENDORID          0x1558
 215 #define CLEVO_D900T_SUBVENDOR   HDA_MODEL_CONSTRUCT(CLEVO, 0x0900)
 216 #define CLEVO_ALL_SUBVENDOR     HDA_MODEL_CONSTRUCT(CLEVO, 0xffff)
 217
 218 /* Acer */
 219 #define ACER_VENDORID           0x1025
 220 #define ACER_A5050_SUBVENDOR    HDA_MODEL_CONSTRUCT(ACER, 0x010f)
 221 #define ACER_A4520_SUBVENDOR    HDA_MODEL_CONSTRUCT(ACER, 0x0127)
 222 #define ACER_3681WXM_SUBVENDOR  HDA_MODEL_CONSTRUCT(ACER, 0x0110)
 223 #define ACER_ALL_SUBVENDOR      HDA_MODEL_CONSTRUCT(ACER, 0xffff)
 224
 225 /* Asus */
 226 #define ASUS_VENDORID           0x1043
 227 #define ASUS_M5200_SUBVENDOR    HDA_MODEL_CONSTRUCT(ASUS, 0x1993)
 228 #define ASUS_U5F_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1263)
 229 #define ASUS_A8JC_SUBVENDOR     HDA_MODEL_CONSTRUCT(ASUS, 0x1153)
 230 #define ASUS_P1AH2_SUBVENDOR    HDA_MODEL_CONSTRUCT(ASUS, 0x81cb)
 231 #define ASUS_A7M_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1323)
 232 #define ASUS_A7T_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x13c2)
 233 #define ASUS_W6F_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1263)
 234 #define ASUS_W2J_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1971)
 235 #define ASUS_F3JC_SUBVENDOR     HDA_MODEL_CONSTRUCT(ASUS, 0x1338)
 236 #define ASUS_M2V_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x81e7)
 237 #define ASUS_M2N_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x8234)
 238 #define ASUS_M2NPVMX_SUBVENDOR  HDA_MODEL_CONSTRUCT(ASUS, 0x81cb)
 239 #define ASUS_P5BWD_SUBVENDOR    HDA_MODEL_CONSTRUCT(ASUS, 0x81ec)
 240 #define ASUS_A8NVMCSM_SUBVENDOR HDA_MODEL_CONSTRUCT(NVIDIA, 0xcb84)
 241 #define ASUS_ALL_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0xffff)
 242
 243 /* IBM / Lenovo */
 244 #define IBM_VENDORID            0x1014
 245 #define IBM_M52_SUBVENDOR       HDA_MODEL_CONSTRUCT(IBM, 0x02f6)
 246 #define IBM_ALL_SUBVENDOR       HDA_MODEL_CONSTRUCT(IBM, 0xffff)
 247
 248 /* Lenovo */
 249 #define LENOVO_VENDORID         0x17aa
 250 #define LENOVO_3KN100_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x2066)
 251 #define LENOVO_TCA55_SUBVENDOR  HDA_MODEL_CONSTRUCT(LENOVO, 0x1015)
 252 #define LENOVO_ALL_SUBVENDOR    HDA_MODEL_CONSTRUCT(LENOVO, 0xffff)
 253
 254 /* Samsung */
 255 #define SAMSUNG_VENDORID        0x144d
 256 #define SAMSUNG_Q1_SUBVENDOR    HDA_MODEL_CONSTRUCT(SAMSUNG, 0xc027)
 257 #define SAMSUNG_ALL_SUBVENDOR   HDA_MODEL_CONSTRUCT(SAMSUNG, 0xffff)
 258
 259 /* Medion ? */
 260 #define MEDION_VENDORID                 0x161f
 261 #define MEDION_MD95257_SUBVENDOR        HDA_MODEL_CONSTRUCT(MEDION, 0x203d)
 262 #define MEDION_ALL_SUBVENDOR            HDA_MODEL_CONSTRUCT(MEDION, 0xffff)
 263
 264 /* Apple Computer Inc. */
 265 #define APPLE_VENDORID          0x106b
 266 #define APPLE_MB3_SUBVENDOR     HDA_MODEL_CONSTRUCT(APPLE, 0x00a1)
 267
 268 /*
 269  * Apple Intel MacXXXX seems using Sigmatel codec/vendor id
 270  * instead of their own, which is beyond my comprehension
 271  * (see HDA_CODEC_STAC9221 below).
 272  */
 273 #define APPLE_INTEL_MAC         0x76808384
 274
 275 /* LG Electronics */
 276 #define LG_VENDORID             0x1854
 277 #define LG_LW20_SUBVENDOR       HDA_MODEL_CONSTRUCT(LG, 0x0018)
 278 #define LG_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(LG, 0xffff)
 279
 280 /* Fujitsu Siemens */
 281 #define FS_VENDORID             0x1734
 282 #define FS_PA1510_SUBVENDOR     HDA_MODEL_CONSTRUCT(FS, 0x10b8)
 283 #define FS_SI1848_SUBVENDOR     HDA_MODEL_CONSTRUCT(FS, 0x10cd)
 284 #define FS_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(FS, 0xffff)
 285
 286 /* Fujitsu Limited */
 287 #define FL_VENDORID             0x10cf
 288 #define FL_S7020D_SUBVENDOR     HDA_MODEL_CONSTRUCT(FL, 0x1326)
 289 #define FL_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(FL, 0xffff)
 290
 291 /* Toshiba */
 292 #define TOSHIBA_VENDORID        0x1179
 293 #define TOSHIBA_U200_SUBVENDOR  HDA_MODEL_CONSTRUCT(TOSHIBA, 0x0001)
 294 #define TOSHIBA_A135_SUBVENDOR  HDA_MODEL_CONSTRUCT(TOSHIBA, 0xff01)
 295 #define TOSHIBA_ALL_SUBVENDOR   HDA_MODEL_CONSTRUCT(TOSHIBA, 0xffff)
 296
 297 /* Micro-Star International (MSI) */
 298 #define MSI_VENDORID            0x1462
 299 #define MSI_MS1034_SUBVENDOR    HDA_MODEL_CONSTRUCT(MSI, 0x0349)
 300 #define MSI_MS034A_SUBVENDOR    HDA_MODEL_CONSTRUCT(MSI, 0x034a)
 301 #define MSI_ALL_SUBVENDOR       HDA_MODEL_CONSTRUCT(MSI, 0xffff)
 302
 303 /* Giga-Byte Technology */
 304 #define GB_VENDORID             0x1458
 305 #define GB_G33S2H_SUBVENDOR     HDA_MODEL_CONSTRUCT(GB, 0xa022)
 306 #define GP_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(GB, 0xffff)
 307
 308 /* Uniwill ? */
 309 #define UNIWILL_VENDORID        0x1584
 310 #define UNIWILL_9075_SUBVENDOR  HDA_MODEL_CONSTRUCT(UNIWILL, 0x9075)
 311 #define UNIWILL_9080_SUBVENDOR  HDA_MODEL_CONSTRUCT(UNIWILL, 0x9080)
 312
 313
 314 /* Misc constants.. */
 315 #define HDA_AMP_MUTE_DEFAULT    (0xffffffff)
 316 #define HDA_AMP_MUTE_NONE       (0)
 317 #define HDA_AMP_MUTE_LEFT       (1 << 0)
 318 #define HDA_AMP_MUTE_RIGHT      (1 << 1)
 319 #define HDA_AMP_MUTE_ALL        (HDA_AMP_MUTE_LEFT | HDA_AMP_MUTE_RIGHT)
 320
 321 #define HDA_AMP_LEFT_MUTED(v)   ((v) & (HDA_AMP_MUTE_LEFT))
 322 #define HDA_AMP_RIGHT_MUTED(v)  (((v) & HDA_AMP_MUTE_RIGHT) >> 1)
 323
 324 #define HDA_DAC_PATH    (1 << 0)
 325 #define HDA_ADC_PATH    (1 << 1)
 326 #define HDA_ADC_RECSEL  (1 << 2)
 327
 328 #define HDA_DAC_LOCKED  (1 << 3)
 329 #define HDA_ADC_LOCKED  (1 << 4)
 330
 331 #define HDA_CTL_OUT     (1 << 0)
 332 #define HDA_CTL_IN      (1 << 1)
 333 #define HDA_CTL_BOTH    (HDA_CTL_IN | HDA_CTL_OUT)
 334
 335 #define HDA_GPIO_MAX            8
 336 /* 0 - 7 = GPIO , 8 = Flush */
 337 #define HDA_QUIRK_GPIO0         (1 << 0)
 338 #define HDA_QUIRK_GPIO1         (1 << 1)
 339 #define HDA_QUIRK_GPIO2         (1 << 2)
 340 #define HDA_QUIRK_GPIO3         (1 << 3)
 341 #define HDA_QUIRK_GPIO4         (1 << 4)
 342 #define HDA_QUIRK_GPIO5         (1 << 5)
 343 #define HDA_QUIRK_GPIO6         (1 << 6)
 344 #define HDA_QUIRK_GPIO7         (1 << 7)
 345 #define HDA_QUIRK_GPIOFLUSH     (1 << 8)
 346
 347 /* 9 - 25 = anything else */
 348 #define HDA_QUIRK_SOFTPCMVOL    (1 << 9)
 349 #define HDA_QUIRK_FIXEDRATE     (1 << 10)
 350 #define HDA_QUIRK_FORCESTEREO   (1 << 11)
 351 #define HDA_QUIRK_EAPDINV       (1 << 12)
 352 #define HDA_QUIRK_DMAPOS        (1 << 13)
 353
 354 /* 26 - 31 = vrefs */
 355 #define HDA_QUIRK_IVREF50       (1 << 26)
 356 #define HDA_QUIRK_IVREF80       (1 << 27)
 357 #define HDA_QUIRK_IVREF100      (1 << 28)
 358 #define HDA_QUIRK_OVREF50       (1 << 29)
 359 #define HDA_QUIRK_OVREF80       (1 << 30)
 360 #define HDA_QUIRK_OVREF100      (1 << 31)
 361
 362 #define HDA_QUIRK_IVREF         (HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF80 | \
 363                                                         HDA_QUIRK_IVREF100)
 364 #define HDA_QUIRK_OVREF         (HDA_QUIRK_OVREF50 | HDA_QUIRK_OVREF80 | \
 365                                                         HDA_QUIRK_OVREF100)
 366 #define HDA_QUIRK_VREF          (HDA_QUIRK_IVREF | HDA_QUIRK_OVREF)
 367
 368 #define SOUND_MASK_SKIP         (1 << 30)
 369 #define SOUND_MASK_DISABLE      (1 << 31)
 370
 371 static const struct {
 372         char *key;
 373         uint32_t value;
 374 } hdac_quirks_tab[] = {
 375         { "gpio0", HDA_QUIRK_GPIO0 },
 376         { "gpio1", HDA_QUIRK_GPIO1 },
 377         { "gpio2", HDA_QUIRK_GPIO2 },
 378         { "gpio3", HDA_QUIRK_GPIO3 },
 379         { "gpio4", HDA_QUIRK_GPIO4 },
 380         { "gpio5", HDA_QUIRK_GPIO5 },
 381         { "gpio6", HDA_QUIRK_GPIO6 },
 382         { "gpio7", HDA_QUIRK_GPIO7 },
 383         { "gpioflush", HDA_QUIRK_GPIOFLUSH },
 384         { "softpcmvol", HDA_QUIRK_SOFTPCMVOL },
 385         { "fixedrate", HDA_QUIRK_FIXEDRATE },
 386         { "forcestereo", HDA_QUIRK_FORCESTEREO },
 387         { "eapdinv", HDA_QUIRK_EAPDINV },
 388         { "dmapos", HDA_QUIRK_DMAPOS },
 389         { "ivref50", HDA_QUIRK_IVREF50 },
 390         { "ivref80", HDA_QUIRK_IVREF80 },
 391         { "ivref100", HDA_QUIRK_IVREF100 },
 392         { "ovref50", HDA_QUIRK_OVREF50 },
 393         { "ovref80", HDA_QUIRK_OVREF80 },
 394         { "ovref100", HDA_QUIRK_OVREF100 },
 395         { "ivref", HDA_QUIRK_IVREF },
 396         { "ovref", HDA_QUIRK_OVREF },
 397         { "vref", HDA_QUIRK_VREF },
 398 };
 399 #define HDAC_QUIRKS_TAB_LEN NELEM(hdac_quirks_tab)
 400
 401 #define HDA_BDL_MIN     2
 402 #define HDA_BDL_MAX     256
 403 #define HDA_BDL_DEFAULT HDA_BDL_MIN
 404
 405 #define HDA_BLK_MIN     HDAC_DMA_ALIGNMENT
 406 #define HDA_BLK_ALIGN   (~(HDA_BLK_MIN - 1))
 407
 408 #define HDA_BUFSZ_MIN           4096
 409 #define HDA_BUFSZ_MAX           65536
 410 #define HDA_BUFSZ_DEFAULT       16384
 411
 412 #define HDA_PARSE_MAXDEPTH      10
 413
 414 #define HDAC_UNSOLTAG_EVENT_HP          0x00
 415 #define HDAC_UNSOLTAG_EVENT_TEST        0x01
 416
 417 MALLOC_DEFINE(M_HDAC, "hdac", "High Definition Audio Controller");
 418
 419 static int hdac_msi_enable = 1;
 420 TUNABLE_INT("hw.snd.hdac.msi.enable", &hdac_msi_enable);
 421
 422 enum {
 423         HDA_PARSE_MIXER,
 424         HDA_PARSE_DIRECT
 425 };
 426
 427 /* Default */
 428 static uint32_t hdac_fmt[] = {
 429         AFMT_STEREO | AFMT_S16_LE,
 430         0
 431 };
 432
 433 static struct pcmchan_caps hdac_caps = {48000, 48000, hdac_fmt, 0};
 434
 435 static const struct {
 436         uint32_t        model;
 437         char            *desc;
 438 } hdac_devices[] = {
 439         { HDA_INTEL_82801F,  "Intel 82801F" },
 440         { HDA_INTEL_63XXESB, "Intel 631x/632xESB" },
 441         { HDA_INTEL_82801G,  "Intel 82801G" },
 442         { HDA_INTEL_82801H,  "Intel 82801H" },
 443         { HDA_INTEL_82801I,  "Intel 82801I" },
 444         { HDA_NVIDIA_MCP51,  "NVidia MCP51" },
 445         { HDA_NVIDIA_MCP55,  "NVidia MCP55" },
 446         { HDA_NVIDIA_MCP61_1, "NVidia MCP61" },
 447         { HDA_NVIDIA_MCP61_2, "NVidia MCP61" },
 448         { HDA_NVIDIA_MCP65_1, "NVidia MCP65" },
 449         { HDA_NVIDIA_MCP65_2, "NVidia MCP65" },
 450         { HDA_NVIDIA_MCP67_1, "NVidia MCP67" },
 451         { HDA_NVIDIA_MCP67_2, "NVidia MCP67" },
 452         { HDA_ATI_SB450,     "ATI SB450"    },
 453         { HDA_ATI_SB600,     "ATI SB600"    },
 454         { HDA_VIA_VT82XX,    "VIA VT8251/8237A" },
 455         { HDA_SIS_966,       "SiS 966" },
 456         /* Unknown */
 457         { HDA_INTEL_ALL,  "Intel (Unknown)"  },
 458         { HDA_NVIDIA_ALL, "NVidia (Unknown)" },
 459         { HDA_ATI_ALL,    "ATI (Unknown)"    },
 460         { HDA_VIA_ALL,    "VIA (Unknown)"    },
 461         { HDA_SIS_ALL,    "SiS (Unknown)"    },
 462 };
 463 #define HDAC_DEVICES_LEN NELEM(hdac_devices)
 464
 465 static const struct {
 466         uint16_t vendor;
 467         uint8_t reg;
 468         uint8_t mask;
 469         uint8_t enable;
 470 } hdac_pcie_snoop[] = {
 471         {  INTEL_VENDORID, 0x00, 0x00, 0x00 },
 472         {    ATI_VENDORID, 0x42, 0xf8, 0x02 },
 473         { NVIDIA_VENDORID, 0x4e, 0xf0, 0x0f },
 474 };
 475 #define HDAC_PCIESNOOP_LEN NELEM(hdac_pcie_snoop)
 476
 477 static const struct {
 478         uint32_t        rate;
 479         int             valid;
 480         uint16_t        base;
 481         uint16_t        mul;
 482         uint16_t        div;
 483 } hda_rate_tab[] = {
 484         {   8000, 1, 0x0000, 0x0000, 0x0500 },  /* (48000 * 1) / 6 */
 485         {   9600, 0, 0x0000, 0x0000, 0x0400 },  /* (48000 * 1) / 5 */
 486         {  12000, 0, 0x0000, 0x0000, 0x0300 },  /* (48000 * 1) / 4 */
 487         {  16000, 1, 0x0000, 0x0000, 0x0200 },  /* (48000 * 1) / 3 */
 488         {  18000, 0, 0x0000, 0x1000, 0x0700 },  /* (48000 * 3) / 8 */
 489         {  19200, 0, 0x0000, 0x0800, 0x0400 },  /* (48000 * 2) / 5 */
 490         {  24000, 0, 0x0000, 0x0000, 0x0100 },  /* (48000 * 1) / 2 */
 491         {  28800, 0, 0x0000, 0x1000, 0x0400 },  /* (48000 * 3) / 5 */
 492         {  32000, 1, 0x0000, 0x0800, 0x0200 },  /* (48000 * 2) / 3 */
 493         {  36000, 0, 0x0000, 0x1000, 0x0300 },  /* (48000 * 3) / 4 */
 494         {  38400, 0, 0x0000, 0x1800, 0x0400 },  /* (48000 * 4) / 5 */
 495         {  48000, 1, 0x0000, 0x0000, 0x0000 },  /* (48000 * 1) / 1 */
 496         {  64000, 0, 0x0000, 0x1800, 0x0200 },  /* (48000 * 4) / 3 */
 497         {  72000, 0, 0x0000, 0x1000, 0x0100 },  /* (48000 * 3) / 2 */
 498         {  96000, 1, 0x0000, 0x0800, 0x0000 },  /* (48000 * 2) / 1 */
 499         { 144000, 0, 0x0000, 0x1000, 0x0000 },  /* (48000 * 3) / 1 */
 500         { 192000, 1, 0x0000, 0x1800, 0x0000 },  /* (48000 * 4) / 1 */
 501         {   8820, 0, 0x4000, 0x0000, 0x0400 },  /* (44100 * 1) / 5 */
 502         {  11025, 1, 0x4000, 0x0000, 0x0300 },  /* (44100 * 1) / 4 */
 503         {  12600, 0, 0x4000, 0x0800, 0x0600 },  /* (44100 * 2) / 7 */
 504         {  14700, 0, 0x4000, 0x0000, 0x0200 },  /* (44100 * 1) / 3 */
 505         {  17640, 0, 0x4000, 0x0800, 0x0400 },  /* (44100 * 2) / 5 */
 506         {  18900, 0, 0x4000, 0x1000, 0x0600 },  /* (44100 * 3) / 7 */
 507         {  22050, 1, 0x4000, 0x0000, 0x0100 },  /* (44100 * 1) / 2 */
 508         {  25200, 0, 0x4000, 0x1800, 0x0600 },  /* (44100 * 4) / 7 */
 509         {  26460, 0, 0x4000, 0x1000, 0x0400 },  /* (44100 * 3) / 5 */
 510         {  29400, 0, 0x4000, 0x0800, 0x0200 },  /* (44100 * 2) / 3 */
 511         {  33075, 0, 0x4000, 0x1000, 0x0300 },  /* (44100 * 3) / 4 */
 512         {  35280, 0, 0x4000, 0x1800, 0x0400 },  /* (44100 * 4) / 5 */
 513         {  44100, 1, 0x4000, 0x0000, 0x0000 },  /* (44100 * 1) / 1 */
 514         {  58800, 0, 0x4000, 0x1800, 0x0200 },  /* (44100 * 4) / 3 */
 515         {  66150, 0, 0x4000, 0x1000, 0x0100 },  /* (44100 * 3) / 2 */
 516         {  88200, 1, 0x4000, 0x0800, 0x0000 },  /* (44100 * 2) / 1 */
 517         { 132300, 0, 0x4000, 0x1000, 0x0000 },  /* (44100 * 3) / 1 */
 518         { 176400, 1, 0x4000, 0x1800, 0x0000 },  /* (44100 * 4) / 1 */
 519 };
 520 #define HDA_RATE_TAB_LEN NELEM(hda_rate_tab)
 521
 522 /* All codecs you can eat... */
 523 #define HDA_CODEC_CONSTRUCT(vendor, id) \
 524                 (((uint32_t)(vendor##_VENDORID) << 16) | ((id) & 0xffff))
 525
 526 /* Realtek */
 527 #define REALTEK_VENDORID        0x10ec
 528 #define HDA_CODEC_ALC260        HDA_CODEC_CONSTRUCT(REALTEK, 0x0260)
 529 #define HDA_CODEC_ALC262        HDA_CODEC_CONSTRUCT(REALTEK, 0x0262)
 530 #define HDA_CODEC_ALC268        HDA_CODEC_CONSTRUCT(REALTEK, 0x0268)
 531 #define HDA_CODEC_ALC660        HDA_CODEC_CONSTRUCT(REALTEK, 0x0660)
 532 #define HDA_CODEC_ALC861        HDA_CODEC_CONSTRUCT(REALTEK, 0x0861)
 533 #define HDA_CODEC_ALC861VD      HDA_CODEC_CONSTRUCT(REALTEK, 0x0862)
 534 #define HDA_CODEC_ALC880        HDA_CODEC_CONSTRUCT(REALTEK, 0x0880)
 535 #define HDA_CODEC_ALC882        HDA_CODEC_CONSTRUCT(REALTEK, 0x0882)
 536 #define HDA_CODEC_ALC883        HDA_CODEC_CONSTRUCT(REALTEK, 0x0883)
 537 #define HDA_CODEC_ALC885        HDA_CODEC_CONSTRUCT(REALTEK, 0x0885)
 538 #define HDA_CODEC_ALC888        HDA_CODEC_CONSTRUCT(REALTEK, 0x0888)
 539 #define HDA_CODEC_ALCXXXX       HDA_CODEC_CONSTRUCT(REALTEK, 0xffff)
 540
 541 /* Analog Devices */
 542 #define ANALOGDEVICES_VENDORID  0x11d4
 543 #define HDA_CODEC_AD1981HD      HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1981)
 544 #define HDA_CODEC_AD1983        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1983)
 545 #define HDA_CODEC_AD1984        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1984)
 546 #define HDA_CODEC_AD1986A       HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1986)
 547 #define HDA_CODEC_AD1988        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1988)
 548 #define HDA_CODEC_AD1988B       HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x198b)
 549 #define HDA_CODEC_ADXXXX        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0xffff)
 550
 551 /* CMedia */
 552 #define CMEDIA_VENDORID         0x434d
 553 #define HDA_CODEC_CMI9880       HDA_CODEC_CONSTRUCT(CMEDIA, 0x4980)
 554 #define HDA_CODEC_CMIXXXX       HDA_CODEC_CONSTRUCT(CMEDIA, 0xffff)
 555
 556 /* Sigmatel */
 557 #define SIGMATEL_VENDORID       0x8384
 558 #define HDA_CODEC_STAC9221      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7680)
 559 #define HDA_CODEC_STAC9221D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7683)
 560 #define HDA_CODEC_STAC9220      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7690)
 561 #define HDA_CODEC_STAC922XD     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7681)
 562 #define HDA_CODEC_STAC9227      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7618)
 563 #define HDA_CODEC_STAC9271D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7627)
 564 #define HDA_CODEC_STACXXXX      HDA_CODEC_CONSTRUCT(SIGMATEL, 0xffff)
 565
 566 /*
 567  * Conexant
 568  *
 569  * Ok, the truth is, I don't have any idea at all whether
 570  * it is "Venice" or "Waikiki" or other unnamed CXyadayada. The only
 571  * place that tell me it is "Venice" is from its Windows driver INF.
 572  *
 573  *  Venice - CX?????
 574  * Waikiki - CX20551-22
 575  */
 576 #define CONEXANT_VENDORID       0x14f1
 577 #define HDA_CODEC_CXVENICE      HDA_CODEC_CONSTRUCT(CONEXANT, 0x5045)
 578 #define HDA_CODEC_CXWAIKIKI     HDA_CODEC_CONSTRUCT(CONEXANT, 0x5047)
 579 #define HDA_CODEC_CXXXXX        HDA_CODEC_CONSTRUCT(CONEXANT, 0xffff)
 580
 581 /* VIA */
 582 #define HDA_CODEC_VT1708_8      HDA_CODEC_CONSTRUCT(VIA, 0x1708)
 583 #define HDA_CODEC_VT1708_9      HDA_CODEC_CONSTRUCT(VIA, 0x1709)
 584 #define HDA_CODEC_VT1708_A      HDA_CODEC_CONSTRUCT(VIA, 0x170a)
 585 #define HDA_CODEC_VT1708_B      HDA_CODEC_CONSTRUCT(VIA, 0x170b)
 586 #define HDA_CODEC_VT1709_0      HDA_CODEC_CONSTRUCT(VIA, 0xe710)
 587 #define HDA_CODEC_VT1709_1      HDA_CODEC_CONSTRUCT(VIA, 0xe711)
 588 #define HDA_CODEC_VT1709_2      HDA_CODEC_CONSTRUCT(VIA, 0xe712)
 589 #define HDA_CODEC_VT1709_3      HDA_CODEC_CONSTRUCT(VIA, 0xe713)
 590 #define HDA_CODEC_VT1709_4      HDA_CODEC_CONSTRUCT(VIA, 0xe714)
 591 #define HDA_CODEC_VT1709_5      HDA_CODEC_CONSTRUCT(VIA, 0xe715)
 592 #define HDA_CODEC_VT1709_6      HDA_CODEC_CONSTRUCT(VIA, 0xe716)
 593 #define HDA_CODEC_VT1709_7      HDA_CODEC_CONSTRUCT(VIA, 0xe717)
 594 #define HDA_CODEC_VTXXXX        HDA_CODEC_CONSTRUCT(VIA, 0xffff)
 595
 596
 597 /* Codecs */
 598 static const struct {
 599         uint32_t id;
 600         char *name;
 601 } hdac_codecs[] = {
 602         { HDA_CODEC_ALC260,    "Realtek ALC260" },
 603         { HDA_CODEC_ALC262,    "Realtek ALC262" },
 604         { HDA_CODEC_ALC268,    "Realtek ALC268" },
 605         { HDA_CODEC_ALC660,    "Realtek ALC660" },
 606         { HDA_CODEC_ALC861,    "Realtek ALC861" },
 607         { HDA_CODEC_ALC861VD,  "Realtek ALC861-VD" },
 608         { HDA_CODEC_ALC880,    "Realtek ALC880" },
 609         { HDA_CODEC_ALC882,    "Realtek ALC882" },
 610         { HDA_CODEC_ALC883,    "Realtek ALC883" },
 611         { HDA_CODEC_ALC885,    "Realtek ALC885" },
 612         { HDA_CODEC_ALC888,    "Realtek ALC888" },
 613         { HDA_CODEC_AD1981HD,  "Analog Devices AD1981HD" },
 614         { HDA_CODEC_AD1983,    "Analog Devices AD1983" },
 615         { HDA_CODEC_AD1984,    "Analog Devices AD1984" },
 616         { HDA_CODEC_AD1986A,   "Analog Devices AD1986A" },
 617         { HDA_CODEC_AD1988,    "Analog Devices AD1988" },
 618         { HDA_CODEC_AD1988B,   "Analog Devices AD1988B" },
 619         { HDA_CODEC_CMI9880,   "CMedia CMI9880" },
 620         { HDA_CODEC_STAC9221,  "Sigmatel STAC9221" },
 621         { HDA_CODEC_STAC9221D, "Sigmatel STAC9221D" },
 622         { HDA_CODEC_STAC9220,  "Sigmatel STAC9220" },
 623         { HDA_CODEC_STAC922XD, "Sigmatel STAC9220D/9223D" },
 624         { HDA_CODEC_STAC9227,  "Sigmatel STAC9227" },
 625         { HDA_CODEC_STAC9271D, "Sigmatel STAC9271D" },
 626         { HDA_CODEC_CXVENICE,  "Conexant Venice" },
 627         { HDA_CODEC_CXWAIKIKI, "Conexant Waikiki" },
 628         { HDA_CODEC_VT1708_8,  "VIA VT1708_8" },
 629         { HDA_CODEC_VT1708_9,  "VIA VT1708_9" },
 630         { HDA_CODEC_VT1708_A,  "VIA VT1708_A" },
 631         { HDA_CODEC_VT1708_B,  "VIA VT1708_B" },
 632         { HDA_CODEC_VT1709_0,  "VIA VT1709_0" },
 633         { HDA_CODEC_VT1709_1,  "VIA VT1709_1" },
 634         { HDA_CODEC_VT1709_2,  "VIA VT1709_2" },
 635         { HDA_CODEC_VT1709_3,  "VIA VT1709_3" },
 636         { HDA_CODEC_VT1709_4,  "VIA VT1709_4" },
 637         { HDA_CODEC_VT1709_5,  "VIA VT1709_5" },
 638         { HDA_CODEC_VT1709_6,  "VIA VT1709_6" },
 639         { HDA_CODEC_VT1709_7,  "VIA VT1709_7" },
 640         /* Unknown codec */
 641         { HDA_CODEC_ALCXXXX,   "Realtek (Unknown)" },
 642         { HDA_CODEC_ADXXXX,    "Analog Devices (Unknown)" },
 643         { HDA_CODEC_CMIXXXX,   "CMedia (Unknown)" },
 644         { HDA_CODEC_STACXXXX,  "Sigmatel (Unknown)" },
 645         { HDA_CODEC_CXXXXX,    "Conexant (Unknown)" },
 646         { HDA_CODEC_VTXXXX,    "VIA (Unknown)" },
 647 };
 648 #define HDAC_CODECS_LEN NELEM(hdac_codecs)
 649
 650 enum {
 651         HDAC_HP_SWITCH_CTL,
 652         HDAC_HP_SWITCH_CTRL,
 653         HDAC_HP_SWITCH_DEBUG
 654 };
 655
 656 static const struct {
 657         uint32_t model;
 658         uint32_t id;
 659         int type;
 660         int inverted;
 661         int polling;
 662         int execsense;
 663         nid_t hpnid;
 664         nid_t spkrnid[8];
 665         nid_t eapdnid;
 666 } hdac_hp_switch[] = {
 667         /* Specific OEM models */
 668         { HP_V3000_SUBVENDOR, HDA_CODEC_CXVENICE, HDAC_HP_SWITCH_CTL,
 669             0, 0, -1, 17, { 16, -1 }, 16 },
 670         /* { HP_XW4300_SUBVENDOR, HDA_CODEC_ALC260, HDAC_HP_SWITCH_CTL,
 671             0, 0, -1, 21, { 16, 17, -1 }, -1 } */
 672         /* { HP_3010_SUBVENDOR,  HDA_CODEC_ALC260, HDAC_HP_SWITCH_DEBUG,
 673             0, 1, 0, 16, { 15, 18, 19, 20, 21, -1 }, -1 }, */
 674         { HP_NX7400_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 675             0, 0, -1, 6, { 5, -1 }, 5 },
 676         { HP_NX6310_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 677             0, 0, -1, 6, { 5, -1 }, 5 },
 678         { HP_NX6325_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 679             0, 0, -1, 6, { 5, -1 }, 5 },
 680         /* { HP_DC7700_SUBVENDOR, HDA_CODEC_ALC262, HDAC_HP_SWITCH_CTL,
 681             0, 0, -1, 21, { 22, 27, -1 }, -1 }, */
 682         { TOSHIBA_U200_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 683             0, 0, -1, 6, { 5, -1 }, -1 },
 684         { TOSHIBA_A135_SUBVENDOR, HDA_CODEC_ALC861VD, HDAC_HP_SWITCH_CTL,
 685             0, 0, -1, 27, { 20, -1 }, -1 },
 686         { DELL_D820_SUBVENDOR, HDA_CODEC_STAC9220, HDAC_HP_SWITCH_CTRL,
 687             0, 0, -1, 13, { 14, -1 }, -1 },
 688         { DELL_I1300_SUBVENDOR, HDA_CODEC_STAC9220, HDAC_HP_SWITCH_CTRL,
 689             0, 0, -1, 13, { 14, -1 }, -1 },
 690         { DELL_OPLX745_SUBVENDOR, HDA_CODEC_AD1983, HDAC_HP_SWITCH_CTL,
 691             0, 0, -1, 6, { 5, 7, -1 }, -1 },
 692         { APPLE_MB3_SUBVENDOR, HDA_CODEC_ALC885, HDAC_HP_SWITCH_CTL,
 693             0, 0, -1, 21, { 20, 22, -1 }, -1 },
 694         { APPLE_INTEL_MAC, HDA_CODEC_STAC9221, HDAC_HP_SWITCH_CTRL,
 695             0, 0, -1, 10, { 13, -1 }, -1 },
 696         { LENOVO_3KN100_SUBVENDOR, HDA_CODEC_AD1986A, HDAC_HP_SWITCH_CTL,
 697             1, 0, -1, 26, { 27, -1 }, -1 },
 698         /* { LENOVO_TCA55_SUBVENDOR, HDA_CODEC_AD1986A, HDAC_HP_SWITCH_CTL,
 699             0, 0, -1, 26, { 27, 28, 29, 30, -1 }, -1 }, */
 700         { LG_LW20_SUBVENDOR, HDA_CODEC_ALC880, HDAC_HP_SWITCH_CTL,
 701             0, 0, -1, 27, { 20, -1 }, -1 },
 702         { ACER_A5050_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 703             0, 0, -1, 20, { 21, -1 }, -1 },
 704         { ACER_3681WXM_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 705             0, 0, -1, 20, { 21, -1 }, -1 },
 706         { ACER_A4520_SUBVENDOR, HDA_CODEC_ALC268, HDAC_HP_SWITCH_CTL,
 707             0, 0, -1, 20, { 21, -1 }, -1 },
 708         { UNIWILL_9080_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 709             0, 0, -1, 20, { 21, -1 }, -1 },
 710         { MSI_MS1034_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 711             0, 0, -1, 20, { 27, -1 }, -1 },
 712         { MSI_MS034A_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 713             0, 0, -1, 20, { 27, -1 }, -1 },
 714         { FS_SI1848_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 715             0, 0, -1, 20, { 21, -1 }, -1 },
 716         { FL_S7020D_SUBVENDOR, HDA_CODEC_ALC260, HDAC_HP_SWITCH_CTL,
 717             0, 0, -1, 20, { 16, -1 }, -1 },
 718         /*
 719          * All models that at least come from the same vendor with
 720          * simmilar codec.
 721          */
 722         { HP_ALL_SUBVENDOR, HDA_CODEC_CXVENICE, HDAC_HP_SWITCH_CTL,
 723             0, 0, -1, 17, { 16, -1 }, 16 },
 724         { HP_ALL_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 725             0, 0, -1, 6, { 5, -1 }, 5 },
 726         { TOSHIBA_ALL_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 727             0, 0, -1, 6, { 5, -1 }, -1 },
 728         { DELL_ALL_SUBVENDOR, HDA_CODEC_STAC9220, HDAC_HP_SWITCH_CTRL,
 729             0, 0, -1, 13, { 14, -1 }, -1 },
 730 #if 0
 731         { LENOVO_ALL_SUBVENDOR, HDA_CODEC_AD1986A, HDAC_HP_SWITCH_CTL,
 732             1, 0, -1, 26, { 27, -1 }, -1 },
 733         { ACER_ALL_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 734             0, 0, -1, 20, { 21, -1 }, -1 },
 735 #endif
 736 };
 737 #define HDAC_HP_SWITCH_LEN NELEM(hdac_hp_switch)
 738
 739 static const struct {
 740         uint32_t model;
 741         uint32_t id;
 742         nid_t eapdnid;
 743         int hp_switch;
 744 } hdac_eapd_switch[] = {
 745         { HP_V3000_SUBVENDOR, HDA_CODEC_CXVENICE, 16, 1 },
 746         { HP_NX7400_SUBVENDOR, HDA_CODEC_AD1981HD, 5, 1 },
 747         { HP_NX6310_SUBVENDOR, HDA_CODEC_AD1981HD, 5, 1 },
 748 };
 749 #define HDAC_EAPD_SWITCH_LEN NELEM(hdac_eapd_switch)
 750
 751 /****************************************************************************
 752  * Function prototypes
 753  ****************************************************************************/
 754 static void     hdac_intr_handler(void *);
 755 static int      hdac_reset(struct hdac_softc *);
 756 static int      hdac_get_capabilities(struct hdac_softc *);
 757 static void     hdac_dma_cb(void *, bus_dma_segment_t *, int, int);
 758 static int      hdac_dma_alloc(struct hdac_softc *,
 759                                         struct hdac_dma *, bus_size_t);
 760 static void     hdac_dma_free(struct hdac_softc *, struct hdac_dma *);
 761 static int      hdac_mem_alloc(struct hdac_softc *);
 762 static void     hdac_mem_free(struct hdac_softc *);
 763 static int      hdac_irq_alloc(struct hdac_softc *);
 764 static void     hdac_irq_free(struct hdac_softc *);
 765 static void     hdac_corb_init(struct hdac_softc *);
 766 static void     hdac_rirb_init(struct hdac_softc *);
 767 static void     hdac_corb_start(struct hdac_softc *);
 768 static void     hdac_rirb_start(struct hdac_softc *);
 769 static void     hdac_scan_codecs(struct hdac_softc *, int);
 770 static int      hdac_probe_codec(struct hdac_codec *);
 771 static struct   hdac_devinfo *hdac_probe_function(struct hdac_codec *, nid_t);
 772 static void     hdac_add_child(struct hdac_softc *, struct hdac_devinfo *);
 773
 774 static void     hdac_attach2(void *);
 775
 776 static uint32_t hdac_command_sendone_internal(struct hdac_softc *,
 777                                                         uint32_t, int);
 778 static void     hdac_command_send_internal(struct hdac_softc *,
 779                                         struct hdac_command_list *, int);
 780
 781 static int      hdac_probe(device_t);
 782 static int      hdac_attach(device_t);
 783 static int      hdac_detach(device_t);
 784 static void     hdac_widget_connection_select(struct hdac_widget *, uint8_t);
 785 static void     hdac_audio_ctl_amp_set(struct hdac_audio_ctl *,
 786                                                 uint32_t, int, int);
 787 static struct   hdac_audio_ctl *hdac_audio_ctl_amp_get(struct hdac_devinfo *,
 788                                                         nid_t, int, int);
 789 static void     hdac_audio_ctl_amp_set_internal(struct hdac_softc *,
 790                                 nid_t, nid_t, int, int, int, int, int, int);
 791 static int      hdac_audio_ctl_ossmixer_getnextdev(struct hdac_devinfo *);
 792 static struct   hdac_widget *hdac_widget_get(struct hdac_devinfo *, nid_t);
 793
 794 static int      hdac_rirb_flush(struct hdac_softc *sc);
 795 static int      hdac_unsolq_flush(struct hdac_softc *sc);
 796
 797 #define hdac_command(a1, a2, a3)        \
 798                 hdac_command_sendone_internal(a1, a2, a3)
 799
 800 #define hdac_codec_id(d)                                                \
 801                 ((uint32_t)((d == NULL) ? 0x00000000 :                  \
 802                 ((((uint32_t)(d)->vendor_id & 0x0000ffff) << 16) |      \
 803                 ((uint32_t)(d)->device_id & 0x0000ffff))))
 804
 805 static char *
 806 hdac_codec_name(struct hdac_devinfo *devinfo)
 807 {
 808         uint32_t id;
 809         int i;
 810
 811         id = hdac_codec_id(devinfo);
 812
 813         for (i = 0; i < HDAC_CODECS_LEN; i++) {
 814                 if (HDA_DEV_MATCH(hdac_codecs[i].id, id))
 815                         return (hdac_codecs[i].name);
 816         }
 817
 818         return ((id == 0x00000000) ? "NULL Codec" : "Unknown Codec");
 819 }
 820
 821 static char *
 822 hdac_audio_ctl_ossmixer_mask2name(uint32_t devmask)
 823 {
 824         static char *ossname[] = SOUND_DEVICE_NAMES;
 825         static char *unknown = "???";
 826         int i;
 827
 828         for (i = SOUND_MIXER_NRDEVICES - 1; i >= 0; i--) {
 829                 if (devmask & (1 << i))
 830                         return (ossname[i]);
 831         }
 832         return (unknown);
 833 }
 834
 835 static void
 836 hdac_audio_ctl_ossmixer_mask2allname(uint32_t mask, char *buf, size_t len)
 837 {
 838         static char *ossname[] = SOUND_DEVICE_NAMES;
 839         int i, first = 1;
 840
 841         bzero(buf, len);
 842         for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
 843                 if (mask & (1 << i)) {
 844                         if (first == 0)
 845                                 strlcat(buf, ", ", len);
 846                         strlcat(buf, ossname[i], len);
 847                         first = 0;
 848                 }
 849         }
 850 }
 851
 852 static struct hdac_audio_ctl *
 853 hdac_audio_ctl_each(struct hdac_devinfo *devinfo, int *index)
 854 {
 855         if (devinfo == NULL ||
 856             devinfo->node_type != HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO ||
 857             index == NULL || devinfo->function.audio.ctl == NULL ||
 858             devinfo->function.audio.ctlcnt < 1 ||
 859             *index < 0 || *index >= devinfo->function.audio.ctlcnt)
 860                 return (NULL);
 861         return (&devinfo->function.audio.ctl[(*index)++]);
 862 }
 863
 864 static struct hdac_audio_ctl *
 865 hdac_audio_ctl_amp_get(struct hdac_devinfo *devinfo, nid_t nid,
 866                                                 int index, int cnt)
 867 {
 868         struct hdac_audio_ctl *ctl, *retctl = NULL;
 869         int i, at, atindex, found = 0;
 870
 871         if (devinfo == NULL || devinfo->function.audio.ctl == NULL)
 872                 return (NULL);
 873
 874         at = cnt;
 875         if (at == 0)
 876                 at = 1;
 877         else if (at < 0)
 878                 at = -1;
 879         atindex = index;
 880         if (atindex < 0)
 881                 atindex = -1;
 882
 883         i = 0;
 884         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
 885                 if (ctl->enable == 0 || ctl->widget == NULL)
 886                         continue;
 887                 if (!(ctl->widget->nid == nid && (atindex == -1 ||
 888                     ctl->index == atindex)))
 889                         continue;
 890                 found++;
 891                 if (found == cnt)
 892                         return (ctl);
 893                 retctl = ctl;
 894         }
 895
 896         return ((at == -1) ? retctl : NULL);
 897 }
 898
 899 static void
 900 hdac_hp_switch_handler(struct hdac_devinfo *devinfo)
 901 {
 902         struct hdac_softc *sc;
 903         struct hdac_widget *w;
 904         struct hdac_audio_ctl *ctl;
 905         uint32_t val, id, res;
 906         int i = 0, j, timeout, forcemute;
 907         nid_t cad;
 908
 909         if (devinfo == NULL || devinfo->codec == NULL ||
 910             devinfo->codec->sc == NULL)
 911                 return;
 912
 913         sc = devinfo->codec->sc;
 914         cad = devinfo->codec->cad;
 915         id = hdac_codec_id(devinfo);
 916         for (i = 0; i < HDAC_HP_SWITCH_LEN; i++) {
 917                 if (HDA_DEV_MATCH(hdac_hp_switch[i].model,
 918                     sc->pci_subvendor) &&
 919                     hdac_hp_switch[i].id == id)
 920                         break;
 921         }
 922
 923         if (i >= HDAC_HP_SWITCH_LEN)
 924                 return;
 925
 926         forcemute = 0;
 927         if (hdac_hp_switch[i].eapdnid != -1) {
 928                 w = hdac_widget_get(devinfo, hdac_hp_switch[i].eapdnid);
 929                 if (w != NULL && w->param.eapdbtl != HDAC_INVALID)
 930                         forcemute = (w->param.eapdbtl &
 931                             HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD) ? 0 : 1;
 932         }
 933
 934         if (hdac_hp_switch[i].execsense != -1)
 935                 hdac_command(sc,
 936                     HDA_CMD_SET_PIN_SENSE(cad, hdac_hp_switch[i].hpnid,
 937                     hdac_hp_switch[i].execsense), cad);
 938
 939         timeout = 10000;
 940         do {
 941                 res = hdac_command(sc,
 942                     HDA_CMD_GET_PIN_SENSE(cad, hdac_hp_switch[i].hpnid),
 943                     cad);
 944                 if (hdac_hp_switch[i].execsense == -1 || res != 0x7fffffff)
 945                         break;
 946                 DELAY(10);
 947         } while (--timeout != 0);
 948
 949         HDA_BOOTVERBOSE(
 950                 device_printf(sc->dev,
 951                     "HDA_DEBUG: Pin sense: nid=%d timeout=%d res=0x%08x\n",
 952                     hdac_hp_switch[i].hpnid, timeout, res);
 953         );
 954
 955         res = HDA_CMD_GET_PIN_SENSE_PRESENCE_DETECT(res);
 956         res ^= hdac_hp_switch[i].inverted;
 957
 958         switch (hdac_hp_switch[i].type) {
 959         case HDAC_HP_SWITCH_CTL:
 960                 ctl = hdac_audio_ctl_amp_get(devinfo,
 961                     hdac_hp_switch[i].hpnid, 0, 1);
 962                 if (ctl != NULL) {
 963                         val = (res != 0 && forcemute == 0) ?
 964                             HDA_AMP_MUTE_NONE : HDA_AMP_MUTE_ALL;
 965                         if (val != ctl->muted) {
 966                                 ctl->muted = val;
 967                                 hdac_audio_ctl_amp_set(ctl,
 968                                     HDA_AMP_MUTE_DEFAULT, ctl->left,
 969                                     ctl->right);
 970                         }
 971                 }
 972                 for (j = 0; hdac_hp_switch[i].spkrnid[j] != -1; j++) {
 973                         ctl = hdac_audio_ctl_amp_get(devinfo,
 974                             hdac_hp_switch[i].spkrnid[j], 0, 1);
 975                         if (ctl == NULL)
 976                                 continue;
 977                         val = (res != 0 || forcemute == 1) ?
 978                             HDA_AMP_MUTE_ALL : HDA_AMP_MUTE_NONE;
 979                         if (val == ctl->muted)
 980                                 continue;
 981                         ctl->muted = val;
 982                         hdac_audio_ctl_amp_set(ctl, HDA_AMP_MUTE_DEFAULT,
 983                             ctl->left, ctl->right);
 984                 }
 985                 break;
 986         case HDAC_HP_SWITCH_CTRL:
 987                 if (res != 0) {
 988                         /* HP in */
 989                         w = hdac_widget_get(devinfo, hdac_hp_switch[i].hpnid);
 990                         if (w != NULL && w->type ==
 991                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
 992                                 if (forcemute == 0)
 993                                         val = w->wclass.pin.ctrl |
 994                                             HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
 995                                 else
 996                                         val = w->wclass.pin.ctrl &
 997                                             ~HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
 998                                 if (val != w->wclass.pin.ctrl) {
 999                                         w->wclass.pin.ctrl = val;
1000                                         hdac_command(sc,
1001                                             HDA_CMD_SET_PIN_WIDGET_CTRL(cad,
1002                                             w->nid, w->wclass.pin.ctrl), cad);
1003                                 }
1004                         }
1005                         for (j = 0; hdac_hp_switch[i].spkrnid[j] != -1; j++) {
1006                                 w = hdac_widget_get(devinfo,
1007                                     hdac_hp_switch[i].spkrnid[j]);
1008                                 if (w == NULL || w->type !=
1009                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
1010                                         continue;
1011                                 val = w->wclass.pin.ctrl &
1012                                     ~HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1013                                 if (val == w->wclass.pin.ctrl)
1014                                         continue;
1015                                 w->wclass.pin.ctrl = val;
1016                                 hdac_command(sc, HDA_CMD_SET_PIN_WIDGET_CTRL(
1017                                     cad, w->nid, w->wclass.pin.ctrl), cad);
1018                         }
1019                 } else {
1020                         /* HP out */
1021                         w = hdac_widget_get(devinfo, hdac_hp_switch[i].hpnid);
1022                         if (w != NULL && w->type ==
1023                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
1024                                 val = w->wclass.pin.ctrl &
1025                                     ~HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1026                                 if (val != w->wclass.pin.ctrl) {
1027                                         w->wclass.pin.ctrl = val;
1028                                         hdac_command(sc,
1029                                             HDA_CMD_SET_PIN_WIDGET_CTRL(cad,
1030                                             w->nid, w->wclass.pin.ctrl), cad);
1031                                 }
1032                         }
1033                         for (j = 0; hdac_hp_switch[i].spkrnid[j] != -1; j++) {
1034                                 w = hdac_widget_get(devinfo,
1035                                     hdac_hp_switch[i].spkrnid[j]);
1036                                 if (w == NULL || w->type !=
1037                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
1038                                         continue;
1039                                 if (forcemute == 0)
1040                                         val = w->wclass.pin.ctrl |
1041                                             HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1042                                 else
1043                                         val = w->wclass.pin.ctrl &
1044                                             ~HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1045                                 if (val == w->wclass.pin.ctrl)
1046                                         continue;
1047                                 w->wclass.pin.ctrl = val;
1048                                 hdac_command(sc, HDA_CMD_SET_PIN_WIDGET_CTRL(
1049                                     cad, w->nid, w->wclass.pin.ctrl), cad);
1050                         }
1051                 }
1052                 break;
1053         case HDAC_HP_SWITCH_DEBUG:
1054                 if (hdac_hp_switch[i].execsense != -1)
1055                         hdac_command(sc,
1056                             HDA_CMD_SET_PIN_SENSE(cad, hdac_hp_switch[i].hpnid,
1057                             hdac_hp_switch[i].execsense), cad);
1058                 res = hdac_command(sc,
1059                     HDA_CMD_GET_PIN_SENSE(cad, hdac_hp_switch[i].hpnid), cad);
1060                 device_printf(sc->dev,
1061                     "[ 0] HDA_DEBUG: Pin sense: nid=%d res=0x%08x\n",
1062                     hdac_hp_switch[i].hpnid, res);
1063                 for (j = 0; hdac_hp_switch[i].spkrnid[j] != -1; j++) {
1064                         w = hdac_widget_get(devinfo,
1065                             hdac_hp_switch[i].spkrnid[j]);
1066                         if (w == NULL || w->type !=
1067                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
1068                                 continue;
1069                         if (hdac_hp_switch[i].execsense != -1)
1070                                 hdac_command(sc,
1071                                     HDA_CMD_SET_PIN_SENSE(cad, w->nid,
1072                                     hdac_hp_switch[i].execsense), cad);
1073                         res = hdac_command(sc,
1074                             HDA_CMD_GET_PIN_SENSE(cad, w->nid), cad);
1075                         device_printf(sc->dev,
1076                             "[%2d] HDA_DEBUG: Pin sense: nid=%d res=0x%08x\n",
1077                             j + 1, w->nid, res);
1078                 }
1079                 break;
1080         default:
1081                 break;
1082         }
1083 }
1084
1085 static void
1086 hdac_unsolicited_handler(struct hdac_codec *codec, uint32_t tag)
1087 {
1088         struct hdac_softc *sc;
1089         struct hdac_devinfo *devinfo = NULL;
1090         device_t *devlist = NULL;
1091         int devcount, i;
1092
1093         if (codec == NULL || codec->sc == NULL)
1094                 return;
1095
1096         sc = codec->sc;
1097
1098         HDA_BOOTVERBOSE(
1099                 device_printf(sc->dev, "HDA_DEBUG: Unsol Tag: 0x%08x\n", tag);
1100         );
1101
1102         device_get_children(sc->dev, &devlist, &devcount);
1103         for (i = 0; devlist != NULL && i < devcount; i++) {
1104                 devinfo = (struct hdac_devinfo *)device_get_ivars(devlist[i]);
1105                 if (devinfo != NULL && devinfo->node_type ==
1106                     HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO &&
1107                     devinfo->codec != NULL &&
1108                     devinfo->codec->cad == codec->cad) {
1109                         break;
1110                 } else
1111                         devinfo = NULL;
1112         }
1113         if (devlist != NULL)
1114                 kfree(devlist, M_TEMP);
1115
1116         if (devinfo == NULL)
1117                 return;
1118
1119         switch (tag) {
1120         case HDAC_UNSOLTAG_EVENT_HP:
1121                 hdac_hp_switch_handler(devinfo);
1122                 break;
1123         case HDAC_UNSOLTAG_EVENT_TEST:
1124                 device_printf(sc->dev, "Unsol Test!\n");
1125                 break;
1126         default:
1127                 break;
1128         }
1129 }
1130
1131 static int
1132 hdac_stream_intr(struct hdac_softc *sc, struct hdac_chan *ch)
1133 {
1134         /* XXX to be removed */
1135 #ifdef HDAC_INTR_EXTRA
1136         uint32_t res;
1137 #endif
1138
1139         if (!(ch->flags & HDAC_CHN_RUNNING))
1140                 return (0);
1141
1142         /* XXX to be removed */
1143 #ifdef HDAC_INTR_EXTRA
1144         res = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDSTS);
1145 #endif
1146
1147         /* XXX to be removed */
1148 #ifdef HDAC_INTR_EXTRA
1149         HDA_BOOTVERBOSE(
1150                 if (res & (HDAC_SDSTS_DESE | HDAC_SDSTS_FIFOE))
1151                         device_printf(sc->dev,
1152                             "PCMDIR_%s intr triggered beyond stream boundary:"
1153                             "%08x\n",
1154                             (ch->dir == PCMDIR_PLAY) ? "PLAY" : "REC", res);
1155         );
1156 #endif
1157
1158         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDSTS,
1159             HDAC_SDSTS_DESE | HDAC_SDSTS_FIFOE | HDAC_SDSTS_BCIS );
1160
1161         /* XXX to be removed */
1162 #ifdef HDAC_INTR_EXTRA
1163         if (res & HDAC_SDSTS_BCIS) {
1164 #endif
1165                 return (1);
1166         /* XXX to be removed */
1167 #ifdef HDAC_INTR_EXTRA
1168         }
1169 #endif
1170
1171         return (0);
1172 }
1173
1174 /****************************************************************************
1175  * void hdac_intr_handler(void *)
1176  *
1177  * Interrupt handler. Processes interrupts received from the hdac.
1178  ****************************************************************************/
1179 static void
1180 hdac_intr_handler(void *context)
1181 {
1182         struct hdac_softc *sc;
1183         uint32_t intsts;
1184         uint8_t rirbsts;
1185         uint32_t trigger;
1186
1187         sc = (struct hdac_softc *)context;
1188
1189         hdac_lock(sc);
1190         if (sc->polling != 0) {
1191                 hdac_unlock(sc);
1192                 return;
1193         }
1194
1195         /* Do we have anything to do? */
1196         intsts = HDAC_READ_4(&sc->mem, HDAC_INTSTS);
1197         if (!HDA_FLAG_MATCH(intsts, HDAC_INTSTS_GIS)) {
1198                 hdac_unlock(sc);
1199                 return;
1200         }
1201
1202         trigger = 0;
1203
1204         /* Was this a controller interrupt? */
1205         if (HDA_FLAG_MATCH(intsts, HDAC_INTSTS_CIS)) {
1206                 rirbsts = HDAC_READ_1(&sc->mem, HDAC_RIRBSTS);
1207                 /* Get as many responses that we can */
1208                 while (HDA_FLAG_MATCH(rirbsts, HDAC_RIRBSTS_RINTFL)) {
1209                         HDAC_WRITE_1(&sc->mem,
1210                             HDAC_RIRBSTS, HDAC_RIRBSTS_RINTFL);
1211                         if (hdac_rirb_flush(sc) != 0)
1212                                 trigger |= HDAC_TRIGGER_UNSOL;
1213                         rirbsts = HDAC_READ_1(&sc->mem, HDAC_RIRBSTS);
1214                 }
1215                 /* XXX to be removed */
1216                 /* Clear interrupt and exit */
1217 #ifdef HDAC_INTR_EXTRA
1218                 HDAC_WRITE_4(&sc->mem, HDAC_INTSTS, HDAC_INTSTS_CIS);
1219 #endif
1220         }
1221
1222         if (intsts & HDAC_INTSTS_SIS_MASK) {
1223                 if ((intsts & (1 << sc->num_iss)) &&
1224                     hdac_stream_intr(sc, &sc->play) != 0)
1225                         trigger |= HDAC_TRIGGER_PLAY;
1226                 if ((intsts & (1 << 0)) &&
1227                     hdac_stream_intr(sc, &sc->rec) != 0)
1228                         trigger |= HDAC_TRIGGER_REC;
1229                 /* XXX to be removed */
1230 #ifdef HDAC_INTR_EXTRA
1231                 HDAC_WRITE_4(&sc->mem, HDAC_INTSTS, intsts &
1232                     HDAC_INTSTS_SIS_MASK);
1233 #endif
1234         }
1235
1236         hdac_unlock(sc);
1237
1238         if (trigger & HDAC_TRIGGER_PLAY)
1239                 chn_intr(sc->play.c);
1240         if (trigger & HDAC_TRIGGER_REC)
1241                 chn_intr(sc->rec.c);
1242         if (trigger & HDAC_TRIGGER_UNSOL)
1243                 taskqueue_enqueue(taskqueue_swi, &sc->unsolq_task);
1244 }
1245
1246 /****************************************************************************
1247  * int hdac_reset(hdac_softc *)
1248  *
1249  * Reset the hdac to a quiescent and known state.
1250  ****************************************************************************/
1251 static int
1252 hdac_reset(struct hdac_softc *sc)
1253 {
1254         uint32_t gctl;
1255         int count, i;
1256
1257         /*
1258          * Stop all Streams DMA engine
1259          */
1260         for (i = 0; i < sc->num_iss; i++)
1261                 HDAC_WRITE_4(&sc->mem, HDAC_ISDCTL(sc, i), 0x0);
1262         for (i = 0; i < sc->num_oss; i++)
1263                 HDAC_WRITE_4(&sc->mem, HDAC_OSDCTL(sc, i), 0x0);
1264         for (i = 0; i < sc->num_bss; i++)
1265                 HDAC_WRITE_4(&sc->mem, HDAC_BSDCTL(sc, i), 0x0);
1266
1267         /*
1268          * Stop Control DMA engines.
1269          */
1270         HDAC_WRITE_1(&sc->mem, HDAC_CORBCTL, 0x0);
1271         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, 0x0);
1272
1273         /*
1274          * Reset DMA position buffer.
1275          */
1276         HDAC_WRITE_4(&sc->mem, HDAC_DPIBLBASE, 0x0);
1277         HDAC_WRITE_4(&sc->mem, HDAC_DPIBUBASE, 0x0);
1278
1279         /*
1280          * Reset the controller. The reset must remain asserted for
1281          * a minimum of 100us.
1282          */
1283         gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1284         HDAC_WRITE_4(&sc->mem, HDAC_GCTL, gctl & ~HDAC_GCTL_CRST);
1285         count = 10000;
1286         do {
1287                 gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1288                 if (!(gctl & HDAC_GCTL_CRST))
1289                         break;
1290                 DELAY(10);
1291         } while (--count);
1292         if (gctl & HDAC_GCTL_CRST) {
1293                 device_printf(sc->dev, "Unable to put hdac in reset\n");
1294                 return (ENXIO);
1295         }
1296         DELAY(100);
1297         gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1298         HDAC_WRITE_4(&sc->mem, HDAC_GCTL, gctl | HDAC_GCTL_CRST);
1299         count = 10000;
1300         do {
1301                 gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1302                 if (gctl & HDAC_GCTL_CRST)
1303                         break;
1304                 DELAY(10);
1305         } while (--count);
1306         if (!(gctl & HDAC_GCTL_CRST)) {
1307                 device_printf(sc->dev, "Device stuck in reset\n");
1308                 return (ENXIO);
1309         }
1310
1311         /*
1312          * Wait for codecs to finish their own reset sequence. The delay here
1313          * should be of 250us but for some reasons, on it's not enough on my
1314          * computer. Let's use twice as much as necessary to make sure that
1315          * it's reset properly.
1316          */
1317         DELAY(1000);
1318
1319         return (0);
1320 }
1321
1322
1323 /****************************************************************************
1324  * int hdac_get_capabilities(struct hdac_softc *);
1325  *
1326  * Retreive the general capabilities of the hdac;
1327  *      Number of Input Streams
1328  *      Number of Output Streams
1329  *      Number of bidirectional Streams
1330  *      64bit ready
1331  *      CORB and RIRB sizes
1332  ****************************************************************************/
1333 static int
1334 hdac_get_capabilities(struct hdac_softc *sc)
1335 {
1336         uint16_t gcap;
1337         uint8_t corbsize, rirbsize;
1338
1339         gcap = HDAC_READ_2(&sc->mem, HDAC_GCAP);
1340         sc->num_iss = HDAC_GCAP_ISS(gcap);
1341         sc->num_oss = HDAC_GCAP_OSS(gcap);
1342         sc->num_bss = HDAC_GCAP_BSS(gcap);
1343
1344         sc->support_64bit = HDA_FLAG_MATCH(gcap, HDAC_GCAP_64OK);
1345
1346         corbsize = HDAC_READ_1(&sc->mem, HDAC_CORBSIZE);
1347         if ((corbsize & HDAC_CORBSIZE_CORBSZCAP_256) ==
1348             HDAC_CORBSIZE_CORBSZCAP_256)
1349                 sc->corb_size = 256;
1350         else if ((corbsize & HDAC_CORBSIZE_CORBSZCAP_16) ==
1351             HDAC_CORBSIZE_CORBSZCAP_16)
1352                 sc->corb_size = 16;
1353         else if ((corbsize & HDAC_CORBSIZE_CORBSZCAP_2) ==
1354             HDAC_CORBSIZE_CORBSZCAP_2)
1355                 sc->corb_size = 2;
1356         else {
1357                 device_printf(sc->dev, "%s: Invalid corb size (%x)\n",
1358                     __func__, corbsize);
1359                 return (ENXIO);
1360         }
1361
1362         rirbsize = HDAC_READ_1(&sc->mem, HDAC_RIRBSIZE);
1363         if ((rirbsize & HDAC_RIRBSIZE_RIRBSZCAP_256) ==
1364             HDAC_RIRBSIZE_RIRBSZCAP_256)
1365                 sc->rirb_size = 256;
1366         else if ((rirbsize & HDAC_RIRBSIZE_RIRBSZCAP_16) ==
1367             HDAC_RIRBSIZE_RIRBSZCAP_16)
1368                 sc->rirb_size = 16;
1369         else if ((rirbsize & HDAC_RIRBSIZE_RIRBSZCAP_2) ==
1370             HDAC_RIRBSIZE_RIRBSZCAP_2)
1371                 sc->rirb_size = 2;
1372         else {
1373                 device_printf(sc->dev, "%s: Invalid rirb size (%x)\n",
1374                     __func__, rirbsize);
1375                 return (ENXIO);
1376         }
1377
1378         return (0);
1379 }
1380
1381
1382 /****************************************************************************
1383  * void hdac_dma_cb
1384  *
1385  * This function is called by bus_dmamap_load when the mapping has been
1386  * established. We just record the physical address of the mapping into
1387  * the struct hdac_dma passed in.
1388  ****************************************************************************/
1389 static void
1390 hdac_dma_cb(void *callback_arg, bus_dma_segment_t *segs, int nseg, int error)
1391 {
1392         struct hdac_dma *dma;
1393
1394         if (error == 0) {
1395                 dma = (struct hdac_dma *)callback_arg;
1396                 dma->dma_paddr = segs[0].ds_addr;
1397         }
1398 }
1399
1400
1401 /****************************************************************************
1402  * int hdac_dma_alloc
1403  *
1404  * This function allocate and setup a dma region (struct hdac_dma).
1405  * It must be freed by a corresponding hdac_dma_free.
1406  ****************************************************************************/
1407 static int
1408 hdac_dma_alloc(struct hdac_softc *sc, struct hdac_dma *dma, bus_size_t size)
1409 {
1410         bus_size_t roundsz;
1411         int result;
1412         bus_addr_t lowaddr;
1413
1414         roundsz = roundup2(size, HDAC_DMA_ALIGNMENT);
1415         lowaddr = (sc->support_64bit) ? BUS_SPACE_MAXADDR :
1416             BUS_SPACE_MAXADDR_32BIT;
1417         bzero(dma, sizeof(*dma));
1418
1419         /*
1420          * Create a DMA tag
1421          */
1422         result = bus_dma_tag_create(NULL,       /* parent */
1423             HDAC_DMA_ALIGNMENT,                 /* alignment */
1424             0,                                  /* boundary */
1425             lowaddr,                            /* lowaddr */
1426             BUS_SPACE_MAXADDR,                  /* highaddr */
1427             NULL,                               /* filtfunc */
1428             NULL,                               /* fistfuncarg */
1429             roundsz,                            /* maxsize */
1430             1,                                  /* nsegments */
1431             roundsz,                            /* maxsegsz */
1432             0,                                  /* flags */
1433             &dma->dma_tag);                     /* dmat */
1434         if (result != 0) {
1435                 device_printf(sc->dev, "%s: bus_dma_tag_create failed (%x)\n",
1436                     __func__, result);
1437                 goto hdac_dma_alloc_fail;
1438         }
1439
1440         /*
1441          * Allocate DMA memory
1442          */
1443 #if 0 /* TODO: No uncacheable DMA support in DragonFly. */
1444         result = bus_dmamem_alloc(dma->dma_tag, (void **)&dma->dma_vaddr,
1445             BUS_DMA_NOWAIT | BUS_DMA_ZERO |
1446             ((sc->flags & HDAC_F_DMA_NOCACHE) ? BUS_DMA_NOCACHE : 0),
1447             &dma->dma_map);
1448 #else
1449         result = bus_dmamem_alloc(dma->dma_tag, (void **)&dma->dma_vaddr,
1450             BUS_DMA_NOWAIT | BUS_DMA_ZERO, &dma->dma_map);
1451 #endif
1452         if (result != 0) {
1453                 device_printf(sc->dev, "%s: bus_dmamem_alloc failed (%x)\n",
1454                     __func__, result);
1455                 goto hdac_dma_alloc_fail;
1456         }
1457
1458         dma->dma_size = roundsz;
1459
1460         /*
1461          * Map the memory
1462          */
1463         result = bus_dmamap_load(dma->dma_tag, dma->dma_map,
1464             (void *)dma->dma_vaddr, roundsz, hdac_dma_cb, (void *)dma, 0);
1465         if (result != 0 || dma->dma_paddr == 0) {
1466                 if (result == 0)
1467                         result = ENOMEM;
1468                 device_printf(sc->dev, "%s: bus_dmamem_load failed (%x)\n",
1469                     __func__, result);
1470                 goto hdac_dma_alloc_fail;
1471         }
1472
1473         HDA_BOOTVERBOSE(
1474                 device_printf(sc->dev, "%s: size=%ju -> roundsz=%ju\n",
1475                     __func__, (uintmax_t)size, (uintmax_t)roundsz);
1476         );
1477
1478         return (0);
1479
1480 hdac_dma_alloc_fail:
1481         hdac_dma_free(sc, dma);
1482
1483         return (result);
1484 }
1485
1486
1487 /****************************************************************************
1488  * void hdac_dma_free(struct hdac_softc *, struct hdac_dma *)
1489  *
1490  * Free a struct dhac_dma that has been previously allocated via the
1491  * hdac_dma_alloc function.
1492  ****************************************************************************/
1493 static void
1494 hdac_dma_free(struct hdac_softc *sc, struct hdac_dma *dma)
1495 {
1496         if (dma->dma_map != NULL) {
1497 #if 0
1498                 /* Flush caches */
1499                 bus_dmamap_sync(dma->dma_tag, dma->dma_map,
1500                     BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1501 #endif
1502                 bus_dmamap_unload(dma->dma_tag, dma->dma_map);
1503         }
1504         if (dma->dma_vaddr != NULL) {
1505                 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
1506                 dma->dma_vaddr = NULL;
1507         }
1508         dma->dma_map = NULL;
1509         if (dma->dma_tag != NULL) {
1510                 bus_dma_tag_destroy(dma->dma_tag);
1511                 dma->dma_tag = NULL;
1512         }
1513         dma->dma_size = 0;
1514 }
1515
1516 /****************************************************************************
1517  * int hdac_mem_alloc(struct hdac_softc *)
1518  *
1519  * Allocate all the bus resources necessary to speak with the physical
1520  * controller.
1521  ****************************************************************************/
1522 static int
1523 hdac_mem_alloc(struct hdac_softc *sc)
1524 {
1525         struct hdac_mem *mem;
1526
1527         mem = &sc->mem;
1528         mem->mem_rid = PCIR_BAR(0);
1529         mem->mem_res = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY,
1530             &mem->mem_rid, RF_ACTIVE);
1531         if (mem->mem_res == NULL) {
1532                 device_printf(sc->dev,
1533                     "%s: Unable to allocate memory resource\n", __func__);
1534                 return (ENOMEM);
1535         }
1536         mem->mem_tag = rman_get_bustag(mem->mem_res);
1537         mem->mem_handle = rman_get_bushandle(mem->mem_res);
1538
1539         return (0);
1540 }
1541
1542 /****************************************************************************
1543  * void hdac_mem_free(struct hdac_softc *)
1544  *
1545  * Free up resources previously allocated by hdac_mem_alloc.
1546  ****************************************************************************/
1547 static void
1548 hdac_mem_free(struct hdac_softc *sc)
1549 {
1550         struct hdac_mem *mem;
1551
1552         mem = &sc->mem;
1553         if (mem->mem_res != NULL)
1554                 bus_release_resource(sc->dev, SYS_RES_MEMORY, mem->mem_rid,
1555                     mem->mem_res);
1556         mem->mem_res = NULL;
1557 }
1558
1559 /****************************************************************************
1560  * int hdac_irq_alloc(struct hdac_softc *)
1561  *
1562  * Allocate and setup the resources necessary for interrupt handling.
1563  ****************************************************************************/
1564 static int
1565 hdac_irq_alloc(struct hdac_softc *sc)
1566 {
1567         struct hdac_irq *irq;
1568         int result;
1569         u_int irq_flags;
1570
1571         irq = &sc->irq;
1572         irq->irq_rid = 0x0;
1573         irq->irq_type = pci_alloc_1intr(sc->dev, hdac_msi_enable,
1574             &irq->irq_rid, &irq_flags);
1575         irq->irq_res = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ,
1576             &irq->irq_rid, irq_flags);
1577         if (irq->irq_res == NULL) {
1578                 device_printf(sc->dev, "%s: Unable to allocate irq\n",
1579                     __func__);
1580                 goto hdac_irq_alloc_fail;
1581         }
1582         result = snd_setup_intr(sc->dev, irq->irq_res, INTR_MPSAFE,
1583             hdac_intr_handler, sc, &irq->irq_handle);
1584         if (result != 0) {
1585                 device_printf(sc->dev,
1586                     "%s: Unable to setup interrupt handler (%x)\n",
1587                     __func__, result);
1588                 goto hdac_irq_alloc_fail;
1589         }
1590
1591         return (0);
1592
1593 hdac_irq_alloc_fail:
1594         hdac_irq_free(sc);
1595
1596         return (ENXIO);
1597 }
1598
1599 /****************************************************************************
1600  * void hdac_irq_free(struct hdac_softc *)
1601  *
1602  * Free up resources previously allocated by hdac_irq_alloc.
1603  ****************************************************************************/
1604 static void
1605 hdac_irq_free(struct hdac_softc *sc)
1606 {
1607         struct hdac_irq *irq;
1608
1609         irq = &sc->irq;
1610         if (irq->irq_res != NULL && irq->irq_handle != NULL)
1611                 bus_teardown_intr(sc->dev, irq->irq_res, irq->irq_handle);
1612         if (irq->irq_res != NULL)
1613                 bus_release_resource(sc->dev, SYS_RES_IRQ, irq->irq_rid,
1614                     irq->irq_res);
1615         if (irq->irq_type == PCI_INTR_TYPE_MSI)
1616                 pci_release_msi(sc->dev);
1617         irq->irq_handle = NULL;
1618         irq->irq_res = NULL;
1619         irq->irq_rid = 0x0;
1620 }
1621
1622 /****************************************************************************
1623  * void hdac_corb_init(struct hdac_softc *)
1624  *
1625  * Initialize the corb registers for operations but do not start it up yet.
1626  * The CORB engine must not be running when this function is called.
1627  ****************************************************************************/
1628 static void
1629 hdac_corb_init(struct hdac_softc *sc)
1630 {
1631         uint8_t corbsize;
1632         uint64_t corbpaddr;
1633
1634         /* Setup the CORB size. */
1635         switch (sc->corb_size) {
1636         case 256:
1637                 corbsize = HDAC_CORBSIZE_CORBSIZE(HDAC_CORBSIZE_CORBSIZE_256);
1638                 break;
1639         case 16:
1640                 corbsize = HDAC_CORBSIZE_CORBSIZE(HDAC_CORBSIZE_CORBSIZE_16);
1641                 break;
1642         case 2:
1643                 corbsize = HDAC_CORBSIZE_CORBSIZE(HDAC_CORBSIZE_CORBSIZE_2);
1644                 break;
1645         default:
1646                 panic("%s: Invalid CORB size (%x)", __func__, sc->corb_size);
1647         }
1648         HDAC_WRITE_1(&sc->mem, HDAC_CORBSIZE, corbsize);
1649
1650         /* Setup the CORB Address in the hdac */
1651         corbpaddr = (uint64_t)sc->corb_dma.dma_paddr;
1652         HDAC_WRITE_4(&sc->mem, HDAC_CORBLBASE, (uint32_t)corbpaddr);
1653         HDAC_WRITE_4(&sc->mem, HDAC_CORBUBASE, (uint32_t)(corbpaddr >> 32));
1654
1655         /* Set the WP and RP */
1656         sc->corb_wp = 0;
1657         HDAC_WRITE_2(&sc->mem, HDAC_CORBWP, sc->corb_wp);
1658         HDAC_WRITE_2(&sc->mem, HDAC_CORBRP, HDAC_CORBRP_CORBRPRST);
1659         /*
1660          * The HDA specification indicates that the CORBRPRST bit will always
1661          * read as zero. Unfortunately, it seems that at least the 82801G
1662          * doesn't reset the bit to zero, which stalls the corb engine.
1663          * manually reset the bit to zero before continuing.
1664          */
1665         HDAC_WRITE_2(&sc->mem, HDAC_CORBRP, 0x0);
1666
1667         /* Enable CORB error reporting */
1668 #if 0
1669         HDAC_WRITE_1(&sc->mem, HDAC_CORBCTL, HDAC_CORBCTL_CMEIE);
1670 #endif
1671 }
1672
1673 /****************************************************************************
1674  * void hdac_rirb_init(struct hdac_softc *)
1675  *
1676  * Initialize the rirb registers for operations but do not start it up yet.
1677  * The RIRB engine must not be running when this function is called.
1678  ****************************************************************************/
1679 static void
1680 hdac_rirb_init(struct hdac_softc *sc)
1681 {
1682         uint8_t rirbsize;
1683         uint64_t rirbpaddr;
1684
1685         /* Setup the RIRB size. */
1686         switch (sc->rirb_size) {
1687         case 256:
1688                 rirbsize = HDAC_RIRBSIZE_RIRBSIZE(HDAC_RIRBSIZE_RIRBSIZE_256);
1689                 break;
1690         case 16:
1691                 rirbsize = HDAC_RIRBSIZE_RIRBSIZE(HDAC_RIRBSIZE_RIRBSIZE_16);
1692                 break;
1693         case 2:
1694                 rirbsize = HDAC_RIRBSIZE_RIRBSIZE(HDAC_RIRBSIZE_RIRBSIZE_2);
1695                 break;
1696         default:
1697                 panic("%s: Invalid RIRB size (%x)", __func__, sc->rirb_size);
1698         }
1699         HDAC_WRITE_1(&sc->mem, HDAC_RIRBSIZE, rirbsize);
1700
1701         /* Setup the RIRB Address in the hdac */
1702         rirbpaddr = (uint64_t)sc->rirb_dma.dma_paddr;
1703         HDAC_WRITE_4(&sc->mem, HDAC_RIRBLBASE, (uint32_t)rirbpaddr);
1704         HDAC_WRITE_4(&sc->mem, HDAC_RIRBUBASE, (uint32_t)(rirbpaddr >> 32));
1705
1706         /* Setup the WP and RP */
1707         sc->rirb_rp = 0;
1708         HDAC_WRITE_2(&sc->mem, HDAC_RIRBWP, HDAC_RIRBWP_RIRBWPRST);
1709
1710         if (sc->polling == 0) {
1711                 /* Setup the interrupt threshold */
1712                 HDAC_WRITE_2(&sc->mem, HDAC_RINTCNT, sc->rirb_size / 2);
1713
1714                 /* Enable Overrun and response received reporting */
1715 #if 0
1716                 HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL,
1717                     HDAC_RIRBCTL_RIRBOIC | HDAC_RIRBCTL_RINTCTL);
1718 #else
1719                 HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, HDAC_RIRBCTL_RINTCTL);
1720 #endif
1721         }
1722
1723 #if 0
1724         /*
1725          * Make sure that the Host CPU cache doesn't contain any dirty
1726          * cache lines that falls in the rirb. If I understood correctly, it
1727          * should be sufficient to do this only once as the rirb is purely
1728          * read-only from now on.
1729          */
1730         bus_dmamap_sync(sc->rirb_dma.dma_tag, sc->rirb_dma.dma_map,
1731             BUS_DMASYNC_PREREAD);
1732 #endif
1733 }
1734
1735 /****************************************************************************
1736  * void hdac_corb_start(hdac_softc *)
1737  *
1738  * Startup the corb DMA engine
1739  ****************************************************************************/
1740 static void
1741 hdac_corb_start(struct hdac_softc *sc)
1742 {
1743         uint32_t corbctl;
1744
1745         corbctl = HDAC_READ_1(&sc->mem, HDAC_CORBCTL);
1746         corbctl |= HDAC_CORBCTL_CORBRUN;
1747         HDAC_WRITE_1(&sc->mem, HDAC_CORBCTL, corbctl);
1748 }
1749
1750 /****************************************************************************
1751  * void hdac_rirb_start(hdac_softc *)
1752  *
1753  * Startup the rirb DMA engine
1754  ****************************************************************************/
1755 static void
1756 hdac_rirb_start(struct hdac_softc *sc)
1757 {
1758         uint32_t rirbctl;
1759
1760         rirbctl = HDAC_READ_1(&sc->mem, HDAC_RIRBCTL);
1761         rirbctl |= HDAC_RIRBCTL_RIRBDMAEN;
1762         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, rirbctl);
1763 }
1764
1765
1766 /****************************************************************************
1767  * void hdac_scan_codecs(struct hdac_softc *, int)
1768  *
1769  * Scan the bus for available codecs, starting with num.
1770  ****************************************************************************/
1771 static void
1772 hdac_scan_codecs(struct hdac_softc *sc, int num)
1773 {
1774         struct hdac_codec *codec;
1775         int i;
1776         uint16_t statests;
1777
1778         if (num < 0)
1779                 num = 0;
1780         if (num >= HDAC_CODEC_MAX)
1781                 num = HDAC_CODEC_MAX - 1;
1782
1783         statests = HDAC_READ_2(&sc->mem, HDAC_STATESTS);
1784         for (i = num; i < HDAC_CODEC_MAX; i++) {
1785                 if (HDAC_STATESTS_SDIWAKE(statests, i)) {
1786                         /* We have found a codec. */
1787                         codec = kmalloc(sizeof(*codec), M_HDAC,
1788                                         M_ZERO | M_WAITOK);
1789                         codec->commands = NULL;
1790                         codec->responses_received = 0;
1791                         codec->verbs_sent = 0;
1792                         codec->sc = sc;
1793                         codec->cad = i;
1794                         sc->codecs[i] = codec;
1795                         if (hdac_probe_codec(codec) != 0)
1796                                 break;
1797                 }
1798         }
1799         /* All codecs have been probed, now try to attach drivers to them */
1800         /* bus_generic_attach(sc->dev); */
1801 }
1802
1803 /****************************************************************************
1804  * void hdac_probe_codec(struct hdac_softc *, int)
1805  *
1806  * Probe a the given codec_id for available function groups.
1807  ****************************************************************************/
1808 static int
1809 hdac_probe_codec(struct hdac_codec *codec)
1810 {
1811         struct hdac_softc *sc = codec->sc;
1812         struct hdac_devinfo *devinfo;
1813         uint32_t vendorid, revisionid, subnode;
1814         int startnode;
1815         int endnode;
1816         int i;
1817         nid_t cad = codec->cad;
1818
1819         HDA_BOOTVERBOSE(
1820                 device_printf(sc->dev, "HDA_DEBUG: Probing codec: %d\n", cad);
1821         );
1822         vendorid = hdac_command(sc,
1823             HDA_CMD_GET_PARAMETER(cad, 0x0, HDA_PARAM_VENDOR_ID),
1824             cad);
1825         revisionid = hdac_command(sc,
1826             HDA_CMD_GET_PARAMETER(cad, 0x0, HDA_PARAM_REVISION_ID),
1827             cad);
1828         subnode = hdac_command(sc,
1829             HDA_CMD_GET_PARAMETER(cad, 0x0, HDA_PARAM_SUB_NODE_COUNT),
1830             cad);
1831         startnode = HDA_PARAM_SUB_NODE_COUNT_START(subnode);
1832         endnode = startnode + HDA_PARAM_SUB_NODE_COUNT_TOTAL(subnode);
1833
1834         HDA_BOOTVERBOSE(
1835                 device_printf(sc->dev, "HDA_DEBUG: \tstartnode=%d endnode=%d\n",
1836                     startnode, endnode);
1837         );
1838         for (i = startnode; i < endnode; i++) {
1839                 devinfo = hdac_probe_function(codec, i);
1840                 if (devinfo != NULL) {
1841                         /* XXX Ignore other FG. */
1842                         devinfo->vendor_id =
1843                             HDA_PARAM_VENDOR_ID_VENDOR_ID(vendorid);
1844                         devinfo->device_id =
1845                             HDA_PARAM_VENDOR_ID_DEVICE_ID(vendorid);
1846                         devinfo->revision_id =
1847                             HDA_PARAM_REVISION_ID_REVISION_ID(revisionid);
1848                         devinfo->stepping_id =
1849                             HDA_PARAM_REVISION_ID_STEPPING_ID(revisionid);
1850                         HDA_BOOTVERBOSE(
1851                                 device_printf(sc->dev,
1852                                     "HDA_DEBUG: \tFound AFG nid=%d "
1853                                     "[startnode=%d endnode=%d]\n",
1854                                     devinfo->nid, startnode, endnode);
1855                         );
1856                         return (1);
1857                 }
1858         }
1859
1860         HDA_BOOTVERBOSE(
1861                 device_printf(sc->dev, "HDA_DEBUG: \tAFG not found\n");
1862         );
1863         return (0);
1864 }
1865
1866 static struct hdac_devinfo *
1867 hdac_probe_function(struct hdac_codec *codec, nid_t nid)
1868 {
1869         struct hdac_softc *sc = codec->sc;
1870         struct hdac_devinfo *devinfo;
1871         uint32_t fctgrptype;
1872         nid_t cad = codec->cad;
1873
1874         fctgrptype = HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE(hdac_command(sc,
1875             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_FCT_GRP_TYPE), cad));
1876
1877         /* XXX For now, ignore other FG. */
1878         if (fctgrptype != HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO)
1879                 return (NULL);
1880
1881         devinfo = kmalloc(sizeof(*devinfo), M_HDAC, M_WAITOK | M_ZERO);
1882         devinfo->nid = nid;
1883         devinfo->node_type = fctgrptype;
1884         devinfo->codec = codec;
1885
1886         hdac_add_child(sc, devinfo);
1887
1888         return (devinfo);
1889 }
1890
1891 static void
1892 hdac_add_child(struct hdac_softc *sc, struct hdac_devinfo *devinfo)
1893 {
1894         devinfo->dev = device_add_child(sc->dev, NULL, -1);
1895         device_set_ivars(devinfo->dev, (void *)devinfo);
1896         /* XXX - Print more information when booting verbose??? */
1897 }
1898
1899 static void
1900 hdac_widget_connection_parse(struct hdac_widget *w)
1901 {
1902         struct hdac_softc *sc = w->devinfo->codec->sc;
1903         uint32_t res;
1904         int i, j, max, ents, entnum;
1905         nid_t cad = w->devinfo->codec->cad;
1906         nid_t nid = w->nid;
1907         nid_t cnid, addcnid, prevcnid;
1908
1909         w->nconns = 0;
1910
1911         res = hdac_command(sc,
1912             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_CONN_LIST_LENGTH), cad);
1913
1914         ents = HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH(res);
1915
1916         if (ents < 1)
1917                 return;
1918
1919         entnum = HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM(res) ? 2 : 4;
1920         max = NELEM(w->conns) - 1;
1921         prevcnid = 0;
1922
1923 #define CONN_RMASK(e)           (1 << ((32 / (e)) - 1))
1924 #define CONN_NMASK(e)           (CONN_RMASK(e) - 1)
1925 #define CONN_RESVAL(r, e, n)    ((r) >> ((32 / (e)) * (n)))
1926 #define CONN_RANGE(r, e, n)     (CONN_RESVAL(r, e, n) & CONN_RMASK(e))
1927 #define CONN_CNID(r, e, n)      (CONN_RESVAL(r, e, n) & CONN_NMASK(e))
1928
1929         for (i = 0; i < ents; i += entnum) {
1930                 res = hdac_command(sc,
1931                     HDA_CMD_GET_CONN_LIST_ENTRY(cad, nid, i), cad);
1932                 for (j = 0; j < entnum; j++) {
1933                         cnid = CONN_CNID(res, entnum, j);
1934                         if (cnid == 0) {
1935                                 if (w->nconns < ents)
1936                                         device_printf(sc->dev,
1937                                             "%s: nid=%d WARNING: zero cnid "
1938                                             "entnum=%d j=%d index=%d "
1939                                             "entries=%d found=%d res=0x%08x\n",
1940                                             __func__, nid, entnum, j, i,
1941                                             ents, w->nconns, res);
1942                                 else
1943                                         goto getconns_out;
1944                         }
1945                         if (cnid < w->devinfo->startnode ||
1946                             cnid >= w->devinfo->endnode) {
1947                                 HDA_BOOTVERBOSE(
1948                                         device_printf(sc->dev,
1949                                             "%s: GHOST: nid=%d j=%d "
1950                                             "entnum=%d index=%d res=0x%08x\n",
1951                                             __func__, nid, j, entnum, i, res);
1952                                 );
1953                         }
1954                         if (CONN_RANGE(res, entnum, j) == 0)
1955                                 addcnid = cnid;
1956                         else if (prevcnid == 0 || prevcnid >= cnid) {
1957                                 device_printf(sc->dev,
1958                                     "%s: WARNING: Invalid child range "
1959                                     "nid=%d index=%d j=%d entnum=%d "
1960                                     "prevcnid=%d cnid=%d res=0x%08x\n",
1961                                     __func__, nid, i, j, entnum, prevcnid,
1962                                     cnid, res);
1963                                 addcnid = cnid;
1964                         } else
1965                                 addcnid = prevcnid + 1;
1966                         while (addcnid <= cnid) {
1967                                 if (w->nconns > max) {
1968                                         device_printf(sc->dev,
1969                                             "%s: nid=%d: Adding %d: "
1970                                             "Max connection reached! max=%d\n",
1971                                             __func__, nid, addcnid, max + 1);
1972                                         goto getconns_out;
1973                                 }
1974                                 w->conns[w->nconns++] = addcnid++;
1975                         }
1976                         prevcnid = cnid;
1977                 }
1978         }
1979
1980 getconns_out:
1981         HDA_BOOTVERBOSE(
1982                 device_printf(sc->dev,
1983                     "HDA_DEBUG: %s: nid=%d entries=%d found=%d\n",
1984                     __func__, nid, ents, w->nconns);
1985         );
1986         return;
1987 }
1988
1989 static uint32_t
1990 hdac_widget_pin_getconfig(struct hdac_widget *w)
1991 {
1992         struct hdac_softc *sc;
1993         uint32_t config, orig, id;
1994         nid_t cad, nid;
1995
1996         sc = w->devinfo->codec->sc;
1997         cad = w->devinfo->codec->cad;
1998         nid = w->nid;
1999         id = hdac_codec_id(w->devinfo);
2000
2001         config = hdac_command(sc,
2002             HDA_CMD_GET_CONFIGURATION_DEFAULT(cad, nid),
2003             cad);
2004         orig = config;
2005
2006         /*
2007          * XXX REWRITE!!!! Don't argue!
2008          */
2009         if (id == HDA_CODEC_ALC880 && sc->pci_subvendor == LG_LW20_SUBVENDOR) {
2010                 switch (nid) {
2011                 case 26:
2012                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2013                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2014                         break;
2015                 case 27:
2016                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2017                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT;
2018                         break;
2019                 default:
2020                         break;
2021                 }
2022         } else if (id == HDA_CODEC_ALC880 &&
2023             (sc->pci_subvendor == CLEVO_D900T_SUBVENDOR ||
2024             sc->pci_subvendor == ASUS_M5200_SUBVENDOR)) {
2025                 /*
2026                  * Super broken BIOS
2027                  */
2028                 switch (nid) {
2029                 case 20:
2030                         break;
2031                 case 21:
2032                         break;
2033                 case 22:
2034                         break;
2035                 case 23:
2036                         break;
2037                 case 24:        /* MIC1 */
2038                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2039                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN;
2040                         break;
2041                 case 25:        /* XXX MIC2 */
2042                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2043                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN;
2044                         break;
2045                 case 26:        /* LINE1 */
2046                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2047                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2048                         break;
2049                 case 27:        /* XXX LINE2 */
2050                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2051                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2052                         break;
2053                 case 28:        /* CD */
2054                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2055                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_CD;
2056                         break;
2057                 case 30:
2058                         break;
2059                 case 31:
2060                         break;
2061                 default:
2062                         break;
2063                 }
2064         } else if (id == HDA_CODEC_ALC883 &&
2065             (sc->pci_subvendor == MSI_MS034A_SUBVENDOR ||
2066             HDA_DEV_MATCH(ACER_ALL_SUBVENDOR, sc->pci_subvendor))) {
2067                 switch (nid) {
2068                 case 25:
2069                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2070                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2071                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN |
2072                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2073                         break;
2074                 case 28:
2075                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2076                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2077                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_CD |
2078                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2079                         break;
2080                 default:
2081                         break;
2082                 }
2083         } else if (id == HDA_CODEC_CXVENICE && sc->pci_subvendor ==
2084             HP_V3000_SUBVENDOR) {
2085                 switch (nid) {
2086                 case 18:
2087                         config &= ~HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK;
2088                         config |= HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE;
2089                         break;
2090                 case 20:
2091                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2092                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2093                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN |
2094                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2095                         break;
2096                 case 21:
2097                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2098                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2099                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_CD |
2100                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2101                         break;
2102                 default:
2103                         break;
2104                 }
2105         } else if (id == HDA_CODEC_CXWAIKIKI && sc->pci_subvendor ==
2106             HP_DV5000_SUBVENDOR) {
2107                 switch (nid) {
2108                 case 20:
2109                 case 21:
2110                         config &= ~HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK;
2111                         config |= HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE;
2112                         break;
2113                 default:
2114                         break;
2115                 }
2116         } else if (id == HDA_CODEC_ALC861 && sc->pci_subvendor ==
2117             ASUS_W6F_SUBVENDOR) {
2118                 switch (nid) {
2119                 case 11:
2120                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2121                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2122                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT |
2123                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2124                         break;
2125                 case 15:
2126                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2127                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2128                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT |
2129                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK);
2130                         break;
2131                 default:
2132                         break;
2133                 }
2134         } else if (id == HDA_CODEC_ALC861 && sc->pci_subvendor ==
2135             UNIWILL_9075_SUBVENDOR) {
2136                 switch (nid) {
2137                 case 15:
2138                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2139                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2140                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT |
2141                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK);
2142                         break;
2143                 default:
2144                         break;
2145                 }
2146         } else if (id == HDA_CODEC_AD1986A &&
2147             (sc->pci_subvendor == ASUS_M2NPVMX_SUBVENDOR ||
2148             sc->pci_subvendor == ASUS_A8NVMCSM_SUBVENDOR)) {
2149                 switch (nid) {
2150                 case 28:        /* LINE */
2151                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2152                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2153                         break;
2154                 case 29:        /* MIC */
2155                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2156                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN;
2157                         break;
2158                 default:
2159                         break;
2160                 }
2161         }
2162
2163         HDA_BOOTVERBOSE(
2164                 if (config != orig)
2165                         device_printf(sc->dev,
2166                             "HDA_DEBUG: Pin config nid=%u 0x%08x -> 0x%08x\n",
2167                             nid, orig, config);
2168         );
2169
2170         return (config);
2171 }
2172
2173 static uint32_t
2174 hdac_widget_pin_getcaps(struct hdac_widget *w)
2175 {
2176         struct hdac_softc *sc;
2177         uint32_t caps, orig, id;
2178         nid_t cad, nid;
2179
2180         sc = w->devinfo->codec->sc;
2181         cad = w->devinfo->codec->cad;
2182         nid = w->nid;
2183         id = hdac_codec_id(w->devinfo);
2184
2185         caps = hdac_command(sc,
2186             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_PIN_CAP), cad);
2187         orig = caps;
2188
2189         HDA_BOOTVERBOSE(
2190                 if (caps != orig)
2191                         device_printf(sc->dev,
2192                             "HDA_DEBUG: Pin caps nid=%u 0x%08x -> 0x%08x\n",
2193                             nid, orig, caps);
2194         );
2195
2196         return (caps);
2197 }
2198
2199 static void
2200 hdac_widget_pin_parse(struct hdac_widget *w)
2201 {
2202         struct hdac_softc *sc = w->devinfo->codec->sc;
2203         uint32_t config, pincap;
2204         char *devstr, *connstr;
2205         nid_t cad = w->devinfo->codec->cad;
2206         nid_t nid = w->nid;
2207
2208         config = hdac_widget_pin_getconfig(w);
2209         w->wclass.pin.config = config;
2210
2211         pincap = hdac_widget_pin_getcaps(w);
2212         w->wclass.pin.cap = pincap;
2213
2214         w->wclass.pin.ctrl = hdac_command(sc,
2215             HDA_CMD_GET_PIN_WIDGET_CTRL(cad, nid), cad) &
2216             ~(HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE |
2217             HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE |
2218             HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE |
2219             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK);
2220
2221         if (HDA_PARAM_PIN_CAP_HEADPHONE_CAP(pincap))
2222                 w->wclass.pin.ctrl |= HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE;
2223         if (HDA_PARAM_PIN_CAP_OUTPUT_CAP(pincap))
2224                 w->wclass.pin.ctrl |= HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
2225         if (HDA_PARAM_PIN_CAP_INPUT_CAP(pincap))
2226                 w->wclass.pin.ctrl |= HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE;
2227         if (HDA_PARAM_PIN_CAP_EAPD_CAP(pincap)) {
2228                 w->param.eapdbtl = hdac_command(sc,
2229                     HDA_CMD_GET_EAPD_BTL_ENABLE(cad, nid), cad);
2230                 w->param.eapdbtl &= 0x7;
2231                 w->param.eapdbtl |= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
2232         } else
2233                 w->param.eapdbtl = HDAC_INVALID;
2234
2235         switch (config & HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) {
2236         case HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT:
2237                 devstr = "line out";
2238                 break;
2239         case HDA_CONFIG_DEFAULTCONF_DEVICE_SPEAKER:
2240                 devstr = "speaker";
2241                 break;
2242         case HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT:
2243                 devstr = "headphones out";
2244                 break;
2245         case HDA_CONFIG_DEFAULTCONF_DEVICE_CD:
2246                 devstr = "CD";
2247                 break;
2248         case HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_OUT:
2249                 devstr = "SPDIF out";
2250                 break;
2251         case HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_OUT:
2252                 devstr = "digital (other) out";
2253                 break;
2254         case HDA_CONFIG_DEFAULTCONF_DEVICE_MODEM_LINE:
2255                 devstr = "modem, line side";
2256                 break;
2257         case HDA_CONFIG_DEFAULTCONF_DEVICE_MODEM_HANDSET:
2258                 devstr = "modem, handset side";
2259                 break;
2260         case HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN:
2261                 devstr = "line in";
2262                 break;
2263         case HDA_CONFIG_DEFAULTCONF_DEVICE_AUX:
2264                 devstr = "AUX";
2265                 break;
2266         case HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN:
2267                 devstr = "Mic in";
2268                 break;
2269         case HDA_CONFIG_DEFAULTCONF_DEVICE_TELEPHONY:
2270                 devstr = "telephony";
2271                 break;
2272         case HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_IN:
2273                 devstr = "SPDIF in";
2274                 break;
2275         case HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_IN:
2276                 devstr = "digital (other) in";
2277                 break;
2278         case HDA_CONFIG_DEFAULTCONF_DEVICE_OTHER:
2279                 devstr = "other";
2280                 break;
2281         default:
2282                 devstr = "unknown";
2283                 break;
2284         }
2285
2286         switch (config & HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) {
2287         case HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK:
2288                 connstr = "jack";
2289                 break;
2290         case HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE:
2291                 connstr = "none";
2292                 break;
2293         case HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED:
2294                 connstr = "fixed";
2295                 break;
2296         case HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_BOTH:
2297                 connstr = "jack / fixed";
2298                 break;
2299         default:
2300                 connstr = "unknown";
2301                 break;
2302         }
2303
2304         strlcat(w->name, ": ", sizeof(w->name));
2305         strlcat(w->name, devstr, sizeof(w->name));
2306         strlcat(w->name, " (", sizeof(w->name));
2307         strlcat(w->name, connstr, sizeof(w->name));
2308         strlcat(w->name, ")", sizeof(w->name));
2309 }
2310
2311 static void
2312 hdac_widget_parse(struct hdac_widget *w)
2313 {
2314         struct hdac_softc *sc = w->devinfo->codec->sc;
2315         uint32_t wcap, cap;
2316         char *typestr;
2317         nid_t cad = w->devinfo->codec->cad;
2318         nid_t nid = w->nid;
2319
2320         wcap = hdac_command(sc,
2321             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_AUDIO_WIDGET_CAP),
2322             cad);
2323         w->param.widget_cap = wcap;
2324         w->type = HDA_PARAM_AUDIO_WIDGET_CAP_TYPE(wcap);
2325
2326         switch (w->type) {
2327         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT:
2328                 typestr = "audio output";
2329                 break;
2330         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT:
2331                 typestr = "audio input";
2332                 break;
2333         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
2334                 typestr = "audio mixer";
2335                 break;
2336         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
2337                 typestr = "audio selector";
2338                 break;
2339         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX:
2340                 typestr = "pin";
2341                 break;
2342         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_POWER_WIDGET:
2343                 typestr = "power widget";
2344                 break;
2345         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VOLUME_WIDGET:
2346                 typestr = "volume widget";
2347                 break;
2348         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET:
2349                 typestr = "beep widget";
2350                 break;
2351         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VENDOR_WIDGET:
2352                 typestr = "vendor widget";
2353                 break;
2354         default:
2355                 typestr = "unknown type";
2356                 break;
2357         }
2358
2359         strlcpy(w->name, typestr, sizeof(w->name));
2360
2361         if (HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL(wcap)) {
2362                 hdac_command(sc,
2363                     HDA_CMD_SET_POWER_STATE(cad, nid, HDA_CMD_POWER_STATE_D0),
2364                     cad);
2365                 DELAY(1000);
2366         }
2367
2368         hdac_widget_connection_parse(w);
2369
2370         if (HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP(wcap)) {
2371                 if (HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR(wcap))
2372                         w->param.outamp_cap =
2373                             hdac_command(sc,
2374                             HDA_CMD_GET_PARAMETER(cad, nid,
2375                             HDA_PARAM_OUTPUT_AMP_CAP), cad);
2376                 else
2377                         w->param.outamp_cap =
2378                             w->devinfo->function.audio.outamp_cap;
2379         } else
2380                 w->param.outamp_cap = 0;
2381
2382         if (HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP(wcap)) {
2383                 if (HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR(wcap))
2384                         w->param.inamp_cap =
2385                             hdac_command(sc,
2386                             HDA_CMD_GET_PARAMETER(cad, nid,
2387                             HDA_PARAM_INPUT_AMP_CAP), cad);
2388                 else
2389                         w->param.inamp_cap =
2390                             w->devinfo->function.audio.inamp_cap;
2391         } else
2392                 w->param.inamp_cap = 0;
2393
2394         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT ||
2395             w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT) {
2396                 if (HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR(wcap)) {
2397                         cap = hdac_command(sc,
2398                             HDA_CMD_GET_PARAMETER(cad, nid,
2399                             HDA_PARAM_SUPP_STREAM_FORMATS), cad);
2400                         w->param.supp_stream_formats = (cap != 0) ? cap :
2401                             w->devinfo->function.audio.supp_stream_formats;
2402                         cap = hdac_command(sc,
2403                             HDA_CMD_GET_PARAMETER(cad, nid,
2404                             HDA_PARAM_SUPP_PCM_SIZE_RATE), cad);
2405                         w->param.supp_pcm_size_rate = (cap != 0) ? cap :
2406                             w->devinfo->function.audio.supp_pcm_size_rate;
2407                 } else {
2408                         w->param.supp_stream_formats =
2409                             w->devinfo->function.audio.supp_stream_formats;
2410                         w->param.supp_pcm_size_rate =
2411                             w->devinfo->function.audio.supp_pcm_size_rate;
2412                 }
2413         } else {
2414                 w->param.supp_stream_formats = 0;
2415                 w->param.supp_pcm_size_rate = 0;
2416         }
2417
2418         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
2419                 hdac_widget_pin_parse(w);
2420 }
2421
2422 static struct hdac_widget *
2423 hdac_widget_get(struct hdac_devinfo *devinfo, nid_t nid)
2424 {
2425         if (devinfo == NULL || devinfo->widget == NULL ||
2426                     nid < devinfo->startnode || nid >= devinfo->endnode)
2427                 return (NULL);
2428         return (&devinfo->widget[nid - devinfo->startnode]);
2429 }
2430
2431 static __inline int
2432 hda_poll_channel(struct hdac_chan *ch)
2433 {
2434         uint32_t sz, delta;
2435         volatile uint32_t ptr;
2436
2437         if (!(ch->flags & HDAC_CHN_RUNNING))
2438                 return (0);
2439
2440         sz = ch->blksz * ch->blkcnt;
2441         if (ch->dmapos != NULL)
2442                 ptr = *(ch->dmapos);
2443         else
2444                 ptr = HDAC_READ_4(&ch->devinfo->codec->sc->mem,
2445                     ch->off + HDAC_SDLPIB);
2446         ch->ptr = ptr;
2447         ptr %= sz;
2448         ptr &= ~(ch->blksz - 1);
2449         delta = (sz + ptr - ch->prevptr) % sz;
2450
2451         if (delta < ch->blksz)
2452                 return (0);
2453
2454         ch->prevptr = ptr;
2455
2456         return (1);
2457 }
2458
2459 #define hda_chan_active(sc)    (((sc)->play.flags | (sc)->rec.flags) & \
2460                                 HDAC_CHN_RUNNING)
2461
2462 static void
2463 hda_poll_callback(void *arg)
2464 {
2465         struct hdac_softc *sc = arg;
2466         uint32_t trigger;
2467
2468         if (sc == NULL)
2469                 return;
2470
2471         hdac_lock(sc);
2472         if (sc->polling == 0 || hda_chan_active(sc) == 0) {
2473                 hdac_unlock(sc);
2474                 return;
2475         }
2476
2477         trigger = 0;
2478         trigger |= (hda_poll_channel(&sc->play) != 0) ? HDAC_TRIGGER_PLAY : 0;
2479         trigger |= (hda_poll_channel(&sc->rec)) != 0 ? HDAC_TRIGGER_REC : 0;
2480
2481         /* XXX */
2482         callout_reset(&sc->poll_hda, 1/*sc->poll_ticks*/,
2483             hda_poll_callback, sc);
2484
2485         hdac_unlock(sc);
2486
2487         if (trigger & HDAC_TRIGGER_PLAY)
2488                 chn_intr(sc->play.c);
2489         if (trigger & HDAC_TRIGGER_REC)
2490                 chn_intr(sc->rec.c);
2491 }
2492
2493 static int
2494 hdac_rirb_flush(struct hdac_softc *sc)
2495 {
2496         struct hdac_rirb *rirb_base, *rirb;
2497         struct hdac_codec *codec;
2498         struct hdac_command_list *commands;
2499         nid_t cad;
2500         uint32_t resp;
2501         uint8_t rirbwp;
2502         int ret;
2503
2504         rirb_base = (struct hdac_rirb *)sc->rirb_dma.dma_vaddr;
2505         rirbwp = HDAC_READ_1(&sc->mem, HDAC_RIRBWP);
2506 #if 0
2507         bus_dmamap_sync(sc->rirb_dma.dma_tag, sc->rirb_dma.dma_map,
2508             BUS_DMASYNC_POSTREAD);
2509 #endif
2510         ret = 0;
2511
2512         while (sc->rirb_rp != rirbwp) {
2513                 sc->rirb_rp++;
2514                 sc->rirb_rp %= sc->rirb_size;
2515                 rirb = &rirb_base[sc->rirb_rp];
2516                 cad = HDAC_RIRB_RESPONSE_EX_SDATA_IN(rirb->response_ex);
2517                 if (cad < 0 || cad >= HDAC_CODEC_MAX ||
2518                     sc->codecs[cad] == NULL)
2519                         continue;
2520                 resp = rirb->response;
2521                 codec = sc->codecs[cad];
2522                 commands = codec->commands;
2523                 if (rirb->response_ex & HDAC_RIRB_RESPONSE_EX_UNSOLICITED) {
2524                         sc->unsolq[sc->unsolq_wp++] = (cad << 16) |
2525                             ((resp >> 26) & 0xffff);
2526                         sc->unsolq_wp %= HDAC_UNSOLQ_MAX;
2527                 } else if (commands != NULL && commands->num_commands > 0 &&
2528                     codec->responses_received < commands->num_commands)
2529                         commands->responses[codec->responses_received++] =
2530                             resp;
2531                 ret++;
2532         }
2533
2534         return (ret);
2535 }
2536
2537 static int
2538 hdac_unsolq_flush(struct hdac_softc *sc)
2539 {
2540         nid_t cad;
2541         uint32_t tag;
2542         int ret = 0;
2543
2544         if (sc->unsolq_st == HDAC_UNSOLQ_READY) {
2545                 sc->unsolq_st = HDAC_UNSOLQ_BUSY;
2546                 while (sc->unsolq_rp != sc->unsolq_wp) {
2547                         cad = sc->unsolq[sc->unsolq_rp] >> 16;
2548                         tag = sc->unsolq[sc->unsolq_rp++] & 0xffff;
2549                         sc->unsolq_rp %= HDAC_UNSOLQ_MAX;
2550                         hdac_unsolicited_handler(sc->codecs[cad], tag);
2551                         ret++;
2552                 }
2553                 sc->unsolq_st = HDAC_UNSOLQ_READY;
2554         }
2555
2556         return (ret);
2557 }
2558
2559 static void
2560 hdac_poll_callback(void *arg)
2561 {
2562         struct hdac_softc *sc = arg;
2563         if (sc == NULL)
2564                 return;
2565
2566         hdac_lock(sc);
2567         if (sc->polling == 0 || sc->poll_ival == 0) {
2568                 hdac_unlock(sc);
2569                 return;
2570         }
2571         if (hdac_rirb_flush(sc) != 0)
2572                 hdac_unsolq_flush(sc);
2573         callout_reset(&sc->poll_hdac, sc->poll_ival, hdac_poll_callback, sc);
2574         hdac_unlock(sc);
2575 }
2576
2577 static void
2578 hdac_stream_stop(struct hdac_chan *ch)
2579 {
2580         struct hdac_softc *sc = ch->devinfo->codec->sc;
2581         uint32_t ctl;
2582
2583         ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2584         ctl &= ~(HDAC_SDCTL_IOCE | HDAC_SDCTL_FEIE | HDAC_SDCTL_DEIE |
2585             HDAC_SDCTL_RUN);
2586         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
2587
2588         ch->flags &= ~HDAC_CHN_RUNNING;
2589
2590         if (sc->polling != 0) {
2591                 int pollticks;
2592
2593                 if (hda_chan_active(sc) == 0) {
2594                         callout_stop(&sc->poll_hda);
2595                         sc->poll_ticks = 1;
2596                 } else {
2597                         if (sc->play.flags & HDAC_CHN_RUNNING)
2598                                 ch = &sc->play;
2599                         else
2600                                 ch = &sc->rec;
2601                         pollticks = ((uint64_t)hz * ch->blksz) /
2602                             ((uint64_t)sndbuf_getbps(ch->b) *
2603                             sndbuf_getspd(ch->b));
2604                         pollticks >>= 2;
2605                         if (pollticks > hz)
2606                                 pollticks = hz;
2607                         if (pollticks < 1) {
2608                                 HDA_BOOTVERBOSE(
2609                                         device_printf(sc->dev,
2610                                             "%s: pollticks=%d < 1 !\n",
2611                                             __func__, pollticks);
2612                                 );
2613                                 pollticks = 1;
2614                         }
2615                         if (pollticks > sc->poll_ticks) {
2616                                 HDA_BOOTVERBOSE(
2617                                         device_printf(sc->dev,
2618                                             "%s: pollticks %d -> %d\n",
2619                                             __func__, sc->poll_ticks,
2620                                             pollticks);
2621                                 );
2622                                 sc->poll_ticks = pollticks;
2623                                 callout_reset(&sc->poll_hda, 1,
2624                                     hda_poll_callback, sc);
2625                         }
2626                 }
2627         } else {
2628                 ctl = HDAC_READ_4(&sc->mem, HDAC_INTCTL);
2629                 ctl &= ~(1 << (ch->off >> 5));
2630                 HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, ctl);
2631         }
2632 }
2633
2634 static void
2635 hdac_stream_start(struct hdac_chan *ch)
2636 {
2637         struct hdac_softc *sc = ch->devinfo->codec->sc;
2638         uint32_t ctl;
2639
2640         if (sc->polling != 0) {
2641                 int pollticks;
2642
2643                 pollticks = ((uint64_t)hz * ch->blksz) /
2644                     ((uint64_t)sndbuf_getbps(ch->b) * sndbuf_getspd(ch->b));
2645                 pollticks >>= 2;
2646                 if (pollticks > hz)
2647                         pollticks = hz;
2648                 if (pollticks < 1) {
2649                         HDA_BOOTVERBOSE(
2650                                 device_printf(sc->dev,
2651                                     "%s: pollticks=%d < 1 !\n",
2652                                     __func__, pollticks);
2653                         );
2654                         pollticks = 1;
2655                 }
2656                 if (hda_chan_active(sc) == 0 || pollticks < sc->poll_ticks) {
2657                         HDA_BOOTVERBOSE(
2658                                 if (hda_chan_active(sc) == 0) {
2659                                         device_printf(sc->dev,
2660                                             "%s: pollticks=%d\n",
2661                                             __func__, pollticks);
2662                                 } else {
2663                                         device_printf(sc->dev,
2664                                             "%s: pollticks %d -> %d\n",
2665                                             __func__, sc->poll_ticks,
2666                                             pollticks);
2667                                 }
2668                         );
2669                         sc->poll_ticks = pollticks;
2670                         callout_reset(&sc->poll_hda, 1, hda_poll_callback,
2671                             sc);
2672                 }
2673                 ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2674                 ctl |= HDAC_SDCTL_RUN;
2675         } else {
2676                 ctl = HDAC_READ_4(&sc->mem, HDAC_INTCTL);
2677                 ctl |= 1 << (ch->off >> 5);
2678                 HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, ctl);
2679                 ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2680                 ctl |= HDAC_SDCTL_IOCE | HDAC_SDCTL_FEIE | HDAC_SDCTL_DEIE |
2681                     HDAC_SDCTL_RUN;
2682         }
2683         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
2684
2685         ch->flags |= HDAC_CHN_RUNNING;
2686 }
2687
2688 static void
2689 hdac_stream_reset(struct hdac_chan *ch)
2690 {
2691         struct hdac_softc *sc = ch->devinfo->codec->sc;
2692         int timeout = 1000;
2693         int to = timeout;
2694         uint32_t ctl;
2695
2696         ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2697         ctl |= HDAC_SDCTL_SRST;
2698         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
2699         do {
2700                 ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2701                 if (ctl & HDAC_SDCTL_SRST)
2702                         break;
2703                 DELAY(10);
2704         } while (--to);
2705         if (!(ctl & HDAC_SDCTL_SRST)) {
2706                 device_printf(sc->dev, "timeout in reset\n");
2707         }
2708         ctl &= ~HDAC_SDCTL_SRST;
2709         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
2710         to = timeout;
2711         do {
2712                 ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2713                 if (!(ctl & HDAC_SDCTL_SRST))
2714                         break;
2715                 DELAY(10);
2716         } while (--to);
2717         if (ctl & HDAC_SDCTL_SRST)
2718                 device_printf(sc->dev, "can't reset!\n");
2719 }
2720
2721 static void
2722 hdac_stream_setid(struct hdac_chan *ch)
2723 {
2724         struct hdac_softc *sc = ch->devinfo->codec->sc;
2725         uint32_t ctl;
2726
2727         ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL2);
2728         ctl &= ~HDAC_SDCTL2_STRM_MASK;
2729         ctl |= ch->sid << HDAC_SDCTL2_STRM_SHIFT;
2730         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL2, ctl);
2731 }
2732
2733 static void
2734 hdac_bdl_setup(struct hdac_chan *ch)
2735 {
2736         struct hdac_softc *sc = ch->devinfo->codec->sc;
2737         struct hdac_bdle *bdle;
2738         uint64_t addr;
2739         uint32_t blksz, blkcnt;
2740         int i;
2741
2742         addr = (uint64_t)sndbuf_getbufaddr(ch->b);
2743         bdle = (struct hdac_bdle *)ch->bdl_dma.dma_vaddr;
2744
2745         if (sc->polling != 0) {
2746                 blksz = ch->blksz * ch->blkcnt;
2747                 blkcnt = 1;
2748         } else {
2749                 blksz = ch->blksz;
2750                 blkcnt = ch->blkcnt;
2751         }
2752
2753         for (i = 0; i < blkcnt; i++, bdle++) {
2754                 bdle->addrl = (uint32_t)addr;
2755                 bdle->addrh = (uint32_t)(addr >> 32);
2756                 bdle->len = blksz;
2757                 bdle->ioc = 1 ^ sc->polling;
2758                 addr += blksz;
2759         }
2760
2761         HDAC_WRITE_4(&sc->mem, ch->off + HDAC_SDCBL, blksz * blkcnt);
2762         HDAC_WRITE_2(&sc->mem, ch->off + HDAC_SDLVI, blkcnt - 1);
2763         addr = ch->bdl_dma.dma_paddr;
2764         HDAC_WRITE_4(&sc->mem, ch->off + HDAC_SDBDPL, (uint32_t)addr);
2765         HDAC_WRITE_4(&sc->mem, ch->off + HDAC_SDBDPU, (uint32_t)(addr >> 32));
2766         if (ch->dmapos != NULL &&
2767             !(HDAC_READ_4(&sc->mem, HDAC_DPIBLBASE) & 0x00000001)) {
2768                 addr = sc->pos_dma.dma_paddr;
2769                 HDAC_WRITE_4(&sc->mem, HDAC_DPIBLBASE,
2770                     ((uint32_t)addr & HDAC_DPLBASE_DPLBASE_MASK) | 0x00000001);
2771                 HDAC_WRITE_4(&sc->mem, HDAC_DPIBUBASE, (uint32_t)(addr >> 32));
2772         }
2773 }
2774
2775 static int
2776 hdac_bdl_alloc(struct hdac_chan *ch)
2777 {
2778         struct hdac_softc *sc = ch->devinfo->codec->sc;
2779         int rc;
2780
2781         rc = hdac_dma_alloc(sc, &ch->bdl_dma,
2782             sizeof(struct hdac_bdle) * HDA_BDL_MAX);
2783         if (rc) {
2784                 device_printf(sc->dev, "can't alloc bdl\n");
2785                 return (rc);
2786         }
2787
2788         return (0);
2789 }
2790
2791 static void
2792 hdac_audio_ctl_amp_set_internal(struct hdac_softc *sc, nid_t cad, nid_t nid,
2793                                         int index, int lmute, int rmute,
2794                                         int left, int right, int dir)
2795 {
2796         uint16_t v = 0;
2797
2798         if (sc == NULL)
2799                 return;
2800
2801         if (left != right || lmute != rmute) {
2802                 v = (1 << (15 - dir)) | (1 << 13) | (index << 8) |
2803                     (lmute << 7) | left;
2804                 hdac_command(sc,
2805                     HDA_CMD_SET_AMP_GAIN_MUTE(cad, nid, v), cad);
2806                 v = (1 << (15 - dir)) | (1 << 12) | (index << 8) |
2807                     (rmute << 7) | right;
2808         } else
2809                 v = (1 << (15 - dir)) | (3 << 12) | (index << 8) |
2810                     (lmute << 7) | left;
2811
2812         hdac_command(sc,
2813             HDA_CMD_SET_AMP_GAIN_MUTE(cad, nid, v), cad);
2814 }
2815
2816 static void
2817 hdac_audio_ctl_amp_set(struct hdac_audio_ctl *ctl, uint32_t mute,
2818                                                 int left, int right)
2819 {
2820         struct hdac_softc *sc;
2821         nid_t nid, cad;
2822         int lmute, rmute;
2823
2824         if (ctl == NULL || ctl->widget == NULL ||
2825             ctl->widget->devinfo == NULL ||
2826             ctl->widget->devinfo->codec == NULL ||
2827             ctl->widget->devinfo->codec->sc == NULL)
2828                 return;
2829
2830         sc = ctl->widget->devinfo->codec->sc;
2831         cad = ctl->widget->devinfo->codec->cad;
2832         nid = ctl->widget->nid;
2833
2834         if (mute == HDA_AMP_MUTE_DEFAULT) {
2835                 lmute = HDA_AMP_LEFT_MUTED(ctl->muted);
2836                 rmute = HDA_AMP_RIGHT_MUTED(ctl->muted);
2837         } else {
2838                 lmute = HDA_AMP_LEFT_MUTED(mute);
2839                 rmute = HDA_AMP_RIGHT_MUTED(mute);
2840         }
2841
2842         if (ctl->dir & HDA_CTL_OUT)
2843                 hdac_audio_ctl_amp_set_internal(sc, cad, nid, ctl->index,
2844                     lmute, rmute, left, right, 0);
2845         if (ctl->dir & HDA_CTL_IN)
2846                 hdac_audio_ctl_amp_set_internal(sc, cad, nid, ctl->index,
2847                     lmute, rmute, left, right, 1);
2848         ctl->left = left;
2849         ctl->right = right;
2850 }
2851
2852 static void
2853 hdac_widget_connection_select(struct hdac_widget *w, uint8_t index)
2854 {
2855         if (w == NULL || w->nconns < 1 || index > (w->nconns - 1))
2856                 return;
2857         hdac_command(w->devinfo->codec->sc,
2858             HDA_CMD_SET_CONNECTION_SELECT_CONTROL(w->devinfo->codec->cad,
2859             w->nid, index), w->devinfo->codec->cad);
2860         w->selconn = index;
2861 }
2862
2863
2864 /****************************************************************************
2865  * uint32_t hdac_command_sendone_internal
2866  *
2867  * Wrapper function that sends only one command to a given codec
2868  ****************************************************************************/
2869 static uint32_t
2870 hdac_command_sendone_internal(struct hdac_softc *sc, uint32_t verb, nid_t cad)
2871 {
2872         struct hdac_command_list cl;
2873         uint32_t response = HDAC_INVALID;
2874
2875         if (!hdac_lockowned(sc))
2876                 device_printf(sc->dev, "WARNING!!!! mtx not owned!!!!\n");
2877         cl.num_commands = 1;
2878         cl.verbs = &verb;
2879         cl.responses = &response;
2880
2881         hdac_command_send_internal(sc, &cl, cad);
2882
2883         return (response);
2884 }
2885
2886 /****************************************************************************
2887  * hdac_command_send_internal
2888  *
2889  * Send a command list to the codec via the corb. We queue as much verbs as
2890  * we can and sleep on the codec. When the interrupt get the responses
2891  * back from the rirb, it will wake us up so we can queue the remaining verbs
2892  * if any.
2893  ****************************************************************************/
2894 static void
2895 hdac_command_send_internal(struct hdac_softc *sc,
2896                         struct hdac_command_list *commands, nid_t cad)
2897 {
2898         struct hdac_codec *codec;
2899         int corbrp;
2900         uint32_t *corb;
2901         int timeout;
2902         int retry = 10;
2903
2904         if (sc == NULL || sc->codecs[cad] == NULL || commands == NULL ||
2905             commands->num_commands < 1)
2906                 return;
2907
2908         codec = sc->codecs[cad];
2909         codec->commands = commands;
2910         codec->responses_received = 0;
2911         codec->verbs_sent = 0;
2912         corb = (uint32_t *)sc->corb_dma.dma_vaddr;
2913
2914         do {
2915                 if (codec->verbs_sent != commands->num_commands) {
2916                         /* Queue as many verbs as possible */
2917                         corbrp = HDAC_READ_2(&sc->mem, HDAC_CORBRP);
2918 #if 0
2919                         bus_dmamap_sync(sc->corb_dma.dma_tag,
2920                             sc->corb_dma.dma_map, BUS_DMASYNC_PREWRITE);
2921 #endif
2922                         while (codec->verbs_sent != commands->num_commands &&
2923                             ((sc->corb_wp + 1) % sc->corb_size) != corbrp) {
2924                                 sc->corb_wp++;
2925                                 sc->corb_wp %= sc->corb_size;
2926                                 corb[sc->corb_wp] =
2927                                     commands->verbs[codec->verbs_sent++];
2928                         }
2929
2930                         /* Send the verbs to the codecs */
2931 #if 0
2932                         bus_dmamap_sync(sc->corb_dma.dma_tag,
2933                             sc->corb_dma.dma_map, BUS_DMASYNC_POSTWRITE);
2934 #endif
2935                         HDAC_WRITE_2(&sc->mem, HDAC_CORBWP, sc->corb_wp);
2936                 }
2937
2938                 timeout = 1000;
2939                 while (hdac_rirb_flush(sc) == 0 && --timeout)
2940                         DELAY(10);
2941         } while ((codec->verbs_sent != commands->num_commands ||
2942             codec->responses_received != commands->num_commands) && --retry);
2943
2944         if (retry == 0)
2945                 device_printf(sc->dev,
2946                     "%s: TIMEOUT numcmd=%d, sent=%d, received=%d\n",
2947                     __func__, commands->num_commands, codec->verbs_sent,
2948                     codec->responses_received);
2949
2950         codec->commands = NULL;
2951         codec->responses_received = 0;
2952         codec->verbs_sent = 0;
2953
2954         hdac_unsolq_flush(sc);
2955 }
2956
2957
2958 /****************************************************************************
2959  * Device Methods
2960  ****************************************************************************/
2961
2962 /****************************************************************************
2963  * int hdac_probe(device_t)
2964  *
2965  * Probe for the presence of an hdac. If none is found, check for a generic
2966  * match using the subclass of the device.
2967  ****************************************************************************/
2968 static int
2969 hdac_probe(device_t dev)
2970 {
2971         int i, result;
2972         uint32_t model;
2973         uint16_t class, subclass;
2974         char desc[64];
2975
2976         model = (uint32_t)pci_get_device(dev) << 16;
2977         model |= (uint32_t)pci_get_vendor(dev) & 0x0000ffff;
2978         class = pci_get_class(dev);
2979         subclass = pci_get_subclass(dev);
2980
2981         bzero(desc, sizeof(desc));
2982         result = ENXIO;
2983         for (i = 0; i < HDAC_DEVICES_LEN; i++) {
2984                 if (hdac_devices[i].model == model) {
2985                         strlcpy(desc, hdac_devices[i].desc, sizeof(desc));
2986                         result = BUS_PROBE_DEFAULT;
2987                         break;
2988                 }
2989                 if (HDA_DEV_MATCH(hdac_devices[i].model, model) &&
2990                     class == PCIC_MULTIMEDIA &&
2991                     subclass == PCIS_MULTIMEDIA_HDA) {
2992                         strlcpy(desc, hdac_devices[i].desc, sizeof(desc));
2993                         result = BUS_PROBE_GENERIC;
2994                         break;
2995                 }
2996         }
2997         if (result == ENXIO && class == PCIC_MULTIMEDIA &&
2998             subclass == PCIS_MULTIMEDIA_HDA) {
2999                 strlcpy(desc, "Generic", sizeof(desc));
3000                 result = BUS_PROBE_GENERIC;
3001         }
3002         if (result != ENXIO) {
3003                 strlcat(desc, " High Definition Audio Controller",
3004                     sizeof(desc));
3005                 device_set_desc_copy(dev, desc);
3006         }
3007
3008         return (result);
3009 }
3010
3011 static void *
3012 hdac_channel_init(kobj_t obj, void *data, struct snd_dbuf *b,
3013                                         struct pcm_channel *c, int dir)
3014 {
3015         struct hdac_devinfo *devinfo = data;
3016         struct hdac_softc *sc = devinfo->codec->sc;
3017         struct hdac_chan *ch;
3018
3019         hdac_lock(sc);
3020         if (dir == PCMDIR_PLAY) {
3021                 ch = &sc->play;
3022                 ch->off = (sc->num_iss + devinfo->function.audio.playcnt) << 5;
3023                 devinfo->function.audio.playcnt++;
3024         } else {
3025                 ch = &sc->rec;
3026                 ch->off = devinfo->function.audio.reccnt << 5;
3027                 devinfo->function.audio.reccnt++;
3028         }
3029         if (devinfo->function.audio.quirks & HDA_QUIRK_FIXEDRATE) {
3030                 ch->caps.minspeed = ch->caps.maxspeed = 48000;
3031                 ch->pcmrates[0] = 48000;
3032                 ch->pcmrates[1] = 0;
3033         }
3034         if (sc->pos_dma.dma_vaddr != NULL)
3035                 ch->dmapos = (uint32_t *)(sc->pos_dma.dma_vaddr +
3036                     (sc->streamcnt * 8));
3037         else
3038                 ch->dmapos = NULL;
3039         ch->sid = ++sc->streamcnt;
3040         ch->dir = dir;
3041         ch->b = b;
3042         ch->c = c;
3043         ch->devinfo = devinfo;
3044         ch->blksz = sc->chan_size / sc->chan_blkcnt;
3045         ch->blkcnt = sc->chan_blkcnt;
3046         hdac_unlock(sc);
3047
3048         if (hdac_bdl_alloc(ch) != 0) {
3049                 ch->blkcnt = 0;
3050                 return (NULL);
3051         }
3052
3053         if (sndbuf_alloc(ch->b, sc->chan_dmat, sc->chan_size) != 0)
3054                 return (NULL);
3055
3056         HDAC_DMA_ATTR(sc, sndbuf_getbuf(ch->b), sndbuf_getmaxsize(ch->b),
3057             PAT_UNCACHEABLE);
3058
3059         return (ch);
3060 }
3061
3062 static int
3063 hdac_channel_free(kobj_t obj, void *data)
3064 {
3065         struct hdac_softc *sc;
3066         struct hdac_chan *ch;
3067
3068         ch = (struct hdac_chan *)data;
3069         sc = (ch != NULL && ch->devinfo != NULL && ch->devinfo->codec != NULL) ?
3070             ch->devinfo->codec->sc : NULL;
3071         if (ch != NULL && sc != NULL) {
3072                 HDAC_DMA_ATTR(sc, sndbuf_getbuf(ch->b),
3073                     sndbuf_getmaxsize(ch->b), PAT_WRITE_BACK);
3074         }
3075
3076         return (1);
3077 }
3078
3079 static int
3080 hdac_channel_setformat(kobj_t obj, void *data, uint32_t format)
3081 {
3082         struct hdac_chan *ch = data;
3083         int i;
3084
3085         for (i = 0; ch->caps.fmtlist[i] != 0; i++) {
3086                 if (format == ch->caps.fmtlist[i]) {
3087                         ch->fmt = format;
3088                         return (0);
3089                 }
3090         }
3091
3092         return (EINVAL);
3093 }
3094
3095 static int
3096 hdac_channel_setspeed(kobj_t obj, void *data, uint32_t speed)
3097 {
3098         struct hdac_chan *ch = data;
3099         uint32_t spd = 0, threshold;
3100         int i;
3101
3102         for (i = 0; ch->pcmrates[i] != 0; i++) {
3103                 spd = ch->pcmrates[i];
3104                 threshold = spd + ((ch->pcmrates[i + 1] != 0) ?
3105                     ((ch->pcmrates[i + 1] - spd) >> 1) : 0);
3106                 if (speed < threshold)
3107                         break;
3108         }
3109
3110         if (spd == 0)   /* impossible */
3111                 ch->spd = 48000;
3112         else
3113                 ch->spd = spd;
3114
3115         return (ch->spd);
3116 }
3117
3118 static void
3119 hdac_stream_setup(struct hdac_chan *ch)
3120 {
3121         struct hdac_softc *sc = ch->devinfo->codec->sc;
3122         struct hdac_widget *w;
3123         int i, chn, totalchn;
3124         nid_t cad = ch->devinfo->codec->cad;
3125         uint16_t fmt;
3126
3127         fmt = 0;
3128         if (ch->fmt & AFMT_S16_LE)
3129                 fmt |= ch->bit16 << 4;
3130         else if (ch->fmt & AFMT_S32_LE)
3131                 fmt |= ch->bit32 << 4;
3132         else
3133                 fmt |= 1 << 4;
3134
3135         for (i = 0; i < HDA_RATE_TAB_LEN; i++) {
3136                 if (hda_rate_tab[i].valid && ch->spd == hda_rate_tab[i].rate) {
3137                         fmt |= hda_rate_tab[i].base;
3138                         fmt |= hda_rate_tab[i].mul;
3139                         fmt |= hda_rate_tab[i].div;
3140                         break;
3141                 }
3142         }
3143
3144         if (ch->fmt & AFMT_STEREO) {
3145                 fmt |= 1;
3146                 totalchn = 2;
3147         } else
3148                 totalchn = 1;
3149
3150         HDAC_WRITE_2(&sc->mem, ch->off + HDAC_SDFMT, fmt);
3151
3152         chn = 0;
3153         for (i = 0; ch->io[i] != -1; i++) {
3154                 w = hdac_widget_get(ch->devinfo, ch->io[i]);
3155                 if (w == NULL)
3156                         continue;
3157                 HDA_BOOTVERBOSE(
3158                         device_printf(sc->dev,
3159                             "HDA_DEBUG: PCMDIR_%s: Stream setup nid=%d "
3160                             "fmt=0x%08x\n",
3161                             (ch->dir == PCMDIR_PLAY) ? "PLAY" : "REC",
3162                             ch->io[i], fmt);
3163                 );
3164                 hdac_command(sc,
3165                     HDA_CMD_SET_CONV_FMT(cad, ch->io[i], fmt), cad);
3166                 if (ch->dir == PCMDIR_REC)
3167                         hdac_command(sc,
3168                             HDA_CMD_SET_CONV_STREAM_CHAN(cad, ch->io[i],
3169                             (chn < totalchn) ? ((ch->sid << 4) | chn) : 0),
3170                             cad);
3171                 else
3172                         hdac_command(sc,
3173                             HDA_CMD_SET_CONV_STREAM_CHAN(cad, ch->io[i],
3174                             ch->sid << 4), cad);
3175                 chn +=
3176                     HDA_PARAM_AUDIO_WIDGET_CAP_STEREO(w->param.widget_cap) ?
3177                     2 : 1;
3178         }
3179 }
3180
3181 static int
3182 hdac_channel_setfragments(kobj_t obj, void *data,
3183                                         uint32_t blksz, uint32_t blkcnt)
3184 {
3185         struct hdac_chan *ch = data;
3186         struct hdac_softc *sc = ch->devinfo->codec->sc;
3187
3188         blksz &= HDA_BLK_ALIGN;
3189
3190         if (blksz > (sndbuf_getmaxsize(ch->b) / HDA_BDL_MIN))
3191                 blksz = sndbuf_getmaxsize(ch->b) / HDA_BDL_MIN;
3192         if (blksz < HDA_BLK_MIN)
3193                 blksz = HDA_BLK_MIN;
3194         if (blkcnt > HDA_BDL_MAX)
3195                 blkcnt = HDA_BDL_MAX;
3196         if (blkcnt < HDA_BDL_MIN)
3197                 blkcnt = HDA_BDL_MIN;
3198
3199         while ((blksz * blkcnt) > sndbuf_getmaxsize(ch->b)) {
3200                 if ((blkcnt >> 1) >= HDA_BDL_MIN)
3201                         blkcnt >>= 1;
3202                 else if ((blksz >> 1) >= HDA_BLK_MIN)
3203                         blksz >>= 1;
3204                 else
3205                         break;
3206         }
3207
3208         if ((sndbuf_getblksz(ch->b) != blksz ||
3209             sndbuf_getblkcnt(ch->b) != blkcnt) &&
3210             sndbuf_resize(ch->b, blkcnt, blksz) != 0)
3211                 device_printf(sc->dev, "%s: failed blksz=%u blkcnt=%u\n",
3212                     __func__, blksz, blkcnt);
3213
3214         ch->blksz = sndbuf_getblksz(ch->b);
3215         ch->blkcnt = sndbuf_getblkcnt(ch->b);
3216
3217         return (1);
3218 }
3219
3220 static int
3221 hdac_channel_setblocksize(kobj_t obj, void *data, uint32_t blksz)
3222 {
3223         struct hdac_chan *ch = data;
3224         struct hdac_softc *sc = ch->devinfo->codec->sc;
3225
3226         hdac_channel_setfragments(obj, data, blksz, sc->chan_blkcnt);
3227
3228         return (ch->blksz);
3229 }
3230
3231 static void
3232 hdac_channel_stop(struct hdac_softc *sc, struct hdac_chan *ch)
3233 {
3234         struct hdac_devinfo *devinfo = ch->devinfo;
3235         nid_t cad = devinfo->codec->cad;
3236         int i;
3237
3238         hdac_stream_stop(ch);
3239
3240         for (i = 0; ch->io[i] != -1; i++) {
3241                 hdac_command(sc,
3242                     HDA_CMD_SET_CONV_STREAM_CHAN(cad, ch->io[i],
3243                     0), cad);
3244         }
3245 }
3246
3247 static void
3248 hdac_channel_start(struct hdac_softc *sc, struct hdac_chan *ch)
3249 {
3250         ch->ptr = 0;
3251         ch->prevptr = 0;
3252         hdac_stream_stop(ch);
3253         hdac_stream_reset(ch);
3254         hdac_bdl_setup(ch);
3255         hdac_stream_setid(ch);
3256         hdac_stream_setup(ch);
3257         hdac_stream_start(ch);
3258 }
3259
3260 static int
3261 hdac_channel_trigger(kobj_t obj, void *data, int go)
3262 {
3263         struct hdac_chan *ch = data;
3264         struct hdac_softc *sc = ch->devinfo->codec->sc;
3265
3266         if (!(go == PCMTRIG_START || go == PCMTRIG_STOP || go == PCMTRIG_ABORT))
3267                 return (0);
3268
3269         hdac_lock(sc);
3270         switch (go) {
3271         case PCMTRIG_START:
3272                 hdac_channel_start(sc, ch);
3273                 break;
3274         case PCMTRIG_STOP:
3275         case PCMTRIG_ABORT:
3276                 hdac_channel_stop(sc, ch);
3277                 break;
3278         default:
3279                 break;
3280         }
3281         hdac_unlock(sc);
3282
3283         return (0);
3284 }
3285
3286 static int
3287 hdac_channel_getptr(kobj_t obj, void *data)
3288 {
3289         struct hdac_chan *ch = data;
3290         struct hdac_softc *sc = ch->devinfo->codec->sc;
3291         uint32_t ptr;
3292
3293         hdac_lock(sc);
3294         if (sc->polling != 0)
3295                 ptr = ch->ptr;
3296         else if (ch->dmapos != NULL)
3297                 ptr = *(ch->dmapos);
3298         else
3299                 ptr = HDAC_READ_4(&sc->mem, ch->off + HDAC_SDLPIB);
3300         hdac_unlock(sc);
3301
3302         /*
3303          * Round to available space and force 128 bytes aligment.
3304          */
3305         ptr %= ch->blksz * ch->blkcnt;
3306         ptr &= HDA_BLK_ALIGN;
3307
3308         return (ptr);
3309 }
3310
3311 static struct pcmchan_caps *
3312 hdac_channel_getcaps(kobj_t obj, void *data)
3313 {
3314         return (&((struct hdac_chan *)data)->caps);
3315 }
3316
3317 static kobj_method_t hdac_channel_methods[] = {
3318         KOBJMETHOD(channel_init,                hdac_channel_init),
3319         KOBJMETHOD(channel_free,                hdac_channel_free),
3320         KOBJMETHOD(channel_setformat,           hdac_channel_setformat),
3321         KOBJMETHOD(channel_setspeed,            hdac_channel_setspeed),
3322         KOBJMETHOD(channel_setblocksize,        hdac_channel_setblocksize),
3323         KOBJMETHOD(channel_trigger,             hdac_channel_trigger),
3324         KOBJMETHOD(channel_getptr,              hdac_channel_getptr),
3325         KOBJMETHOD(channel_getcaps,             hdac_channel_getcaps),
3326         KOBJMETHOD_END
3327 };
3328 CHANNEL_DECLARE(hdac_channel);
3329
3330 static void
3331 hdac_jack_poll_callback(void *arg)
3332 {
3333         struct hdac_devinfo *devinfo = arg;
3334         struct hdac_softc *sc;
3335
3336         if (devinfo == NULL || devinfo->codec == NULL ||
3337             devinfo->codec->sc == NULL)
3338                 return;
3339         sc = devinfo->codec->sc;
3340         hdac_lock(sc);
3341         if (sc->poll_ival == 0) {
3342                 hdac_unlock(sc);
3343                 return;
3344         }
3345         hdac_hp_switch_handler(devinfo);
3346         callout_reset(&sc->poll_jack, sc->poll_ival,
3347             hdac_jack_poll_callback, devinfo);
3348         hdac_unlock(sc);
3349 }
3350
3351 static int
3352 hdac_audio_ctl_ossmixer_init(struct snd_mixer *m)
3353 {
3354         struct hdac_devinfo *devinfo = mix_getdevinfo(m);
3355         struct hdac_softc *sc = devinfo->codec->sc;
3356         struct hdac_widget *w, *cw;
3357         struct hdac_audio_ctl *ctl;
3358         uint32_t mask, recmask, id;
3359         int i, j, softpcmvol;
3360         nid_t cad;
3361
3362         hdac_lock(sc);
3363
3364         mask = 0;
3365         recmask = 0;
3366
3367         id = hdac_codec_id(devinfo);
3368         cad = devinfo->codec->cad;
3369         for (i = 0; i < HDAC_HP_SWITCH_LEN; i++) {
3370                 if (!(HDA_DEV_MATCH(hdac_hp_switch[i].model,
3371                     sc->pci_subvendor) && hdac_hp_switch[i].id == id))
3372                         continue;
3373                 w = hdac_widget_get(devinfo, hdac_hp_switch[i].hpnid);
3374                 if (w == NULL || w->enable == 0 || w->type !=
3375                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
3376                         continue;
3377                 if (hdac_hp_switch[i].polling != 0)
3378                         callout_reset(&sc->poll_jack, 1,
3379                             hdac_jack_poll_callback, devinfo);
3380                 else if (HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP(w->param.widget_cap))
3381                         hdac_command(sc,
3382                             HDA_CMD_SET_UNSOLICITED_RESPONSE(cad, w->nid,
3383                             HDA_CMD_SET_UNSOLICITED_RESPONSE_ENABLE |
3384                             HDAC_UNSOLTAG_EVENT_HP), cad);
3385                 else
3386                         continue;
3387                 hdac_hp_switch_handler(devinfo);
3388                 HDA_BOOTVERBOSE(
3389                         device_printf(sc->dev,
3390                             "HDA_DEBUG: Enabling headphone/speaker "
3391                             "audio routing switching:\n");
3392                         device_printf(sc->dev,
3393                             "HDA_DEBUG: \tindex=%d nid=%d "
3394                             "pci_subvendor=0x%08x "
3395                             "codec=0x%08x [%s]\n",
3396                             i, w->nid, sc->pci_subvendor, id,
3397                             (hdac_hp_switch[i].polling != 0) ? "POLL" :
3398                             "UNSOL");
3399                 );
3400                 break;
3401         }
3402         for (i = 0; i < HDAC_EAPD_SWITCH_LEN; i++) {
3403                 if (!(HDA_DEV_MATCH(hdac_eapd_switch[i].model,
3404                     sc->pci_subvendor) &&
3405                     hdac_eapd_switch[i].id == id))
3406                         continue;
3407                 w = hdac_widget_get(devinfo, hdac_eapd_switch[i].eapdnid);
3408                 if (w == NULL || w->enable == 0)
3409                         break;
3410                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX ||
3411                     w->param.eapdbtl == HDAC_INVALID)
3412                         break;
3413                 mask |= SOUND_MASK_OGAIN;
3414                 break;
3415         }
3416
3417         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
3418                 w = hdac_widget_get(devinfo, i);
3419                 if (w == NULL || w->enable == 0)
3420                         continue;
3421                 mask |= w->ctlflags;
3422                 if (!(w->pflags & HDA_ADC_RECSEL))
3423                         continue;
3424                 for (j = 0; j < w->nconns; j++) {
3425                         cw = hdac_widget_get(devinfo, w->conns[j]);
3426                         if (cw == NULL || cw->enable == 0)
3427                                 continue;
3428                         recmask |= cw->ctlflags;
3429                 }
3430         }
3431
3432         if (!(mask & SOUND_MASK_PCM)) {
3433                 softpcmvol = 1;
3434                 mask |= SOUND_MASK_PCM;
3435         } else
3436                 softpcmvol = (devinfo->function.audio.quirks &
3437                     HDA_QUIRK_SOFTPCMVOL) ? 1 : 0;
3438
3439         i = 0;
3440         ctl = NULL;
3441         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
3442                 if (ctl->widget == NULL || ctl->enable == 0)
3443                         continue;
3444                 if (!(ctl->ossmask & SOUND_MASK_PCM))
3445                         continue;
3446                 if (ctl->step > 0)
3447                         break;
3448         }
3449
3450         if (softpcmvol == 1 || ctl == NULL) {
3451                 pcm_setflags(sc->dev, pcm_getflags(sc->dev) | SD_F_SOFTPCMVOL);
3452                 HDA_BOOTVERBOSE(
3453                         device_printf(sc->dev,
3454                             "HDA_DEBUG: %s Soft PCM volume\n",
3455                             (softpcmvol == 1) ?
3456                             "Forcing" : "Enabling");
3457                 );
3458                 i = 0;
3459                 /*
3460                  * XXX Temporary quirk for STAC9220, until the parser
3461                  *     become smarter.
3462                  */
3463                 if (id == HDA_CODEC_STAC9220) {
3464                         mask |= SOUND_MASK_VOLUME;
3465                         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) !=
3466                             NULL) {
3467                                 if (ctl->widget == NULL || ctl->enable == 0)
3468                                         continue;
3469                                 if (ctl->widget->nid == 11 && ctl->index == 0) {
3470                                         ctl->ossmask = SOUND_MASK_VOLUME;
3471                                         ctl->ossval = 100 | (100 << 8);
3472                                 } else
3473                                         ctl->ossmask &= ~SOUND_MASK_VOLUME;
3474                         }
3475                 } else if (id == HDA_CODEC_STAC9221) {
3476                         mask |= SOUND_MASK_VOLUME;
3477                         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) !=
3478                             NULL) {
3479                                 if (ctl->widget == NULL)
3480                                         continue;
3481                                 if (ctl->widget->type ==
3482                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT &&
3483                                     ctl->index == 0 && (ctl->widget->nid == 2 ||
3484                                     ctl->widget->enable != 0)) {
3485                                         ctl->enable = 1;
3486                                         ctl->ossmask = SOUND_MASK_VOLUME;
3487                                         ctl->ossval = 100 | (100 << 8);
3488                                 } else if (ctl->enable == 0)
3489                                         continue;
3490                                 else
3491                                         ctl->ossmask &= ~SOUND_MASK_VOLUME;
3492                         }
3493                 } else {
3494                         mix_setparentchild(m, SOUND_MIXER_VOLUME,
3495                             SOUND_MASK_PCM);
3496                         if (!(mask & SOUND_MASK_VOLUME))
3497                                 mix_setrealdev(m, SOUND_MIXER_VOLUME,
3498                                     SOUND_MIXER_NONE);
3499                         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) !=
3500                             NULL) {
3501                                 if (ctl->widget == NULL || ctl->enable == 0)
3502                                         continue;
3503                                 if (!HDA_FLAG_MATCH(ctl->ossmask,
3504                                     SOUND_MASK_VOLUME | SOUND_MASK_PCM))
3505                                         continue;
3506                                 if (!(ctl->mute == 1 && ctl->step == 0))
3507                                         ctl->enable = 0;
3508                         }
3509                 }
3510         }
3511
3512         recmask &= ~(SOUND_MASK_PCM | SOUND_MASK_RECLEV | SOUND_MASK_SPEAKER |
3513             SOUND_MASK_BASS | SOUND_MASK_TREBLE | SOUND_MASK_IGAIN |
3514             SOUND_MASK_OGAIN);
3515         recmask &= (1 << SOUND_MIXER_NRDEVICES) - 1;
3516         mask &= (1 << SOUND_MIXER_NRDEVICES) - 1;
3517
3518         mix_setrecdevs(m, recmask);
3519         mix_setdevs(m, mask);
3520
3521         hdac_unlock(sc);
3522
3523         return (0);
3524 }
3525
3526 static int
3527 hdac_audio_ctl_ossmixer_set(struct snd_mixer *m, unsigned dev,
3528                                         unsigned left, unsigned right)
3529 {
3530         struct hdac_devinfo *devinfo = mix_getdevinfo(m);
3531         struct hdac_softc *sc = devinfo->codec->sc;
3532         struct hdac_widget *w;
3533         struct hdac_audio_ctl *ctl;
3534         uint32_t id, mute;
3535         int lvol, rvol, mlvol, mrvol;
3536         int i = 0;
3537
3538         hdac_lock(sc);
3539         if (dev == SOUND_MIXER_OGAIN) {
3540                 uint32_t orig;
3541                 /*if (left != right || !(left == 0 || left == 1)) {
3542                         hdac_unlock(sc);
3543                         return (-1);
3544                 }*/
3545                 id = hdac_codec_id(devinfo);
3546                 for (i = 0; i < HDAC_EAPD_SWITCH_LEN; i++) {
3547                         if (HDA_DEV_MATCH(hdac_eapd_switch[i].model,
3548                             sc->pci_subvendor) &&
3549                             hdac_eapd_switch[i].id == id)
3550                                 break;
3551                 }
3552                 if (i >= HDAC_EAPD_SWITCH_LEN) {
3553                         hdac_unlock(sc);
3554                         return (-1);
3555                 }
3556                 w = hdac_widget_get(devinfo, hdac_eapd_switch[i].eapdnid);
3557                 if (w == NULL ||
3558                     w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX ||
3559                     w->param.eapdbtl == HDAC_INVALID) {
3560                         hdac_unlock(sc);
3561                         return (-1);
3562                 }
3563                 orig = w->param.eapdbtl;
3564                 if (left == 0)
3565                         w->param.eapdbtl &= ~HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
3566                 else
3567                         w->param.eapdbtl |= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
3568                 if (orig != w->param.eapdbtl) {
3569                         uint32_t val;
3570
3571                         if (hdac_eapd_switch[i].hp_switch != 0)
3572                                 hdac_hp_switch_handler(devinfo);
3573                         val = w->param.eapdbtl;
3574                         if (devinfo->function.audio.quirks & HDA_QUIRK_EAPDINV)
3575                                 val ^= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
3576                         hdac_command(sc,
3577                             HDA_CMD_SET_EAPD_BTL_ENABLE(devinfo->codec->cad,
3578                             w->nid, val), devinfo->codec->cad);
3579                 }
3580                 hdac_unlock(sc);
3581                 return (left | (left << 8));
3582         }
3583         if (dev == SOUND_MIXER_VOLUME)
3584                 devinfo->function.audio.mvol = left | (right << 8);
3585
3586         mlvol = devinfo->function.audio.mvol & 0x7f;
3587         mrvol = (devinfo->function.audio.mvol >> 8) & 0x7f;
3588         lvol = 0;
3589         rvol = 0;
3590
3591         i = 0;
3592         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
3593                 if (ctl->widget == NULL || ctl->enable == 0 ||
3594                     !(ctl->ossmask & (1 << dev)))
3595                         continue;
3596                 switch (dev) {
3597                 case SOUND_MIXER_VOLUME:
3598                         lvol = ((ctl->ossval & 0x7f) * left) / 100;
3599                         lvol = (lvol * ctl->step) / 100;
3600                         rvol = (((ctl->ossval >> 8) & 0x7f) * right) / 100;
3601                         rvol = (rvol * ctl->step) / 100;
3602                         break;
3603                 default:
3604                         if (ctl->ossmask & SOUND_MASK_VOLUME) {
3605                                 lvol = (left * mlvol) / 100;
3606                                 lvol = (lvol * ctl->step) / 100;
3607                                 rvol = (right * mrvol) / 100;
3608                                 rvol = (rvol * ctl->step) / 100;
3609                         } else {
3610                                 lvol = (left * ctl->step) / 100;
3611                                 rvol = (right * ctl->step) / 100;
3612                         }
3613                         ctl->ossval = left | (right << 8);
3614                         break;
3615                 }
3616                 mute = 0;
3617                 if (ctl->step < 1) {
3618                         mute |= (left == 0) ? HDA_AMP_MUTE_LEFT :
3619                             (ctl->muted & HDA_AMP_MUTE_LEFT);
3620                         mute |= (right == 0) ? HDA_AMP_MUTE_RIGHT :
3621                             (ctl->muted & HDA_AMP_MUTE_RIGHT);
3622                 } else {
3623                         mute |= (lvol == 0) ? HDA_AMP_MUTE_LEFT :
3624                             (ctl->muted & HDA_AMP_MUTE_LEFT);
3625                         mute |= (rvol == 0) ? HDA_AMP_MUTE_RIGHT :
3626                             (ctl->muted & HDA_AMP_MUTE_RIGHT);
3627                 }
3628                 hdac_audio_ctl_amp_set(ctl, mute, lvol, rvol);
3629         }
3630         hdac_unlock(sc);
3631
3632         return (left | (right << 8));
3633 }
3634
3635 static int
3636 hdac_audio_ctl_ossmixer_setrecsrc(struct snd_mixer *m, uint32_t src)
3637 {
3638         struct hdac_devinfo *devinfo = mix_getdevinfo(m);
3639         struct hdac_widget *w, *cw;
3640         struct hdac_softc *sc = devinfo->codec->sc;
3641         uint32_t ret = src, target;
3642         int i, j;
3643
3644         target = 0;
3645         for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
3646                 if (src & (1 << i)) {
3647                         target = 1 << i;
3648                         break;
3649                 }
3650         }
3651
3652         hdac_lock(sc);
3653
3654         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
3655                 w = hdac_widget_get(devinfo, i);
3656                 if (w == NULL || w->enable == 0)
3657                         continue;
3658                 if (!(w->pflags & HDA_ADC_RECSEL))
3659                         continue;
3660                 for (j = 0; j < w->nconns; j++) {
3661                         cw = hdac_widget_get(devinfo, w->conns[j]);
3662                         if (cw == NULL || cw->enable == 0)
3663                                 continue;
3664                         if ((target == SOUND_MASK_VOLUME &&
3665                             cw->type !=
3666                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) ||
3667                             (target != SOUND_MASK_VOLUME &&
3668                             cw->type ==
3669                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER))
3670                                 continue;
3671                         if (cw->ctlflags & target) {
3672                                 if (!(w->pflags & HDA_ADC_LOCKED))
3673                                         hdac_widget_connection_select(w, j);
3674                                 ret = target;
3675                                 j += w->nconns;
3676                         }
3677                 }
3678         }
3679
3680         hdac_unlock(sc);
3681
3682         return (ret);
3683 }
3684
3685 static kobj_method_t hdac_audio_ctl_ossmixer_methods[] = {
3686         KOBJMETHOD(mixer_init,          hdac_audio_ctl_ossmixer_init),
3687         KOBJMETHOD(mixer_set,           hdac_audio_ctl_ossmixer_set),
3688         KOBJMETHOD(mixer_setrecsrc,     hdac_audio_ctl_ossmixer_setrecsrc),
3689         KOBJMETHOD_END
3690 };
3691 MIXER_DECLARE(hdac_audio_ctl_ossmixer);
3692
3693 static void
3694 hdac_unsolq_task(void *context, int pending)
3695 {
3696         struct hdac_softc *sc;
3697
3698         sc = (struct hdac_softc *)context;
3699
3700         hdac_lock(sc);
3701         hdac_unsolq_flush(sc);
3702         hdac_unlock(sc);
3703 }
3704
3705 /****************************************************************************
3706  * int hdac_attach(device_t)
3707  *
3708  * Attach the device into the kernel. Interrupts usually won't be enabled
3709  * when this function is called. Setup everything that doesn't require
3710  * interrupts and defer probing of codecs until interrupts are enabled.
3711  ****************************************************************************/
3712 static int
3713 hdac_attach(device_t dev)
3714 {
3715         struct hdac_softc *sc;
3716         int result;
3717         int i;
3718         uint16_t vendor;
3719         uint8_t v;
3720
3721         sc = kmalloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO);
3722         sc->lock = snd_mtxcreate(device_get_nameunit(dev), HDAC_MTX_NAME);
3723         sc->dev = dev;
3724         sc->pci_subvendor = (uint32_t)pci_get_subdevice(sc->dev) << 16;
3725         sc->pci_subvendor |= (uint32_t)pci_get_subvendor(sc->dev) & 0x0000ffff;
3726         vendor = pci_get_vendor(dev);
3727
3728         if (sc->pci_subvendor == HP_NX6325_SUBVENDORX) {
3729                 /* Screw nx6325 - subdevice/subvendor swapped */
3730                 sc->pci_subvendor = HP_NX6325_SUBVENDOR;
3731         }
3732
3733         callout_init(&sc->poll_hda);
3734         callout_init(&sc->poll_hdac);
3735         callout_init(&sc->poll_jack);
3736
3737         TASK_INIT(&sc->unsolq_task, 0, hdac_unsolq_task, sc);
3738
3739         sc->poll_ticks = 1;
3740         sc->poll_ival = HDAC_POLL_INTERVAL;
3741         if (resource_int_value(device_get_name(dev),
3742             device_get_unit(dev), "polling", &i) == 0 && i != 0)
3743                 sc->polling = 1;
3744         else
3745                 sc->polling = 0;
3746
3747         sc->chan_size = pcm_getbuffersize(dev,
3748             HDA_BUFSZ_MIN, HDA_BUFSZ_DEFAULT, HDA_BUFSZ_MAX);
3749
3750         if (resource_int_value(device_get_name(dev),
3751             device_get_unit(dev), "blocksize", &i) == 0 && i > 0) {
3752                 i &= HDA_BLK_ALIGN;
3753                 if (i < HDA_BLK_MIN)
3754                         i = HDA_BLK_MIN;
3755                 sc->chan_blkcnt = sc->chan_size / i;
3756                 i = 0;
3757                 while (sc->chan_blkcnt >> i)
3758                         i++;
3759                 sc->chan_blkcnt = 1 << (i - 1);
3760                 if (sc->chan_blkcnt < HDA_BDL_MIN)
3761                         sc->chan_blkcnt = HDA_BDL_MIN;
3762                 else if (sc->chan_blkcnt > HDA_BDL_MAX)
3763                         sc->chan_blkcnt = HDA_BDL_MAX;
3764         } else
3765                 sc->chan_blkcnt = HDA_BDL_DEFAULT;
3766
3767         result = bus_dma_tag_create(NULL,       /* parent */
3768             HDAC_DMA_ALIGNMENT,                 /* alignment */
3769             0,                                  /* boundary */
3770             BUS_SPACE_MAXADDR_32BIT,            /* lowaddr */
3771             BUS_SPACE_MAXADDR,                  /* highaddr */
3772             NULL,                               /* filtfunc */
3773             NULL,                               /* fistfuncarg */
3774             sc->chan_size,                      /* maxsize */
3775             1,                                  /* nsegments */
3776             sc->chan_size,                      /* maxsegsz */
3777             0,                                  /* flags */
3778             &sc->chan_dmat);                    /* dmat */
3779         if (result != 0) {
3780                 device_printf(dev, "%s: bus_dma_tag_create failed (%x)\n",
3781                      __func__, result);
3782                 snd_mtxfree(sc->lock);
3783                 kfree(sc, M_DEVBUF);
3784                 return (ENXIO);
3785         }
3786
3787
3788         sc->hdabus = NULL;
3789         for (i = 0; i < HDAC_CODEC_MAX; i++)
3790                 sc->codecs[i] = NULL;
3791
3792         pci_enable_busmaster(dev);
3793
3794         if (vendor == INTEL_VENDORID) {
3795                 /* TCSEL -> TC0 */
3796                 v = pci_read_config(dev, 0x44, 1);
3797                 pci_write_config(dev, 0x44, v & 0xf8, 1);
3798                 HDA_BOOTVERBOSE(
3799                         device_printf(dev, "TCSEL: 0x%02d -> 0x%02d\n", v,
3800                             pci_read_config(dev, 0x44, 1));
3801                 );
3802         }
3803
3804 #if 0 /* TODO: No uncacheable DMA support in DragonFly. */
3805         sc->flags |= HDAC_F_DMA_NOCACHE;
3806
3807         if (resource_int_value(device_get_name(dev),
3808             device_get_unit(dev), "snoop", &i) == 0 && i != 0) {
3809 #else
3810         sc->flags &= ~HDAC_F_DMA_NOCACHE;
3811 #endif
3812
3813                 /*
3814                  * Try to enable PCIe snoop to avoid messing around with
3815                  * uncacheable DMA attribute. Since PCIe snoop register
3816                  * config is pretty much vendor specific, there are no
3817                  * general solutions on how to enable it, forcing us (even
3818                  * Microsoft) to enable uncacheable or write combined DMA
3819                  * by default.
3820                  *
3821                  * http://msdn2.microsoft.com/en-us/library/ms790324.aspx
3822                  */
3823                 for (i = 0; i < HDAC_PCIESNOOP_LEN; i++) {
3824                         if (hdac_pcie_snoop[i].vendor != vendor)
3825                                 continue;
3826                         sc->flags &= ~HDAC_F_DMA_NOCACHE;
3827                         if (hdac_pcie_snoop[i].reg == 0x00)
3828                                 break;
3829                         v = pci_read_config(dev, hdac_pcie_snoop[i].reg, 1);
3830                         if ((v & hdac_pcie_snoop[i].enable) ==
3831                             hdac_pcie_snoop[i].enable)
3832                                 break;
3833                         v &= hdac_pcie_snoop[i].mask;
3834                         v |= hdac_pcie_snoop[i].enable;
3835                         pci_write_config(dev, hdac_pcie_snoop[i].reg, v, 1);
3836                         v = pci_read_config(dev, hdac_pcie_snoop[i].reg, 1);
3837                         if ((v & hdac_pcie_snoop[i].enable) !=
3838                             hdac_pcie_snoop[i].enable) {
3839                                 HDA_BOOTVERBOSE(
3840                                         device_printf(dev,
3841                                             "WARNING: Failed to enable PCIe "
3842                                             "snoop!\n");
3843                                 );
3844 #if 0 /* TODO: No uncacheable DMA support in DragonFly. */
3845                                 sc->flags |= HDAC_F_DMA_NOCACHE;
3846 #endif
3847                         }
3848                         break;
3849                 }
3850
3851                 if (pci_is_pcie(dev)) {
3852                         int pcie_cap = pci_get_pciecap_ptr(dev);
3853                         uint16_t dev_ctl;
3854
3855                         dev_ctl = pci_read_config(dev,
3856                             pcie_cap + PCIER_DEVCTRL, 2);
3857                         if (bootverbose) {
3858                                 device_printf(dev, "device ctrl %#x\n",
3859                                     dev_ctl);
3860                         }
3861
3862                         if (dev_ctl & PCIEM_DEVCTL_NOSNOOP) {
3863                                 dev_ctl &= ~PCIEM_DEVCTL_NOSNOOP;
3864                                 pci_write_config(dev,
3865                                     pcie_cap + PCIER_DEVCTRL, dev_ctl, 2);
3866
3867                                 if (bootverbose)
3868                                         device_printf(dev, "disable nosnoop\n");
3869                         }
3870                         sc->flags &= ~HDAC_F_DMA_NOCACHE;
3871                 }
3872
3873 #if 0 /* TODO: No uncacheable DMA support in DragonFly. */
3874         }
3875 #endif
3876
3877         HDA_BOOTVERBOSE(
3878                 device_printf(dev, "DMA Coherency: %s / vendor=0x%04x\n",
3879                     (sc->flags & HDAC_F_DMA_NOCACHE) ?
3880                     "Uncacheable" : "PCIe snoop", vendor);
3881         );
3882
3883         /* Allocate resources */
3884         result = hdac_mem_alloc(sc);
3885         if (result != 0)
3886                 goto hdac_attach_fail;
3887         result = hdac_irq_alloc(sc);
3888         if (result != 0)
3889                 goto hdac_attach_fail;
3890
3891         /* Get Capabilities */
3892         result = hdac_get_capabilities(sc);
3893         if (result != 0)
3894                 goto hdac_attach_fail;
3895
3896         /* Allocate CORB and RIRB dma memory */
3897         result = hdac_dma_alloc(sc, &sc->corb_dma,
3898             sc->corb_size * sizeof(uint32_t));
3899         if (result != 0)
3900                 goto hdac_attach_fail;
3901         result = hdac_dma_alloc(sc, &sc->rirb_dma,
3902             sc->rirb_size * sizeof(struct hdac_rirb));
3903         if (result != 0)
3904                 goto hdac_attach_fail;
3905
3906         /* Quiesce everything */
3907         hdac_reset(sc);
3908
3909         /* Initialize the CORB and RIRB */
3910         hdac_corb_init(sc);
3911         hdac_rirb_init(sc);
3912
3913         /* Defer remaining of initialization until interrupts are enabled */
3914         sc->intrhook.ich_func = hdac_attach2;
3915         sc->intrhook.ich_arg = (void *)sc;
3916         sc->intrhook.ich_desc = "snd_hda";
3917         if (cold == 0 || config_intrhook_establish(&sc->intrhook) != 0) {
3918                 sc->intrhook.ich_func = NULL;
3919                 hdac_attach2(sc);
3920         }
3921
3922         return (0);
3923
3924 hdac_attach_fail:
3925         hdac_irq_free(sc);
3926         hdac_dma_free(sc, &sc->rirb_dma);
3927         hdac_dma_free(sc, &sc->corb_dma);
3928         hdac_mem_free(sc);
3929         snd_mtxfree(sc->lock);
3930         kfree(sc, M_DEVBUF);
3931
3932         return (ENXIO);
3933 }
3934
3935 static void
3936 hdac_audio_parse(struct hdac_devinfo *devinfo)
3937 {
3938         struct hdac_softc *sc = devinfo->codec->sc;
3939         struct hdac_widget *w;
3940         uint32_t res;
3941         int i;
3942         nid_t cad, nid;
3943
3944         cad = devinfo->codec->cad;
3945         nid = devinfo->nid;
3946
3947         hdac_command(sc,
3948             HDA_CMD_SET_POWER_STATE(cad, nid, HDA_CMD_POWER_STATE_D0), cad);
3949
3950         DELAY(100);
3951
3952         res = hdac_command(sc,
3953             HDA_CMD_GET_PARAMETER(cad , nid, HDA_PARAM_SUB_NODE_COUNT), cad);
3954
3955         devinfo->nodecnt = HDA_PARAM_SUB_NODE_COUNT_TOTAL(res);
3956         devinfo->startnode = HDA_PARAM_SUB_NODE_COUNT_START(res);
3957         devinfo->endnode = devinfo->startnode + devinfo->nodecnt;
3958
3959         res = hdac_command(sc,
3960             HDA_CMD_GET_PARAMETER(cad , nid, HDA_PARAM_GPIO_COUNT), cad);
3961         devinfo->function.audio.gpio = res;
3962
3963         HDA_BOOTVERBOSE(
3964                 device_printf(sc->dev, "       Vendor: 0x%08x\n",
3965                     devinfo->vendor_id);
3966                 device_printf(sc->dev, "       Device: 0x%08x\n",
3967                     devinfo->device_id);
3968                 device_printf(sc->dev, "     Revision: 0x%08x\n",
3969                     devinfo->revision_id);
3970                 device_printf(sc->dev, "     Stepping: 0x%08x\n",
3971                     devinfo->stepping_id);
3972                 device_printf(sc->dev, "PCI Subvendor: 0x%08x\n",
3973                     sc->pci_subvendor);
3974                 device_printf(sc->dev, "        Nodes: start=%d "
3975                     "endnode=%d total=%d\n",
3976                     devinfo->startnode, devinfo->endnode, devinfo->nodecnt);
3977                 device_printf(sc->dev, "    CORB size: %d\n", sc->corb_size);
3978                 device_printf(sc->dev, "    RIRB size: %d\n", sc->rirb_size);
3979                 device_printf(sc->dev, "      Streams: ISS=%d OSS=%d BSS=%d\n",
3980                     sc->num_iss, sc->num_oss, sc->num_bss);
3981                 device_printf(sc->dev, "         GPIO: 0x%08x\n",
3982                     devinfo->function.audio.gpio);
3983                 device_printf(sc->dev, "               NumGPIO=%d NumGPO=%d "
3984                     "NumGPI=%d GPIWake=%d GPIUnsol=%d\n",
3985                     HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->function.audio.gpio),
3986                     HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->function.audio.gpio),
3987                     HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->function.audio.gpio),
3988                     HDA_PARAM_GPIO_COUNT_GPI_WAKE(devinfo->function.audio.gpio),
3989                     HDA_PARAM_GPIO_COUNT_GPI_UNSOL(devinfo->function.audio.gpio));
3990         );
3991
3992         res = hdac_command(sc,
3993             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_SUPP_STREAM_FORMATS),
3994             cad);
3995         devinfo->function.audio.supp_stream_formats = res;
3996
3997         res = hdac_command(sc,
3998             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_SUPP_PCM_SIZE_RATE),
3999             cad);
4000         devinfo->function.audio.supp_pcm_size_rate = res;
4001
4002         res = hdac_command(sc,
4003             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_OUTPUT_AMP_CAP),
4004             cad);
4005         devinfo->function.audio.outamp_cap = res;
4006
4007         res = hdac_command(sc,
4008             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_INPUT_AMP_CAP),
4009             cad);
4010         devinfo->function.audio.inamp_cap = res;
4011
4012         if (devinfo->nodecnt > 0)
4013                 devinfo->widget = kmalloc(
4014                     sizeof(*(devinfo->widget)) * devinfo->nodecnt,
4015                     M_HDAC, M_WAITOK | M_ZERO);
4016         else
4017                 devinfo->widget = NULL;
4018
4019         if (devinfo->widget == NULL) {
4020                 device_printf(sc->dev, "unable to allocate widgets!\n");
4021                 devinfo->endnode = devinfo->startnode;
4022                 devinfo->nodecnt = 0;
4023                 return;
4024         }
4025
4026         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4027                 w = hdac_widget_get(devinfo, i);
4028                 if (w == NULL)
4029                         device_printf(sc->dev, "Ghost widget! nid=%d!\n", i);
4030                 else {
4031                         w->devinfo = devinfo;
4032                         w->nid = i;
4033                         w->enable = 1;
4034                         w->selconn = -1;
4035                         w->pflags = 0;
4036                         w->ctlflags = 0;
4037                         w->param.eapdbtl = HDAC_INVALID;
4038                         hdac_widget_parse(w);
4039                 }
4040         }
4041 }
4042
4043 static void
4044 hdac_audio_ctl_parse(struct hdac_devinfo *devinfo)
4045 {
4046         struct hdac_softc *sc = devinfo->codec->sc;
4047         struct hdac_audio_ctl *ctls;
4048         struct hdac_widget *w, *cw;
4049         int i, j, cnt, max, ocap, icap;
4050         int mute, offset, step, size;
4051
4052         /* XXX This is redundant */
4053         max = 0;
4054         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4055                 w = hdac_widget_get(devinfo, i);
4056                 if (w == NULL || w->enable == 0)
4057                         continue;
4058                 if (w->param.outamp_cap != 0)
4059                         max++;
4060                 if (w->param.inamp_cap != 0) {
4061                         switch (w->type) {
4062                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
4063                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4064                                 for (j = 0; j < w->nconns; j++) {
4065                                         cw = hdac_widget_get(devinfo,
4066                                             w->conns[j]);
4067                                         if (cw == NULL || cw->enable == 0)
4068                                                 continue;
4069                                         max++;
4070                                 }
4071                                 break;
4072                         default:
4073                                 max++;
4074                                 break;
4075                         }
4076                 }
4077         }
4078
4079         devinfo->function.audio.ctlcnt = max;
4080
4081         if (max < 1)
4082                 return;
4083
4084         ctls = kmalloc(sizeof(*ctls) * max, M_HDAC, M_ZERO | M_WAITOK);
4085         cnt = 0;
4086         for (i = devinfo->startnode; cnt < max && i < devinfo->endnode; i++) {
4087                 if (cnt >= max) {
4088                         device_printf(sc->dev, "%s: Ctl overflow!\n",
4089                             __func__);
4090                         break;
4091                 }
4092                 w = hdac_widget_get(devinfo, i);
4093                 if (w == NULL || w->enable == 0)
4094                         continue;
4095                 ocap = w->param.outamp_cap;
4096                 icap = w->param.inamp_cap;
4097                 if (ocap != 0) {
4098                         mute = HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(ocap);
4099                         step = HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(ocap);
4100                         size = HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(ocap);
4101                         offset = HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(ocap);
4102                         /*if (offset > step) {
4103                                 HDA_BOOTVERBOSE(
4104                                         device_printf(sc->dev,
4105                                             "HDA_DEBUG: BUGGY outamp: nid=%d "
4106                                             "[offset=%d > step=%d]\n",
4107                                             w->nid, offset, step);
4108                                 );
4109                                 offset = step;
4110                         }*/
4111                         ctls[cnt].enable = 1;
4112                         ctls[cnt].widget = w;
4113                         ctls[cnt].mute = mute;
4114                         ctls[cnt].step = step;
4115                         ctls[cnt].size = size;
4116                         ctls[cnt].offset = offset;
4117                         ctls[cnt].left = offset;
4118                         ctls[cnt].right = offset;
4119                         ctls[cnt++].dir = HDA_CTL_OUT;
4120                 }
4121
4122                 if (icap != 0) {
4123                         mute = HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(icap);
4124                         step = HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(icap);
4125                         size = HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(icap);
4126                         offset = HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(icap);
4127                         /*if (offset > step) {
4128                                 HDA_BOOTVERBOSE(
4129                                         device_printf(sc->dev,
4130                                             "HDA_DEBUG: BUGGY inamp: nid=%d "
4131                                             "[offset=%d > step=%d]\n",
4132                                             w->nid, offset, step);
4133                                 );
4134                                 offset = step;
4135                         }*/
4136                         switch (w->type) {
4137                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
4138                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4139                                 for (j = 0; j < w->nconns; j++) {
4140                                         if (cnt >= max) {
4141                                                 device_printf(sc->dev,
4142                                                     "%s: Ctl overflow!\n",
4143                                                     __func__);
4144                                                 break;
4145                                         }
4146                                         cw = hdac_widget_get(devinfo,
4147                                             w->conns[j]);
4148                                         if (cw == NULL || cw->enable == 0)
4149                                                 continue;
4150                                         ctls[cnt].enable = 1;
4151                                         ctls[cnt].widget = w;
4152                                         ctls[cnt].childwidget = cw;
4153                                         ctls[cnt].index = j;
4154                                         ctls[cnt].mute = mute;
4155                                         ctls[cnt].step = step;
4156                                         ctls[cnt].size = size;
4157                                         ctls[cnt].offset = offset;
4158                                         ctls[cnt].left = offset;
4159                                         ctls[cnt].right = offset;
4160                                         ctls[cnt++].dir = HDA_CTL_IN;
4161                                 }
4162                                 break;
4163                         default:
4164                                 if (cnt >= max) {
4165                                         device_printf(sc->dev,
4166                                             "%s: Ctl overflow!\n",
4167                                             __func__);
4168                                         break;
4169                                 }
4170                                 ctls[cnt].enable = 1;
4171                                 ctls[cnt].widget = w;
4172                                 ctls[cnt].mute = mute;
4173                                 ctls[cnt].step = step;
4174                                 ctls[cnt].size = size;
4175                                 ctls[cnt].offset = offset;
4176                                 ctls[cnt].left = offset;
4177                                 ctls[cnt].right = offset;
4178                                 ctls[cnt++].dir = HDA_CTL_IN;
4179                                 break;
4180                         }
4181                 }
4182         }
4183
4184         devinfo->function.audio.ctl = ctls;
4185 }
4186
4187 static const struct {
4188         uint32_t model;
4189         uint32_t id;
4190         uint32_t set, unset;
4191 } hdac_quirks[] = {
4192         /*
4193          * XXX Force stereo quirk. Monoural recording / playback
4194          *     on few codecs (especially ALC880) seems broken or
4195          *     perhaps unsupported.
4196          */
4197         { HDA_MATCH_ALL, HDA_MATCH_ALL,
4198             HDA_QUIRK_FORCESTEREO | HDA_QUIRK_IVREF, 0 },
4199         { ACER_ALL_SUBVENDOR, HDA_MATCH_ALL,
4200             HDA_QUIRK_GPIO0, 0 },
4201         { ASUS_M5200_SUBVENDOR, HDA_CODEC_ALC880,
4202             HDA_QUIRK_GPIO0, 0 },
4203         { ASUS_A7M_SUBVENDOR, HDA_CODEC_ALC880,
4204             HDA_QUIRK_GPIO0, 0 },
4205         { ASUS_A7T_SUBVENDOR, HDA_CODEC_ALC882,
4206             HDA_QUIRK_GPIO0, 0 },
4207         { ASUS_W2J_SUBVENDOR, HDA_CODEC_ALC882,
4208             HDA_QUIRK_GPIO0, 0 },
4209         { ASUS_U5F_SUBVENDOR, HDA_CODEC_AD1986A,
4210             HDA_QUIRK_EAPDINV, 0 },
4211         { ASUS_A8JC_SUBVENDOR, HDA_CODEC_AD1986A,
4212             HDA_QUIRK_EAPDINV, 0 },
4213         { ASUS_F3JC_SUBVENDOR, HDA_CODEC_ALC861,
4214             HDA_QUIRK_OVREF, 0 },
4215         { ASUS_W6F_SUBVENDOR, HDA_CODEC_ALC861,
4216             HDA_QUIRK_OVREF, 0 },
4217         { UNIWILL_9075_SUBVENDOR, HDA_CODEC_ALC861,
4218             HDA_QUIRK_OVREF, 0 },
4219         /*{ ASUS_M2N_SUBVENDOR, HDA_CODEC_AD1988,
4220             HDA_QUIRK_IVREF80, HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF100 },*/
4221         { MEDION_MD95257_SUBVENDOR, HDA_CODEC_ALC880,
4222             HDA_QUIRK_GPIO1, 0 },
4223         { LENOVO_3KN100_SUBVENDOR, HDA_CODEC_AD1986A,
4224             HDA_QUIRK_EAPDINV, 0 },
4225         { SAMSUNG_Q1_SUBVENDOR, HDA_CODEC_AD1986A,
4226             HDA_QUIRK_EAPDINV, 0 },
4227         { APPLE_MB3_SUBVENDOR, HDA_CODEC_ALC885,
4228             HDA_QUIRK_GPIO0 | HDA_QUIRK_OVREF50, 0},
4229         { APPLE_INTEL_MAC, HDA_CODEC_STAC9221,
4230             HDA_QUIRK_GPIO0 | HDA_QUIRK_GPIO1, 0 },
4231         { HDA_MATCH_ALL, HDA_CODEC_AD1988,
4232             HDA_QUIRK_IVREF80, HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF100 },
4233         { HDA_MATCH_ALL, HDA_CODEC_AD1988B,
4234             HDA_QUIRK_IVREF80, HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF100 },
4235         { HDA_MATCH_ALL, HDA_CODEC_CXVENICE,
4236             0, HDA_QUIRK_FORCESTEREO },
4237         { HDA_MATCH_ALL, HDA_CODEC_STACXXXX,
4238             HDA_QUIRK_SOFTPCMVOL, 0 }
4239 };
4240 #define HDAC_QUIRKS_LEN NELEM(hdac_quirks)
4241
4242 static void
4243 hdac_vendor_patch_parse(struct hdac_devinfo *devinfo)
4244 {
4245         struct hdac_widget *w;
4246         struct hdac_audio_ctl *ctl;
4247         uint32_t id, subvendor;
4248         int i;
4249
4250         id = hdac_codec_id(devinfo);
4251         subvendor = devinfo->codec->sc->pci_subvendor;
4252
4253         /*
4254          * Quirks
4255          */
4256         for (i = 0; i < HDAC_QUIRKS_LEN; i++) {
4257                 if (!(HDA_DEV_MATCH(hdac_quirks[i].model, subvendor) &&
4258                     HDA_DEV_MATCH(hdac_quirks[i].id, id)))
4259                         continue;
4260                 if (hdac_quirks[i].set != 0)
4261                         devinfo->function.audio.quirks |=
4262                             hdac_quirks[i].set;
4263                 if (hdac_quirks[i].unset != 0)
4264                         devinfo->function.audio.quirks &=
4265                             ~(hdac_quirks[i].unset);
4266         }
4267
4268         switch (id) {
4269         case HDA_CODEC_ALC260:
4270                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4271                         w = hdac_widget_get(devinfo, i);
4272                         if (w == NULL || w->enable == 0)
4273                                 continue;
4274                         if (w->type !=
4275                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT)
4276                                 continue;
4277                         if (w->nid != 5)
4278                                 w->enable = 0;
4279                 }
4280                 if (subvendor == HP_XW4300_SUBVENDOR) {
4281                         ctl = hdac_audio_ctl_amp_get(devinfo, 16, 0, 1);
4282                         if (ctl != NULL && ctl->widget != NULL) {
4283                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4284                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4285                         }
4286                         ctl = hdac_audio_ctl_amp_get(devinfo, 17, 0, 1);
4287                         if (ctl != NULL && ctl->widget != NULL) {
4288                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4289                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4290                         }
4291                 } else if (subvendor == HP_3010_SUBVENDOR) {
4292                         ctl = hdac_audio_ctl_amp_get(devinfo, 17, 0, 1);
4293                         if (ctl != NULL && ctl->widget != NULL) {
4294                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4295                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4296                         }
4297                         ctl = hdac_audio_ctl_amp_get(devinfo, 21, 0, 1);
4298                         if (ctl != NULL && ctl->widget != NULL) {
4299                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4300                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4301                         }
4302                 }
4303                 break;
4304         case HDA_CODEC_ALC268:
4305                 if (HDA_DEV_MATCH(ACER_ALL_SUBVENDOR, subvendor)) {
4306                         w = hdac_widget_get(devinfo, 29);
4307                         if (w != NULL) {
4308                                 w->enable = 1;
4309                                 w->type =
4310                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET;
4311                                 w->param.widget_cap &=
4312                                     ~HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK;
4313                                 w->param.widget_cap |=
4314                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET <<
4315                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT;
4316                                 strlcpy(w->name, "beep widget", sizeof(w->name));
4317                         }
4318                 }
4319                 break;
4320         case HDA_CODEC_ALC262:
4321                 if (subvendor == HP_DC7700_SUBVENDOR) {
4322                         ctl = hdac_audio_ctl_amp_get(devinfo, 22, 0, 1);
4323                         if (ctl != NULL && ctl->widget != NULL) {
4324                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4325                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4326                         }
4327                         ctl = hdac_audio_ctl_amp_get(devinfo, 27, 0, 1);
4328                         if (ctl != NULL && ctl->widget != NULL) {
4329                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4330                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4331                         }
4332                 }
4333                 break;
4334         case HDA_CODEC_ALC861:
4335                 ctl = hdac_audio_ctl_amp_get(devinfo, 21, 2, 1);
4336                 if (ctl != NULL)
4337                         ctl->muted = HDA_AMP_MUTE_ALL;
4338                 break;
4339         case HDA_CODEC_ALC880:
4340                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4341                         w = hdac_widget_get(devinfo, i);
4342                         if (w == NULL || w->enable == 0)
4343                                 continue;
4344                         if (w->type ==
4345                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT &&
4346                             w->nid != 9 && w->nid != 29) {
4347                                         w->enable = 0;
4348                         } else if (w->type !=
4349                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET &&
4350                             w->nid == 29) {
4351                                 w->type =
4352                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET;
4353                                 w->param.widget_cap &=
4354                                     ~HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK;
4355                                 w->param.widget_cap |=
4356                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET <<
4357                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT;
4358                                 strlcpy(w->name, "beep widget", sizeof(w->name));
4359                         }
4360                 }
4361                 break;
4362         case HDA_CODEC_ALC883:
4363                 /*
4364                  * nid: 24/25 = External (jack) or Internal (fixed) Mic.
4365                  *              Clear vref cap for jack connectivity.
4366                  */
4367                 w = hdac_widget_get(devinfo, 24);
4368                 if (w != NULL && w->enable != 0 && w->type ==
4369                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
4370                     (w->wclass.pin.config &
4371                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) ==
4372                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK)
4373                         w->wclass.pin.cap &= ~(
4374                             HDA_PARAM_PIN_CAP_VREF_CTRL_100_MASK |
4375                             HDA_PARAM_PIN_CAP_VREF_CTRL_80_MASK |
4376                             HDA_PARAM_PIN_CAP_VREF_CTRL_50_MASK);
4377                 w = hdac_widget_get(devinfo, 25);
4378                 if (w != NULL && w->enable != 0 && w->type ==
4379                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
4380                     (w->wclass.pin.config &
4381                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) ==
4382                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK)
4383                         w->wclass.pin.cap &= ~(
4384                             HDA_PARAM_PIN_CAP_VREF_CTRL_100_MASK |
4385                             HDA_PARAM_PIN_CAP_VREF_CTRL_80_MASK |
4386                             HDA_PARAM_PIN_CAP_VREF_CTRL_50_MASK);
4387                 /*
4388                  * nid: 26 = Line-in, leave it alone.
4389                  */
4390                 break;
4391         case HDA_CODEC_AD1981HD:
4392                 w = hdac_widget_get(devinfo, 11);
4393                 if (w != NULL && w->enable != 0 && w->nconns > 3)
4394                         w->selconn = 3;
4395                 if (subvendor == IBM_M52_SUBVENDOR) {
4396                         ctl = hdac_audio_ctl_amp_get(devinfo, 7, 0, 1);
4397                         if (ctl != NULL)
4398                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4399                 }
4400                 break;
4401         case HDA_CODEC_AD1986A:
4402                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4403                         w = hdac_widget_get(devinfo, i);
4404                         if (w == NULL || w->enable == 0)
4405                                 continue;
4406                         if (w->type !=
4407                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT)
4408                                 continue;
4409                         if (w->nid != 3)
4410                                 w->enable = 0;
4411                 }
4412                 if (subvendor == ASUS_M2NPVMX_SUBVENDOR ||
4413                     subvendor == ASUS_A8NVMCSM_SUBVENDOR) {
4414                         /* nid 28 is mic, nid 29 is line-in */
4415                         w = hdac_widget_get(devinfo, 15);
4416                         if (w != NULL)
4417                                 w->selconn = 2;
4418                         w = hdac_widget_get(devinfo, 16);
4419                         if (w != NULL)
4420                                 w->selconn = 1;
4421                 }
4422                 break;
4423         case HDA_CODEC_AD1988:
4424         case HDA_CODEC_AD1988B:
4425                 /*w = hdac_widget_get(devinfo, 12);
4426                 if (w != NULL) {
4427                         w->selconn = 1;
4428                         w->pflags |= HDA_ADC_LOCKED;
4429                 }
4430                 w = hdac_widget_get(devinfo, 13);
4431                 if (w != NULL) {
4432                         w->selconn = 4;
4433                         w->pflags |= HDA_ADC_LOCKED;
4434                 }
4435                 w = hdac_widget_get(devinfo, 14);
4436                 if (w != NULL) {
4437                         w->selconn = 2;
4438                         w->pflags |= HDA_ADC_LOCKED;
4439                 }*/
4440                 ctl = hdac_audio_ctl_amp_get(devinfo, 57, 0, 1);
4441                 if (ctl != NULL) {
4442                         ctl->ossmask = SOUND_MASK_IGAIN;
4443                         ctl->widget->ctlflags |= SOUND_MASK_IGAIN;
4444                 }
4445                 ctl = hdac_audio_ctl_amp_get(devinfo, 58, 0, 1);
4446                 if (ctl != NULL) {
4447                         ctl->ossmask = SOUND_MASK_IGAIN;
4448                         ctl->widget->ctlflags |= SOUND_MASK_IGAIN;
4449                 }
4450                 ctl = hdac_audio_ctl_amp_get(devinfo, 60, 0, 1);
4451                 if (ctl != NULL) {
4452                         ctl->ossmask = SOUND_MASK_IGAIN;
4453                         ctl->widget->ctlflags |= SOUND_MASK_IGAIN;
4454                 }
4455                 ctl = hdac_audio_ctl_amp_get(devinfo, 32, 0, 1);
4456                 if (ctl != NULL) {
4457                         ctl->ossmask = SOUND_MASK_MIC | SOUND_MASK_VOLUME;
4458                         ctl->widget->ctlflags |= SOUND_MASK_MIC;
4459                 }
4460                 ctl = hdac_audio_ctl_amp_get(devinfo, 32, 4, 1);
4461                 if (ctl != NULL) {
4462                         ctl->ossmask = SOUND_MASK_MIC | SOUND_MASK_VOLUME;
4463                         ctl->widget->ctlflags |= SOUND_MASK_MIC;
4464                 }
4465                 ctl = hdac_audio_ctl_amp_get(devinfo, 32, 1, 1);
4466                 if (ctl != NULL) {
4467                         ctl->ossmask = SOUND_MASK_LINE | SOUND_MASK_VOLUME;
4468                         ctl->widget->ctlflags |= SOUND_MASK_LINE;
4469                 }
4470                 ctl = hdac_audio_ctl_amp_get(devinfo, 32, 7, 1);
4471                 if (ctl != NULL) {
4472                         ctl->ossmask = SOUND_MASK_SPEAKER | SOUND_MASK_VOLUME;
4473                         ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4474                 }
4475                 break;
4476         case HDA_CODEC_STAC9221:
4477                 /*
4478                  * Dell XPS M1210 need all DACs for each output jacks
4479                  */
4480                 if (subvendor == DELL_XPSM1210_SUBVENDOR)
4481                         break;
4482                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4483                         w = hdac_widget_get(devinfo, i);
4484                         if (w == NULL || w->enable == 0)
4485                                 continue;
4486                         if (w->type !=
4487                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT)
4488                                 continue;
4489                         if (w->nid != 2)
4490                                 w->enable = 0;
4491                 }
4492                 break;
4493         case HDA_CODEC_STAC9221D:
4494                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4495                         w = hdac_widget_get(devinfo, i);
4496                         if (w == NULL || w->enable == 0)
4497                                 continue;
4498                         if (w->type ==
4499                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT &&
4500                             w->nid != 6)
4501                                 w->enable = 0;
4502
4503                 }
4504                 break;
4505         case HDA_CODEC_STAC9227:
4506                 w = hdac_widget_get(devinfo, 8);
4507                 if (w != NULL)
4508                         w->enable = 0;
4509                 w = hdac_widget_get(devinfo, 9);
4510                 if (w != NULL)
4511                         w->enable = 0;
4512                 break;
4513         case HDA_CODEC_CXWAIKIKI:
4514                 if (subvendor == HP_DV5000_SUBVENDOR) {
4515                         w = hdac_widget_get(devinfo, 27);
4516                         if (w != NULL)
4517                                 w->enable = 0;
4518                 }
4519                 ctl = hdac_audio_ctl_amp_get(devinfo, 16, 0, 1);
4520                 if (ctl != NULL)
4521                         ctl->ossmask = SOUND_MASK_SKIP;
4522                 ctl = hdac_audio_ctl_amp_get(devinfo, 25, 0, 1);
4523                 if (ctl != NULL && ctl->childwidget != NULL &&
4524                     ctl->childwidget->enable != 0) {
4525                         ctl->ossmask = SOUND_MASK_PCM | SOUND_MASK_VOLUME;
4526                         ctl->childwidget->ctlflags |= SOUND_MASK_PCM;
4527                 }
4528                 ctl = hdac_audio_ctl_amp_get(devinfo, 25, 1, 1);
4529                 if (ctl != NULL && ctl->childwidget != NULL &&
4530                     ctl->childwidget->enable != 0) {
4531                         ctl->ossmask = SOUND_MASK_LINE | SOUND_MASK_VOLUME;
4532                         ctl->childwidget->ctlflags |= SOUND_MASK_LINE;
4533                 }
4534                 ctl = hdac_audio_ctl_amp_get(devinfo, 25, 2, 1);
4535                 if (ctl != NULL && ctl->childwidget != NULL &&
4536                     ctl->childwidget->enable != 0) {
4537                         ctl->ossmask = SOUND_MASK_MIC | SOUND_MASK_VOLUME;
4538                         ctl->childwidget->ctlflags |= SOUND_MASK_MIC;
4539                 }
4540                 ctl = hdac_audio_ctl_amp_get(devinfo, 26, 0, 1);
4541                 if (ctl != NULL) {
4542                         ctl->ossmask = SOUND_MASK_SKIP;
4543                         /* XXX mixer \=rec mic broken.. why?!? */
4544                         /* ctl->widget->ctlflags |= SOUND_MASK_MIC; */
4545                 }
4546                 break;
4547         default:
4548                 break;
4549         }
4550 }
4551
4552 static int
4553 hdac_audio_ctl_ossmixer_getnextdev(struct hdac_devinfo *devinfo)
4554 {
4555         int *dev = &devinfo->function.audio.ossidx;
4556
4557         while (*dev < SOUND_MIXER_NRDEVICES) {
4558                 switch (*dev) {
4559                 case SOUND_MIXER_VOLUME:
4560                 case SOUND_MIXER_BASS:
4561                 case SOUND_MIXER_TREBLE:
4562                 case SOUND_MIXER_PCM:
4563                 case SOUND_MIXER_SPEAKER:
4564                 case SOUND_MIXER_LINE:
4565                 case SOUND_MIXER_MIC:
4566                 case SOUND_MIXER_CD:
4567                 case SOUND_MIXER_RECLEV:
4568                 case SOUND_MIXER_IGAIN:
4569                 case SOUND_MIXER_OGAIN: /* reserved for EAPD switch */
4570                         (*dev)++;
4571                         break;
4572                 default:
4573                         return (*dev)++;
4574                         break;
4575                 }
4576         }
4577
4578         return (-1);
4579 }
4580
4581 static int
4582 hdac_widget_find_dac_path(struct hdac_devinfo *devinfo, nid_t nid, int depth)
4583 {
4584         struct hdac_widget *w;
4585         int i, ret = 0;
4586
4587         if (depth > HDA_PARSE_MAXDEPTH)
4588                 return (0);
4589         w = hdac_widget_get(devinfo, nid);
4590         if (w == NULL || w->enable == 0)
4591                 return (0);
4592         switch (w->type) {
4593         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT:
4594                 w->pflags |= HDA_DAC_PATH;
4595                 ret = 1;
4596                 break;
4597         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4598         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
4599                 for (i = 0; i < w->nconns; i++) {
4600                         if (hdac_widget_find_dac_path(devinfo,
4601                             w->conns[i], depth + 1) != 0) {
4602                                 if (w->selconn == -1)
4603                                         w->selconn = i;
4604                                 ret = 1;
4605                                 w->pflags |= HDA_DAC_PATH;
4606                         }
4607                 }
4608                 break;
4609         default:
4610                 break;
4611         }
4612         return (ret);
4613 }
4614
4615 static int
4616 hdac_widget_find_adc_path(struct hdac_devinfo *devinfo, nid_t nid, int depth)
4617 {
4618         struct hdac_widget *w;
4619         int i, conndev, ret = 0;
4620
4621         if (depth > HDA_PARSE_MAXDEPTH)
4622                 return (0);
4623         w = hdac_widget_get(devinfo, nid);
4624         if (w == NULL || w->enable == 0)
4625                 return (0);
4626         switch (w->type) {
4627         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT:
4628         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
4629         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4630                 for (i = 0; i < w->nconns; i++) {
4631                         if (hdac_widget_find_adc_path(devinfo, w->conns[i],
4632                             depth + 1) != 0) {
4633                                 if (w->selconn == -1)
4634                                         w->selconn = i;
4635                                 w->pflags |= HDA_ADC_PATH;
4636                                 ret = 1;
4637                         }
4638                 }
4639                 break;
4640         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX:
4641                 conndev = w->wclass.pin.config &
4642                     HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
4643                 if (HDA_PARAM_PIN_CAP_INPUT_CAP(w->wclass.pin.cap) &&
4644                     (conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_CD ||
4645                     conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN ||
4646                     conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN)) {
4647                         w->pflags |= HDA_ADC_PATH;
4648                         ret = 1;
4649                 }
4650                 break;
4651         /*case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4652                 if (w->pflags & HDA_DAC_PATH) {
4653                         w->pflags |= HDA_ADC_PATH;
4654                         ret = 1;
4655                 }
4656                 break;*/
4657         default:
4658                 break;
4659         }
4660         return (ret);
4661 }
4662
4663 static uint32_t
4664 hdac_audio_ctl_outamp_build(struct hdac_devinfo *devinfo,
4665                                 nid_t nid, nid_t pnid, int index, int depth)
4666 {
4667         struct hdac_widget *w, *pw;
4668         struct hdac_audio_ctl *ctl;
4669         uint32_t fl = 0;
4670         int i, ossdev, conndev, strategy;
4671
4672         if (depth > HDA_PARSE_MAXDEPTH)
4673                 return (0);
4674
4675         w = hdac_widget_get(devinfo, nid);
4676         if (w == NULL || w->enable == 0)
4677                 return (0);
4678
4679         pw = hdac_widget_get(devinfo, pnid);
4680         strategy = devinfo->function.audio.parsing_strategy;
4681
4682         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER
4683             || w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR) {
4684                 for (i = 0; i < w->nconns; i++) {
4685                         fl |= hdac_audio_ctl_outamp_build(devinfo, w->conns[i],
4686                             w->nid, i, depth + 1);
4687                 }
4688                 w->ctlflags |= fl;
4689                 return (fl);
4690         } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT &&
4691             (w->pflags & HDA_DAC_PATH)) {
4692                 i = 0;
4693                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
4694                         if (ctl->enable == 0 || ctl->widget == NULL)
4695                                 continue;
4696                         /* XXX This should be compressed! */
4697                         if (((ctl->widget->nid == w->nid) ||
4698                             (ctl->widget->nid == pnid && ctl->index == index &&
4699                             (ctl->dir & HDA_CTL_IN)) ||
4700                             (ctl->widget->nid == pnid && pw != NULL &&
4701                             pw->type ==
4702                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR &&
4703                             (pw->nconns < 2 || pw->selconn == index ||
4704                             pw->selconn == -1) &&
4705                             (ctl->dir & HDA_CTL_OUT)) ||
4706                             (strategy == HDA_PARSE_DIRECT &&
4707                             ctl->widget->nid == w->nid)) &&
4708                             !(ctl->ossmask & ~SOUND_MASK_VOLUME)) {
4709                                 /*if (pw != NULL && pw->selconn == -1)
4710                                         pw->selconn = index;
4711                                 fl |= SOUND_MASK_VOLUME;
4712                                 fl |= SOUND_MASK_PCM;
4713                                 ctl->ossmask |= SOUND_MASK_VOLUME;
4714                                 ctl->ossmask |= SOUND_MASK_PCM;
4715                                 ctl->ossdev = SOUND_MIXER_PCM;*/
4716                                 if (!(w->ctlflags & SOUND_MASK_PCM) ||
4717                                     (pw != NULL &&
4718                                     !(pw->ctlflags & SOUND_MASK_PCM))) {
4719                                         fl |= SOUND_MASK_VOLUME;
4720                                         fl |= SOUND_MASK_PCM;
4721                                         ctl->ossmask |= SOUND_MASK_VOLUME;
4722                                         ctl->ossmask |= SOUND_MASK_PCM;
4723                                         ctl->ossdev = SOUND_MIXER_PCM;
4724                                         w->ctlflags |= SOUND_MASK_VOLUME;
4725                                         w->ctlflags |= SOUND_MASK_PCM;
4726                                         if (pw != NULL) {
4727                                                 if (pw->selconn == -1)
4728                                                         pw->selconn = index;
4729                                                 pw->ctlflags |=
4730                                                     SOUND_MASK_VOLUME;
4731                                                 pw->ctlflags |=
4732                                                     SOUND_MASK_PCM;
4733                                         }
4734                                 }
4735                         }
4736                 }
4737                 w->ctlflags |= fl;
4738                 return (fl);
4739         } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
4740             HDA_PARAM_PIN_CAP_INPUT_CAP(w->wclass.pin.cap) &&
4741             (w->pflags & HDA_ADC_PATH)) {
4742                 conndev = w->wclass.pin.config &
4743                     HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
4744                 i = 0;
4745                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
4746                         if (ctl->enable == 0 || ctl->widget == NULL)
4747                                 continue;
4748                         /* XXX This should be compressed! */
4749                         if (((ctl->widget->nid == pnid && ctl->index == index &&
4750                             (ctl->dir & HDA_CTL_IN)) ||
4751                             (ctl->widget->nid == pnid && pw != NULL &&
4752                             pw->type ==
4753                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR &&
4754                             (pw->nconns < 2 || pw->selconn == index ||
4755                             pw->selconn == -1) &&
4756                             (ctl->dir & HDA_CTL_OUT)) ||
4757                             (strategy == HDA_PARSE_DIRECT &&
4758                             ctl->widget->nid == w->nid)) &&
4759                             !(ctl->ossmask & ~SOUND_MASK_VOLUME)) {
4760                                 if (pw != NULL && pw->selconn == -1)
4761                                         pw->selconn = index;
4762                                 ossdev = 0;
4763                                 switch (conndev) {
4764                                 case HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN:
4765                                         ossdev = SOUND_MIXER_MIC;
4766                                         break;
4767                                 case HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN:
4768                                         ossdev = SOUND_MIXER_LINE;
4769                                         break;
4770                                 case HDA_CONFIG_DEFAULTCONF_DEVICE_CD:
4771                                         ossdev = SOUND_MIXER_CD;
4772                                         break;
4773                                 default:
4774                                         ossdev =
4775                                             hdac_audio_ctl_ossmixer_getnextdev(
4776                                             devinfo);
4777                                         if (ossdev < 0)
4778                                                 ossdev = 0;
4779                                         break;
4780                                 }
4781                                 if (strategy == HDA_PARSE_MIXER) {
4782                                         fl |= SOUND_MASK_VOLUME;
4783                                         ctl->ossmask |= SOUND_MASK_VOLUME;
4784                                 }
4785                                 fl |= 1 << ossdev;
4786                                 ctl->ossmask |= 1 << ossdev;
4787                                 ctl->ossdev = ossdev;
4788                         }
4789                 }
4790                 w->ctlflags |= fl;
4791                 return (fl);
4792         } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET) {
4793                 i = 0;
4794                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
4795                         if (ctl->enable == 0 || ctl->widget == NULL)
4796                                 continue;
4797                         /* XXX This should be compressed! */
4798                         if (((ctl->widget->nid == pnid && ctl->index == index &&
4799                             (ctl->dir & HDA_CTL_IN)) ||
4800                             (ctl->widget->nid == pnid && pw != NULL &&
4801                             pw->type ==
4802                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR &&
4803                             (pw->nconns < 2 || pw->selconn == index ||
4804                             pw->selconn == -1) &&
4805                             (ctl->dir & HDA_CTL_OUT)) ||
4806                             (strategy == HDA_PARSE_DIRECT &&
4807                             ctl->widget->nid == w->nid)) &&
4808                             !(ctl->ossmask & ~SOUND_MASK_VOLUME)) {
4809                                 if (pw != NULL && pw->selconn == -1)
4810                                         pw->selconn = index;
4811                                 fl |= SOUND_MASK_VOLUME;
4812                                 fl |= SOUND_MASK_SPEAKER;
4813                                 ctl->ossmask |= SOUND_MASK_VOLUME;
4814                                 ctl->ossmask |= SOUND_MASK_SPEAKER;
4815                                 ctl->ossdev = SOUND_MIXER_SPEAKER;
4816                         }
4817                 }
4818                 w->ctlflags |= fl;
4819                 return (fl);
4820         }
4821         return (0);
4822 }
4823
4824 static uint32_t
4825 hdac_audio_ctl_inamp_build(struct hdac_devinfo *devinfo, nid_t nid, int depth)
4826 {
4827         struct hdac_widget *w, *cw;
4828         struct hdac_audio_ctl *ctl;
4829         uint32_t fl;
4830         int i;
4831
4832         if (depth > HDA_PARSE_MAXDEPTH)
4833                 return (0);
4834
4835         w = hdac_widget_get(devinfo, nid);
4836         if (w == NULL || w->enable == 0)
4837                 return (0);
4838         /*if (!(w->pflags & HDA_ADC_PATH))
4839                 return (0);
4840         if (!(w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT ||
4841             w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR))
4842                 return (0);*/
4843         i = 0;
4844         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
4845                 if (ctl->enable == 0 || ctl->widget == NULL)
4846                         continue;
4847                 if (ctl->widget->nid == nid) {
4848                         ctl->ossmask |= SOUND_MASK_RECLEV;
4849                         w->ctlflags |= SOUND_MASK_RECLEV;
4850                         return (SOUND_MASK_RECLEV);
4851                 }
4852         }
4853         for (i = 0; i < w->nconns; i++) {
4854                 cw = hdac_widget_get(devinfo, w->conns[i]);
4855                 if (cw == NULL || cw->enable == 0)
4856                         continue;
4857                 if (cw->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR)
4858                         continue;
4859                 fl = hdac_audio_ctl_inamp_build(devinfo, cw->nid, depth + 1);
4860                 if (fl != 0) {
4861                         cw->ctlflags |= fl;
4862                         w->ctlflags |= fl;
4863                         return (fl);
4864                 }
4865         }
4866         return (0);
4867 }
4868
4869 static int
4870 hdac_audio_ctl_recsel_build(struct hdac_devinfo *devinfo, nid_t nid, int depth)
4871 {
4872         struct hdac_widget *w, *cw;
4873         int i, child = 0;
4874
4875         if (depth > HDA_PARSE_MAXDEPTH)
4876                 return (0);
4877
4878         w = hdac_widget_get(devinfo, nid);
4879         if (w == NULL || w->enable == 0)
4880                 return (0);
4881         /*if (!(w->pflags & HDA_ADC_PATH))
4882                 return (0);
4883         if (!(w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT ||
4884             w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR))
4885                 return (0);*/
4886         /* XXX weak! */
4887         for (i = 0; i < w->nconns; i++) {
4888                 cw = hdac_widget_get(devinfo, w->conns[i]);
4889                 if (cw == NULL)
4890                         continue;
4891                 if (++child > 1) {
4892                         w->pflags |= HDA_ADC_RECSEL;
4893                         return (1);
4894                 }
4895         }
4896         for (i = 0; i < w->nconns; i++) {
4897                 if (hdac_audio_ctl_recsel_build(devinfo,
4898                     w->conns[i], depth + 1) != 0)
4899                         return (1);
4900         }
4901         return (0);
4902 }
4903
4904 static int
4905 hdac_audio_build_tree_strategy(struct hdac_devinfo *devinfo)
4906 {
4907         struct hdac_widget *w, *cw;
4908         int i, j, conndev, found_dac = 0;
4909         int strategy;
4910
4911         strategy = devinfo->function.audio.parsing_strategy;
4912
4913         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4914                 w = hdac_widget_get(devinfo, i);
4915                 if (w == NULL || w->enable == 0)
4916                         continue;
4917                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
4918                         continue;
4919                 if (!HDA_PARAM_PIN_CAP_OUTPUT_CAP(w->wclass.pin.cap))
4920                         continue;
4921                 conndev = w->wclass.pin.config &
4922                     HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
4923                 if (!(conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT ||
4924                     conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_SPEAKER ||
4925                     conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT))
4926                         continue;
4927                 for (j = 0; j < w->nconns; j++) {
4928                         cw = hdac_widget_get(devinfo, w->conns[j]);
4929                         if (cw == NULL || cw->enable == 0)
4930                                 continue;
4931                         if (strategy == HDA_PARSE_MIXER && !(cw->type ==
4932                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER ||
4933                             cw->type ==
4934                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR))
4935                                 continue;
4936                         if (hdac_widget_find_dac_path(devinfo, cw->nid, 0)
4937                             != 0) {
4938                                 if (w->selconn == -1)
4939                                         w->selconn = j;
4940                                 w->pflags |= HDA_DAC_PATH;
4941                                 found_dac++;
4942                         }
4943                 }
4944         }
4945
4946         return (found_dac);
4947 }
4948
4949 static void
4950 hdac_audio_build_tree(struct hdac_devinfo *devinfo)
4951 {
4952         struct hdac_widget *w;
4953         struct hdac_audio_ctl *ctl;
4954         int i, j, dacs, strategy;
4955
4956         /* Construct DAC path */
4957         strategy = HDA_PARSE_MIXER;
4958         devinfo->function.audio.parsing_strategy = strategy;
4959         HDA_BOOTVERBOSE(
4960                 device_printf(devinfo->codec->sc->dev,
4961                     "HDA_DEBUG: HWiP: HDA Widget Parser - Revision %d\n",
4962                     HDA_WIDGET_PARSER_REV);
4963         );
4964         dacs = hdac_audio_build_tree_strategy(devinfo);
4965         if (dacs == 0) {
4966                 HDA_BOOTVERBOSE(
4967                         device_printf(devinfo->codec->sc->dev,
4968                             "HDA_DEBUG: HWiP: 0 DAC path found! "
4969                             "Retrying parser "
4970                             "using HDA_PARSE_DIRECT strategy.\n");
4971                 );
4972                 strategy = HDA_PARSE_DIRECT;
4973                 devinfo->function.audio.parsing_strategy = strategy;
4974                 dacs = hdac_audio_build_tree_strategy(devinfo);
4975         }
4976
4977         HDA_BOOTVERBOSE(
4978                 device_printf(devinfo->codec->sc->dev,
4979                     "HDA_DEBUG: HWiP: Found %d DAC path using HDA_PARSE_%s "
4980                     "strategy.\n",
4981                     dacs, (strategy == HDA_PARSE_MIXER) ? "MIXER" : "DIRECT");
4982         );
4983
4984         /* Construct ADC path */
4985         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4986                 w = hdac_widget_get(devinfo, i);
4987                 if (w == NULL || w->enable == 0)
4988                         continue;
4989                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT)
4990                         continue;
4991                 (void)hdac_widget_find_adc_path(devinfo, w->nid, 0);
4992         }
4993
4994         /* Output mixers */
4995         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4996                 w = hdac_widget_get(devinfo, i);
4997                 if (w == NULL || w->enable == 0)
4998                         continue;
4999                 if ((strategy == HDA_PARSE_MIXER &&
5000                     (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER ||
5001                     w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR)
5002                     && (w->pflags & HDA_DAC_PATH)) ||
5003                     (strategy == HDA_PARSE_DIRECT && (w->pflags &
5004                     (HDA_DAC_PATH | HDA_ADC_PATH)))) {
5005                         w->ctlflags |= hdac_audio_ctl_outamp_build(devinfo,
5006                             w->nid, devinfo->startnode - 1, 0, 0);
5007                 } else if (w->type ==
5008                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET) {
5009                         j = 0;
5010                         while ((ctl = hdac_audio_ctl_each(devinfo, &j)) !=
5011                             NULL) {
5012                                 if (ctl->enable == 0 || ctl->widget == NULL)
5013                                         continue;
5014                                 if (ctl->widget->nid != w->nid)
5015                                         continue;
5016                                 ctl->ossmask |= SOUND_MASK_VOLUME;
5017                                 ctl->ossmask |= SOUND_MASK_SPEAKER;
5018                                 ctl->ossdev = SOUND_MIXER_SPEAKER;
5019                                 w->ctlflags |= SOUND_MASK_VOLUME;
5020                                 w->ctlflags |= SOUND_MASK_SPEAKER;
5021                         }
5022                 }
5023         }
5024
5025         /* Input mixers (rec) */
5026         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5027                 w = hdac_widget_get(devinfo, i);
5028                 if (w == NULL || w->enable == 0)
5029                         continue;
5030                 if (!(w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT &&
5031                     w->pflags & HDA_ADC_PATH))
5032                         continue;
5033                 hdac_audio_ctl_inamp_build(devinfo, w->nid, 0);
5034                 hdac_audio_ctl_recsel_build(devinfo, w->nid, 0);
5035         }
5036 }
5037
5038 #define HDA_COMMIT_CONN (1 << 0)
5039 #define HDA_COMMIT_CTRL (1 << 1)
5040 #define HDA_COMMIT_EAPD (1 << 2)
5041 #define HDA_COMMIT_GPIO (1 << 3)
5042 #define HDA_COMMIT_MISC (1 << 4)
5043 #define HDA_COMMIT_ALL  (HDA_COMMIT_CONN | HDA_COMMIT_CTRL | \
5044                         HDA_COMMIT_EAPD | HDA_COMMIT_GPIO | HDA_COMMIT_MISC)
5045
5046 static void
5047 hdac_audio_commit(struct hdac_devinfo *devinfo, uint32_t cfl)
5048 {
5049         struct hdac_softc *sc = devinfo->codec->sc;
5050         struct hdac_widget *w;
5051         nid_t cad;
5052         int i;
5053
5054         if (!(cfl & HDA_COMMIT_ALL))
5055                 return;
5056
5057         cad = devinfo->codec->cad;
5058
5059         if ((cfl & HDA_COMMIT_MISC)) {
5060                 if (sc->pci_subvendor == APPLE_INTEL_MAC)
5061                         hdac_command(sc, HDA_CMD_12BIT(cad, devinfo->nid,
5062                             0x7e7, 0), cad);
5063         }
5064
5065         if (cfl & HDA_COMMIT_GPIO) {
5066                 uint32_t gdata, gmask, gdir;
5067                 int commitgpio, numgpio;
5068
5069                 gdata = 0;
5070                 gmask = 0;
5071                 gdir = 0;
5072                 commitgpio = 0;
5073
5074                 numgpio = HDA_PARAM_GPIO_COUNT_NUM_GPIO(
5075                     devinfo->function.audio.gpio);
5076
5077                 if (devinfo->function.audio.quirks & HDA_QUIRK_GPIOFLUSH)
5078                         commitgpio = (numgpio > 0) ? 1 : 0;
5079                 else {
5080                         for (i = 0; i < numgpio && i < HDA_GPIO_MAX; i++) {
5081                                 if (!(devinfo->function.audio.quirks &
5082                                     (1 << i)))
5083                                         continue;
5084                                 if (commitgpio == 0) {
5085                                         commitgpio = 1;
5086                                         HDA_BOOTVERBOSE(
5087                                                 gdata = hdac_command(sc,
5088                                                     HDA_CMD_GET_GPIO_DATA(cad,
5089                                                     devinfo->nid), cad);
5090                                                 gmask = hdac_command(sc,
5091                                                     HDA_CMD_GET_GPIO_ENABLE_MASK(cad,
5092                                                     devinfo->nid), cad);
5093                                                 gdir = hdac_command(sc,
5094                                                     HDA_CMD_GET_GPIO_DIRECTION(cad,
5095                                                     devinfo->nid), cad);
5096                                                 device_printf(sc->dev,
5097                                                     "GPIO init: data=0x%08x "
5098                                                     "mask=0x%08x dir=0x%08x\n",
5099                                                     gdata, gmask, gdir);
5100                                                 gdata = 0;
5101                                                 gmask = 0;
5102                                                 gdir = 0;
5103                                         );
5104                                 }
5105                                 gdata |= 1 << i;
5106                                 gmask |= 1 << i;
5107                                 gdir |= 1 << i;
5108                         }
5109                 }
5110
5111                 if (commitgpio != 0) {
5112                         HDA_BOOTVERBOSE(
5113                                 device_printf(sc->dev,
5114                                     "GPIO commit: data=0x%08x mask=0x%08x "
5115                                     "dir=0x%08x\n",
5116                                     gdata, gmask, gdir);
5117                         );
5118                         hdac_command(sc,
5119                             HDA_CMD_SET_GPIO_ENABLE_MASK(cad, devinfo->nid,
5120                             gmask), cad);
5121                         hdac_command(sc,
5122                             HDA_CMD_SET_GPIO_DIRECTION(cad, devinfo->nid,
5123                             gdir), cad);
5124                         hdac_command(sc,
5125                             HDA_CMD_SET_GPIO_DATA(cad, devinfo->nid,
5126                             gdata), cad);
5127                 }
5128         }
5129
5130         for (i = 0; i < devinfo->nodecnt; i++) {
5131                 w = &devinfo->widget[i];
5132                 if (w == NULL || w->enable == 0)
5133                         continue;
5134                 if (cfl & HDA_COMMIT_CONN) {
5135                         if (w->selconn == -1)
5136                                 w->selconn = 0;
5137                         if (w->nconns > 0)
5138                                 hdac_widget_connection_select(w, w->selconn);
5139                 }
5140                 if ((cfl & HDA_COMMIT_CTRL) &&
5141                     w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
5142                         uint32_t pincap;
5143
5144                         pincap = w->wclass.pin.cap;
5145
5146                         if ((w->pflags & (HDA_DAC_PATH | HDA_ADC_PATH)) ==
5147                             (HDA_DAC_PATH | HDA_ADC_PATH))
5148                                 device_printf(sc->dev, "WARNING: node %d "
5149                                     "participate both for DAC/ADC!\n", w->nid);
5150                         if (w->pflags & HDA_DAC_PATH) {
5151                                 w->wclass.pin.ctrl &=
5152                                     ~HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE;
5153                                 if ((w->wclass.pin.config &
5154                                     HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) !=
5155                                     HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT)
5156                                         w->wclass.pin.ctrl &=
5157                                             ~HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE;
5158                                 if ((devinfo->function.audio.quirks & HDA_QUIRK_OVREF100) &&
5159                                     HDA_PARAM_PIN_CAP_VREF_CTRL_100(pincap))
5160                                         w->wclass.pin.ctrl |=
5161                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5162                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_100);
5163                                 else if ((devinfo->function.audio.quirks & HDA_QUIRK_OVREF80) &&
5164                                     HDA_PARAM_PIN_CAP_VREF_CTRL_80(pincap))
5165                                         w->wclass.pin.ctrl |=
5166                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5167                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_80);
5168                                 else if ((devinfo->function.audio.quirks & HDA_QUIRK_OVREF50) &&
5169                                     HDA_PARAM_PIN_CAP_VREF_CTRL_50(pincap))
5170                                         w->wclass.pin.ctrl |=
5171                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5172                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_50);
5173                         } else if (w->pflags & HDA_ADC_PATH) {
5174                                 w->wclass.pin.ctrl &=
5175                                     ~(HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE |
5176                                     HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE);
5177                                 if ((devinfo->function.audio.quirks & HDA_QUIRK_IVREF100) &&
5178                                     HDA_PARAM_PIN_CAP_VREF_CTRL_100(pincap))
5179                                         w->wclass.pin.ctrl |=
5180                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5181                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_100);
5182                                 else if ((devinfo->function.audio.quirks & HDA_QUIRK_IVREF80) &&
5183                                     HDA_PARAM_PIN_CAP_VREF_CTRL_80(pincap))
5184                                         w->wclass.pin.ctrl |=
5185                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5186                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_80);
5187                                 else if ((devinfo->function.audio.quirks & HDA_QUIRK_IVREF50) &&
5188                                     HDA_PARAM_PIN_CAP_VREF_CTRL_50(pincap))
5189                                         w->wclass.pin.ctrl |=
5190                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5191                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_50);
5192                         } else
5193                                 w->wclass.pin.ctrl &= ~(
5194                                     HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE |
5195                                     HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE |
5196                                     HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE |
5197                                     HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK);
5198                         hdac_command(sc,
5199                             HDA_CMD_SET_PIN_WIDGET_CTRL(cad, w->nid,
5200                             w->wclass.pin.ctrl), cad);
5201                 }
5202                 if ((cfl & HDA_COMMIT_EAPD) &&
5203                     w->param.eapdbtl != HDAC_INVALID) {
5204                         uint32_t val;
5205
5206                         val = w->param.eapdbtl;
5207                         if (devinfo->function.audio.quirks &
5208                             HDA_QUIRK_EAPDINV)
5209                                 val ^= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
5210                         hdac_command(sc,
5211                             HDA_CMD_SET_EAPD_BTL_ENABLE(cad, w->nid,
5212                             val), cad);
5213
5214                 }
5215                 DELAY(1000);
5216         }
5217 }
5218
5219 static void
5220 hdac_audio_ctl_commit(struct hdac_devinfo *devinfo)
5221 {
5222         struct hdac_softc *sc = devinfo->codec->sc;
5223         struct hdac_audio_ctl *ctl;
5224         int i;
5225
5226         devinfo->function.audio.mvol = 100 | (100 << 8);
5227         i = 0;
5228         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
5229                 if (ctl->enable == 0 || ctl->widget == NULL) {
5230                         HDA_BOOTVERBOSE(
5231                                 device_printf(sc->dev, "[%2d] Ctl nid=%d",
5232                                     i, (ctl->widget != NULL) ?
5233                                     ctl->widget->nid : -1);
5234                                 if (ctl->childwidget != NULL)
5235                                         kprintf(" childnid=%d",
5236                                             ctl->childwidget->nid);
5237                                 if (ctl->widget == NULL)
5238                                         kprintf(" NULL WIDGET!");
5239                                 kprintf(" DISABLED\n");
5240                         );
5241                         continue;
5242                 }
5243                 HDA_BOOTVERBOSE(
5244                         if (ctl->ossmask == 0) {
5245                                 device_printf(sc->dev, "[%2d] Ctl nid=%d",
5246                                     i, ctl->widget->nid);
5247                                 if (ctl->childwidget != NULL)
5248                                         kprintf(" childnid=%d",
5249                                         ctl->childwidget->nid);
5250                                 kprintf(" Bind to NONE\n");
5251                         }
5252                 );
5253                 if (ctl->step > 0) {
5254                         ctl->ossval = (ctl->left * 100) / ctl->step;
5255                         ctl->ossval |= ((ctl->right * 100) / ctl->step) << 8;
5256                 } else
5257                         ctl->ossval = 0;
5258                 hdac_audio_ctl_amp_set(ctl, HDA_AMP_MUTE_DEFAULT,
5259                     ctl->left, ctl->right);
5260         }
5261 }
5262
5263 static int
5264 hdac_pcmchannel_setup(struct hdac_devinfo *devinfo, int dir)
5265 {
5266         struct hdac_chan *ch;
5267         struct hdac_widget *w;
5268         uint32_t cap, fmtcap, pcmcap, path;
5269         int i, type, ret, max;
5270
5271         if (dir == PCMDIR_PLAY) {
5272                 type = HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT;
5273                 ch = &devinfo->codec->sc->play;
5274                 path = HDA_DAC_PATH;
5275         } else {
5276                 type = HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT;
5277                 ch = &devinfo->codec->sc->rec;
5278                 path = HDA_ADC_PATH;
5279         }
5280
5281         ch->caps = hdac_caps;
5282         ch->caps.fmtlist = ch->fmtlist;
5283         ch->bit16 = 1;
5284         ch->bit32 = 0;
5285         ch->pcmrates[0] = 48000;
5286         ch->pcmrates[1] = 0;
5287
5288         ret = 0;
5289         fmtcap = devinfo->function.audio.supp_stream_formats;
5290         pcmcap = devinfo->function.audio.supp_pcm_size_rate;
5291         max = NELEM(ch->io) - 1;
5292
5293         for (i = devinfo->startnode; i < devinfo->endnode && ret < max; i++) {
5294                 w = hdac_widget_get(devinfo, i);
5295                 if (w == NULL || w->enable == 0 || w->type != type ||
5296                     !(w->pflags & path))
5297                         continue;
5298                 cap = w->param.widget_cap;
5299                 /*if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(cap))
5300                         continue;*/
5301                 if (!HDA_PARAM_AUDIO_WIDGET_CAP_STEREO(cap))
5302                         continue;
5303                 cap = w->param.supp_stream_formats;
5304                 /*if (HDA_PARAM_SUPP_STREAM_FORMATS_AC3(cap)) {
5305                 }
5306                 if (HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32(cap)) {
5307                 }*/
5308                 if (!HDA_PARAM_SUPP_STREAM_FORMATS_PCM(cap))
5309                         continue;
5310                 if (ret == 0) {
5311                         fmtcap = w->param.supp_stream_formats;
5312                         pcmcap = w->param.supp_pcm_size_rate;
5313                 } else {
5314                         fmtcap &= w->param.supp_stream_formats;
5315                         pcmcap &= w->param.supp_pcm_size_rate;
5316                 }
5317                 ch->io[ret++] = i;
5318         }
5319         ch->io[ret] = -1;
5320
5321         ch->supp_stream_formats = fmtcap;
5322         ch->supp_pcm_size_rate = pcmcap;
5323
5324         /*
5325          *  8bit = 0
5326          * 16bit = 1
5327          * 20bit = 2
5328          * 24bit = 3
5329          * 32bit = 4
5330          */
5331         if (ret > 0) {
5332                 cap = pcmcap;
5333                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT(cap))
5334                         ch->bit16 = 1;
5335                 else if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT(cap))
5336                         ch->bit16 = 0;
5337                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT(cap))
5338                         ch->bit32 = 4;
5339                 else if (HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT(cap))
5340                         ch->bit32 = 3;
5341                 else if (HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT(cap))
5342                         ch->bit32 = 2;
5343                 i = 0;
5344                 if (!(devinfo->function.audio.quirks & HDA_QUIRK_FORCESTEREO))
5345                         ch->fmtlist[i++] = AFMT_S16_LE;
5346                 ch->fmtlist[i++] = AFMT_S16_LE | AFMT_STEREO;
5347                 if (ch->bit32 > 0) {
5348                         if (!(devinfo->function.audio.quirks &
5349                             HDA_QUIRK_FORCESTEREO))
5350                                 ch->fmtlist[i++] = AFMT_S32_LE;
5351                         ch->fmtlist[i++] = AFMT_S32_LE | AFMT_STEREO;
5352                 }
5353                 ch->fmtlist[i] = 0;
5354                 i = 0;
5355                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ(cap))
5356                         ch->pcmrates[i++] = 8000;
5357                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ(cap))
5358                         ch->pcmrates[i++] = 11025;
5359                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ(cap))
5360                         ch->pcmrates[i++] = 16000;
5361                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ(cap))
5362                         ch->pcmrates[i++] = 22050;
5363                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ(cap))
5364                         ch->pcmrates[i++] = 32000;
5365                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ(cap))
5366                         ch->pcmrates[i++] = 44100;
5367                 /* if (HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ(cap)) */
5368                 ch->pcmrates[i++] = 48000;
5369                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ(cap))
5370                         ch->pcmrates[i++] = 88200;
5371                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ(cap))
5372                         ch->pcmrates[i++] = 96000;
5373                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ(cap))
5374                         ch->pcmrates[i++] = 176400;
5375                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ(cap))
5376                         ch->pcmrates[i++] = 192000;
5377                 /* if (HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ(cap)) */
5378                 ch->pcmrates[i] = 0;
5379                 if (i > 0) {
5380                         ch->caps.minspeed = ch->pcmrates[0];
5381                         ch->caps.maxspeed = ch->pcmrates[i - 1];
5382                 }
5383         }
5384
5385         return (ret);
5386 }
5387
5388 static void
5389 hdac_dump_ctls(struct hdac_devinfo *devinfo, const char *banner, uint32_t flag)
5390 {
5391         struct hdac_audio_ctl *ctl;
5392         struct hdac_softc *sc = devinfo->codec->sc;
5393         int i;
5394         uint32_t fl = 0;
5395
5396
5397         if (flag == 0) {
5398                 fl = SOUND_MASK_VOLUME | SOUND_MASK_PCM |
5399                     SOUND_MASK_CD | SOUND_MASK_LINE | SOUND_MASK_RECLEV |
5400                     SOUND_MASK_MIC | SOUND_MASK_SPEAKER | SOUND_MASK_OGAIN;
5401         }
5402
5403         i = 0;
5404         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
5405                 if (ctl->enable == 0 || ctl->widget == NULL ||
5406                     ctl->widget->enable == 0 || (ctl->ossmask &
5407                     (SOUND_MASK_SKIP | SOUND_MASK_DISABLE)))
5408                         continue;
5409                 if ((flag == 0 && (ctl->ossmask & ~fl)) ||
5410                     (flag != 0 && (ctl->ossmask & flag))) {
5411                         if (banner != NULL) {
5412                                 device_printf(sc->dev, "\n");
5413                                 device_printf(sc->dev, "%s\n", banner);
5414                         }
5415                         goto hdac_ctl_dump_it_all;
5416                 }
5417         }
5418
5419         return;
5420
5421 hdac_ctl_dump_it_all:
5422         i = 0;
5423         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
5424                 if (ctl->enable == 0 || ctl->widget == NULL ||
5425                     ctl->widget->enable == 0)
5426                         continue;
5427                 if (!((flag == 0 && (ctl->ossmask & ~fl)) ||
5428                     (flag != 0 && (ctl->ossmask & flag))))
5429                         continue;
5430                 if (flag == 0) {
5431                         device_printf(sc->dev, "\n");
5432                         device_printf(sc->dev, "Unknown Ctl (OSS: %s)\n",
5433                             hdac_audio_ctl_ossmixer_mask2name(ctl->ossmask));
5434                 }
5435                 device_printf(sc->dev, "   |\n");
5436                 device_printf(sc->dev, "   +-  nid: %2d index: %2d ",
5437                     ctl->widget->nid, ctl->index);
5438                 if (ctl->childwidget != NULL)
5439                         kprintf("(nid: %2d) ", ctl->childwidget->nid);
5440                 else
5441                         kprintf("          ");
5442                 kprintf("mute: %d step: %3d size: %3d off: %3d dir=0x%x ossmask=0x%08x\n",
5443                     ctl->mute, ctl->step, ctl->size, ctl->offset, ctl->dir,
5444                     ctl->ossmask);
5445         }
5446 }
5447
5448 static void
5449 hdac_dump_audio_formats(struct hdac_softc *sc, uint32_t fcap, uint32_t pcmcap)
5450 {
5451         uint32_t cap;
5452
5453         cap = fcap;
5454         if (cap != 0) {
5455                 device_printf(sc->dev, "     Stream cap: 0x%08x\n", cap);
5456                 device_printf(sc->dev, "         Format:");
5457                 if (HDA_PARAM_SUPP_STREAM_FORMATS_AC3(cap))
5458                         kprintf(" AC3");
5459                 if (HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32(cap))
5460                         kprintf(" FLOAT32");
5461                 if (HDA_PARAM_SUPP_STREAM_FORMATS_PCM(cap))
5462                         kprintf(" PCM");
5463                 kprintf("\n");
5464         }
5465         cap = pcmcap;
5466         if (cap != 0) {
5467                 device_printf(sc->dev, "        PCM cap: 0x%08x\n", cap);
5468                 device_printf(sc->dev, "       PCM size:");
5469                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT(cap))
5470                         kprintf(" 8");
5471                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT(cap))
5472                         kprintf(" 16");
5473                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT(cap))
5474                         kprintf(" 20");
5475                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT(cap))
5476                         kprintf(" 24");
5477                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT(cap))
5478                         kprintf(" 32");
5479                 kprintf("\n");
5480                 device_printf(sc->dev, "       PCM rate:");
5481                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ(cap))
5482                         kprintf(" 8");
5483                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ(cap))
5484                         kprintf(" 11");
5485                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ(cap))
5486                         kprintf(" 16");
5487                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ(cap))
5488                         kprintf(" 22");
5489                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ(cap))
5490                         kprintf(" 32");
5491                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ(cap))
5492                         kprintf(" 44");
5493                 kprintf(" 48");
5494                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ(cap))
5495                         kprintf(" 88");
5496                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ(cap))
5497                         kprintf(" 96");
5498                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ(cap))
5499                         kprintf(" 176");
5500                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ(cap))
5501                         kprintf(" 192");
5502                 kprintf("\n");
5503         }
5504 }
5505
5506 static void
5507 hdac_dump_pin(struct hdac_softc *sc, struct hdac_widget *w)
5508 {
5509         uint32_t pincap, wcap;
5510
5511         pincap = w->wclass.pin.cap;
5512         wcap = w->param.widget_cap;
5513
5514         device_printf(sc->dev, "        Pin cap: 0x%08x\n", pincap);
5515         device_printf(sc->dev, "                ");
5516         if (HDA_PARAM_PIN_CAP_IMP_SENSE_CAP(pincap))
5517                 kprintf(" ISC");
5518         if (HDA_PARAM_PIN_CAP_TRIGGER_REQD(pincap))
5519                 kprintf(" TRQD");
5520         if (HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(pincap))
5521                 kprintf(" PDC");
5522         if (HDA_PARAM_PIN_CAP_HEADPHONE_CAP(pincap))
5523                 kprintf(" HP");
5524         if (HDA_PARAM_PIN_CAP_OUTPUT_CAP(pincap))
5525                 kprintf(" OUT");
5526         if (HDA_PARAM_PIN_CAP_INPUT_CAP(pincap))
5527                 kprintf(" IN");
5528         if (HDA_PARAM_PIN_CAP_BALANCED_IO_PINS(pincap))
5529                 kprintf(" BAL");
5530         if (HDA_PARAM_PIN_CAP_VREF_CTRL(pincap)) {
5531                 kprintf(" VREF[");
5532                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_50(pincap))
5533                         kprintf(" 50");
5534                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_80(pincap))
5535                         kprintf(" 80");
5536                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_100(pincap))
5537                         kprintf(" 100");
5538                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND(pincap))
5539                         kprintf(" GROUND");
5540                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ(pincap))
5541                         kprintf(" HIZ");
5542                 kprintf(" ]");
5543         }
5544         if (HDA_PARAM_PIN_CAP_EAPD_CAP(pincap))
5545                 kprintf(" EAPD");
5546         if (HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP(wcap))
5547                 kprintf(" : UNSOL");
5548         kprintf("\n");
5549         device_printf(sc->dev, "     Pin config: 0x%08x\n",
5550             w->wclass.pin.config);
5551         device_printf(sc->dev, "    Pin control: 0x%08x", w->wclass.pin.ctrl);
5552         if (w->wclass.pin.ctrl & HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE)
5553                 kprintf(" HP");
5554         if (w->wclass.pin.ctrl & HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE)
5555                 kprintf(" IN");
5556         if (w->wclass.pin.ctrl & HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE)
5557                 kprintf(" OUT");
5558         kprintf("\n");
5559 }
5560
5561 static void
5562 hdac_dump_amp(struct hdac_softc *sc, uint32_t cap, char *banner)
5563 {
5564         device_printf(sc->dev, "     %s amp: 0x%08x\n", banner, cap);
5565         device_printf(sc->dev, "                 "
5566             "mute=%d step=%d size=%d offset=%d\n",
5567             HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(cap),
5568             HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(cap),
5569             HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(cap),
5570             HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(cap));
5571 }
5572
5573 static void
5574 hdac_dump_nodes(struct hdac_devinfo *devinfo)
5575 {
5576         struct hdac_softc *sc = devinfo->codec->sc;
5577         struct hdac_widget *w, *cw;
5578         int i, j;
5579
5580         device_printf(sc->dev, "\n");
5581         device_printf(sc->dev, "Default Parameter\n");
5582         device_printf(sc->dev, "-----------------\n");
5583         hdac_dump_audio_formats(sc,
5584             devinfo->function.audio.supp_stream_formats,
5585             devinfo->function.audio.supp_pcm_size_rate);
5586         device_printf(sc->dev, "         IN amp: 0x%08x\n",
5587             devinfo->function.audio.inamp_cap);
5588         device_printf(sc->dev, "        OUT amp: 0x%08x\n",
5589             devinfo->function.audio.outamp_cap);
5590         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5591                 w = hdac_widget_get(devinfo, i);
5592                 if (w == NULL) {
5593                         device_printf(sc->dev, "Ghost widget nid=%d\n", i);
5594                         continue;
5595                 }
5596                 device_printf(sc->dev, "\n");
5597                 device_printf(sc->dev, "            nid: %d [%s]%s\n", w->nid,
5598                     HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap) ?
5599                     "DIGITAL" : "ANALOG",
5600                     (w->enable == 0) ? " [DISABLED]" : "");
5601                 device_printf(sc->dev, "           name: %s\n", w->name);
5602                 device_printf(sc->dev, "     widget_cap: 0x%08x\n",
5603                     w->param.widget_cap);
5604                 device_printf(sc->dev, "    Parse flags: 0x%08x\n",
5605                     w->pflags);
5606                 device_printf(sc->dev, "      Ctl flags: 0x%08x\n",
5607                     w->ctlflags);
5608                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT ||
5609                     w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT) {
5610                         hdac_dump_audio_formats(sc,
5611                             w->param.supp_stream_formats,
5612                             w->param.supp_pcm_size_rate);
5613                 } else if (w->type ==
5614                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
5615                         hdac_dump_pin(sc, w);
5616                 if (w->param.eapdbtl != HDAC_INVALID)
5617                         device_printf(sc->dev, "           EAPD: 0x%08x\n",
5618                             w->param.eapdbtl);
5619                 if (HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP(w->param.widget_cap) &&
5620                     w->param.outamp_cap != 0)
5621                         hdac_dump_amp(sc, w->param.outamp_cap, "Output");
5622                 if (HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP(w->param.widget_cap) &&
5623                     w->param.inamp_cap != 0)
5624                         hdac_dump_amp(sc, w->param.inamp_cap, " Input");
5625                 device_printf(sc->dev, "    connections: %d\n", w->nconns);
5626                 for (j = 0; j < w->nconns; j++) {
5627                         cw = hdac_widget_get(devinfo, w->conns[j]);
5628                         device_printf(sc->dev, "          |\n");
5629                         device_printf(sc->dev, "          + <- nid=%d [%s]",
5630                             w->conns[j], (cw == NULL) ? "GHOST!" : cw->name);
5631                         if (cw == NULL)
5632                                 kprintf(" [UNKNOWN]");
5633                         else if (cw->enable == 0)
5634                                 kprintf(" [DISABLED]");
5635                         if (w->nconns > 1 && w->selconn == j && w->type !=
5636                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER)
5637                                 kprintf(" (selected)");
5638                         kprintf("\n");
5639                 }
5640         }
5641
5642 }
5643
5644 static int
5645 hdac_dump_dac_internal(struct hdac_devinfo *devinfo, nid_t nid, int depth)
5646 {
5647         struct hdac_widget *w, *cw;
5648         struct hdac_softc *sc = devinfo->codec->sc;
5649         int i;
5650
5651         if (depth > HDA_PARSE_MAXDEPTH)
5652                 return (0);
5653
5654         w = hdac_widget_get(devinfo, nid);
5655         if (w == NULL || w->enable == 0 || !(w->pflags & HDA_DAC_PATH))
5656                 return (0);
5657
5658         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
5659                 device_printf(sc->dev, "\n");
5660                 device_printf(sc->dev, "    nid=%d [%s]\n", w->nid, w->name);
5661                 device_printf(sc->dev, "      ^\n");
5662                 device_printf(sc->dev, "      |\n");
5663                 device_printf(sc->dev, "      +-----<------+\n");
5664         } else {
5665                 device_printf(sc->dev, "                   ^\n");
5666                 device_printf(sc->dev, "                   |\n");
5667                 device_printf(sc->dev, "               ");
5668                 kprintf("  nid=%d [%s]\n", w->nid, w->name);
5669         }
5670
5671         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT) {
5672                 return (1);
5673         } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) {
5674                 for (i = 0; i < w->nconns; i++) {
5675                         cw = hdac_widget_get(devinfo, w->conns[i]);
5676                         if (cw == NULL || cw->enable == 0 || cw->type ==
5677                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
5678                                 continue;
5679                         if (hdac_dump_dac_internal(devinfo, cw->nid,
5680                             depth + 1) != 0)
5681                                 return (1);
5682                 }
5683         } else if ((w->type ==
5684             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR ||
5685             w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) &&
5686             w->selconn > -1 && w->selconn < w->nconns) {
5687                 if (hdac_dump_dac_internal(devinfo, w->conns[w->selconn],
5688                     depth + 1) != 0)
5689                         return (1);
5690         }
5691
5692         return (0);
5693 }
5694
5695 static void
5696 hdac_dump_dac(struct hdac_devinfo *devinfo)
5697 {
5698         struct hdac_widget *w;
5699         struct hdac_softc *sc = devinfo->codec->sc;
5700         int i, printed = 0;
5701
5702         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5703                 w = hdac_widget_get(devinfo, i);
5704                 if (w == NULL || w->enable == 0)
5705                         continue;
5706                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX ||
5707                     !(w->pflags & HDA_DAC_PATH))
5708                         continue;
5709                 if (printed == 0) {
5710                         printed = 1;
5711                         device_printf(sc->dev, "\n");
5712                         device_printf(sc->dev, "Playback path:\n");
5713                 }
5714                 hdac_dump_dac_internal(devinfo, w->nid, 0);
5715         }
5716 }
5717
5718 static void
5719 hdac_dump_adc(struct hdac_devinfo *devinfo)
5720 {
5721         struct hdac_widget *w, *cw;
5722         struct hdac_softc *sc = devinfo->codec->sc;
5723         int i, j;
5724         int printed = 0;
5725         char ossdevs[256];
5726
5727         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5728                 w = hdac_widget_get(devinfo, i);
5729                 if (w == NULL || w->enable == 0)
5730                         continue;
5731                 if (!(w->pflags & HDA_ADC_RECSEL))
5732                         continue;
5733                 if (printed == 0) {
5734                         printed = 1;
5735                         device_printf(sc->dev, "\n");
5736                         device_printf(sc->dev, "Recording sources:\n");
5737                 }
5738                 device_printf(sc->dev, "\n");
5739                 device_printf(sc->dev, "    nid=%d [%s]\n", w->nid, w->name);
5740                 for (j = 0; j < w->nconns; j++) {
5741                         cw = hdac_widget_get(devinfo, w->conns[j]);
5742                         if (cw == NULL || cw->enable == 0)
5743                                 continue;
5744                         hdac_audio_ctl_ossmixer_mask2allname(cw->ctlflags,
5745                             ossdevs, sizeof(ossdevs));
5746                         device_printf(sc->dev, "      |\n");
5747                         device_printf(sc->dev, "      + <- nid=%d [%s]",
5748                             cw->nid, cw->name);
5749                         if (strlen(ossdevs) > 0) {
5750                                 kprintf(" [recsrc: %s]", ossdevs);
5751                         }
5752                         kprintf("\n");
5753                 }
5754         }
5755 }
5756
5757 static void
5758 hdac_dump_pcmchannels(struct hdac_softc *sc, int pcnt, int rcnt)
5759 {
5760         nid_t *nids;
5761
5762         if (pcnt > 0) {
5763                 device_printf(sc->dev, "\n");
5764                 device_printf(sc->dev, "   PCM Playback: %d\n", pcnt);
5765                 hdac_dump_audio_formats(sc, sc->play.supp_stream_formats,
5766                     sc->play.supp_pcm_size_rate);
5767                 device_printf(sc->dev, "            DAC:");
5768                 for (nids = sc->play.io; *nids != -1; nids++)
5769                         kprintf(" %d", *nids);
5770                 kprintf("\n");
5771         }
5772
5773         if (rcnt > 0) {
5774                 device_printf(sc->dev, "\n");
5775                 device_printf(sc->dev, "     PCM Record: %d\n", rcnt);
5776                 hdac_dump_audio_formats(sc, sc->play.supp_stream_formats,
5777                     sc->rec.supp_pcm_size_rate);
5778                 device_printf(sc->dev, "            ADC:");
5779                 for (nids = sc->rec.io; *nids != -1; nids++)
5780                         kprintf(" %d", *nids);
5781                 kprintf("\n");
5782         }
5783 }
5784
5785 static void
5786 hdac_release_resources(struct hdac_softc *sc)
5787 {
5788         struct hdac_devinfo *devinfo = NULL;
5789         device_t *devlist = NULL;
5790         int i, devcount;
5791
5792         if (sc == NULL)
5793                 return;
5794
5795         hdac_lock(sc);
5796         sc->polling = 0;
5797         sc->poll_ival = 0;
5798         callout_stop(&sc->poll_hda);
5799         callout_stop(&sc->poll_hdac);
5800         callout_stop(&sc->poll_jack);
5801         hdac_reset(sc);
5802         hdac_unlock(sc);
5803
5804         hdac_irq_free(sc);
5805
5806         /* give pending interrupts stuck on the lock a chance to clear */
5807         /* bad hack */
5808         tsleep(&sc->irq, 0, "hdaslp", hz / 10);
5809
5810         device_get_children(sc->dev, &devlist, &devcount);
5811         for (i = 0; devlist != NULL && i < devcount; i++) {
5812                 devinfo = (struct hdac_devinfo *)device_get_ivars(devlist[i]);
5813                 if (devinfo == NULL)
5814                         continue;
5815                 if (devinfo->widget != NULL)
5816                         kfree(devinfo->widget, M_HDAC);
5817                 if (devinfo->node_type ==
5818                     HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO &&
5819                     devinfo->function.audio.ctl != NULL)
5820                         kfree(devinfo->function.audio.ctl, M_HDAC);
5821                 kfree(devinfo, M_HDAC);
5822                 device_delete_child(sc->dev, devlist[i]);
5823         }
5824         if (devlist != NULL)
5825                 kfree(devlist, M_TEMP);
5826
5827         for (i = 0; i < HDAC_CODEC_MAX; i++) {
5828                 if (sc->codecs[i] != NULL)
5829                         kfree(sc->codecs[i], M_HDAC);
5830                 sc->codecs[i] = NULL;
5831         }
5832
5833         hdac_dma_free(sc, &sc->pos_dma);
5834         hdac_dma_free(sc, &sc->rirb_dma);
5835         hdac_dma_free(sc, &sc->corb_dma);
5836         if (sc->play.blkcnt > 0)
5837                 hdac_dma_free(sc, &sc->play.bdl_dma);
5838         if (sc->rec.blkcnt > 0)
5839                 hdac_dma_free(sc, &sc->rec.bdl_dma);
5840         if (sc->chan_dmat != NULL) {
5841                 bus_dma_tag_destroy(sc->chan_dmat);
5842                 sc->chan_dmat = NULL;
5843         }
5844         hdac_mem_free(sc);
5845         snd_mtxfree(sc->lock);
5846         kfree(sc, M_DEVBUF);
5847 }
5848
5849 /* This function surely going to make its way into upper level someday. */
5850 static void
5851 hdac_config_fetch(struct hdac_softc *sc, uint32_t *on, uint32_t *off)
5852 {
5853         char *res = NULL;
5854         int i = 0, j, k, len, inv;
5855
5856         if (on != NULL)
5857                 *on = 0;
5858         if (off != NULL)
5859                 *off = 0;
5860         if (sc == NULL)
5861                 return;
5862         if (resource_string_value(device_get_name(sc->dev),
5863             device_get_unit(sc->dev), "config", &res) != 0)
5864                 return;
5865         if (!(res != NULL && strlen(res) > 0))
5866                 return;
5867         HDA_BOOTVERBOSE(
5868                 device_printf(sc->dev, "HDA_DEBUG: HDA Config:");
5869         );
5870         for (;;) {
5871                 while (res[i] != '\0' &&
5872                     (res[i] == ',' || isspace(res[i]) != 0))
5873                         i++;
5874                 if (res[i] == '\0') {
5875                         HDA_BOOTVERBOSE(
5876                                 kprintf("\n");
5877                         );
5878                         return;
5879                 }
5880                 j = i;
5881                 while (res[j] != '\0' &&
5882                     !(res[j] == ',' || isspace(res[j]) != 0))
5883                         j++;
5884                 len = j - i;
5885                 if (len > 2 && strncmp(res + i, "no", 2) == 0)
5886                         inv = 2;
5887                 else
5888                         inv = 0;
5889                 for (k = 0; len > inv && k < HDAC_QUIRKS_TAB_LEN; k++) {
5890                         if (strncmp(res + i + inv,
5891                             hdac_quirks_tab[k].key, len - inv) != 0)
5892                                 continue;
5893                         if (len - inv != strlen(hdac_quirks_tab[k].key))
5894                                 break;
5895                         HDA_BOOTVERBOSE(
5896                                 kprintf(" %s%s", (inv != 0) ? "no" : "",
5897                                     hdac_quirks_tab[k].key);
5898                         );
5899                         if (inv == 0 && on != NULL)
5900                                 *on |= hdac_quirks_tab[k].value;
5901                         else if (inv != 0 && off != NULL)
5902                                 *off |= hdac_quirks_tab[k].value;
5903                         break;
5904                 }
5905                 i = j;
5906         }
5907 }
5908
5909 #ifdef SND_DYNSYSCTL
5910 static int
5911 sysctl_hdac_polling(SYSCTL_HANDLER_ARGS)
5912 {
5913         struct hdac_softc *sc;
5914         struct hdac_devinfo *devinfo;
5915         device_t dev;
5916         uint32_t ctl;
5917         int err, val;
5918
5919         dev = oidp->oid_arg1;
5920         devinfo = pcm_getdevinfo(dev);
5921         if (devinfo == NULL || devinfo->codec == NULL ||
5922             devinfo->codec->sc == NULL)
5923                 return (EINVAL);
5924         sc = devinfo->codec->sc;
5925         hdac_lock(sc);
5926         val = sc->polling;
5927         hdac_unlock(sc);
5928         err = sysctl_handle_int(oidp, &val, 0, req);
5929
5930         if (err != 0 || req->newptr == NULL)
5931                 return (err);
5932         if (val < 0 || val > 1)
5933                 return (EINVAL);
5934
5935         hdac_lock(sc);
5936         if (val != sc->polling) {
5937                 if (hda_chan_active(sc) != 0)
5938                         err = EBUSY;
5939                 else if (val == 0) {
5940                         callout_stop(&sc->poll_hdac);
5941                         hdac_unlock(sc);
5942                         hdac_lock(sc);
5943                         HDAC_WRITE_2(&sc->mem, HDAC_RINTCNT,
5944                             sc->rirb_size / 2);
5945                         ctl = HDAC_READ_1(&sc->mem, HDAC_RIRBCTL);
5946                         ctl |= HDAC_RIRBCTL_RINTCTL;
5947                         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, ctl);
5948                         HDAC_WRITE_4(&sc->mem, HDAC_INTCTL,
5949                             HDAC_INTCTL_CIE | HDAC_INTCTL_GIE);
5950                         sc->polling = 0;
5951                         DELAY(1000);
5952                 } else {
5953                         HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, 0);
5954                         HDAC_WRITE_2(&sc->mem, HDAC_RINTCNT, 0);
5955                         ctl = HDAC_READ_1(&sc->mem, HDAC_RIRBCTL);
5956                         ctl &= ~HDAC_RIRBCTL_RINTCTL;
5957                         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, ctl);
5958                         callout_reset(&sc->poll_hdac, 1, hdac_poll_callback,
5959                             sc);
5960                         sc->polling = 1;
5961                         DELAY(1000);
5962                 }
5963         }
5964         hdac_unlock(sc);
5965
5966         return (err);
5967 }
5968
5969 static int
5970 sysctl_hdac_polling_interval(SYSCTL_HANDLER_ARGS)
5971 {
5972         struct hdac_softc *sc;
5973         struct hdac_devinfo *devinfo;
5974         device_t dev;
5975         int err, val;
5976
5977         dev = oidp->oid_arg1;
5978         devinfo = pcm_getdevinfo(dev);
5979         if (devinfo == NULL || devinfo->codec == NULL ||
5980             devinfo->codec->sc == NULL)
5981                 return (EINVAL);
5982         sc = devinfo->codec->sc;
5983         hdac_lock(sc);
5984         val = ((uint64_t)sc->poll_ival * 1000) / hz;
5985         hdac_unlock(sc);
5986         err = sysctl_handle_int(oidp, &val, 0, req);
5987
5988         if (err != 0 || req->newptr == NULL)
5989                 return (err);
5990
5991         if (val < 1)
5992                 val = 1;
5993         if (val > 5000)
5994                 val = 5000;
5995         val = ((uint64_t)val * hz) / 1000;
5996         if (val < 1)
5997                 val = 1;
5998         if (val > (hz * 5))
5999                 val = hz * 5;
6000
6001         hdac_lock(sc);
6002         sc->poll_ival = val;
6003         hdac_unlock(sc);
6004
6005         return (err);
6006 }
6007
6008 #ifdef SND_DEBUG
6009 static int
6010 sysctl_hdac_pindump(SYSCTL_HANDLER_ARGS)
6011 {
6012         struct hdac_softc *sc;
6013         struct hdac_devinfo *devinfo;
6014         struct hdac_widget *w;
6015         device_t dev;
6016         uint32_t res, pincap, execres;
6017         int i, err, val;
6018         nid_t cad;
6019
6020         dev = oidp->oid_arg1;
6021         devinfo = pcm_getdevinfo(dev);
6022         if (devinfo == NULL || devinfo->codec == NULL ||
6023             devinfo->codec->sc == NULL)
6024                 return (EINVAL);
6025         val = 0;
6026         err = sysctl_handle_int(oidp, &val, 0, req);
6027         if (err != 0 || req->newptr == NULL || val == 0)
6028                 return (err);
6029         sc = devinfo->codec->sc;
6030         cad = devinfo->codec->cad;
6031         hdac_lock(sc);
6032         device_printf(dev, "HDAC Dump AFG [nid=%d]:\n", devinfo->nid);
6033         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
6034                 w = hdac_widget_get(devinfo, i);
6035                 if (w == NULL || w->type !=
6036                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
6037                         continue;
6038                 pincap = w->wclass.pin.cap;
6039                 if ((HDA_PARAM_PIN_CAP_IMP_SENSE_CAP(pincap) ||
6040                     HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(pincap)) &&
6041                     HDA_PARAM_PIN_CAP_TRIGGER_REQD(pincap)) {
6042                         timeout = 10000;
6043                         hdac_command(sc,
6044                             HDA_CMD_SET_PIN_SENSE(cad, w->nid, 0), cad);
6045                         do {
6046                                 res = hdac_command(sc,
6047                                     HDA_CMD_GET_PIN_SENSE(cad, w->nid), cad);
6048                                 if (res != 0x7fffffff)
6049                                         break;
6050                                 DELAY(10);
6051                         } while (--timeout != 0);
6052                 } else {
6053                         timeout = -1;
6054                         res = hdac_command(sc, HDA_CMD_GET_PIN_SENSE(cad,
6055                             w->nid), cad);
6056                 }
6057                 device_printf(dev,
6058                     "PIN_SENSE: nid=%-3d timeout=%d res=0x%08x [%s]\n",
6059                     w->nid, timeout, res,
6060                     (w->enable == 0) ? "DISABLED" : "ENABLED");
6061         }
6062         device_printf(dev,
6063             "NumGPIO=%d NumGPO=%d NumGPI=%d GPIWake=%d GPIUnsol=%d\n",
6064             HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->function.audio.gpio),
6065             HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->function.audio.gpio),
6066             HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->function.audio.gpio),
6067             HDA_PARAM_GPIO_COUNT_GPI_WAKE(devinfo->function.audio.gpio),
6068             HDA_PARAM_GPIO_COUNT_GPI_UNSOL(devinfo->function.audio.gpio));
6069         if (HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->function.audio.gpio) > 0) {
6070                 device_printf(dev, " GPI:");
6071                 res = hdac_command(sc,
6072                     HDA_CMD_GET_GPI_DATA(cad, devinfo->nid), cad);
6073                 kprintf(" data=0x%08x", res);
6074                 res = hdac_command(sc,
6075                     HDA_CMD_GET_GPI_WAKE_ENABLE_MASK(cad, devinfo->nid),
6076                     cad);
6077                 kprintf(" wake=0x%08x", res);
6078                 res = hdac_command(sc,
6079                     HDA_CMD_GET_GPI_UNSOLICITED_ENABLE_MASK(cad, devinfo->nid),
6080                     cad);
6081                 kprintf(" unsol=0x%08x", res);
6082                 res = hdac_command(sc,
6083                     HDA_CMD_GET_GPI_STICKY_MASK(cad, devinfo->nid), cad);
6084                 kprintf(" sticky=0x%08x\n", res);
6085         }
6086         if (HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->function.audio.gpio) > 0) {
6087                 device_printf(dev, " GPO:");
6088                 res = hdac_command(sc,
6089                     HDA_CMD_GET_GPO_DATA(cad, devinfo->nid), cad);
6090                 kprintf(" data=0x%08x\n", res);
6091         }
6092         if (HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->function.audio.gpio) > 0) {
6093                 device_printf(dev, "GPI0:");
6094                 res = hdac_command(sc,
6095                     HDA_CMD_GET_GPIO_DATA(cad, devinfo->nid), cad);
6096                 kprintf(" data=0x%08x", res);
6097                 res = hdac_command(sc,
6098                     HDA_CMD_GET_GPIO_ENABLE_MASK(cad, devinfo->nid), cad);
6099                 kprintf(" enable=0x%08x", res);
6100                 res = hdac_command(sc,
6101                     HDA_CMD_GET_GPIO_DIRECTION(cad, devinfo->nid), cad);
6102                 kprintf(" direction=0x%08x\n", res);
6103                 res = hdac_command(sc,
6104                     HDA_CMD_GET_GPIO_WAKE_ENABLE_MASK(cad, devinfo->nid), cad);
6105                 device_printf(dev, "      wake=0x%08x", res);
6106                 res = hdac_command(sc,
6107                     HDA_CMD_GET_GPIO_UNSOLICITED_ENABLE_MASK(cad, devinfo->nid),
6108                     cad);
6109                 kprintf("  unsol=0x%08x", res);
6110                 res = hdac_command(sc,
6111                     HDA_CMD_GET_GPIO_STICKY_MASK(cad, devinfo->nid), cad);
6112                 kprintf("    sticky=0x%08x\n", res);
6113         }
6114         hdac_unlock(sc);
6115         return (0);
6116 }
6117 #endif
6118 #endif
6119
6120 static void
6121 hdac_attach2(void *arg)
6122 {
6123         struct hdac_softc *sc;
6124         struct hdac_widget *w;
6125         struct hdac_audio_ctl *ctl;
6126         uint32_t quirks_on, quirks_off;
6127         int pcnt, rcnt, codec_index;
6128         int i;
6129         char status[SND_STATUSLEN];
6130         device_t *devlist = NULL;
6131         int devcount;
6132         struct hdac_devinfo *devinfo = NULL;
6133
6134         sc = (struct hdac_softc *)arg;
6135
6136         hdac_config_fetch(sc, &quirks_on, &quirks_off);
6137
6138         HDA_BOOTVERBOSE(
6139                 device_printf(sc->dev, "HDA_DEBUG: HDA Config: on=0x%08x off=0x%08x\n",
6140                     quirks_on, quirks_off);
6141         );
6142
6143         if (resource_int_value(device_get_name(sc->dev),
6144             device_get_unit(sc->dev), "codec_index", &codec_index) != 0) {
6145                 switch (sc->pci_subvendor) {
6146                 case GB_G33S2H_SUBVENDOR:
6147                         codec_index = 2;
6148                         break;
6149                 default:
6150                         codec_index = 0;
6151                         break;
6152                 }
6153         }
6154
6155         hdac_lock(sc);
6156
6157         /* Remove ourselves from the config hooks */
6158         if (sc->intrhook.ich_func != NULL) {
6159                 config_intrhook_disestablish(&sc->intrhook);
6160                 sc->intrhook.ich_func = NULL;
6161         }
6162
6163         /* Start the corb and rirb engines */
6164         HDA_BOOTVERBOSE(
6165                 device_printf(sc->dev, "HDA_DEBUG: Starting CORB Engine...\n");
6166         );
6167         hdac_corb_start(sc);
6168         HDA_BOOTVERBOSE(
6169                 device_printf(sc->dev, "HDA_DEBUG: Starting RIRB Engine...\n");
6170         );
6171         hdac_rirb_start(sc);
6172
6173         HDA_BOOTVERBOSE(
6174                 device_printf(sc->dev,
6175                     "HDA_DEBUG: Enabling controller interrupt...\n");
6176         );
6177         if (sc->polling == 0)
6178                 HDAC_WRITE_4(&sc->mem, HDAC_INTCTL,
6179                     HDAC_INTCTL_CIE | HDAC_INTCTL_GIE);
6180         HDAC_WRITE_4(&sc->mem, HDAC_GCTL, HDAC_READ_4(&sc->mem, HDAC_GCTL) |
6181             HDAC_GCTL_UNSOL);
6182
6183         DELAY(1000);
6184
6185         HDA_BOOTVERBOSE(
6186                 device_printf(sc->dev,
6187                     "HDA_DEBUG: Scanning HDA codecs [start index=%d] ...\n",
6188                     codec_index);
6189         );
6190         hdac_scan_codecs(sc, codec_index);
6191
6192         device_get_children(sc->dev, &devlist, &devcount);
6193         for (i = 0; devlist != NULL && i < devcount; i++) {
6194                 devinfo = (struct hdac_devinfo *)device_get_ivars(devlist[i]);
6195                 if (devinfo != NULL && devinfo->node_type ==
6196                     HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO) {
6197                         break;
6198                 } else
6199                         devinfo = NULL;
6200         }
6201         if (devlist != NULL)
6202                 kfree(devlist, M_TEMP);
6203
6204         if (devinfo == NULL) {
6205                 hdac_unlock(sc);
6206                 device_printf(sc->dev, "Audio Function Group not found!\n");
6207                 hdac_release_resources(sc);
6208                 return;
6209         }
6210
6211         HDA_BOOTVERBOSE(
6212                 device_printf(sc->dev,
6213                     "HDA_DEBUG: Parsing AFG nid=%d cad=%d\n",
6214                     devinfo->nid, devinfo->codec->cad);
6215         );
6216         hdac_audio_parse(devinfo);
6217         HDA_BOOTVERBOSE(
6218                 device_printf(sc->dev, "HDA_DEBUG: Parsing Ctls...\n");
6219         );
6220         hdac_audio_ctl_parse(devinfo);
6221         HDA_BOOTVERBOSE(
6222                 device_printf(sc->dev, "HDA_DEBUG: Parsing vendor patch...\n");
6223         );
6224         hdac_vendor_patch_parse(devinfo);
6225         if (quirks_on != 0)
6226                 devinfo->function.audio.quirks |= quirks_on;
6227         if (quirks_off != 0)
6228                 devinfo->function.audio.quirks &= ~quirks_off;
6229
6230         /* XXX Disable all DIGITAL path. */
6231         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
6232                 w = hdac_widget_get(devinfo, i);
6233                 if (w == NULL)
6234                         continue;
6235                 if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap)) {
6236                         w->enable = 0;
6237                         continue;
6238                 }
6239                 /* XXX Disable useless pin ? */
6240                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
6241                     (w->wclass.pin.config &
6242                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) ==
6243                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE)
6244                         w->enable = 0;
6245         }
6246         i = 0;
6247         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
6248                 if (ctl->widget == NULL)
6249                         continue;
6250                 if (ctl->ossmask & SOUND_MASK_DISABLE)
6251                         ctl->enable = 0;
6252                 w = ctl->widget;
6253                 if (w->enable == 0 ||
6254                     HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap))
6255                         ctl->enable = 0;
6256                 w = ctl->childwidget;
6257                 if (w == NULL)
6258                         continue;
6259                 if (w->enable == 0 ||
6260                     HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap))
6261                         ctl->enable = 0;
6262         }
6263
6264         HDA_BOOTVERBOSE(
6265                 device_printf(sc->dev, "HDA_DEBUG: Building AFG tree...\n");
6266         );
6267         hdac_audio_build_tree(devinfo);
6268
6269         i = 0;
6270         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
6271                 if (ctl->ossmask & (SOUND_MASK_SKIP | SOUND_MASK_DISABLE))
6272                         ctl->ossmask = 0;
6273         }
6274         HDA_BOOTVERBOSE(
6275                 device_printf(sc->dev, "HDA_DEBUG: AFG commit...\n");
6276         );
6277         hdac_audio_commit(devinfo, HDA_COMMIT_ALL);
6278         HDA_BOOTVERBOSE(
6279                 device_printf(sc->dev, "HDA_DEBUG: Ctls commit...\n");
6280         );
6281         hdac_audio_ctl_commit(devinfo);
6282
6283         HDA_BOOTVERBOSE(
6284                 device_printf(sc->dev, "HDA_DEBUG: PCMDIR_PLAY setup...\n");
6285         );
6286         pcnt = hdac_pcmchannel_setup(devinfo, PCMDIR_PLAY);
6287         HDA_BOOTVERBOSE(
6288                 device_printf(sc->dev, "HDA_DEBUG: PCMDIR_REC setup...\n");
6289         );
6290         rcnt = hdac_pcmchannel_setup(devinfo, PCMDIR_REC);
6291
6292         hdac_unlock(sc);
6293         HDA_BOOTVERBOSE(
6294                 device_printf(sc->dev,
6295                     "HDA_DEBUG: OSS mixer initialization...\n");
6296         );
6297
6298         /*
6299          * There is no point of return after this. If the driver failed,
6300          * so be it. Let the detach procedure do all the cleanup.
6301          */
6302         if (mixer_init(sc->dev, &hdac_audio_ctl_ossmixer_class, devinfo) != 0)
6303                 device_printf(sc->dev, "Can't register mixer\n");
6304
6305         if (pcnt > 0)
6306                 pcnt = 1;
6307         if (rcnt > 0)
6308                 rcnt = 1;
6309
6310         HDA_BOOTVERBOSE(
6311                 device_printf(sc->dev,
6312                     "HDA_DEBUG: Registering PCM channels...\n");
6313         );
6314         if (pcm_register(sc->dev, devinfo, pcnt, rcnt) != 0)
6315                 device_printf(sc->dev, "Can't register PCM\n");
6316
6317         sc->registered++;
6318
6319         if ((devinfo->function.audio.quirks & HDA_QUIRK_DMAPOS) &&
6320             hdac_dma_alloc(sc, &sc->pos_dma,
6321             (sc->num_iss + sc->num_oss + sc->num_bss) * 8) != 0) {
6322                 HDA_BOOTVERBOSE(
6323                         device_printf(sc->dev,
6324                             "Failed to allocate DMA pos buffer (non-fatal)\n");
6325                 );
6326         }
6327
6328         for (i = 0; i < pcnt; i++)
6329                 pcm_addchan(sc->dev, PCMDIR_PLAY, &hdac_channel_class, devinfo);
6330         for (i = 0; i < rcnt; i++)
6331                 pcm_addchan(sc->dev, PCMDIR_REC, &hdac_channel_class, devinfo);
6332
6333 #ifdef SND_DYNSYSCTL
6334         SYSCTL_ADD_PROC(snd_sysctl_tree(sc->dev),
6335             SYSCTL_CHILDREN(snd_sysctl_tree_top(sc->dev)), OID_AUTO,
6336             "polling", CTLTYPE_INT | CTLFLAG_RW, sc->dev, sizeof(sc->dev),
6337             sysctl_hdac_polling, "I", "Enable polling mode");
6338         SYSCTL_ADD_PROC(snd_sysctl_tree(sc->dev),
6339             SYSCTL_CHILDREN(snd_sysctl_tree_top(sc->dev)), OID_AUTO,
6340             "polling_interval", CTLTYPE_INT | CTLFLAG_RW, sc->dev,
6341             sizeof(sc->dev), sysctl_hdac_polling_interval, "I",
6342             "Controller/Jack Sense polling interval (1-1000 ms)");
6343 #ifdef SND_DEBUG
6344         SYSCTL_ADD_PROC(snd_sysctl_tree(sc->dev),
6345             SYSCTL_CHILDREN(snd_sysctl_tree_top(sc->dev)), OID_AUTO,
6346             "pindump", CTLTYPE_INT | CTLFLAG_RW, sc->dev, sizeof(sc->dev),
6347             sysctl_hdac_pindump, "I", "Dump pin states/data");
6348 #endif
6349 #endif
6350
6351         ksnprintf(status, SND_STATUSLEN, "at memory 0x%lx irq %ld %s [%s]",
6352             rman_get_start(sc->mem.mem_res), rman_get_start(sc->irq.irq_res),
6353             PCM_KLDSTRING(snd_hda), HDA_DRV_TEST_REV);
6354         pcm_setstatus(sc->dev, status);
6355         device_printf(sc->dev, "<HDA Codec: %s>\n", hdac_codec_name(devinfo));
6356         HDA_BOOTVERBOSE(
6357                 device_printf(sc->dev, "<HDA Codec ID: 0x%08x>\n",
6358                     hdac_codec_id(devinfo));
6359         );
6360         device_printf(sc->dev, "<HDA Driver Revision: %s>\n",
6361             HDA_DRV_TEST_REV);
6362
6363         HDA_BOOTVERBOSE(
6364                 if (devinfo->function.audio.quirks != 0) {
6365                         device_printf(sc->dev, "\n");
6366                         device_printf(sc->dev, "HDA config/quirks:");
6367                         for (i = 0; i < HDAC_QUIRKS_TAB_LEN; i++) {
6368                                 if ((devinfo->function.audio.quirks &
6369                                     hdac_quirks_tab[i].value) ==
6370                                     hdac_quirks_tab[i].value)
6371                                         kprintf(" %s", hdac_quirks_tab[i].key);
6372                         }
6373                         kprintf("\n");
6374                 }
6375                 device_printf(sc->dev, "\n");
6376                 device_printf(sc->dev, "+-------------------+\n");
6377                 device_printf(sc->dev, "| DUMPING HDA NODES |\n");
6378                 device_printf(sc->dev, "+-------------------+\n");
6379                 hdac_dump_nodes(devinfo);
6380                 device_printf(sc->dev, "\n");
6381                 device_printf(sc->dev, "+------------------------+\n");
6382                 device_printf(sc->dev, "| DUMPING HDA AMPLIFIERS |\n");
6383                 device_printf(sc->dev, "+------------------------+\n");
6384                 device_printf(sc->dev, "\n");
6385                 i = 0;
6386                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
6387                         device_printf(sc->dev, "%3d: nid=%d", i,
6388                             (ctl->widget != NULL) ? ctl->widget->nid : -1);
6389                         if (ctl->childwidget != NULL)
6390                                 kprintf(" cnid=%d", ctl->childwidget->nid);
6391                         kprintf(" dir=0x%x index=%d "
6392                             "ossmask=0x%08x ossdev=%d%s\n",
6393                             ctl->dir, ctl->index,
6394                             ctl->ossmask, ctl->ossdev,
6395                             (ctl->enable == 0) ? " [DISABLED]" : "");
6396                 }
6397                 device_printf(sc->dev, "\n");
6398                 device_printf(sc->dev, "+-----------------------------------+\n");
6399                 device_printf(sc->dev, "| DUMPING HDA AUDIO/VOLUME CONTROLS |\n");
6400                 device_printf(sc->dev, "+-----------------------------------+\n");
6401                 hdac_dump_ctls(devinfo, "Master Volume (OSS: vol)", SOUND_MASK_VOLUME);
6402                 hdac_dump_ctls(devinfo, "PCM Volume (OSS: pcm)", SOUND_MASK_PCM);
6403                 hdac_dump_ctls(devinfo, "CD Volume (OSS: cd)", SOUND_MASK_CD);
6404                 hdac_dump_ctls(devinfo, "Microphone Volume (OSS: mic)", SOUND_MASK_MIC);
6405                 hdac_dump_ctls(devinfo, "Line-in Volume (OSS: line)", SOUND_MASK_LINE);
6406                 hdac_dump_ctls(devinfo, "Recording Level (OSS: rec)", SOUND_MASK_RECLEV);
6407                 hdac_dump_ctls(devinfo, "Speaker/Beep (OSS: speaker)", SOUND_MASK_SPEAKER);
6408                 hdac_dump_ctls(devinfo, NULL, 0);
6409                 hdac_dump_dac(devinfo);
6410                 hdac_dump_adc(devinfo);
6411                 device_printf(sc->dev, "\n");
6412                 device_printf(sc->dev, "+--------------------------------------+\n");
6413                 device_printf(sc->dev, "| DUMPING PCM Playback/Record Channels |\n");
6414                 device_printf(sc->dev, "+--------------------------------------+\n");
6415                 hdac_dump_pcmchannels(sc, pcnt, rcnt);
6416         );
6417
6418         if (sc->polling != 0) {
6419                 hdac_lock(sc);
6420                 callout_reset(&sc->poll_hdac, 1, hdac_poll_callback, sc);
6421                 hdac_unlock(sc);
6422         }
6423 }
6424
6425 /****************************************************************************
6426  * int hdac_detach(device_t)
6427  *
6428  * Detach and free up resources utilized by the hdac device.
6429  ****************************************************************************/
6430 static int
6431 hdac_detach(device_t dev)
6432 {
6433         struct hdac_softc *sc = NULL;
6434         struct hdac_devinfo *devinfo = NULL;
6435         int err;
6436
6437         devinfo = (struct hdac_devinfo *)pcm_getdevinfo(dev);
6438         if (devinfo != NULL && devinfo->codec != NULL)
6439                 sc = devinfo->codec->sc;
6440         if (sc == NULL)
6441                 return (0);
6442
6443         if (sc->registered > 0) {
6444                 err = pcm_unregister(dev);
6445                 if (err != 0)
6446                         return (err);
6447         }
6448
6449         hdac_release_resources(sc);
6450
6451         return (0);
6452 }
6453
6454 static device_method_t hdac_methods[] = {
6455         /* device interface */
6456         DEVMETHOD(device_probe,         hdac_probe),
6457         DEVMETHOD(device_attach,        hdac_attach),
6458         DEVMETHOD(device_detach,        hdac_detach),
6459         { 0, 0 }
6460 };
6461
6462 static driver_t hdac_driver = {
6463         "pcm",
6464         hdac_methods,
6465         PCM_SOFTC_SIZE,
6466 };
6467
6468 DRIVER_MODULE(snd_hda, pci, hdac_driver, pcm_devclass, NULL, NULL);
6469 MODULE_DEPEND(snd_hda, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
6470 MODULE_VERSION(snd_hda, 1);