2 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 2003 Peter Wemm.
5 * Copyright (c) 2008 The DragonFly Project.
8 * This code is derived from software contributed to Berkeley by
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the University of
22 * California, Berkeley and its contributors.
23 * 4. Neither the name of the University nor the names of its contributors
24 * may be used to endorse or promote products derived from this software
25 * without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
41 * $DragonFly: src/sys/platform/pc64/amd64/machdep.c,v 1.1 2008/08/29 17:07:10 dillon Exp $
44 #include "use_ether.h"
45 //#include "use_npx.h"
47 #include "opt_atalk.h"
48 #include "opt_compat.h"
51 #include "opt_directio.h"
54 #include "opt_msgbuf.h"
57 #include <sys/param.h>
58 #include <sys/systm.h>
59 #include <sys/sysproto.h>
60 #include <sys/signalvar.h>
61 #include <sys/kernel.h>
62 #include <sys/linker.h>
63 #include <sys/malloc.h>
66 #include <sys/reboot.h>
68 #include <sys/msgbuf.h>
69 #include <sys/sysent.h>
70 #include <sys/sysctl.h>
71 #include <sys/vmmeter.h>
73 #include <sys/upcall.h>
74 #include <sys/usched.h>
78 #include <vm/vm_param.h>
80 #include <vm/vm_kern.h>
81 #include <vm/vm_object.h>
82 #include <vm/vm_page.h>
83 #include <vm/vm_map.h>
84 #include <vm/vm_pager.h>
85 #include <vm/vm_extern.h>
87 #include <sys/thread2.h>
95 #include <machine/cpu.h>
96 #include <machine/clock.h>
97 #include <machine/specialreg.h>
99 #include <machine/bootinfo.h>
101 #include <machine/intr_machdep.h> /* for inthand_t */
102 #include <machine/md_var.h>
103 #include <machine/metadata.h>
104 #include <machine/pc/bios.h>
105 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
106 #include <machine/globaldata.h> /* CPU_prvspace */
107 #include <machine/smp.h>
109 #include <machine/perfmon.h>
111 #include <machine/cputypes.h>
114 #include <bus/isa/i386/isa_device.h>
116 #include <machine_base/isa/intr_machdep.h>
117 #include <bus/isa/rtc.h>
118 #include <sys/random.h>
119 #include <sys/ptrace.h>
120 #include <machine/sigframe.h>
122 #define PHYSMAP_ENTRIES 10
124 extern void init386(int first);
125 extern void dblfault_handler(void);
126 extern u_int64_t hammer_time(u_int64_t, u_int64_t);
128 extern void printcpuinfo(void); /* XXX header file */
129 extern void identify_cpu(void);
131 extern void finishidentcpu(void);
133 extern void panicifcpuunsupported(void);
134 extern void initializecpu(void);
136 extern void init_paging(vm_paddr_t *);
138 static void cpu_startup(void *);
139 #ifndef CPU_DISABLE_SSE
140 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
141 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
142 #endif /* CPU_DISABLE_SSE */
144 extern void ffs_rawread_setup(void);
145 #endif /* DIRECTIO */
146 static void init_locks(void);
148 SYSINIT(cpu, SI_BOOT2_SMP, SI_ORDER_FIRST, cpu_startup, NULL)
151 extern vm_offset_t ksym_start, ksym_end;
154 uint64_t common_lvl4_phys;
155 uint64_t common_lvl3_phys;
160 pdp_entry_t *link_pdpe;
163 int _udatasel, _ucodesel, _ucode32sel;
166 int64_t tsc_offsets[MAXCPU];
168 int64_t tsc_offsets[1];
171 #if defined(SWTCH_OPTIM_STATS)
172 extern int swtch_optim_stats;
173 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
174 CTLFLAG_RD, &swtch_optim_stats, 0, "");
175 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
176 CTLFLAG_RD, &tlb_flush_count, 0, "");
182 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
184 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
188 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
189 0, 0, sysctl_hw_physmem, "IU", "");
192 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
194 int error = sysctl_handle_int(oidp, 0,
195 ctob(physmem - vmstats.v_wire_count), req);
199 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
200 0, 0, sysctl_hw_usermem, "IU", "");
203 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
206 int error = sysctl_handle_int(oidp, 0,
207 i386_btop(avail_end - avail_start), req);
214 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
215 0, 0, sysctl_hw_availpages, "I", "");
218 sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
222 /* Unwind the buffer, so that it's linear (possibly starting with
223 * some initial nulls).
225 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
226 msgbufp->msg_size-msgbufp->msg_bufr,req);
227 if(error) return(error);
228 if(msgbufp->msg_bufr>0) {
229 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
230 msgbufp->msg_bufr,req);
235 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
236 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
238 static int msgbuf_clear;
241 sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
244 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
246 if (!error && req->newptr) {
247 /* Clear the buffer and reset write pointer */
248 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
249 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
255 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
256 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
257 "Clear kernel message buffer");
259 vm_paddr_t Maxmem = 0;
262 * The number of PHYSMAP entries must be one less than the number of
263 * PHYSSEG entries because the PHYSMAP entry that spans the largest
264 * physical address that is accessible by ISA DMA is split into two
267 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
269 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
270 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
272 /* must be 2 less so 0 0 can signal end of chunks */
273 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
274 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
276 static vm_offset_t buffer_sva, buffer_eva;
277 vm_offset_t clean_sva, clean_eva;
278 static vm_offset_t pager_sva, pager_eva;
279 static struct trapframe proc0_tf;
282 cpu_startup(void *dummy)
286 vm_offset_t firstaddr;
288 if (boothowto & RB_VERBOSE)
292 * Good {morning,afternoon,evening,night}.
294 kprintf("%s", version);
297 panicifcpuunsupported();
301 kprintf("real memory = %llu (%lluK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
303 * Display any holes after the first chunk of extended memory.
308 kprintf("Physical memory chunk(s):\n");
309 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
310 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
312 kprintf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
313 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
319 * Allocate space for system data structures.
320 * The first available kernel virtual address is in "v".
321 * As pages of kernel virtual memory are allocated, "v" is incremented.
322 * As pages of memory are allocated and cleared,
323 * "firstaddr" is incremented.
324 * An index into the kernel page table corresponding to the
325 * virtual memory address maintained in "v" is kept in "mapaddr".
329 * Make two passes. The first pass calculates how much memory is
330 * needed and allocates it. The second pass assigns virtual
331 * addresses to the various data structures.
335 v = (caddr_t)firstaddr;
337 #define valloc(name, type, num) \
338 (name) = (type *)v; v = (caddr_t)((name)+(num))
339 #define valloclim(name, type, num, lim) \
340 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
343 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
344 * For the first 64MB of ram nominally allocate sufficient buffers to
345 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
346 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
347 * the buffer cache we limit the eventual kva reservation to
350 * factor represents the 1/4 x ram conversion.
353 int factor = 4 * BKVASIZE / 1024;
354 int kbytes = physmem * (PAGE_SIZE / 1024);
358 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
360 nbuf += (kbytes - 65536) * 2 / (factor * 5);
361 if (maxbcache && nbuf > maxbcache / BKVASIZE)
362 nbuf = maxbcache / BKVASIZE;
366 * Do not allow the buffer_map to be more then 1/2 the size of the
369 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
370 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
371 kprintf("Warning: nbufs capped at %d\n", nbuf);
374 nswbuf = max(min(nbuf/4, 256), 16);
376 if (nswbuf < NSWBUF_MIN)
383 valloc(swbuf, struct buf, nswbuf);
384 valloc(buf, struct buf, nbuf);
387 * End of first pass, size has been calculated so allocate memory
389 if (firstaddr == 0) {
390 size = (vm_size_t)(v - firstaddr);
391 firstaddr = kmem_alloc(&kernel_map, round_page(size));
393 panic("startup: no room for tables");
398 * End of second pass, addresses have been assigned
400 if ((vm_size_t)(v - firstaddr) != size)
401 panic("startup: table size inconsistency");
403 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
404 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
405 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
407 buffer_map.system_map = 1;
408 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
409 (nswbuf*MAXPHYS) + pager_map_size);
410 pager_map.system_map = 1;
412 #if defined(USERCONFIG)
414 cninit(); /* the preferred console may have changed */
417 kprintf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
418 ptoa(vmstats.v_free_count) / 1024);
421 * Set up buffers, so they can be used to read disk labels.
424 vm_pager_bufferinit();
428 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
430 mp_start(); /* fire up the APs and APICs */
437 * Send an interrupt to process.
439 * Stack is set up to allow sigcode stored
440 * at top to call routine, followed by kcall
441 * to sigreturn routine below. After sigreturn
442 * resets the signal mask, the stack, and the
443 * frame pointer, it returns to the user
447 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
449 kprintf0("sendsig\n");
450 struct lwp *lp = curthread->td_lwp;
451 struct proc *p = lp->lwp_proc;
452 struct trapframe *regs;
453 struct sigacts *psp = p->p_sigacts;
454 struct sigframe sf, *sfp;
457 regs = lp->lwp_md.md_regs;
458 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
460 /* save user context */
461 bzero(&sf, sizeof(struct sigframe));
462 sf.sf_uc.uc_sigmask = *mask;
463 sf.sf_uc.uc_stack = lp->lwp_sigstk;
464 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
466 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_gs, sizeof(struct trapframe));
469 /* make the size of the saved context visible to userland */
470 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
472 /* save mailbox pending state for syscall interlock semantics */
474 if (p->p_flag & P_MAILBOX)
475 sf.sf_uc.uc_mcontext.mc_xflags |= PGEX_MAILBOX;
478 /* Allocate and validate space for the signal handler context. */
479 if ((lp->lwp_flag & LWP_ALTSTACK) != 0 && !oonstack &&
480 SIGISMEMBER(psp->ps_sigonstack, sig)) {
481 sfp = (struct sigframe *)(lp->lwp_sigstk.ss_sp +
482 lp->lwp_sigstk.ss_size - sizeof(struct sigframe));
483 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
486 sfp = (struct sigframe *)regs->tf_esp - 1;
490 /* Translate the signal is appropriate */
491 if (p->p_sysent->sv_sigtbl) {
492 if (sig <= p->p_sysent->sv_sigsize)
493 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
496 /* Build the argument list for the signal handler. */
498 sf.sf_ucontext = (register_t)&sfp->sf_uc;
499 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
500 /* Signal handler installed with SA_SIGINFO. */
501 sf.sf_siginfo = (register_t)&sfp->sf_si;
502 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
504 /* fill siginfo structure */
505 sf.sf_si.si_signo = sig;
506 sf.sf_si.si_code = code;
507 sf.sf_si.si_addr = (void*)regs->tf_err;
510 /* Old FreeBSD-style arguments. */
511 sf.sf_siginfo = code;
512 sf.sf_addr = regs->tf_err;
513 sf.sf_ahu.sf_handler = catcher;
517 * If we're a vm86 process, we want to save the segment registers.
518 * We also change eflags to be our emulated eflags, not the actual
522 if (regs->tf_eflags & PSL_VM) {
523 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
524 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
526 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
527 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
528 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
529 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
531 if (vm86->vm86_has_vme == 0)
532 sf.sf_uc.uc_mcontext.mc_eflags =
533 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
534 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
537 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
538 * syscalls made by the signal handler. This just avoids
539 * wasting time for our lazy fixup of such faults. PSL_NT
540 * does nothing in vm86 mode, but vm86 programs can set it
541 * almost legitimately in probes for old cpu types.
543 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
548 * Save the FPU state and reinit the FP unit
551 npxpush(&sf.sf_uc.uc_mcontext);
555 * Copy the sigframe out to the user's stack.
557 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
559 * Something is wrong with the stack pointer.
560 * ...Kill the process.
566 regs->tf_esp = (int)sfp;
567 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
571 * i386 abi specifies that the direction flag must be cleared
575 regs->tf_eflags &= ~(PSL_T|PSL_D);
578 regs->tf_cs = _ucodesel;
580 regs->tf_ds = _udatasel;
581 regs->tf_es = _udatasel;
585 * Allow the signal handler to inherit %fs in addition to %gs as
586 * the userland program might be using both.
588 * However, if a T_PROTFLT occured the segment registers could be
589 * totally broken. They must be reset in order to be able to
590 * return to userland.
592 if (regs->tf_trapno == T_PROTFLT) {
594 regs->tf_fs = _udatasel;
595 regs->tf_gs = _udatasel;
598 regs->tf_ss = _udatasel;
602 * Sanitize the trapframe for a virtual kernel passing control to a custom
603 * VM context. Remove any items that would otherwise create a privilage
606 * XXX at the moment we allow userland to set the resume flag. Is this a
610 cpu_sanitize_frame(struct trapframe *frame)
612 kprintf0("cpu_sanitize_frame\n");
613 frame->tf_cs = _ucodesel;
615 frame->tf_ds = _udatasel;
616 frame->tf_es = _udatasel; /* XXX allow userland this one too? */
619 frame->tf_fs = _udatasel;
620 frame->tf_gs = _udatasel;
622 frame->tf_ss = _udatasel;
624 frame->tf_eflags &= (PSL_RF | PSL_USERCHANGE);
625 frame->tf_eflags |= PSL_RESERVED_DEFAULT | PSL_I;
631 * Sanitize the tls so loading the descriptor does not blow up
632 * on us. For AMD64 we don't have to do anything.
635 cpu_sanitize_tls(struct savetls *tls)
641 * sigreturn(ucontext_t *sigcntxp)
643 * System call to cleanup state after a signal
644 * has been taken. Reset signal mask and
645 * stack state from context left by sendsig (above).
646 * Return to previous pc and psl as specified by
647 * context left by sendsig. Check carefully to
648 * make sure that the user has not modified the
649 * state to gain improper privileges.
651 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
652 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
655 sys_sigreturn(struct sigreturn_args *uap)
657 struct lwp *lp = curthread->td_lwp;
658 struct proc *p = lp->lwp_proc;
659 struct trapframe *regs;
667 * We have to copy the information into kernel space so userland
668 * can't modify it while we are sniffing it.
670 regs = lp->lwp_md.md_regs;
671 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
676 eflags = ucp->uc_mcontext.mc_eflags;
680 if (eflags & PSL_VM) {
681 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
682 struct vm86_kernel *vm86;
685 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
686 * set up the vm86 area, and we can't enter vm86 mode.
688 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
690 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
691 if (vm86->vm86_inited == 0)
694 /* go back to user mode if both flags are set */
695 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
696 trapsignal(lp, SIGBUS, 0);
698 if (vm86->vm86_has_vme) {
700 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
701 (eflags & VME_USERCHANGE) | PSL_VM;
705 vm86->vm86_eflags = eflags; /* save VIF, VIP */
706 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
707 (eflags & VM_USERCHANGE) | PSL_VM;
711 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
712 tf->tf_eflags = eflags;
714 tf->tf_vm86_ds = tf->tf_ds;
715 tf->tf_vm86_es = tf->tf_es;
716 tf->tf_vm86_fs = tf->tf_fs;
717 tf->tf_vm86_gs = tf->tf_gs;
718 tf->tf_ds = _udatasel;
719 tf->tf_es = _udatasel;
721 tf->tf_fs = _udatasel;
722 tf->tf_gs = _udatasel;
726 * Don't allow users to change privileged or reserved flags.
729 * XXX do allow users to change the privileged flag PSL_RF.
730 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
731 * should sometimes set it there too. tf_eflags is kept in
732 * the signal context during signal handling and there is no
733 * other place to remember it, so the PSL_RF bit may be
734 * corrupted by the signal handler without us knowing.
735 * Corruption of the PSL_RF bit at worst causes one more or
736 * one less debugger trap, so allowing it is fairly harmless.
739 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
740 kprintf("sigreturn: eflags = 0x%x\n", eflags);
746 * Don't allow users to load a valid privileged %cs. Let the
747 * hardware check for invalid selectors, excess privilege in
748 * other selectors, invalid %eip's and invalid %esp's.
750 cs = ucp->uc_mcontext.mc_cs;
751 if (!CS_SECURE(cs)) {
752 kprintf("sigreturn: cs = 0x%x\n", cs);
753 trapsignal(lp, SIGBUS, T_PROTFLT);
757 bcopy(&ucp->uc_mcontext.mc_gs, regs, sizeof(struct trapframe));
763 * Restore the FPU state from the frame
766 npxpop(&ucp->uc_mcontext);
770 * Merge saved signal mailbox pending flag to maintain interlock
771 * semantics against system calls.
774 if (ucp->uc_mcontext.mc_xflags & PGEX_MAILBOX)
775 p->p_flag |= P_MAILBOX;
778 if (ucp->uc_mcontext.mc_onstack & 1)
779 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
781 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
783 lp->lwp_sigmask = ucp->uc_sigmask;
784 SIG_CANTMASK(lp->lwp_sigmask);
789 * Stack frame on entry to function. %eax will contain the function vector,
790 * %ecx will contain the function data. flags, ecx, and eax will have
791 * already been pushed on the stack.
802 sendupcall(struct vmupcall *vu, int morepending)
804 struct lwp *lp = curthread->td_lwp;
805 struct trapframe *regs;
806 struct upcall upcall;
807 struct upc_frame upc_frame;
811 * If we are a virtual kernel running an emulated user process
812 * context, switch back to the virtual kernel context before
813 * trying to post the signal.
815 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
816 lp->lwp_md.md_regs->tf_trapno = 0;
817 vkernel_trap(lp, lp->lwp_md.md_regs);
821 * Get the upcall data structure
823 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
824 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
827 kprintf("bad upcall address\n");
832 * If the data structure is already marked pending or has a critical
833 * section count, mark the data structure as pending and return
834 * without doing an upcall. vu_pending is left set.
836 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
837 if (upcall.upc_pending < vu->vu_pending) {
838 upcall.upc_pending = vu->vu_pending;
839 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
840 sizeof(upcall.upc_pending));
846 * We can run this upcall now, clear vu_pending.
848 * Bump our critical section count and set or clear the
849 * user pending flag depending on whether more upcalls are
850 * pending. The user will be responsible for calling
851 * upc_dispatch(-1) to process remaining upcalls.
854 upcall.upc_pending = morepending;
855 crit_count += TDPRI_CRIT;
856 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
857 sizeof(upcall.upc_pending));
858 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
862 * Construct a stack frame and issue the upcall
864 regs = lp->lwp_md.md_regs;
866 upc_frame.eax = regs->tf_eax;
867 upc_frame.ecx = regs->tf_ecx;
868 upc_frame.edx = regs->tf_edx;
869 upc_frame.flags = regs->tf_eflags;
870 upc_frame.oldip = regs->tf_eip;
871 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
872 sizeof(upc_frame)) != 0) {
873 kprintf("bad stack on upcall\n");
875 regs->tf_eax = (register_t)vu->vu_func;
876 regs->tf_ecx = (register_t)vu->vu_data;
877 regs->tf_edx = (register_t)lp->lwp_upcall;
878 regs->tf_eip = (register_t)vu->vu_ctx;
879 regs->tf_esp -= sizeof(upc_frame);
885 * fetchupcall occurs in the context of a system call, which means that
886 * we have to return EJUSTRETURN in order to prevent eax and edx from
887 * being overwritten by the syscall return value.
889 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
890 * and the function pointer in %eax.
893 fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
895 struct upc_frame upc_frame;
896 struct lwp *lp = curthread->td_lwp;
897 struct trapframe *regs;
899 struct upcall upcall;
902 regs = lp->lwp_md.md_regs;
904 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
908 * This jumps us to the next ready context.
911 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
914 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
915 crit_count += TDPRI_CRIT;
917 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
919 regs->tf_eax = (register_t)vu->vu_func;
920 regs->tf_ecx = (register_t)vu->vu_data;
921 regs->tf_edx = (register_t)lp->lwp_upcall;
922 regs->tf_eip = (register_t)vu->vu_ctx;
923 regs->tf_esp = (register_t)rsp;
927 * This returns us to the originally interrupted code.
929 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
931 regs->tf_eax = upc_frame.eax;
932 regs->tf_ecx = upc_frame.ecx;
933 regs->tf_edx = upc_frame.edx;
934 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
935 (upc_frame.flags & PSL_USERCHANGE);
936 regs->tf_eip = upc_frame.oldip;
937 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
947 * Machine dependent boot() routine
949 * I haven't seen anything to put here yet
950 * Possibly some stuff might be grafted back here from boot()
958 * Shutdown the CPU as much as possible
964 __asm__ __volatile("hlt");
968 * cpu_idle() represents the idle LWKT. You cannot return from this function
969 * (unless you want to blow things up!). Instead we look for runnable threads
970 * and loop or halt as appropriate. Giant is not held on entry to the thread.
972 * The main loop is entered with a critical section held, we must release
973 * the critical section before doing anything else. lwkt_switch() will
974 * check for pending interrupts due to entering and exiting its own
977 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
978 * to wake a HLTed cpu up. However, there are cases where the idlethread
979 * will be entered with the possibility that no IPI will occur and in such
980 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
982 static int cpu_idle_hlt = 1;
983 static int cpu_idle_hltcnt;
984 static int cpu_idle_spincnt;
985 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
986 &cpu_idle_hlt, 0, "Idle loop HLT enable");
987 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
988 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
989 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
990 &cpu_idle_spincnt, 0, "Idle loop entry spins");
993 cpu_idle_default_hook(void)
996 * We must guarentee that hlt is exactly the instruction
999 __asm __volatile("sti; hlt");
1002 /* Other subsystems (e.g., ACPI) can hook this later. */
1003 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
1008 struct thread *td = curthread;
1011 KKASSERT(td->td_pri < TDPRI_CRIT);
1014 * See if there are any LWKTs ready to go.
1019 * If we are going to halt call splz unconditionally after
1020 * CLIing to catch any interrupt races. Note that we are
1021 * at SPL0 and interrupts are enabled.
1023 if (cpu_idle_hlt && !lwkt_runnable() &&
1024 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
1025 __asm __volatile("cli");
1027 if (!lwkt_runnable())
1031 __asm __volatile("pause");
1035 td->td_flags &= ~TDF_IDLE_NOHLT;
1038 __asm __volatile("sti; pause");
1040 __asm __volatile("sti");
1048 * This routine is called when the only runnable threads require
1049 * the MP lock, and the scheduler couldn't get it. On a real cpu
1050 * we let the scheduler spin.
1053 cpu_mplock_contested(void)
1059 * This routine is called if a spinlock has been held through the
1060 * exponential backoff period and is seriously contested. On a real cpu
1064 cpu_spinlock_contested(void)
1070 * Clear registers on exec
1073 exec_setregs(u_long entry, u_long stack, u_long ps_strings)
1075 struct thread *td = curthread;
1076 struct lwp *lp = td->td_lwp;
1077 struct pcb *pcb = td->td_pcb;
1078 struct trapframe *regs = lp->lwp_md.md_regs;
1080 kprintf0("exec_setregs\n");
1082 /* was i386_user_cleanup() in NetBSD */
1085 bzero((char *)regs, sizeof(struct trapframe));
1086 regs->tf_rip = entry;
1087 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; /* align the stack */
1088 regs->tf_rdi = stack; /* argv */
1089 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
1090 regs->tf_ss = _udatasel;
1091 regs->tf_cs = _ucodesel;
1092 regs->tf_rbx = ps_strings;
1095 * Reset the hardware debug registers if they were in use.
1096 * They won't have any meaning for the newly exec'd process.
1098 if (pcb->pcb_flags & PCB_DBREGS) {
1105 if (pcb == td->td_pcb) {
1107 * Clear the debug registers on the running
1108 * CPU, otherwise they will end up affecting
1109 * the next process we switch to.
1113 pcb->pcb_flags &= ~PCB_DBREGS;
1117 * Initialize the math emulator (if any) for the current process.
1118 * Actually, just clear the bit that says that the emulator has
1119 * been initialized. Initialization is delayed until the process
1120 * traps to the emulator (if it is done at all) mainly because
1121 * emulators don't provide an entry point for initialization.
1124 pcb->pcb_flags &= ~FP_SOFTFP;
1128 * note: do not set CR0_TS here. npxinit() must do it after clearing
1129 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
1133 load_cr0(rcr0() | CR0_MP);
1135 wrmsr(MSR_FSBASE, 0);
1136 wrmsr(MSR_KGSBASE, 0); /* User value while we're in the kernel */
1137 pcb->pcb_fsbase = 0;
1138 pcb->pcb_gsbase = 0;
1141 /* Initialize the npx (if any) for the current process. */
1142 npxinit(__INITIAL_NPXCW__);
1146 pcb->pcb_ds = _udatasel;
1147 pcb->pcb_es = _udatasel;
1148 pcb->pcb_fs = _udatasel;
1149 pcb->pcb_gs = _udatasel;
1158 cr0 |= CR0_NE; /* Done by npxinit() */
1159 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1160 cr0 |= CR0_WP | CR0_AM;
1166 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1169 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1171 if (!error && req->newptr)
1176 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1177 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1180 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1181 CTLFLAG_RW, &disable_rtc_set, 0, "");
1185 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1186 CTLFLAG_RD, &bootinfo, bootinfo, "");
1189 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1190 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1192 extern u_long bootdev; /* not a cdev_t - encoding is different */
1193 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1194 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1197 * Initialize 386 and configure to run kernel
1201 * Initialize segments & interrupt table
1205 struct user_segment_descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1206 static struct gate_descriptor idt0[NIDT];
1207 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1209 union descriptor ldt[NLDT]; /* local descriptor table */
1212 /* table descriptors - used to load tables by cpu */
1213 struct region_descriptor r_gdt, r_idt;
1215 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1216 extern int has_f00f_bug;
1219 static char dblfault_stack[PAGE_SIZE] __aligned(16);
1221 /* JG proc0paddr is a virtual address */
1224 char proc0paddr_buff[LWKT_THREAD_STACK];
1227 /* software prototypes -- in more palatable form */
1228 struct soft_segment_descriptor gdt_segs[] = {
1229 /* GNULL_SEL 0 Null Descriptor */
1230 { 0x0, /* segment base address */
1232 0, /* segment type */
1233 0, /* segment descriptor priority level */
1234 0, /* segment descriptor present */
1236 0, /* default 32 vs 16 bit size */
1237 0 /* limit granularity (byte/page units)*/ },
1238 /* GCODE_SEL 1 Code Descriptor for kernel */
1239 { 0x0, /* segment base address */
1240 0xfffff, /* length - all address space */
1241 SDT_MEMERA, /* segment type */
1242 SEL_KPL, /* segment descriptor priority level */
1243 1, /* segment descriptor present */
1245 0, /* default 32 vs 16 bit size */
1246 1 /* limit granularity (byte/page units)*/ },
1247 /* GDATA_SEL 2 Data Descriptor for kernel */
1248 { 0x0, /* segment base address */
1249 0xfffff, /* length - all address space */
1250 SDT_MEMRWA, /* segment type */
1251 SEL_KPL, /* segment descriptor priority level */
1252 1, /* segment descriptor present */
1254 0, /* default 32 vs 16 bit size */
1255 1 /* limit granularity (byte/page units)*/ },
1256 /* GUCODE32_SEL 3 32 bit Code Descriptor for user */
1257 { 0x0, /* segment base address */
1258 0xfffff, /* length - all address space */
1259 SDT_MEMERA, /* segment type */
1260 SEL_UPL, /* segment descriptor priority level */
1261 1, /* segment descriptor present */
1263 1, /* default 32 vs 16 bit size */
1264 1 /* limit granularity (byte/page units)*/ },
1265 /* GUDATA_SEL 4 32/64 bit Data Descriptor for user */
1266 { 0x0, /* segment base address */
1267 0xfffff, /* length - all address space */
1268 SDT_MEMRWA, /* segment type */
1269 SEL_UPL, /* segment descriptor priority level */
1270 1, /* segment descriptor present */
1272 1, /* default 32 vs 16 bit size */
1273 1 /* limit granularity (byte/page units)*/ },
1274 /* GUCODE_SEL 5 64 bit Code Descriptor for user */
1275 { 0x0, /* segment base address */
1276 0xfffff, /* length - all address space */
1277 SDT_MEMERA, /* segment type */
1278 SEL_UPL, /* segment descriptor priority level */
1279 1, /* segment descriptor present */
1281 0, /* default 32 vs 16 bit size */
1282 1 /* limit granularity (byte/page units)*/ },
1283 /* GPROC0_SEL 6 Proc 0 Tss Descriptor */
1285 0x0, /* segment base address */
1286 sizeof(struct amd64tss)-1,/* length - all address space */
1287 SDT_SYSTSS, /* segment type */
1288 SEL_KPL, /* segment descriptor priority level */
1289 1, /* segment descriptor present */
1291 0, /* unused - default 32 vs 16 bit size */
1292 0 /* limit granularity (byte/page units)*/ },
1293 /* Actually, the TSS is a system descriptor which is double size */
1294 { 0x0, /* segment base address */
1296 0, /* segment type */
1297 0, /* segment descriptor priority level */
1298 0, /* segment descriptor present */
1300 0, /* default 32 vs 16 bit size */
1301 0 /* limit granularity (byte/page units)*/ },
1302 /* GUGS32_SEL 8 32 bit GS Descriptor for user */
1303 { 0x0, /* segment base address */
1304 0xfffff, /* length - all address space */
1305 SDT_MEMRWA, /* segment type */
1306 SEL_UPL, /* segment descriptor priority level */
1307 1, /* segment descriptor present */
1309 1, /* default 32 vs 16 bit size */
1310 1 /* limit granularity (byte/page units)*/ },
1314 setidt(int idx, inthand_t *func, int typ, int dpl, int ist)
1316 struct gate_descriptor *ip;
1319 ip->gd_looffset = (uintptr_t)func;
1320 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
1326 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
1329 #define IDTVEC(name) __CONCAT(X,name)
1332 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1333 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1334 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1335 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1336 IDTVEC(xmm), IDTVEC(dblfault),
1337 IDTVEC(fast_syscall), IDTVEC(fast_syscall32);
1339 #ifdef DEBUG_INTERRUPTS
1340 extern inthand_t *Xrsvdary[256];
1344 sdtossd(struct user_segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1346 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1347 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1348 ssd->ssd_type = sd->sd_type;
1349 ssd->ssd_dpl = sd->sd_dpl;
1350 ssd->ssd_p = sd->sd_p;
1351 ssd->ssd_def32 = sd->sd_def32;
1352 ssd->ssd_gran = sd->sd_gran;
1356 ssdtosd(struct soft_segment_descriptor *ssd, struct user_segment_descriptor *sd)
1359 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1360 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
1361 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1362 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1363 sd->sd_type = ssd->ssd_type;
1364 sd->sd_dpl = ssd->ssd_dpl;
1365 sd->sd_p = ssd->ssd_p;
1366 sd->sd_long = ssd->ssd_long;
1367 sd->sd_def32 = ssd->ssd_def32;
1368 sd->sd_gran = ssd->ssd_gran;
1372 ssdtosyssd(struct soft_segment_descriptor *ssd,
1373 struct system_segment_descriptor *sd)
1376 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1377 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
1378 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1379 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1380 sd->sd_type = ssd->ssd_type;
1381 sd->sd_dpl = ssd->ssd_dpl;
1382 sd->sd_p = ssd->ssd_p;
1383 sd->sd_gran = ssd->ssd_gran;
1389 * Populate the (physmap) array with base/bound pairs describing the
1390 * available physical memory in the system, then test this memory and
1391 * build the phys_avail array describing the actually-available memory.
1393 * If we cannot accurately determine the physical memory map, then use
1394 * value from the 0xE801 call, and failing that, the RTC.
1396 * Total memory size may be set by the kernel environment variable
1397 * hw.physmem or the compile-time define MAXMEM.
1399 * XXX first should be vm_paddr_t.
1402 getmemsize(caddr_t kmdp, u_int64_t first)
1404 int i, off, physmap_idx, pa_indx, da_indx;
1405 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
1406 u_long physmem_tunable;
1408 struct bios_smap *smapbase, *smap, *smapend;
1410 quad_t dcons_addr, dcons_size;
1412 bzero(physmap, sizeof(physmap));
1417 * get memory map from INT 15:E820, kindly supplied by the loader.
1419 * subr_module.c says:
1420 * "Consumer may safely assume that size value precedes data."
1421 * ie: an int32_t immediately precedes smap.
1423 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1424 MODINFO_METADATA | MODINFOMD_SMAP);
1425 if (smapbase == NULL)
1426 panic("No BIOS smap info from loader!");
1428 smapsize = *((u_int32_t *)smapbase - 1);
1429 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1431 for (smap = smapbase; smap < smapend; smap++) {
1432 if (boothowto & RB_VERBOSE)
1433 kprintf("SMAP type=%02x base=%016lx len=%016lx\n",
1434 smap->type, smap->base, smap->length);
1436 if (smap->type != SMAP_TYPE_MEMORY)
1439 if (smap->length == 0)
1442 for (i = 0; i <= physmap_idx; i += 2) {
1443 if (smap->base < physmap[i + 1]) {
1444 if (boothowto & RB_VERBOSE)
1446 "Overlapping or non-monotonic memory region, ignoring second region\n");
1451 if (smap->base == physmap[physmap_idx + 1]) {
1452 physmap[physmap_idx + 1] += smap->length;
1457 if (physmap_idx == PHYSMAP_SIZE) {
1459 "Too many segments in the physical address map, giving up\n");
1462 physmap[physmap_idx] = smap->base;
1463 physmap[physmap_idx + 1] = smap->base + smap->length;
1467 * Find the 'base memory' segment for SMP
1470 for (i = 0; i <= physmap_idx; i += 2) {
1471 if (physmap[i] == 0x00000000) {
1472 basemem = physmap[i + 1] / 1024;
1477 panic("BIOS smap did not include a basemem segment!");
1480 /* make hole for AP bootstrap code */
1481 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1485 * Maxmem isn't the "maximum memory", it's one larger than the
1486 * highest page of the physical address space. It should be
1487 * called something like "Maxphyspage". We may adjust this
1488 * based on ``hw.physmem'' and the results of the memory test.
1490 Maxmem = atop(physmap[physmap_idx + 1]);
1493 Maxmem = MAXMEM / 4;
1496 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1497 Maxmem = atop(physmem_tunable);
1500 * Don't allow MAXMEM or hw.physmem to extend the amount of memory
1503 if (Maxmem > atop(physmap[physmap_idx + 1]))
1504 Maxmem = atop(physmap[physmap_idx + 1]);
1506 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1507 (boothowto & RB_VERBOSE))
1508 kprintf("Physical memory use set to %ldK\n", Maxmem * 4);
1510 /* call pmap initialization to make new kernel address space */
1511 pmap_bootstrap(&first, 0);
1514 * Size up each available chunk of physical memory.
1516 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1519 phys_avail[pa_indx++] = physmap[0];
1520 phys_avail[pa_indx] = physmap[0];
1521 dump_avail[da_indx] = physmap[0];
1525 * Get dcons buffer address
1527 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1528 kgetenv_quad("dcons.size", &dcons_size) == 0)
1532 * physmap is in bytes, so when converting to page boundaries,
1533 * round up the start address and round down the end address.
1535 for (i = 0; i <= physmap_idx; i += 2) {
1538 end = ptoa((vm_paddr_t)Maxmem);
1539 if (physmap[i + 1] < end)
1540 end = trunc_page(physmap[i + 1]);
1541 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1542 int tmp, page_bad, full;
1543 int *ptr = (int *)CADDR1;
1547 * block out kernel memory as not available.
1549 if (pa >= 0x100000 && pa < first)
1553 * block out dcons buffer
1556 && pa >= trunc_page(dcons_addr)
1557 && pa < dcons_addr + dcons_size)
1563 * map page into kernel: valid, read/write,non-cacheable
1565 *pte = pa | PG_V | PG_RW | PG_N;
1570 * Test for alternating 1's and 0's
1572 *(volatile int *)ptr = 0xaaaaaaaa;
1573 if (*(volatile int *)ptr != 0xaaaaaaaa)
1576 * Test for alternating 0's and 1's
1578 *(volatile int *)ptr = 0x55555555;
1579 if (*(volatile int *)ptr != 0x55555555)
1584 *(volatile int *)ptr = 0xffffffff;
1585 if (*(volatile int *)ptr != 0xffffffff)
1590 *(volatile int *)ptr = 0x0;
1591 if (*(volatile int *)ptr != 0x0)
1594 * Restore original value.
1599 * Adjust array of valid/good pages.
1601 if (page_bad == TRUE)
1604 * If this good page is a continuation of the
1605 * previous set of good pages, then just increase
1606 * the end pointer. Otherwise start a new chunk.
1607 * Note that "end" points one higher than end,
1608 * making the range >= start and < end.
1609 * If we're also doing a speculative memory
1610 * test and we at or past the end, bump up Maxmem
1611 * so that we keep going. The first bad page
1612 * will terminate the loop.
1614 if (phys_avail[pa_indx] == pa) {
1615 phys_avail[pa_indx] += PAGE_SIZE;
1618 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1620 "Too many holes in the physical address space, giving up\n");
1625 phys_avail[pa_indx++] = pa; /* start */
1626 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1630 if (dump_avail[da_indx] == pa) {
1631 dump_avail[da_indx] += PAGE_SIZE;
1634 if (da_indx == DUMP_AVAIL_ARRAY_END) {
1638 dump_avail[da_indx++] = pa; /* start */
1639 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1651 * The last chunk must contain at least one page plus the message
1652 * buffer to avoid complicating other code (message buffer address
1653 * calculation, etc.).
1655 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1656 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1657 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1658 phys_avail[pa_indx--] = 0;
1659 phys_avail[pa_indx--] = 0;
1662 Maxmem = atop(phys_avail[pa_indx]);
1664 /* Trim off space for the message buffer. */
1665 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1667 /* Map the message buffer. */
1668 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1669 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
1682 * 7 Device Not Available (x87)
1684 * 9 Coprocessor Segment overrun (unsupported, reserved)
1686 * 11 Segment not present
1688 * 13 General Protection
1691 * 16 x87 FP Exception pending
1692 * 17 Alignment Check
1694 * 19 SIMD floating point
1696 * 32-255 INTn/external sources
1699 hammer_time(u_int64_t modulep, u_int64_t physfree)
1702 int gsel_tss, metadata_missing, off, x;
1703 struct mdglobaldata *gd;
1708 * This must be done before the first references
1709 * to CPU_prvspace[0] are made.
1711 init_paging(&physfree);
1714 * Prevent lowering of the ipl if we call tsleep() early.
1716 gd = &CPU_prvspace[0].mdglobaldata;
1717 bzero(gd, sizeof(*gd));
1720 * Note: on both UP and SMP curthread must be set non-NULL
1721 * early in the boot sequence because the system assumes
1722 * that 'curthread' is never NULL.
1725 gd->mi.gd_curthread = &thread0;
1726 thread0.td_gd = &gd->mi;
1728 atdevbase = ISA_HOLE_START + PTOV_OFFSET;
1731 metadata_missing = 0;
1732 if (bootinfo.bi_modulep) {
1733 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1734 preload_bootstrap_relocate(KERNBASE);
1736 metadata_missing = 1;
1738 if (bootinfo.bi_envp)
1739 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1742 preload_metadata = (caddr_t)(uintptr_t)(modulep + PTOV_OFFSET);
1743 preload_bootstrap_relocate(PTOV_OFFSET);
1744 kmdp = preload_search_by_type("elf kernel");
1746 kmdp = preload_search_by_type("elf64 kernel");
1747 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1748 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + PTOV_OFFSET;
1750 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1751 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1755 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1756 * and ncpus_fit_mask remain 0.
1761 /* Init basic tunables, hz etc */
1765 * make gdt memory segments
1767 gdt_segs[GPROC0_SEL].ssd_base =
1768 (uintptr_t) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1770 gd->mi.gd_prvspace = &CPU_prvspace[0];
1772 for (x = 0; x < NGDT; x++) {
1773 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1))
1774 ssdtosd(&gdt_segs[x], &gdt[x]);
1776 ssdtosyssd(&gdt_segs[GPROC0_SEL],
1777 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1778 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1779 r_gdt.rd_base = (long) gdt;
1782 wrmsr(MSR_FSBASE, 0); /* User value */
1783 wrmsr(MSR_GSBASE, (u_int64_t)&gd->mi);
1784 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */
1786 mi_gdinit(&gd->mi, 0);
1788 proc0paddr = proc0paddr_buff;
1789 mi_proc0init(&gd->mi, proc0paddr);
1790 safepri = TDPRI_MAX;
1792 /* spinlocks and the BGL */
1796 for (x = 0; x < NIDT; x++)
1797 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0);
1798 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0);
1799 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0);
1800 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 1);
1801 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0);
1802 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0);
1803 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0);
1804 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0);
1805 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0);
1806 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
1807 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0);
1808 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0);
1809 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0);
1810 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0);
1811 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0);
1812 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0);
1813 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0);
1814 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0);
1815 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0);
1816 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0);
1818 r_idt.rd_limit = sizeof(idt0) - 1;
1819 r_idt.rd_base = (long) idt;
1823 * Initialize the console before we print anything out.
1828 if (metadata_missing)
1829 kprintf("WARNING: loader(8) metadata is missing!\n");
1839 if (boothowto & RB_KDB)
1840 Debugger("Boot flags requested debugger");
1844 finishidentcpu(); /* Final stage of CPU initialization */
1845 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1846 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1848 identify_cpu(); /* Final stage of CPU initialization */
1849 initializecpu(); /* Initialize CPU registers */
1851 /* make an initial tss so cpu can get interrupt stack on syscall! */
1852 gd->gd_common_tss.tss_rsp0 = thread0.td_kstack + \
1853 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb);
1854 /* Ensure the stack is aligned to 16 bytes */
1855 gd->gd_common_tss.tss_rsp0 &= ~0xFul;
1856 gd->gd_rsp0 = gd->gd_common_tss.tss_rsp0;
1858 /* doublefault stack space, runs on ist1 */
1859 gd->gd_common_tss.tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)];
1861 /* Set the IO permission bitmap (empty due to tss seg limit) */
1862 gd->gd_common_tss.tss_iobase = sizeof(struct amd64tss);
1864 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1865 gd->gd_tss_gdt = &gdt[GPROC0_SEL];
1866 gd->gd_common_tssd = *gd->gd_tss_gdt;
1869 /* Set up the fast syscall stuff */
1870 msr = rdmsr(MSR_EFER) | EFER_SCE;
1871 wrmsr(MSR_EFER, msr);
1872 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall));
1873 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
1874 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
1875 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
1876 wrmsr(MSR_STAR, msr);
1877 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D);
1879 getmemsize(kmdp, physfree);
1880 init_param2(physmem);
1882 /* now running on new page tables, configured,and u/iom is accessible */
1884 /* Map the message buffer. */
1886 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1887 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1890 msgbufinit(msgbufp, MSGBUF_SIZE);
1893 /* transfer to user mode */
1895 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
1896 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
1897 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
1903 /* setup proc 0's pcb */
1904 thread0.td_pcb->pcb_flags = 0;
1906 thread0.td_pcb->pcb_cr3 = KPML4phys;
1908 thread0.td_pcb->pcb_cr3 = IdlePTD;
1910 thread0.td_pcb->pcb_ext = 0;
1911 lwp0.lwp_md.md_regs = &proc0_tf;
1912 env = kgetenv("kernelname");
1914 strlcpy(kernelname, env, sizeof(kernelname));
1916 /* Location of kernel stack for locore */
1917 return ((u_int64_t)thread0.td_pcb);
1921 * Initialize machine-dependant portions of the global data structure.
1922 * Note that the global data area and cpu0's idlestack in the private
1923 * data space were allocated in locore.
1925 * Note: the idlethread's cpl is 0
1927 * WARNING! Called from early boot, 'mycpu' may not work yet.
1930 cpu_gdinit(struct mdglobaldata *gd, int cpu)
1933 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
1935 lwkt_init_thread(&gd->mi.gd_idlethread,
1936 gd->mi.gd_prvspace->idlestack,
1937 sizeof(gd->mi.gd_prvspace->idlestack),
1938 TDF_MPSAFE, &gd->mi);
1939 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
1940 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
1941 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
1942 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
1946 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
1948 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
1949 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
1956 globaldata_find(int cpu)
1958 KKASSERT(cpu >= 0 && cpu < ncpus);
1959 return(&CPU_prvspace[cpu].mdglobaldata.mi);
1962 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1963 static void f00f_hack(void *unused);
1964 SYSINIT(f00f_hack, SI_BOOT2_BIOS, SI_ORDER_ANY, f00f_hack, NULL);
1967 f00f_hack(void *unused)
1969 struct gate_descriptor *new_idt;
1975 kprintf("Intel Pentium detected, installing workaround for F00F bug\n");
1977 r_idt.rd_limit = sizeof(idt0) - 1;
1979 tmp = kmem_alloc(&kernel_map, PAGE_SIZE * 2);
1981 panic("kmem_alloc returned 0");
1982 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
1983 panic("kmem_alloc returned non-page-aligned memory");
1984 /* Put the first seven entries in the lower page */
1985 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
1986 bcopy(idt, new_idt, sizeof(idt0));
1987 r_idt.rd_base = (int)new_idt;
1990 if (vm_map_protect(&kernel_map, tmp, tmp + PAGE_SIZE,
1991 VM_PROT_READ, FALSE) != KERN_SUCCESS)
1992 panic("vm_map_protect failed");
1995 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
1998 ptrace_set_pc(struct lwp *lp, unsigned long addr)
2001 lp->lwp_md.md_regs->tf_eip = addr;
2007 ptrace_single_step(struct lwp *lp)
2010 lp->lwp_md.md_regs->tf_eflags |= PSL_T;
2016 fill_regs(struct lwp *lp, struct reg *regs)
2019 struct trapframe *tp;
2021 tp = lp->lwp_md.md_regs;
2023 regs->r_gs = tp->tf_gs;
2024 regs->r_fs = tp->tf_fs;
2025 regs->r_es = tp->tf_es;
2026 regs->r_ds = tp->tf_ds;
2027 regs->r_edi = tp->tf_edi;
2028 regs->r_esi = tp->tf_esi;
2029 regs->r_ebp = tp->tf_ebp;
2030 regs->r_ebx = tp->tf_ebx;
2031 regs->r_edx = tp->tf_edx;
2032 regs->r_ecx = tp->tf_ecx;
2033 regs->r_eax = tp->tf_eax;
2034 regs->r_eip = tp->tf_eip;
2036 regs->r_cs = tp->tf_cs;
2038 regs->r_eflags = tp->tf_eflags;
2039 regs->r_esp = tp->tf_esp;
2041 regs->r_ss = tp->tf_ss;
2042 pcb = lp->lwp_thread->td_pcb;
2047 set_regs(struct lwp *lp, struct reg *regs)
2050 struct trapframe *tp;
2052 tp = lp->lwp_md.md_regs;
2054 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2055 !CS_SECURE(regs->r_cs))
2057 tp->tf_gs = regs->r_gs;
2058 tp->tf_fs = regs->r_fs;
2059 tp->tf_es = regs->r_es;
2060 tp->tf_ds = regs->r_ds;
2061 tp->tf_edi = regs->r_edi;
2062 tp->tf_esi = regs->r_esi;
2063 tp->tf_ebp = regs->r_ebp;
2064 tp->tf_ebx = regs->r_ebx;
2065 tp->tf_edx = regs->r_edx;
2066 tp->tf_ecx = regs->r_ecx;
2067 tp->tf_eax = regs->r_eax;
2068 tp->tf_eip = regs->r_eip;
2070 tp->tf_cs = regs->r_cs;
2072 tp->tf_eflags = regs->r_eflags;
2073 tp->tf_esp = regs->r_esp;
2075 tp->tf_ss = regs->r_ss;
2076 pcb = lp->lwp_thread->td_pcb;
2080 #ifndef CPU_DISABLE_SSE
2082 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
2084 struct env87 *penv_87 = &sv_87->sv_env;
2085 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2088 /* FPU control/status */
2089 penv_87->en_cw = penv_xmm->en_cw;
2090 penv_87->en_sw = penv_xmm->en_sw;
2091 penv_87->en_tw = penv_xmm->en_tw;
2092 penv_87->en_fip = penv_xmm->en_fip;
2093 penv_87->en_fcs = penv_xmm->en_fcs;
2094 penv_87->en_opcode = penv_xmm->en_opcode;
2095 penv_87->en_foo = penv_xmm->en_foo;
2096 penv_87->en_fos = penv_xmm->en_fos;
2099 for (i = 0; i < 8; ++i)
2100 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2102 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2106 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2108 struct env87 *penv_87 = &sv_87->sv_env;
2109 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2112 /* FPU control/status */
2113 penv_xmm->en_cw = penv_87->en_cw;
2114 penv_xmm->en_sw = penv_87->en_sw;
2115 penv_xmm->en_tw = penv_87->en_tw;
2116 penv_xmm->en_fip = penv_87->en_fip;
2117 penv_xmm->en_fcs = penv_87->en_fcs;
2118 penv_xmm->en_opcode = penv_87->en_opcode;
2119 penv_xmm->en_foo = penv_87->en_foo;
2120 penv_xmm->en_fos = penv_87->en_fos;
2123 for (i = 0; i < 8; ++i)
2124 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2126 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2128 #endif /* CPU_DISABLE_SSE */
2131 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2133 #ifndef CPU_DISABLE_SSE
2135 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2136 (struct save87 *)fpregs);
2139 #endif /* CPU_DISABLE_SSE */
2140 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2145 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2147 #ifndef CPU_DISABLE_SSE
2149 set_fpregs_xmm((struct save87 *)fpregs,
2150 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2153 #endif /* CPU_DISABLE_SSE */
2154 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2159 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2163 dbregs->dr0 = rdr0();
2164 dbregs->dr1 = rdr1();
2165 dbregs->dr2 = rdr2();
2166 dbregs->dr3 = rdr3();
2167 dbregs->dr4 = rdr4();
2168 dbregs->dr5 = rdr5();
2169 dbregs->dr6 = rdr6();
2170 dbregs->dr7 = rdr7();
2175 pcb = lp->lwp_thread->td_pcb;
2177 dbregs->dr0 = pcb->pcb_dr0;
2178 dbregs->dr1 = pcb->pcb_dr1;
2179 dbregs->dr2 = pcb->pcb_dr2;
2180 dbregs->dr3 = pcb->pcb_dr3;
2183 dbregs->dr6 = pcb->pcb_dr6;
2184 dbregs->dr7 = pcb->pcb_dr7;
2191 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2195 load_dr0(dbregs->dr0);
2196 load_dr1(dbregs->dr1);
2197 load_dr2(dbregs->dr2);
2198 load_dr3(dbregs->dr3);
2199 load_dr4(dbregs->dr4);
2200 load_dr5(dbregs->dr5);
2201 load_dr6(dbregs->dr6);
2202 load_dr7(dbregs->dr7);
2206 struct ucred *ucred;
2208 uint32_t mask1, mask2;
2211 * Don't let an illegal value for dr7 get set. Specifically,
2212 * check for undefined settings. Setting these bit patterns
2213 * result in undefined behaviour and can lead to an unexpected
2216 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2217 i++, mask1 <<= 2, mask2 <<= 2)
2219 if ((dbregs->dr7 & mask1) == mask2)
2223 pcb = lp->lwp_thread->td_pcb;
2224 ucred = lp->lwp_proc->p_ucred;
2227 * Don't let a process set a breakpoint that is not within the
2228 * process's address space. If a process could do this, it
2229 * could halt the system by setting a breakpoint in the kernel
2230 * (if ddb was enabled). Thus, we need to check to make sure
2231 * that no breakpoints are being enabled for addresses outside
2232 * process's address space, unless, perhaps, we were called by
2235 * XXX - what about when the watched area of the user's
2236 * address space is written into from within the kernel
2237 * ... wouldn't that still cause a breakpoint to be generated
2238 * from within kernel mode?
2241 if (suser_cred(ucred, 0) != 0) {
2243 if (dbregs->dr7 & 0x3) {
2244 /* dr0 is enabled */
2245 if (dbregs->dr0 >= VM_MAX_USER_ADDRESS)
2249 if (dbregs->dr7 & (0x3<<2)) {
2250 /* dr1 is enabled */
2251 if (dbregs->dr1 >= VM_MAX_USER_ADDRESS)
2255 if (dbregs->dr7 & (0x3<<4)) {
2256 /* dr2 is enabled */
2257 if (dbregs->dr2 >= VM_MAX_USER_ADDRESS)
2261 if (dbregs->dr7 & (0x3<<6)) {
2262 /* dr3 is enabled */
2263 if (dbregs->dr3 >= VM_MAX_USER_ADDRESS)
2270 pcb->pcb_dr0 = dbregs->dr0;
2271 pcb->pcb_dr1 = dbregs->dr1;
2272 pcb->pcb_dr2 = dbregs->dr2;
2273 pcb->pcb_dr3 = dbregs->dr3;
2274 pcb->pcb_dr6 = dbregs->dr6;
2275 pcb->pcb_dr7 = dbregs->dr7;
2278 pcb->pcb_flags |= PCB_DBREGS;
2285 * Return > 0 if a hardware breakpoint has been hit, and the
2286 * breakpoint was in user space. Return 0, otherwise.
2289 user_dbreg_trap(void)
2291 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2292 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2293 int nbp; /* number of breakpoints that triggered */
2294 caddr_t addr[4]; /* breakpoint addresses */
2298 if ((dr7 & 0x000000ff) == 0) {
2300 * all GE and LE bits in the dr7 register are zero,
2301 * thus the trap couldn't have been caused by the
2302 * hardware debug registers
2309 bp = dr6 & 0x0000000f;
2313 * None of the breakpoint bits are set meaning this
2314 * trap was not caused by any of the debug registers
2320 * at least one of the breakpoints were hit, check to see
2321 * which ones and if any of them are user space addresses
2325 addr[nbp++] = (caddr_t)rdr0();
2328 addr[nbp++] = (caddr_t)rdr1();
2331 addr[nbp++] = (caddr_t)rdr2();
2334 addr[nbp++] = (caddr_t)rdr3();
2337 for (i=0; i<nbp; i++) {
2339 (caddr_t)VM_MAX_USER_ADDRESS) {
2341 * addr[i] is in user space
2348 * None of the breakpoints are in user space.
2356 Debugger(const char *msg)
2358 kprintf("Debugger(\"%s\") called.\n", msg);
2365 * Provide inb() and outb() as functions. They are normally only
2366 * available as macros calling inlined functions, thus cannot be
2367 * called inside DDB.
2369 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2375 /* silence compiler warnings */
2377 void outb(u_int, u_char);
2384 * We use %%dx and not %1 here because i/o is done at %dx and not at
2385 * %edx, while gcc generates inferior code (movw instead of movl)
2386 * if we tell it to load (u_short) port.
2388 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2393 outb(u_int port, u_char data)
2397 * Use an unnecessary assignment to help gcc's register allocator.
2398 * This make a large difference for gcc-1.40 and a tiny difference
2399 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2400 * best results. gcc-2.6.0 can't handle this.
2403 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2410 #include "opt_cpu.h"
2414 * initialize all the SMP locks
2417 /* critical region when masking or unmasking interupts */
2418 struct spinlock_deprecated imen_spinlock;
2420 /* Make FAST_INTR() routines sequential */
2421 struct spinlock_deprecated fast_intr_spinlock;
2423 /* critical region for old style disable_intr/enable_intr */
2424 struct spinlock_deprecated mpintr_spinlock;
2426 /* critical region around INTR() routines */
2427 struct spinlock_deprecated intr_spinlock;
2429 /* lock region used by kernel profiling */
2430 struct spinlock_deprecated mcount_spinlock;
2432 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2433 struct spinlock_deprecated com_spinlock;
2435 /* locks kernel kprintfs */
2436 struct spinlock_deprecated cons_spinlock;
2438 /* lock regions around the clock hardware */
2439 struct spinlock_deprecated clock_spinlock;
2441 /* lock around the MP rendezvous */
2442 struct spinlock_deprecated smp_rv_spinlock;
2448 * mp_lock = 0; BSP already owns the MP lock
2451 * Get the initial mp_lock with a count of 1 for the BSP.
2452 * This uses a LOGICAL cpu ID, ie BSP == 0.
2455 cpu_get_initial_mplock();
2458 spin_lock_init(&mcount_spinlock);
2459 spin_lock_init(&fast_intr_spinlock);
2460 spin_lock_init(&intr_spinlock);
2461 spin_lock_init(&mpintr_spinlock);
2462 spin_lock_init(&imen_spinlock);
2463 spin_lock_init(&smp_rv_spinlock);
2464 spin_lock_init(&com_spinlock);
2465 spin_lock_init(&clock_spinlock);
2466 spin_lock_init(&cons_spinlock);
2468 /* our token pool needs to work early */
2469 lwkt_token_pool_init();