2 * Copyright (c) 1991 The Regents of the University of California.
3 * Copyright (c) 2005,2008 The DragonFly Project.
6 * This code is derived from software contributed to The DragonFly Project
7 * by Matthew Dillon <dillon@backplane.com>
9 * This code is derived from software contributed to Berkeley by
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in
20 * the documentation and/or other materials provided with the
22 * 3. Neither the name of The DragonFly Project nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific, prior written permission.
26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
29 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
30 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
31 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
32 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
33 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
34 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
35 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
36 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * $DragonFly: src/sys/platform/pc64/icu/icu_abi.c,v 1.1 2008/08/29 17:07:16 dillon Exp $
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/kernel.h>
45 #include <sys/machintr.h>
46 #include <sys/interrupt.h>
49 #include <machine/segments.h>
50 #include <machine/md_var.h>
51 #include <machine_base/isa/intr_machdep.h>
52 #include <machine/globaldata.h>
54 #include <sys/thread2.h>
61 extern void ICU_INTREN(int);
62 extern void ICU_INTRDIS(int);
65 IDTVEC(icu_fastintr0), IDTVEC(icu_fastintr1),
66 IDTVEC(icu_fastintr2), IDTVEC(icu_fastintr3),
67 IDTVEC(icu_fastintr4), IDTVEC(icu_fastintr5),
68 IDTVEC(icu_fastintr6), IDTVEC(icu_fastintr7),
69 IDTVEC(icu_fastintr8), IDTVEC(icu_fastintr9),
70 IDTVEC(icu_fastintr10), IDTVEC(icu_fastintr11),
71 IDTVEC(icu_fastintr12), IDTVEC(icu_fastintr13),
72 IDTVEC(icu_fastintr14), IDTVEC(icu_fastintr15);
75 IDTVEC(icu_slowintr0), IDTVEC(icu_slowintr1),
76 IDTVEC(icu_slowintr2), IDTVEC(icu_slowintr3),
77 IDTVEC(icu_slowintr4), IDTVEC(icu_slowintr5),
78 IDTVEC(icu_slowintr6), IDTVEC(icu_slowintr7),
79 IDTVEC(icu_slowintr8), IDTVEC(icu_slowintr9),
80 IDTVEC(icu_slowintr10), IDTVEC(icu_slowintr11),
81 IDTVEC(icu_slowintr12), IDTVEC(icu_slowintr13),
82 IDTVEC(icu_slowintr14), IDTVEC(icu_slowintr15);
84 static int icu_vectorctl(int, int, int);
85 static int icu_setvar(int, const void *);
86 static int icu_getvar(int, void *);
87 static void icu_finalize(void);
88 static void icu_cleanup(void);
90 static inthand_t *icu_fastintr[ICU_HWI_VECTORS] = {
91 &IDTVEC(icu_fastintr0), &IDTVEC(icu_fastintr1),
92 &IDTVEC(icu_fastintr2), &IDTVEC(icu_fastintr3),
93 &IDTVEC(icu_fastintr4), &IDTVEC(icu_fastintr5),
94 &IDTVEC(icu_fastintr6), &IDTVEC(icu_fastintr7),
95 &IDTVEC(icu_fastintr8), &IDTVEC(icu_fastintr9),
96 &IDTVEC(icu_fastintr10), &IDTVEC(icu_fastintr11),
97 &IDTVEC(icu_fastintr12), &IDTVEC(icu_fastintr13),
98 &IDTVEC(icu_fastintr14), &IDTVEC(icu_fastintr15)
101 static inthand_t *icu_slowintr[ICU_HWI_VECTORS] = {
102 &IDTVEC(icu_slowintr0), &IDTVEC(icu_slowintr1),
103 &IDTVEC(icu_slowintr2), &IDTVEC(icu_slowintr3),
104 &IDTVEC(icu_slowintr4), &IDTVEC(icu_slowintr5),
105 &IDTVEC(icu_slowintr6), &IDTVEC(icu_slowintr7),
106 &IDTVEC(icu_slowintr8), &IDTVEC(icu_slowintr9),
107 &IDTVEC(icu_slowintr10), &IDTVEC(icu_slowintr11),
108 &IDTVEC(icu_slowintr12), &IDTVEC(icu_slowintr13),
109 &IDTVEC(icu_slowintr14), &IDTVEC(icu_slowintr15)
112 struct machintr_abi MachIntrABI = {
114 .intrdis = ICU_INTRDIS,
115 .intren = ICU_INTREN,
116 .vectorctl =icu_vectorctl,
117 .setvar = icu_setvar,
118 .getvar = icu_getvar,
119 .finalize = icu_finalize,
120 .cleanup = icu_cleanup
123 static int icu_imcr_present;
126 * WARNING! SMP builds can use the ICU now so this code must be MP safe.
130 icu_setvar(int varid, const void *buf)
135 case MACHINTR_VAR_IMCR_PRESENT:
136 icu_imcr_present = *(const int *)buf;
147 icu_getvar(int varid, void *buf)
152 case MACHINTR_VAR_IMCR_PRESENT:
153 *(int *)buf = icu_imcr_present;
163 * Called before interrupts are physically enabled
170 for (intr = 0; intr < ICU_HWI_VECTORS; ++intr) {
171 machintr_intrdis(intr);
173 machintr_intren(ICU_IRQ_SLAVE);
176 * If an IMCR is present, programming bit 0 disconnects the 8259
177 * from the BSP. The 8259 may still be connected to LINT0 on the BSP's
180 * If we are running SMP the LAPIC is active, try to use virtual wire
181 * mode so we can use other interrupt sources within the LAPIC in
182 * addition to the 8259.
184 if (icu_imcr_present) {
193 * Called after interrupts physically enabled but before the
194 * critical section is released.
200 mdcpu->gd_fpending = 0;
201 mdcpu->gd_ipending = 0;
207 icu_vectorctl(int op, int intr, int flags)
212 if (intr < 0 || intr >= ICU_HWI_VECTORS || intr == ICU_IRQ_SLAVE)
220 case MACHINTR_VECTOR_SETUP:
221 setidt(IDT_OFFSET + intr,
222 flags & INTR_FAST ? icu_fastintr[intr] : icu_slowintr[intr],
223 SDT_SYSIGT, SEL_KPL, 0);
224 machintr_intren(intr);
226 case MACHINTR_VECTOR_TEARDOWN:
227 case MACHINTR_VECTOR_SETDEFAULT:
228 setidt(IDT_OFFSET + intr, icu_slowintr[intr],
229 SDT_SYSIGT, SEL_KPL, 0);
230 machintr_intrdis(intr);