2 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 2003 Peter Wemm.
5 * Copyright (c) 2008 The DragonFly Project.
8 * This code is derived from software contributed to Berkeley by
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the University of
22 * California, Berkeley and its contributors.
23 * 4. Neither the name of the University nor the names of its contributors
24 * may be used to endorse or promote products derived from this software
25 * without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
43 //#include "use_npx.h"
45 #include "opt_atalk.h"
46 #include "opt_compat.h"
49 #include "opt_directio.h"
52 #include "opt_msgbuf.h"
55 #include <sys/param.h>
56 #include <sys/systm.h>
57 #include <sys/sysproto.h>
58 #include <sys/signalvar.h>
59 #include <sys/kernel.h>
60 #include <sys/linker.h>
61 #include <sys/malloc.h>
65 #include <sys/reboot.h>
67 #include <sys/msgbuf.h>
68 #include <sys/sysent.h>
69 #include <sys/sysctl.h>
70 #include <sys/vmmeter.h>
72 #include <sys/upcall.h>
73 #include <sys/usched.h>
77 #include <vm/vm_param.h>
79 #include <vm/vm_kern.h>
80 #include <vm/vm_object.h>
81 #include <vm/vm_page.h>
82 #include <vm/vm_map.h>
83 #include <vm/vm_pager.h>
84 #include <vm/vm_extern.h>
86 #include <sys/thread2.h>
87 #include <sys/mplock2.h>
95 #include <machine/cpu.h>
96 #include <machine/clock.h>
97 #include <machine/specialreg.h>
99 #include <machine/bootinfo.h>
101 #include <machine/md_var.h>
102 #include <machine/metadata.h>
103 #include <machine/pc/bios.h>
104 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
105 #include <machine/globaldata.h> /* CPU_prvspace */
106 #include <machine/smp.h>
108 #include <machine/perfmon.h>
110 #include <machine/cputypes.h>
113 #include <bus/isa/isa_device.h>
115 #include <machine_base/isa/intr_machdep.h>
116 #include <bus/isa/rtc.h>
117 #include <sys/random.h>
118 #include <sys/ptrace.h>
119 #include <machine/sigframe.h>
121 #define PHYSMAP_ENTRIES 10
123 extern void init386(int first);
124 extern void dblfault_handler(void);
125 extern u_int64_t hammer_time(u_int64_t, u_int64_t);
127 extern void printcpuinfo(void); /* XXX header file */
128 extern void identify_cpu(void);
130 extern void finishidentcpu(void);
132 extern void panicifcpuunsupported(void);
134 static void cpu_startup(void *);
135 #ifndef CPU_DISABLE_SSE
136 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
137 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
138 #endif /* CPU_DISABLE_SSE */
140 extern void ffs_rawread_setup(void);
141 #endif /* DIRECTIO */
142 static void init_locks(void);
144 SYSINIT(cpu, SI_BOOT2_SMP, SI_ORDER_FIRST, cpu_startup, NULL)
147 extern vm_offset_t ksym_start, ksym_end;
154 struct privatespace CPU_prvspace[MAXCPU];
156 int _udatasel, _ucodesel, _ucode32sel;
159 int64_t tsc_offsets[MAXCPU];
161 int64_t tsc_offsets[1];
164 #if defined(SWTCH_OPTIM_STATS)
165 extern int swtch_optim_stats;
166 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
167 CTLFLAG_RD, &swtch_optim_stats, 0, "");
168 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
169 CTLFLAG_RD, &tlb_flush_count, 0, "");
174 u_long ebda_addr = 0;
177 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
179 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
183 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
184 0, 0, sysctl_hw_physmem, "IU", "");
187 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
189 int error = sysctl_handle_int(oidp, 0,
190 ctob(physmem - vmstats.v_wire_count), req);
194 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
195 0, 0, sysctl_hw_usermem, "IU", "");
198 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
200 int error = sysctl_handle_int(oidp, 0,
201 x86_64_btop(avail_end - avail_start), req);
205 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
206 0, 0, sysctl_hw_availpages, "I", "");
212 * The number of PHYSMAP entries must be one less than the number of
213 * PHYSSEG entries because the PHYSMAP entry that spans the largest
214 * physical address that is accessible by ISA DMA is split into two
217 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
219 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
220 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
222 /* must be 2 less so 0 0 can signal end of chunks */
223 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
224 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
226 static vm_offset_t buffer_sva, buffer_eva;
227 vm_offset_t clean_sva, clean_eva;
228 static vm_offset_t pager_sva, pager_eva;
229 static struct trapframe proc0_tf;
232 cpu_startup(void *dummy)
236 vm_offset_t firstaddr;
238 if (boothowto & RB_VERBOSE)
242 * Good {morning,afternoon,evening,night}.
244 kprintf("%s", version);
247 panicifcpuunsupported();
251 kprintf("real memory = %ju (%ju MB)\n",
253 (intmax_t)Realmem / 1024 / 1024);
255 * Display any holes after the first chunk of extended memory.
260 kprintf("Physical memory chunk(s):\n");
261 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
262 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
264 kprintf("0x%08jx - 0x%08jx, %ju bytes (%ju pages)\n",
265 (intmax_t)phys_avail[indx],
266 (intmax_t)phys_avail[indx + 1] - 1,
268 (intmax_t)(size1 / PAGE_SIZE));
273 * Allocate space for system data structures.
274 * The first available kernel virtual address is in "v".
275 * As pages of kernel virtual memory are allocated, "v" is incremented.
276 * As pages of memory are allocated and cleared,
277 * "firstaddr" is incremented.
278 * An index into the kernel page table corresponding to the
279 * virtual memory address maintained in "v" is kept in "mapaddr".
283 * Make two passes. The first pass calculates how much memory is
284 * needed and allocates it. The second pass assigns virtual
285 * addresses to the various data structures.
289 v = (caddr_t)firstaddr;
291 #define valloc(name, type, num) \
292 (name) = (type *)v; v = (caddr_t)((name)+(num))
293 #define valloclim(name, type, num, lim) \
294 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
297 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
298 * For the first 64MB of ram nominally allocate sufficient buffers to
299 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
300 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
301 * the buffer cache we limit the eventual kva reservation to
304 * factor represents the 1/4 x ram conversion.
307 int factor = 4 * BKVASIZE / 1024;
308 int kbytes = physmem * (PAGE_SIZE / 1024);
312 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
314 nbuf += (kbytes - 65536) * 2 / (factor * 5);
315 if (maxbcache && nbuf > maxbcache / BKVASIZE)
316 nbuf = maxbcache / BKVASIZE;
320 * Do not allow the buffer_map to be more then 1/2 the size of the
323 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
324 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
325 kprintf("Warning: nbufs capped at %d\n", nbuf);
328 nswbuf = max(min(nbuf/4, 256), 16);
330 if (nswbuf < NSWBUF_MIN)
337 valloc(swbuf, struct buf, nswbuf);
338 valloc(buf, struct buf, nbuf);
341 * End of first pass, size has been calculated so allocate memory
343 if (firstaddr == 0) {
344 size = (vm_size_t)(v - firstaddr);
345 firstaddr = kmem_alloc(&kernel_map, round_page(size));
347 panic("startup: no room for tables");
352 * End of second pass, addresses have been assigned
354 if ((vm_size_t)(v - firstaddr) != size)
355 panic("startup: table size inconsistency");
357 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
358 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
359 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
361 buffer_map.system_map = 1;
362 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
363 (nswbuf*MAXPHYS) + pager_map_size);
364 pager_map.system_map = 1;
366 #if defined(USERCONFIG)
368 cninit(); /* the preferred console may have changed */
371 kprintf("avail memory = %ju (%ju MB)\n",
372 (uintmax_t)ptoa(vmstats.v_free_count),
373 (uintmax_t)ptoa(vmstats.v_free_count) / 1024 / 1024);
376 * Set up buffers, so they can be used to read disk labels.
379 vm_pager_bufferinit();
383 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
385 mp_start(); /* fire up the APs and APICs */
392 * Send an interrupt to process.
394 * Stack is set up to allow sigcode stored
395 * at top to call routine, followed by kcall
396 * to sigreturn routine below. After sigreturn
397 * resets the signal mask, the stack, and the
398 * frame pointer, it returns to the user
402 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
404 struct lwp *lp = curthread->td_lwp;
405 struct proc *p = lp->lwp_proc;
406 struct trapframe *regs;
407 struct sigacts *psp = p->p_sigacts;
408 struct sigframe sf, *sfp;
412 regs = lp->lwp_md.md_regs;
413 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
415 /* Save user context */
416 bzero(&sf, sizeof(struct sigframe));
417 sf.sf_uc.uc_sigmask = *mask;
418 sf.sf_uc.uc_stack = lp->lwp_sigstk;
419 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
420 KKASSERT(__offsetof(struct trapframe, tf_rdi) == 0);
421 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(struct trapframe));
423 /* Make the size of the saved context visible to userland */
424 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
426 /* Save mailbox pending state for syscall interlock semantics */
427 if (p->p_flag & P_MAILBOX)
428 sf.sf_uc.uc_mcontext.mc_xflags |= PGEX_MAILBOX;
430 /* Allocate and validate space for the signal handler context. */
431 if ((lp->lwp_flag & LWP_ALTSTACK) != 0 && !oonstack &&
432 SIGISMEMBER(psp->ps_sigonstack, sig)) {
433 sp = (char *)(lp->lwp_sigstk.ss_sp + lp->lwp_sigstk.ss_size -
434 sizeof(struct sigframe));
435 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
437 /* We take red zone into account */
438 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128;
441 /* Align to 16 bytes */
442 sfp = (struct sigframe *)((intptr_t)sp & ~(intptr_t)0xF);
444 /* Translate the signal is appropriate */
445 if (p->p_sysent->sv_sigtbl) {
446 if (sig <= p->p_sysent->sv_sigsize)
447 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
451 * Build the argument list for the signal handler.
453 * Arguments are in registers (%rdi, %rsi, %rdx, %rcx)
455 regs->tf_rdi = sig; /* argument 1 */
456 regs->tf_rdx = (register_t)&sfp->sf_uc; /* argument 3 */
458 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
460 * Signal handler installed with SA_SIGINFO.
462 * action(signo, siginfo, ucontext)
464 regs->tf_rsi = (register_t)&sfp->sf_si; /* argument 2 */
465 regs->tf_rcx = (register_t)regs->tf_addr; /* argument 4 */
466 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
468 /* fill siginfo structure */
469 sf.sf_si.si_signo = sig;
470 sf.sf_si.si_code = code;
471 sf.sf_si.si_addr = (void *)regs->tf_addr;
474 * Old FreeBSD-style arguments.
476 * handler (signo, code, [uc], addr)
478 regs->tf_rsi = (register_t)code; /* argument 2 */
479 regs->tf_rcx = (register_t)regs->tf_addr; /* argument 4 */
480 sf.sf_ahu.sf_handler = catcher;
484 * If we're a vm86 process, we want to save the segment registers.
485 * We also change eflags to be our emulated eflags, not the actual
489 if (regs->tf_eflags & PSL_VM) {
490 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
491 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
493 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
494 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
495 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
496 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
498 if (vm86->vm86_has_vme == 0)
499 sf.sf_uc.uc_mcontext.mc_eflags =
500 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
501 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
504 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
505 * syscalls made by the signal handler. This just avoids
506 * wasting time for our lazy fixup of such faults. PSL_NT
507 * does nothing in vm86 mode, but vm86 programs can set it
508 * almost legitimately in probes for old cpu types.
510 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
515 * Save the FPU state and reinit the FP unit
517 npxpush(&sf.sf_uc.uc_mcontext);
520 * Copy the sigframe out to the user's stack.
522 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
524 * Something is wrong with the stack pointer.
525 * ...Kill the process.
530 regs->tf_rsp = (register_t)sfp;
531 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
534 * i386 abi specifies that the direction flag must be cleared
537 regs->tf_rflags &= ~(PSL_T|PSL_D);
540 * 64 bit mode has a code and stack selector but
541 * no data or extra selector. %fs and %gs are not
544 regs->tf_cs = _ucodesel;
545 regs->tf_ss = _udatasel;
549 * Sanitize the trapframe for a virtual kernel passing control to a custom
550 * VM context. Remove any items that would otherwise create a privilage
553 * XXX at the moment we allow userland to set the resume flag. Is this a
557 cpu_sanitize_frame(struct trapframe *frame)
559 frame->tf_cs = _ucodesel;
560 frame->tf_ss = _udatasel;
561 /* XXX VM (8086) mode not supported? */
562 frame->tf_rflags &= (PSL_RF | PSL_USERCHANGE | PSL_VM_UNSUPP);
563 frame->tf_rflags |= PSL_RESERVED_DEFAULT | PSL_I;
569 * Sanitize the tls so loading the descriptor does not blow up
570 * on us. For x86_64 we don't have to do anything.
573 cpu_sanitize_tls(struct savetls *tls)
579 * sigreturn(ucontext_t *sigcntxp)
581 * System call to cleanup state after a signal
582 * has been taken. Reset signal mask and
583 * stack state from context left by sendsig (above).
584 * Return to previous pc and psl as specified by
585 * context left by sendsig. Check carefully to
586 * make sure that the user has not modified the
587 * state to gain improper privileges.
591 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
592 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
595 sys_sigreturn(struct sigreturn_args *uap)
597 struct lwp *lp = curthread->td_lwp;
598 struct proc *p = lp->lwp_proc;
599 struct trapframe *regs;
607 * We have to copy the information into kernel space so userland
608 * can't modify it while we are sniffing it.
610 regs = lp->lwp_md.md_regs;
611 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
615 rflags = ucp->uc_mcontext.mc_rflags;
617 /* VM (8086) mode not supported */
618 rflags &= ~PSL_VM_UNSUPP;
621 if (eflags & PSL_VM) {
622 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
623 struct vm86_kernel *vm86;
626 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
627 * set up the vm86 area, and we can't enter vm86 mode.
629 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
631 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
632 if (vm86->vm86_inited == 0)
635 /* go back to user mode if both flags are set */
636 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
637 trapsignal(lp, SIGBUS, 0);
639 if (vm86->vm86_has_vme) {
640 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
641 (eflags & VME_USERCHANGE) | PSL_VM;
643 vm86->vm86_eflags = eflags; /* save VIF, VIP */
644 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
645 (eflags & VM_USERCHANGE) | PSL_VM;
647 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
648 tf->tf_eflags = eflags;
649 tf->tf_vm86_ds = tf->tf_ds;
650 tf->tf_vm86_es = tf->tf_es;
651 tf->tf_vm86_fs = tf->tf_fs;
652 tf->tf_vm86_gs = tf->tf_gs;
653 tf->tf_ds = _udatasel;
654 tf->tf_es = _udatasel;
655 tf->tf_fs = _udatasel;
656 tf->tf_gs = _udatasel;
661 * Don't allow users to change privileged or reserved flags.
664 * XXX do allow users to change the privileged flag PSL_RF.
665 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
666 * should sometimes set it there too. tf_eflags is kept in
667 * the signal context during signal handling and there is no
668 * other place to remember it, so the PSL_RF bit may be
669 * corrupted by the signal handler without us knowing.
670 * Corruption of the PSL_RF bit at worst causes one more or
671 * one less debugger trap, so allowing it is fairly harmless.
673 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) {
674 kprintf("sigreturn: rflags = 0x%lx\n", (long)rflags);
679 * Don't allow users to load a valid privileged %cs. Let the
680 * hardware check for invalid selectors, excess privilege in
681 * other selectors, invalid %eip's and invalid %esp's.
683 cs = ucp->uc_mcontext.mc_cs;
684 if (!CS_SECURE(cs)) {
685 kprintf("sigreturn: cs = 0x%x\n", cs);
686 trapsignal(lp, SIGBUS, T_PROTFLT);
689 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(struct trapframe));
693 * Restore the FPU state from the frame
696 npxpop(&ucp->uc_mcontext);
699 * Merge saved signal mailbox pending flag to maintain interlock
700 * semantics against system calls.
702 if (ucp->uc_mcontext.mc_xflags & PGEX_MAILBOX)
703 p->p_flag |= P_MAILBOX;
705 if (ucp->uc_mcontext.mc_onstack & 1)
706 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
708 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
710 lp->lwp_sigmask = ucp->uc_sigmask;
711 SIG_CANTMASK(lp->lwp_sigmask);
717 * Stack frame on entry to function. %rax will contain the function vector,
718 * %rcx will contain the function data. flags, rcx, and rax will have
719 * already been pushed on the stack.
730 sendupcall(struct vmupcall *vu, int morepending)
732 struct lwp *lp = curthread->td_lwp;
733 struct trapframe *regs;
734 struct upcall upcall;
735 struct upc_frame upc_frame;
739 * If we are a virtual kernel running an emulated user process
740 * context, switch back to the virtual kernel context before
741 * trying to post the signal.
743 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
744 lp->lwp_md.md_regs->tf_trapno = 0;
745 vkernel_trap(lp, lp->lwp_md.md_regs);
749 * Get the upcall data structure
751 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
752 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
755 kprintf("bad upcall address\n");
760 * If the data structure is already marked pending or has a critical
761 * section count, mark the data structure as pending and return
762 * without doing an upcall. vu_pending is left set.
764 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
765 if (upcall.upc_pending < vu->vu_pending) {
766 upcall.upc_pending = vu->vu_pending;
767 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
768 sizeof(upcall.upc_pending));
774 * We can run this upcall now, clear vu_pending.
776 * Bump our critical section count and set or clear the
777 * user pending flag depending on whether more upcalls are
778 * pending. The user will be responsible for calling
779 * upc_dispatch(-1) to process remaining upcalls.
782 upcall.upc_pending = morepending;
784 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
785 sizeof(upcall.upc_pending));
786 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
790 * Construct a stack frame and issue the upcall
792 regs = lp->lwp_md.md_regs;
793 upc_frame.rax = regs->tf_rax;
794 upc_frame.rcx = regs->tf_rcx;
795 upc_frame.rdx = regs->tf_rdx;
796 upc_frame.flags = regs->tf_rflags;
797 upc_frame.oldip = regs->tf_rip;
798 if (copyout(&upc_frame, (void *)(regs->tf_rsp - sizeof(upc_frame)),
799 sizeof(upc_frame)) != 0) {
800 kprintf("bad stack on upcall\n");
802 regs->tf_rax = (register_t)vu->vu_func;
803 regs->tf_rcx = (register_t)vu->vu_data;
804 regs->tf_rdx = (register_t)lp->lwp_upcall;
805 regs->tf_rip = (register_t)vu->vu_ctx;
806 regs->tf_rsp -= sizeof(upc_frame);
811 * fetchupcall occurs in the context of a system call, which means that
812 * we have to return EJUSTRETURN in order to prevent eax and edx from
813 * being overwritten by the syscall return value.
815 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
816 * and the function pointer in %eax.
819 fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
821 struct upc_frame upc_frame;
822 struct lwp *lp = curthread->td_lwp;
823 struct trapframe *regs;
825 struct upcall upcall;
828 regs = lp->lwp_md.md_regs;
830 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
834 * This jumps us to the next ready context.
837 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
840 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
843 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
844 regs->tf_rax = (register_t)vu->vu_func;
845 regs->tf_rcx = (register_t)vu->vu_data;
846 regs->tf_rdx = (register_t)lp->lwp_upcall;
847 regs->tf_rip = (register_t)vu->vu_ctx;
848 regs->tf_rsp = (register_t)rsp;
851 * This returns us to the originally interrupted code.
853 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
854 regs->tf_rax = upc_frame.rax;
855 regs->tf_rcx = upc_frame.rcx;
856 regs->tf_rdx = upc_frame.rdx;
857 regs->tf_rflags = (regs->tf_rflags & ~PSL_USERCHANGE) |
858 (upc_frame.flags & PSL_USERCHANGE);
859 regs->tf_rip = upc_frame.oldip;
860 regs->tf_rsp = (register_t)((char *)rsp + sizeof(upc_frame));
869 * Machine dependent boot() routine
871 * I haven't seen anything to put here yet
872 * Possibly some stuff might be grafted back here from boot()
880 * Shutdown the CPU as much as possible
886 __asm__ __volatile("hlt");
890 * cpu_idle() represents the idle LWKT. You cannot return from this function
891 * (unless you want to blow things up!). Instead we look for runnable threads
892 * and loop or halt as appropriate. Giant is not held on entry to the thread.
894 * The main loop is entered with a critical section held, we must release
895 * the critical section before doing anything else. lwkt_switch() will
896 * check for pending interrupts due to entering and exiting its own
899 * NOTE: On an SMP system we rely on a scheduler IPI to wake a HLTed cpu up.
900 * However, there are cases where the idlethread will be entered with
901 * the possibility that no IPI will occur and in such cases
902 * lwkt_switch() sets TDF_IDLE_NOHLT.
904 * NOTE: cpu_idle_hlt again defaults to 2 (use ACPI sleep states). Set to
905 * 1 to just use hlt and for debugging purposes.
907 static int cpu_idle_hlt = 2;
908 static int cpu_idle_hltcnt;
909 static int cpu_idle_spincnt;
910 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
911 &cpu_idle_hlt, 0, "Idle loop HLT enable");
912 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
913 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
914 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
915 &cpu_idle_spincnt, 0, "Idle loop entry spins");
918 cpu_idle_default_hook(void)
921 * We must guarentee that hlt is exactly the instruction
924 __asm __volatile("sti; hlt");
927 /* Other subsystems (e.g., ACPI) can hook this later. */
928 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
933 struct thread *td = curthread;
936 KKASSERT(td->td_critcount == 0);
939 * See if there are any LWKTs ready to go.
944 * If we are going to halt call splz unconditionally after
945 * CLIing to catch any interrupt races. Note that we are
946 * at SPL0 and interrupts are enabled.
948 if (cpu_idle_hlt && !lwkt_runnable() &&
949 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
950 __asm __volatile("cli");
952 if (!lwkt_runnable()) {
953 if (cpu_idle_hlt == 1)
954 cpu_idle_default_hook();
960 handle_cpu_contention_mask();
962 __asm __volatile("sti");
965 td->td_flags &= ~TDF_IDLE_NOHLT;
968 __asm __volatile("sti");
969 handle_cpu_contention_mask();
971 __asm __volatile("sti");
981 * This routine is called when the only runnable threads require
982 * the MP lock, and the scheduler couldn't get it. On a real cpu
983 * we let the scheduler spin.
986 handle_cpu_contention_mask(void)
990 mask = cpu_contention_mask;
992 if (mask && bsfl(mask) != mycpu->gd_cpuid)
997 * This routine is called if a spinlock has been held through the
998 * exponential backoff period and is seriously contested. On a real cpu
1002 cpu_spinlock_contested(void)
1010 * Clear registers on exec
1013 exec_setregs(u_long entry, u_long stack, u_long ps_strings)
1015 struct thread *td = curthread;
1016 struct lwp *lp = td->td_lwp;
1017 struct pcb *pcb = td->td_pcb;
1018 struct trapframe *regs = lp->lwp_md.md_regs;
1020 /* was i386_user_cleanup() in NetBSD */
1023 bzero((char *)regs, sizeof(struct trapframe));
1024 regs->tf_rip = entry;
1025 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; /* align the stack */
1026 regs->tf_rdi = stack; /* argv */
1027 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
1028 regs->tf_ss = _udatasel;
1029 regs->tf_cs = _ucodesel;
1030 regs->tf_rbx = ps_strings;
1033 * Reset the hardware debug registers if they were in use.
1034 * They won't have any meaning for the newly exec'd process.
1036 if (pcb->pcb_flags & PCB_DBREGS) {
1042 pcb->pcb_dr7 = 0; /* JG set bit 10? */
1043 if (pcb == td->td_pcb) {
1045 * Clear the debug registers on the running
1046 * CPU, otherwise they will end up affecting
1047 * the next process we switch to.
1051 pcb->pcb_flags &= ~PCB_DBREGS;
1055 * Initialize the math emulator (if any) for the current process.
1056 * Actually, just clear the bit that says that the emulator has
1057 * been initialized. Initialization is delayed until the process
1058 * traps to the emulator (if it is done at all) mainly because
1059 * emulators don't provide an entry point for initialization.
1061 pcb->pcb_flags &= ~FP_SOFTFP;
1064 * NOTE: do not set CR0_TS here. npxinit() must do it after clearing
1065 * gd_npxthread. Otherwise a preemptive interrupt thread
1066 * may panic in npxdna().
1069 load_cr0(rcr0() | CR0_MP);
1072 * NOTE: The MSR values must be correct so we can return to
1073 * userland. gd_user_fs/gs must be correct so the switch
1074 * code knows what the current MSR values are.
1076 pcb->pcb_fsbase = 0; /* Values loaded from PCB on switch */
1077 pcb->pcb_gsbase = 0;
1078 mdcpu->gd_user_fs = 0; /* Cache of current MSR values */
1079 mdcpu->gd_user_gs = 0;
1080 wrmsr(MSR_FSBASE, 0); /* Set MSR values for return to userland */
1081 wrmsr(MSR_KGSBASE, 0);
1083 /* Initialize the npx (if any) for the current process. */
1084 npxinit(__INITIAL_NPXCW__);
1087 pcb->pcb_ds = _udatasel;
1088 pcb->pcb_es = _udatasel;
1089 pcb->pcb_fs = _udatasel;
1090 pcb->pcb_gs = _udatasel;
1099 cr0 |= CR0_NE; /* Done by npxinit() */
1100 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1101 cr0 |= CR0_WP | CR0_AM;
1107 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1110 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1112 if (!error && req->newptr)
1117 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1118 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1120 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1121 CTLFLAG_RW, &disable_rtc_set, 0, "");
1124 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1125 CTLFLAG_RD, &bootinfo, bootinfo, "");
1128 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1129 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1131 extern u_long bootdev; /* not a cdev_t - encoding is different */
1132 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1133 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1136 * Initialize 386 and configure to run kernel
1140 * Initialize segments & interrupt table
1144 struct user_segment_descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1145 static struct gate_descriptor idt0[NIDT];
1146 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1148 union descriptor ldt[NLDT]; /* local descriptor table */
1151 /* table descriptors - used to load tables by cpu */
1152 struct region_descriptor r_gdt, r_idt;
1154 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1155 extern int has_f00f_bug;
1158 /* JG proc0paddr is a virtual address */
1161 char proc0paddr_buff[LWKT_THREAD_STACK];
1164 /* software prototypes -- in more palatable form */
1165 struct soft_segment_descriptor gdt_segs[] = {
1166 /* GNULL_SEL 0 Null Descriptor */
1167 { 0x0, /* segment base address */
1169 0, /* segment type */
1170 0, /* segment descriptor priority level */
1171 0, /* segment descriptor present */
1173 0, /* default 32 vs 16 bit size */
1174 0 /* limit granularity (byte/page units)*/ },
1175 /* GCODE_SEL 1 Code Descriptor for kernel */
1176 { 0x0, /* segment base address */
1177 0xfffff, /* length - all address space */
1178 SDT_MEMERA, /* segment type */
1179 SEL_KPL, /* segment descriptor priority level */
1180 1, /* segment descriptor present */
1182 0, /* default 32 vs 16 bit size */
1183 1 /* limit granularity (byte/page units)*/ },
1184 /* GDATA_SEL 2 Data Descriptor for kernel */
1185 { 0x0, /* segment base address */
1186 0xfffff, /* length - all address space */
1187 SDT_MEMRWA, /* segment type */
1188 SEL_KPL, /* segment descriptor priority level */
1189 1, /* segment descriptor present */
1191 0, /* default 32 vs 16 bit size */
1192 1 /* limit granularity (byte/page units)*/ },
1193 /* GUCODE32_SEL 3 32 bit Code Descriptor for user */
1194 { 0x0, /* segment base address */
1195 0xfffff, /* length - all address space */
1196 SDT_MEMERA, /* segment type */
1197 SEL_UPL, /* segment descriptor priority level */
1198 1, /* segment descriptor present */
1200 1, /* default 32 vs 16 bit size */
1201 1 /* limit granularity (byte/page units)*/ },
1202 /* GUDATA_SEL 4 32/64 bit Data Descriptor for user */
1203 { 0x0, /* segment base address */
1204 0xfffff, /* length - all address space */
1205 SDT_MEMRWA, /* segment type */
1206 SEL_UPL, /* segment descriptor priority level */
1207 1, /* segment descriptor present */
1209 1, /* default 32 vs 16 bit size */
1210 1 /* limit granularity (byte/page units)*/ },
1211 /* GUCODE_SEL 5 64 bit Code Descriptor for user */
1212 { 0x0, /* segment base address */
1213 0xfffff, /* length - all address space */
1214 SDT_MEMERA, /* segment type */
1215 SEL_UPL, /* segment descriptor priority level */
1216 1, /* segment descriptor present */
1218 0, /* default 32 vs 16 bit size */
1219 1 /* limit granularity (byte/page units)*/ },
1220 /* GPROC0_SEL 6 Proc 0 Tss Descriptor */
1222 0x0, /* segment base address */
1223 sizeof(struct x86_64tss)-1,/* length - all address space */
1224 SDT_SYSTSS, /* segment type */
1225 SEL_KPL, /* segment descriptor priority level */
1226 1, /* segment descriptor present */
1228 0, /* unused - default 32 vs 16 bit size */
1229 0 /* limit granularity (byte/page units)*/ },
1230 /* Actually, the TSS is a system descriptor which is double size */
1231 { 0x0, /* segment base address */
1233 0, /* segment type */
1234 0, /* segment descriptor priority level */
1235 0, /* segment descriptor present */
1237 0, /* default 32 vs 16 bit size */
1238 0 /* limit granularity (byte/page units)*/ },
1239 /* GUGS32_SEL 8 32 bit GS Descriptor for user */
1240 { 0x0, /* segment base address */
1241 0xfffff, /* length - all address space */
1242 SDT_MEMRWA, /* segment type */
1243 SEL_UPL, /* segment descriptor priority level */
1244 1, /* segment descriptor present */
1246 1, /* default 32 vs 16 bit size */
1247 1 /* limit granularity (byte/page units)*/ },
1251 setidt(int idx, inthand_t *func, int typ, int dpl, int ist)
1253 struct gate_descriptor *ip;
1256 ip->gd_looffset = (uintptr_t)func;
1257 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
1263 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
1266 #define IDTVEC(name) __CONCAT(X,name)
1269 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1270 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1271 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1272 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1273 IDTVEC(xmm), IDTVEC(dblfault),
1274 IDTVEC(fast_syscall), IDTVEC(fast_syscall32);
1276 #ifdef DEBUG_INTERRUPTS
1277 extern inthand_t *Xrsvdary[256];
1281 sdtossd(struct user_segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1283 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1284 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1285 ssd->ssd_type = sd->sd_type;
1286 ssd->ssd_dpl = sd->sd_dpl;
1287 ssd->ssd_p = sd->sd_p;
1288 ssd->ssd_def32 = sd->sd_def32;
1289 ssd->ssd_gran = sd->sd_gran;
1293 ssdtosd(struct soft_segment_descriptor *ssd, struct user_segment_descriptor *sd)
1296 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1297 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
1298 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1299 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1300 sd->sd_type = ssd->ssd_type;
1301 sd->sd_dpl = ssd->ssd_dpl;
1302 sd->sd_p = ssd->ssd_p;
1303 sd->sd_long = ssd->ssd_long;
1304 sd->sd_def32 = ssd->ssd_def32;
1305 sd->sd_gran = ssd->ssd_gran;
1309 ssdtosyssd(struct soft_segment_descriptor *ssd,
1310 struct system_segment_descriptor *sd)
1313 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1314 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
1315 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1316 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1317 sd->sd_type = ssd->ssd_type;
1318 sd->sd_dpl = ssd->ssd_dpl;
1319 sd->sd_p = ssd->ssd_p;
1320 sd->sd_gran = ssd->ssd_gran;
1326 * Populate the (physmap) array with base/bound pairs describing the
1327 * available physical memory in the system, then test this memory and
1328 * build the phys_avail array describing the actually-available memory.
1330 * If we cannot accurately determine the physical memory map, then use
1331 * value from the 0xE801 call, and failing that, the RTC.
1333 * Total memory size may be set by the kernel environment variable
1334 * hw.physmem or the compile-time define MAXMEM.
1336 * XXX first should be vm_paddr_t.
1339 getmemsize(caddr_t kmdp, u_int64_t first)
1341 int i, off, physmap_idx, pa_indx, da_indx;
1342 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
1343 u_long physmem_tunable;
1345 struct bios_smap *smapbase, *smap, *smapend;
1347 quad_t dcons_addr, dcons_size;
1349 bzero(physmap, sizeof(physmap));
1354 * get memory map from INT 15:E820, kindly supplied by the loader.
1356 * subr_module.c says:
1357 * "Consumer may safely assume that size value precedes data."
1358 * ie: an int32_t immediately precedes smap.
1360 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1361 MODINFO_METADATA | MODINFOMD_SMAP);
1362 if (smapbase == NULL)
1363 panic("No BIOS smap info from loader!");
1365 smapsize = *((u_int32_t *)smapbase - 1);
1366 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1368 for (smap = smapbase; smap < smapend; smap++) {
1369 if (boothowto & RB_VERBOSE)
1370 kprintf("SMAP type=%02x base=%016lx len=%016lx\n",
1371 smap->type, smap->base, smap->length);
1373 if (smap->type != SMAP_TYPE_MEMORY)
1376 if (smap->length == 0)
1379 for (i = 0; i <= physmap_idx; i += 2) {
1380 if (smap->base < physmap[i + 1]) {
1381 if (boothowto & RB_VERBOSE) {
1382 kprintf("Overlapping or non-monotonic "
1383 "memory region, ignoring "
1389 Realmem += smap->length;
1391 if (smap->base == physmap[physmap_idx + 1]) {
1392 physmap[physmap_idx + 1] += smap->length;
1397 if (physmap_idx == PHYSMAP_SIZE) {
1398 kprintf("Too many segments in the physical "
1399 "address map, giving up\n");
1402 physmap[physmap_idx] = smap->base;
1403 physmap[physmap_idx + 1] = smap->base + smap->length;
1407 * Find the 'base memory' segment for SMP
1410 for (i = 0; i <= physmap_idx; i += 2) {
1411 if (physmap[i] == 0x00000000) {
1412 basemem = physmap[i + 1] / 1024;
1417 panic("BIOS smap did not include a basemem segment!");
1420 /* make hole for AP bootstrap code */
1421 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1423 /* Save EBDA address, if any */
1424 ebda_addr = (u_long)(*(u_short *)(KERNBASE + 0x40e));
1429 * Maxmem isn't the "maximum memory", it's one larger than the
1430 * highest page of the physical address space. It should be
1431 * called something like "Maxphyspage". We may adjust this
1432 * based on ``hw.physmem'' and the results of the memory test.
1434 Maxmem = atop(physmap[physmap_idx + 1]);
1437 Maxmem = MAXMEM / 4;
1440 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1441 Maxmem = atop(physmem_tunable);
1444 * Don't allow MAXMEM or hw.physmem to extend the amount of memory
1447 if (Maxmem > atop(physmap[physmap_idx + 1]))
1448 Maxmem = atop(physmap[physmap_idx + 1]);
1450 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1451 (boothowto & RB_VERBOSE))
1452 kprintf("Physical memory use set to %ldK\n", Maxmem * 4);
1454 /* call pmap initialization to make new kernel address space */
1455 pmap_bootstrap(&first);
1458 * Size up each available chunk of physical memory.
1460 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1463 phys_avail[pa_indx++] = physmap[0];
1464 phys_avail[pa_indx] = physmap[0];
1465 dump_avail[da_indx] = physmap[0];
1469 * Get dcons buffer address
1471 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1472 kgetenv_quad("dcons.size", &dcons_size) == 0)
1476 * physmap is in bytes, so when converting to page boundaries,
1477 * round up the start address and round down the end address.
1479 for (i = 0; i <= physmap_idx; i += 2) {
1482 end = ptoa((vm_paddr_t)Maxmem);
1483 if (physmap[i + 1] < end)
1484 end = trunc_page(physmap[i + 1]);
1485 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1486 int tmp, page_bad, full;
1487 int *ptr = (int *)CADDR1;
1491 * block out kernel memory as not available.
1493 if (pa >= 0x100000 && pa < first)
1497 * block out dcons buffer
1500 && pa >= trunc_page(dcons_addr)
1501 && pa < dcons_addr + dcons_size)
1507 * map page into kernel: valid, read/write,non-cacheable
1509 *pte = pa | PG_V | PG_RW | PG_N;
1514 * Test for alternating 1's and 0's
1516 *(volatile int *)ptr = 0xaaaaaaaa;
1517 if (*(volatile int *)ptr != 0xaaaaaaaa)
1520 * Test for alternating 0's and 1's
1522 *(volatile int *)ptr = 0x55555555;
1523 if (*(volatile int *)ptr != 0x55555555)
1528 *(volatile int *)ptr = 0xffffffff;
1529 if (*(volatile int *)ptr != 0xffffffff)
1534 *(volatile int *)ptr = 0x0;
1535 if (*(volatile int *)ptr != 0x0)
1538 * Restore original value.
1543 * Adjust array of valid/good pages.
1545 if (page_bad == TRUE)
1548 * If this good page is a continuation of the
1549 * previous set of good pages, then just increase
1550 * the end pointer. Otherwise start a new chunk.
1551 * Note that "end" points one higher than end,
1552 * making the range >= start and < end.
1553 * If we're also doing a speculative memory
1554 * test and we at or past the end, bump up Maxmem
1555 * so that we keep going. The first bad page
1556 * will terminate the loop.
1558 if (phys_avail[pa_indx] == pa) {
1559 phys_avail[pa_indx] += PAGE_SIZE;
1562 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1564 "Too many holes in the physical address space, giving up\n");
1569 phys_avail[pa_indx++] = pa; /* start */
1570 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1574 if (dump_avail[da_indx] == pa) {
1575 dump_avail[da_indx] += PAGE_SIZE;
1578 if (da_indx == DUMP_AVAIL_ARRAY_END) {
1582 dump_avail[da_indx++] = pa; /* start */
1583 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1595 * The last chunk must contain at least one page plus the message
1596 * buffer to avoid complicating other code (message buffer address
1597 * calculation, etc.).
1599 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1600 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1601 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1602 phys_avail[pa_indx--] = 0;
1603 phys_avail[pa_indx--] = 0;
1606 Maxmem = atop(phys_avail[pa_indx]);
1608 /* Trim off space for the message buffer. */
1609 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1611 avail_end = phys_avail[pa_indx];
1613 /* Map the message buffer. */
1614 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1615 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
1628 * 7 Device Not Available (x87)
1630 * 9 Coprocessor Segment overrun (unsupported, reserved)
1632 * 11 Segment not present
1634 * 13 General Protection
1637 * 16 x87 FP Exception pending
1638 * 17 Alignment Check
1640 * 19 SIMD floating point
1642 * 32-255 INTn/external sources
1645 hammer_time(u_int64_t modulep, u_int64_t physfree)
1650 int metadata_missing, off;
1652 struct mdglobaldata *gd;
1656 * Prevent lowering of the ipl if we call tsleep() early.
1658 gd = &CPU_prvspace[0].mdglobaldata;
1659 bzero(gd, sizeof(*gd));
1662 * Note: on both UP and SMP curthread must be set non-NULL
1663 * early in the boot sequence because the system assumes
1664 * that 'curthread' is never NULL.
1667 gd->mi.gd_curthread = &thread0;
1668 thread0.td_gd = &gd->mi;
1670 atdevbase = ISA_HOLE_START + PTOV_OFFSET;
1673 metadata_missing = 0;
1674 if (bootinfo.bi_modulep) {
1675 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1676 preload_bootstrap_relocate(KERNBASE);
1678 metadata_missing = 1;
1680 if (bootinfo.bi_envp)
1681 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1684 preload_metadata = (caddr_t)(uintptr_t)(modulep + PTOV_OFFSET);
1685 preload_bootstrap_relocate(PTOV_OFFSET);
1686 kmdp = preload_search_by_type("elf kernel");
1688 kmdp = preload_search_by_type("elf64 kernel");
1689 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1690 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + PTOV_OFFSET;
1692 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1693 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1697 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1698 * and ncpus_fit_mask remain 0.
1703 /* Init basic tunables, hz etc */
1707 * make gdt memory segments
1709 gdt_segs[GPROC0_SEL].ssd_base =
1710 (uintptr_t) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1712 gd->mi.gd_prvspace = &CPU_prvspace[0];
1714 for (x = 0; x < NGDT; x++) {
1715 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1))
1716 ssdtosd(&gdt_segs[x], &gdt[x]);
1718 ssdtosyssd(&gdt_segs[GPROC0_SEL],
1719 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1721 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1722 r_gdt.rd_base = (long) gdt;
1725 wrmsr(MSR_FSBASE, 0); /* User value */
1726 wrmsr(MSR_GSBASE, (u_int64_t)&gd->mi);
1727 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */
1729 mi_gdinit(&gd->mi, 0);
1731 proc0paddr = proc0paddr_buff;
1732 mi_proc0init(&gd->mi, proc0paddr);
1733 safepri = TDPRI_MAX;
1735 /* spinlocks and the BGL */
1739 for (x = 0; x < NIDT; x++)
1740 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0);
1741 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0);
1742 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0);
1743 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 1);
1744 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0);
1745 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0);
1746 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0);
1747 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0);
1748 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0);
1749 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
1750 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0);
1751 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0);
1752 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0);
1753 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0);
1754 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0);
1755 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0);
1756 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0);
1757 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0);
1758 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0);
1759 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0);
1761 r_idt.rd_limit = sizeof(idt0) - 1;
1762 r_idt.rd_base = (long) idt;
1766 * Initialize the console before we print anything out.
1771 if (metadata_missing)
1772 kprintf("WARNING: loader(8) metadata is missing!\n");
1782 if (boothowto & RB_KDB)
1783 Debugger("Boot flags requested debugger");
1787 finishidentcpu(); /* Final stage of CPU initialization */
1788 setidt(6, &IDTVEC(ill), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1789 setidt(13, &IDTVEC(prot), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1791 identify_cpu(); /* Final stage of CPU initialization */
1792 initializecpu(); /* Initialize CPU registers */
1794 /* make an initial tss so cpu can get interrupt stack on syscall! */
1795 gd->gd_common_tss.tss_rsp0 =
1796 (register_t)(thread0.td_kstack +
1797 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb));
1798 /* Ensure the stack is aligned to 16 bytes */
1799 gd->gd_common_tss.tss_rsp0 &= ~(register_t)0xF;
1800 gd->gd_rsp0 = gd->gd_common_tss.tss_rsp0;
1802 /* double fault stack */
1803 gd->gd_common_tss.tss_ist1 =
1804 (long)&gd->mi.gd_prvspace->idlestack[
1805 sizeof(gd->mi.gd_prvspace->idlestack)];
1807 /* Set the IO permission bitmap (empty due to tss seg limit) */
1808 gd->gd_common_tss.tss_iobase = sizeof(struct x86_64tss);
1810 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1811 gd->gd_tss_gdt = &gdt[GPROC0_SEL];
1812 gd->gd_common_tssd = *gd->gd_tss_gdt;
1815 /* Set up the fast syscall stuff */
1816 msr = rdmsr(MSR_EFER) | EFER_SCE;
1817 wrmsr(MSR_EFER, msr);
1818 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall));
1819 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
1820 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
1821 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
1822 wrmsr(MSR_STAR, msr);
1823 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D);
1825 getmemsize(kmdp, physfree);
1826 init_param2(physmem);
1828 /* now running on new page tables, configured,and u/iom is accessible */
1830 /* Map the message buffer. */
1832 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1833 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1836 msgbufinit(msgbufp, MSGBUF_SIZE);
1839 /* transfer to user mode */
1841 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
1842 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
1843 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
1849 /* setup proc 0's pcb */
1850 thread0.td_pcb->pcb_flags = 0;
1851 thread0.td_pcb->pcb_cr3 = KPML4phys;
1852 thread0.td_pcb->pcb_ext = 0;
1853 lwp0.lwp_md.md_regs = &proc0_tf;
1855 /* Location of kernel stack for locore */
1856 return ((u_int64_t)thread0.td_pcb);
1860 * Initialize machine-dependant portions of the global data structure.
1861 * Note that the global data area and cpu0's idlestack in the private
1862 * data space were allocated in locore.
1864 * Note: the idlethread's cpl is 0
1866 * WARNING! Called from early boot, 'mycpu' may not work yet.
1869 cpu_gdinit(struct mdglobaldata *gd, int cpu)
1872 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
1874 lwkt_init_thread(&gd->mi.gd_idlethread,
1875 gd->mi.gd_prvspace->idlestack,
1876 sizeof(gd->mi.gd_prvspace->idlestack),
1878 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
1879 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
1880 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
1881 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
1885 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
1887 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
1888 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
1895 globaldata_find(int cpu)
1897 KKASSERT(cpu >= 0 && cpu < ncpus);
1898 return(&CPU_prvspace[cpu].mdglobaldata.mi);
1901 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1902 static void f00f_hack(void *unused);
1903 SYSINIT(f00f_hack, SI_BOOT2_BIOS, SI_ORDER_ANY, f00f_hack, NULL);
1906 f00f_hack(void *unused)
1908 struct gate_descriptor *new_idt;
1914 kprintf("Intel Pentium detected, installing workaround for F00F bug\n");
1916 r_idt.rd_limit = sizeof(idt0) - 1;
1918 tmp = kmem_alloc(&kernel_map, PAGE_SIZE * 2);
1920 panic("kmem_alloc returned 0");
1921 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
1922 panic("kmem_alloc returned non-page-aligned memory");
1923 /* Put the first seven entries in the lower page */
1924 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
1925 bcopy(idt, new_idt, sizeof(idt0));
1926 r_idt.rd_base = (int)new_idt;
1929 if (vm_map_protect(&kernel_map, tmp, tmp + PAGE_SIZE,
1930 VM_PROT_READ, FALSE) != KERN_SUCCESS)
1931 panic("vm_map_protect failed");
1934 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
1937 ptrace_set_pc(struct lwp *lp, unsigned long addr)
1939 lp->lwp_md.md_regs->tf_rip = addr;
1944 ptrace_single_step(struct lwp *lp)
1946 lp->lwp_md.md_regs->tf_rflags |= PSL_T;
1951 fill_regs(struct lwp *lp, struct reg *regs)
1953 struct trapframe *tp;
1955 tp = lp->lwp_md.md_regs;
1956 bcopy(&tp->tf_rdi, ®s->r_rdi, sizeof(*regs));
1961 set_regs(struct lwp *lp, struct reg *regs)
1963 struct trapframe *tp;
1965 tp = lp->lwp_md.md_regs;
1966 if (!EFL_SECURE(regs->r_rflags, tp->tf_rflags) ||
1967 !CS_SECURE(regs->r_cs))
1969 bcopy(®s->r_rdi, &tp->tf_rdi, sizeof(*regs));
1973 #ifndef CPU_DISABLE_SSE
1975 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
1977 struct env87 *penv_87 = &sv_87->sv_env;
1978 struct envxmm *penv_xmm = &sv_xmm->sv_env;
1981 /* FPU control/status */
1982 penv_87->en_cw = penv_xmm->en_cw;
1983 penv_87->en_sw = penv_xmm->en_sw;
1984 penv_87->en_tw = penv_xmm->en_tw;
1985 penv_87->en_fip = penv_xmm->en_fip;
1986 penv_87->en_fcs = penv_xmm->en_fcs;
1987 penv_87->en_opcode = penv_xmm->en_opcode;
1988 penv_87->en_foo = penv_xmm->en_foo;
1989 penv_87->en_fos = penv_xmm->en_fos;
1992 for (i = 0; i < 8; ++i)
1993 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
1995 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
1999 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2001 struct env87 *penv_87 = &sv_87->sv_env;
2002 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2005 /* FPU control/status */
2006 penv_xmm->en_cw = penv_87->en_cw;
2007 penv_xmm->en_sw = penv_87->en_sw;
2008 penv_xmm->en_tw = penv_87->en_tw;
2009 penv_xmm->en_fip = penv_87->en_fip;
2010 penv_xmm->en_fcs = penv_87->en_fcs;
2011 penv_xmm->en_opcode = penv_87->en_opcode;
2012 penv_xmm->en_foo = penv_87->en_foo;
2013 penv_xmm->en_fos = penv_87->en_fos;
2016 for (i = 0; i < 8; ++i)
2017 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2019 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2021 #endif /* CPU_DISABLE_SSE */
2024 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2026 #ifndef CPU_DISABLE_SSE
2028 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2029 (struct save87 *)fpregs);
2032 #endif /* CPU_DISABLE_SSE */
2033 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2038 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2040 #ifndef CPU_DISABLE_SSE
2042 set_fpregs_xmm((struct save87 *)fpregs,
2043 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2046 #endif /* CPU_DISABLE_SSE */
2047 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2052 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2055 dbregs->dr[0] = rdr0();
2056 dbregs->dr[1] = rdr1();
2057 dbregs->dr[2] = rdr2();
2058 dbregs->dr[3] = rdr3();
2059 dbregs->dr[4] = rdr4();
2060 dbregs->dr[5] = rdr5();
2061 dbregs->dr[6] = rdr6();
2062 dbregs->dr[7] = rdr7();
2066 pcb = lp->lwp_thread->td_pcb;
2067 dbregs->dr[0] = pcb->pcb_dr0;
2068 dbregs->dr[1] = pcb->pcb_dr1;
2069 dbregs->dr[2] = pcb->pcb_dr2;
2070 dbregs->dr[3] = pcb->pcb_dr3;
2073 dbregs->dr[6] = pcb->pcb_dr6;
2074 dbregs->dr[7] = pcb->pcb_dr7;
2080 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2083 load_dr0(dbregs->dr[0]);
2084 load_dr1(dbregs->dr[1]);
2085 load_dr2(dbregs->dr[2]);
2086 load_dr3(dbregs->dr[3]);
2087 load_dr4(dbregs->dr[4]);
2088 load_dr5(dbregs->dr[5]);
2089 load_dr6(dbregs->dr[6]);
2090 load_dr7(dbregs->dr[7]);
2093 struct ucred *ucred;
2095 uint64_t mask1, mask2;
2098 * Don't let an illegal value for dr7 get set. Specifically,
2099 * check for undefined settings. Setting these bit patterns
2100 * result in undefined behaviour and can lead to an unexpected
2103 /* JG this loop looks unreadable */
2104 /* Check 4 2-bit fields for invalid patterns.
2105 * These fields are R/Wi, for i = 0..3
2107 /* Is 10 in LENi allowed when running in compatibility mode? */
2108 /* Pattern 10 in R/Wi might be used to indicate
2109 * breakpoint on I/O. Further analysis should be
2110 * carried to decide if it is safe and useful to
2111 * provide access to that capability
2113 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 4;
2114 i++, mask1 <<= 4, mask2 <<= 4)
2115 if ((dbregs->dr[7] & mask1) == mask2)
2118 pcb = lp->lwp_thread->td_pcb;
2119 ucred = lp->lwp_proc->p_ucred;
2122 * Don't let a process set a breakpoint that is not within the
2123 * process's address space. If a process could do this, it
2124 * could halt the system by setting a breakpoint in the kernel
2125 * (if ddb was enabled). Thus, we need to check to make sure
2126 * that no breakpoints are being enabled for addresses outside
2127 * process's address space, unless, perhaps, we were called by
2130 * XXX - what about when the watched area of the user's
2131 * address space is written into from within the kernel
2132 * ... wouldn't that still cause a breakpoint to be generated
2133 * from within kernel mode?
2136 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
2137 if (dbregs->dr[7] & 0x3) {
2138 /* dr0 is enabled */
2139 if (dbregs->dr[0] >= VM_MAX_USER_ADDRESS)
2143 if (dbregs->dr[7] & (0x3<<2)) {
2144 /* dr1 is enabled */
2145 if (dbregs->dr[1] >= VM_MAX_USER_ADDRESS)
2149 if (dbregs->dr[7] & (0x3<<4)) {
2150 /* dr2 is enabled */
2151 if (dbregs->dr[2] >= VM_MAX_USER_ADDRESS)
2155 if (dbregs->dr[7] & (0x3<<6)) {
2156 /* dr3 is enabled */
2157 if (dbregs->dr[3] >= VM_MAX_USER_ADDRESS)
2162 pcb->pcb_dr0 = dbregs->dr[0];
2163 pcb->pcb_dr1 = dbregs->dr[1];
2164 pcb->pcb_dr2 = dbregs->dr[2];
2165 pcb->pcb_dr3 = dbregs->dr[3];
2166 pcb->pcb_dr6 = dbregs->dr[6];
2167 pcb->pcb_dr7 = dbregs->dr[7];
2169 pcb->pcb_flags |= PCB_DBREGS;
2176 * Return > 0 if a hardware breakpoint has been hit, and the
2177 * breakpoint was in user space. Return 0, otherwise.
2180 user_dbreg_trap(void)
2182 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */
2183 u_int64_t bp; /* breakpoint bits extracted from dr6 */
2184 int nbp; /* number of breakpoints that triggered */
2185 caddr_t addr[4]; /* breakpoint addresses */
2189 if ((dr7 & 0xff) == 0) {
2191 * all GE and LE bits in the dr7 register are zero,
2192 * thus the trap couldn't have been caused by the
2193 * hardware debug registers
2204 * None of the breakpoint bits are set meaning this
2205 * trap was not caused by any of the debug registers
2211 * at least one of the breakpoints were hit, check to see
2212 * which ones and if any of them are user space addresses
2216 addr[nbp++] = (caddr_t)rdr0();
2219 addr[nbp++] = (caddr_t)rdr1();
2222 addr[nbp++] = (caddr_t)rdr2();
2225 addr[nbp++] = (caddr_t)rdr3();
2228 for (i=0; i<nbp; i++) {
2230 (caddr_t)VM_MAX_USER_ADDRESS) {
2232 * addr[i] is in user space
2239 * None of the breakpoints are in user space.
2247 Debugger(const char *msg)
2249 kprintf("Debugger(\"%s\") called.\n", msg);
2256 * Provide inb() and outb() as functions. They are normally only
2257 * available as macros calling inlined functions, thus cannot be
2258 * called inside DDB.
2260 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2266 /* silence compiler warnings */
2268 void outb(u_int, u_char);
2275 * We use %%dx and not %1 here because i/o is done at %dx and not at
2276 * %edx, while gcc generates inferior code (movw instead of movl)
2277 * if we tell it to load (u_short) port.
2279 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2284 outb(u_int port, u_char data)
2288 * Use an unnecessary assignment to help gcc's register allocator.
2289 * This make a large difference for gcc-1.40 and a tiny difference
2290 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2291 * best results. gcc-2.6.0 can't handle this.
2294 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2301 #include "opt_cpu.h"
2305 * initialize all the SMP locks
2308 /* critical region when masking or unmasking interupts */
2309 struct spinlock_deprecated imen_spinlock;
2311 /* critical region for old style disable_intr/enable_intr */
2312 struct spinlock_deprecated mpintr_spinlock;
2314 /* critical region around INTR() routines */
2315 struct spinlock_deprecated intr_spinlock;
2317 /* lock region used by kernel profiling */
2318 struct spinlock_deprecated mcount_spinlock;
2320 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2321 struct spinlock_deprecated com_spinlock;
2323 /* lock regions around the clock hardware */
2324 struct spinlock_deprecated clock_spinlock;
2330 * mp_lock = 0; BSP already owns the MP lock
2333 * Get the initial mp_lock with a count of 1 for the BSP.
2334 * This uses a LOGICAL cpu ID, ie BSP == 0.
2337 cpu_get_initial_mplock();
2340 spin_lock_init(&mcount_spinlock);
2341 spin_lock_init(&intr_spinlock);
2342 spin_lock_init(&mpintr_spinlock);
2343 spin_lock_init(&imen_spinlock);
2344 spin_lock_init(&com_spinlock);
2345 spin_lock_init(&clock_spinlock);
2347 /* our token pool needs to work early */
2348 lwkt_token_pool_init();