sys/dev/netif/ath/hal/ath_hal/ar5212/ar5112.c

   1 /*
   2  * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
   3  * Copyright (c) 2002-2008 Atheros Communications, Inc.
   4  *
   5  * Permission to use, copy, modify, and/or distribute this software for any
   6  * purpose with or without fee is hereby granted, provided that the above
   7  * copyright notice and this permission notice appear in all copies.
   8  *
   9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16  *
  17  * $FreeBSD: head/sys/dev/ath/ath_hal/ar5212/ar5112.c 187831 2009-01-28 18:00:22Z sam $
  18  * $DragonFly$
  19  */
  20 #include "opt_ah.h"
  21
  22 #include "ah.h"
  23 #include "ah_internal.h"
  24
  25 #include "ah_eeprom_v3.h"
  26
  27 #include "ar5212/ar5212.h"
  28 #include "ar5212/ar5212reg.h"
  29 #include "ar5212/ar5212phy.h"
  30
  31 #define AH_5212_5112
  32 #include "ar5212/ar5212.ini"
  33
  34 #define N(a)    (sizeof(a)/sizeof(a[0]))
  35
  36 struct ar5112State {
  37         RF_HAL_FUNCS    base;           /* public state, must be first */
  38         uint16_t        pcdacTable[PWR_TABLE_SIZE];
  39
  40         uint32_t        Bank1Data[N(ar5212Bank1_5112)];
  41         uint32_t        Bank2Data[N(ar5212Bank2_5112)];
  42         uint32_t        Bank3Data[N(ar5212Bank3_5112)];
  43         uint32_t        Bank6Data[N(ar5212Bank6_5112)];
  44         uint32_t        Bank7Data[N(ar5212Bank7_5112)];
  45 };
  46 #define AR5112(ah)      ((struct ar5112State *) AH5212(ah)->ah_rfHal)
  47
  48 static  void ar5212GetLowerUpperIndex(uint16_t v,
  49                 uint16_t *lp, uint16_t listSize,
  50                 uint32_t *vlo, uint32_t *vhi);
  51 static HAL_BOOL getFullPwrTable(uint16_t numPcdacs, uint16_t *pcdacs,
  52                 int16_t *power, int16_t maxPower, int16_t *retVals);
  53 static int16_t getPminAndPcdacTableFromPowerTable(int16_t *pwrTableT4,
  54                 uint16_t retVals[]);
  55 static int16_t getPminAndPcdacTableFromTwoPowerTables(int16_t *pwrTableLXpdT4,
  56                 int16_t *pwrTableHXpdT4, uint16_t retVals[], int16_t *pMid);
  57 static int16_t interpolate_signed(uint16_t target,
  58                 uint16_t srcLeft, uint16_t srcRight,
  59                 int16_t targetLeft, int16_t targetRight);
  60
  61 extern  void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,
  62                 uint32_t numBits, uint32_t firstBit, uint32_t column);
  63
  64 static void
  65 ar5112WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
  66         int writes)
  67 {
  68         HAL_INI_WRITE_ARRAY(ah, ar5212Modes_5112, modesIndex, writes);
  69         HAL_INI_WRITE_ARRAY(ah, ar5212Common_5112, 1, writes);
  70         HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_5112, freqIndex, writes);
  71 }
  72
  73 /*
  74  * Take the MHz channel value and set the Channel value
  75  *
  76  * ASSUMES: Writes enabled to analog bus
  77  */
  78 static HAL_BOOL
  79 ar5112SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)
  80 {
  81         uint16_t freq = ath_hal_gethwchannel(ah, chan);
  82         uint32_t channelSel  = 0;
  83         uint32_t bModeSynth  = 0;
  84         uint32_t aModeRefSel = 0;
  85         uint32_t reg32       = 0;
  86
  87         OS_MARK(ah, AH_MARK_SETCHANNEL, freq);
  88
  89         if (freq < 4800) {
  90                 uint32_t txctl;
  91
  92                 if (((freq - 2192) % 5) == 0) {
  93                         channelSel = ((freq - 672) * 2 - 3040)/10;
  94                         bModeSynth = 0;
  95                 } else if (((freq - 2224) % 5) == 0) {
  96                         channelSel = ((freq - 704) * 2 - 3040) / 10;
  97                         bModeSynth = 1;
  98                 } else {
  99                         HALDEBUG(ah, HAL_DEBUG_ANY,
 100                             "%s: invalid channel %u MHz\n",
 101                             __func__, freq);
 102                         return AH_FALSE;
 103                 }
 104
 105                 channelSel = (channelSel << 2) & 0xff;
 106                 channelSel = ath_hal_reverseBits(channelSel, 8);
 107
 108                 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
 109                 if (freq == 2484) {
 110                         /* Enable channel spreading for channel 14 */
 111                         OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
 112                                 txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
 113                 } else {
 114                         OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
 115                                 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
 116                 }
 117         } else if (((freq % 5) == 2) && (freq <= 5435)) {
 118                 freq = freq - 2; /* Align to even 5MHz raster */
 119                 channelSel = ath_hal_reverseBits(
 120                         (uint32_t)(((freq - 4800)*10)/25 + 1), 8);
 121                 aModeRefSel = ath_hal_reverseBits(0, 2);
 122         } else if ((freq % 20) == 0 && freq >= 5120) {
 123                 channelSel = ath_hal_reverseBits(
 124                         ((freq - 4800) / 20 << 2), 8);
 125                 aModeRefSel = ath_hal_reverseBits(3, 2);
 126         } else if ((freq % 10) == 0) {
 127                 channelSel = ath_hal_reverseBits(
 128                         ((freq - 4800) / 10 << 1), 8);
 129                 aModeRefSel = ath_hal_reverseBits(2, 2);
 130         } else if ((freq % 5) == 0) {
 131                 channelSel = ath_hal_reverseBits(
 132                         (freq - 4800) / 5, 8);
 133                 aModeRefSel = ath_hal_reverseBits(1, 2);
 134         } else {
 135                 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
 136                     __func__, freq);
 137                 return AH_FALSE;
 138         }
 139
 140         reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) |
 141                         (1 << 12) | 0x1;
 142         OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);
 143
 144         reg32 >>= 8;
 145         OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
 146
 147         AH_PRIVATE(ah)->ah_curchan = chan;
 148         return AH_TRUE;
 149 }
 150
 151 /*
 152  * Return a reference to the requested RF Bank.
 153  */
 154 static uint32_t *
 155 ar5112GetRfBank(struct ath_hal *ah, int bank)
 156 {
 157         struct ar5112State *priv = AR5112(ah);
 158
 159         HALASSERT(priv != AH_NULL);
 160         switch (bank) {
 161         case 1: return priv->Bank1Data;
 162         case 2: return priv->Bank2Data;
 163         case 3: return priv->Bank3Data;
 164         case 6: return priv->Bank6Data;
 165         case 7: return priv->Bank7Data;
 166         }
 167         HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
 168             __func__, bank);
 169         return AH_NULL;
 170 }
 171
 172 /*
 173  * Reads EEPROM header info from device structure and programs
 174  * all rf registers
 175  *
 176  * REQUIRES: Access to the analog rf device
 177  */
 178 static HAL_BOOL
 179 ar5112SetRfRegs(struct ath_hal *ah,
 180         const struct ieee80211_channel *chan,
 181         uint16_t modesIndex, uint16_t *rfXpdGain)
 182 {
 183 #define RF_BANK_SETUP(_priv, _ix, _col) do {                                \
 184         int i;                                                              \
 185         for (i = 0; i < N(ar5212Bank##_ix##_5112); i++)                     \
 186                 (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_5112[i][_col];\
 187 } while (0)
 188         uint16_t freq = ath_hal_gethwchannel(ah, chan);
 189         struct ath_hal_5212 *ahp = AH5212(ah);
 190         const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
 191         uint16_t rfXpdSel, gainI;
 192         uint16_t ob5GHz = 0, db5GHz = 0;
 193         uint16_t ob2GHz = 0, db2GHz = 0;
 194         struct ar5112State *priv = AR5112(ah);
 195         GAIN_VALUES *gv = &ahp->ah_gainValues;
 196         int regWrites = 0;
 197
 198         HALASSERT(priv);
 199
 200         HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
 201             __func__, chan->ic_freq, chan->ic_flags, modesIndex);
 202
 203         /* Setup rf parameters */
 204         switch (chan->ic_flags & IEEE80211_CHAN_ALLFULL) {
 205         case IEEE80211_CHAN_A:
 206                 if (freq > 4000 && freq < 5260) {
 207                         ob5GHz = ee->ee_ob1;
 208                         db5GHz = ee->ee_db1;
 209                 } else if (freq >= 5260 && freq < 5500) {
 210                         ob5GHz = ee->ee_ob2;
 211                         db5GHz = ee->ee_db2;
 212                 } else if (freq >= 5500 && freq < 5725) {
 213                         ob5GHz = ee->ee_ob3;
 214                         db5GHz = ee->ee_db3;
 215                 } else if (freq >= 5725) {
 216                         ob5GHz = ee->ee_ob4;
 217                         db5GHz = ee->ee_db4;
 218                 } else {
 219                         /* XXX else */
 220                 }
 221                 rfXpdSel = ee->ee_xpd[headerInfo11A];
 222                 gainI = ee->ee_gainI[headerInfo11A];
 223                 break;
 224         case IEEE80211_CHAN_B:
 225                 ob2GHz = ee->ee_ob2GHz[0];
 226                 db2GHz = ee->ee_db2GHz[0];
 227                 rfXpdSel = ee->ee_xpd[headerInfo11B];
 228                 gainI = ee->ee_gainI[headerInfo11B];
 229                 break;
 230         case IEEE80211_CHAN_G:
 231         case IEEE80211_CHAN_PUREG:      /* NB: really 108G */
 232                 ob2GHz = ee->ee_ob2GHz[1];
 233                 db2GHz = ee->ee_ob2GHz[1];
 234                 rfXpdSel = ee->ee_xpd[headerInfo11G];
 235                 gainI = ee->ee_gainI[headerInfo11G];
 236                 break;
 237         default:
 238                 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n",
 239                     __func__, chan->ic_flags);
 240                 return AH_FALSE;
 241         }
 242
 243         /* Setup Bank 1 Write */
 244         RF_BANK_SETUP(priv, 1, 1);
 245
 246         /* Setup Bank 2 Write */
 247         RF_BANK_SETUP(priv, 2, modesIndex);
 248
 249         /* Setup Bank 3 Write */
 250         RF_BANK_SETUP(priv, 3, modesIndex);
 251
 252         /* Setup Bank 6 Write */
 253         RF_BANK_SETUP(priv, 6, modesIndex);
 254
 255         ar5212ModifyRfBuffer(priv->Bank6Data, rfXpdSel,     1, 302, 0);
 256
 257         ar5212ModifyRfBuffer(priv->Bank6Data, rfXpdGain[0], 2, 270, 0);
 258         ar5212ModifyRfBuffer(priv->Bank6Data, rfXpdGain[1], 2, 257, 0);
 259
 260         if (IEEE80211_IS_CHAN_OFDM(chan)) {
 261                 ar5212ModifyRfBuffer(priv->Bank6Data,
 262                         gv->currStep->paramVal[GP_PWD_138], 1, 168, 3);
 263                 ar5212ModifyRfBuffer(priv->Bank6Data,
 264                         gv->currStep->paramVal[GP_PWD_137], 1, 169, 3);
 265                 ar5212ModifyRfBuffer(priv->Bank6Data,
 266                         gv->currStep->paramVal[GP_PWD_136], 1, 170, 3);
 267                 ar5212ModifyRfBuffer(priv->Bank6Data,
 268                         gv->currStep->paramVal[GP_PWD_132], 1, 174, 3);
 269                 ar5212ModifyRfBuffer(priv->Bank6Data,
 270                         gv->currStep->paramVal[GP_PWD_131], 1, 175, 3);
 271                 ar5212ModifyRfBuffer(priv->Bank6Data,
 272                         gv->currStep->paramVal[GP_PWD_130], 1, 176, 3);
 273         }
 274
 275         /* Only the 5 or 2 GHz OB/DB need to be set for a mode */
 276         if (IEEE80211_IS_CHAN_2GHZ(chan)) {
 277                 ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 287, 0);
 278                 ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 290, 0);
 279         } else {
 280                 ar5212ModifyRfBuffer(priv->Bank6Data, ob5GHz, 3, 279, 0);
 281                 ar5212ModifyRfBuffer(priv->Bank6Data, db5GHz, 3, 282, 0);
 282         }
 283
 284         /* Lower synth voltage for X112 Rev 2.0 only */
 285         if (IS_RADX112_REV2(ah)) {
 286                 /* Non-Reversed analyg registers - so values are pre-reversed */
 287                 ar5212ModifyRfBuffer(priv->Bank6Data, 2, 2, 90, 2);
 288                 ar5212ModifyRfBuffer(priv->Bank6Data, 2, 2, 92, 2);
 289                 ar5212ModifyRfBuffer(priv->Bank6Data, 2, 2, 94, 2);
 290                 ar5212ModifyRfBuffer(priv->Bank6Data, 2, 1, 254, 2);
 291         }
 292
 293     /* Decrease Power Consumption for 5312/5213 and up */
 294     if (AH_PRIVATE(ah)->ah_phyRev >= AR_PHY_CHIP_ID_REV_2) {
 295         ar5212ModifyRfBuffer(priv->Bank6Data, 1, 1, 281, 1);
 296         ar5212ModifyRfBuffer(priv->Bank6Data, 1, 2, 1, 3);
 297         ar5212ModifyRfBuffer(priv->Bank6Data, 1, 2, 3, 3);
 298         ar5212ModifyRfBuffer(priv->Bank6Data, 1, 1, 139, 3);
 299         ar5212ModifyRfBuffer(priv->Bank6Data, 1, 1, 140, 3);
 300     }
 301
 302         /* Setup Bank 7 Setup */
 303         RF_BANK_SETUP(priv, 7, modesIndex);
 304         if (IEEE80211_IS_CHAN_OFDM(chan))
 305                 ar5212ModifyRfBuffer(priv->Bank7Data,
 306                         gv->currStep->paramVal[GP_MIXGAIN_OVR], 2, 37, 0);
 307
 308         ar5212ModifyRfBuffer(priv->Bank7Data, gainI, 6, 14, 0);
 309
 310         /* Adjust params for Derby TX power control */
 311         if (IEEE80211_IS_CHAN_HALF(chan) || IEEE80211_IS_CHAN_QUARTER(chan)) {
 312                 uint32_t        rfDelay, rfPeriod;
 313
 314                 rfDelay = 0xf;
 315                 rfPeriod = (IEEE80211_IS_CHAN_HALF(chan)) ?  0x8 : 0xf;
 316                 ar5212ModifyRfBuffer(priv->Bank7Data, rfDelay, 4, 58, 0);
 317                 ar5212ModifyRfBuffer(priv->Bank7Data, rfPeriod, 4, 70, 0);
 318         }
 319
 320 #ifdef notyet
 321         /* Analog registers are setup - EAR can modify */
 322         if (ar5212IsEarEngaged(pDev, chan))
 323                 uint32_t modifier;
 324                 ar5212EarModify(pDev, EAR_LC_RF_WRITE, chan, &modifier);
 325 #endif
 326         /* Write Analog registers */
 327         HAL_INI_WRITE_BANK(ah, ar5212Bank1_5112, priv->Bank1Data, regWrites);
 328         HAL_INI_WRITE_BANK(ah, ar5212Bank2_5112, priv->Bank2Data, regWrites);
 329         HAL_INI_WRITE_BANK(ah, ar5212Bank3_5112, priv->Bank3Data, regWrites);
 330         HAL_INI_WRITE_BANK(ah, ar5212Bank6_5112, priv->Bank6Data, regWrites);
 331         HAL_INI_WRITE_BANK(ah, ar5212Bank7_5112, priv->Bank7Data, regWrites);
 332
 333         /* Now that we have reprogrammed rfgain value, clear the flag. */
 334         ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE;
 335         return AH_TRUE;
 336 #undef  RF_BANK_SETUP
 337 }
 338
 339 /*
 340  * Read the transmit power levels from the structures taken from EEPROM
 341  * Interpolate read transmit power values for this channel
 342  * Organize the transmit power values into a table for writing into the hardware
 343  */
 344 static HAL_BOOL
 345 ar5112SetPowerTable(struct ath_hal *ah,
 346         int16_t *pPowerMin, int16_t *pPowerMax,
 347         const struct ieee80211_channel *chan,
 348         uint16_t *rfXpdGain)
 349 {
 350         uint16_t freq = ath_hal_gethwchannel(ah, chan);
 351         struct ath_hal_5212 *ahp = AH5212(ah);
 352         const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
 353         uint32_t numXpdGain = IS_RADX112_REV2(ah) ? 2 : 1;
 354         uint32_t    xpdGainMask = 0;
 355         int16_t     powerMid, *pPowerMid = &powerMid;
 356
 357         const EXPN_DATA_PER_CHANNEL_5112 *pRawCh;
 358         const EEPROM_POWER_EXPN_5112     *pPowerExpn = AH_NULL;
 359
 360         uint32_t    ii, jj, kk;
 361         int16_t     minPwr_t4, maxPwr_t4, Pmin, Pmid;
 362
 363         uint32_t    chan_idx_L = 0, chan_idx_R = 0;
 364         uint16_t    chan_L, chan_R;
 365
 366         int16_t     pwr_table0[64];
 367         int16_t     pwr_table1[64];
 368         uint16_t    pcdacs[10];
 369         int16_t     powers[10];
 370         uint16_t    numPcd;
 371         int16_t     powTableLXPD[2][64];
 372         int16_t     powTableHXPD[2][64];
 373         int16_t     tmpPowerTable[64];
 374         uint16_t    xgainList[2];
 375         uint16_t    xpdMask;
 376
 377         switch (chan->ic_flags & IEEE80211_CHAN_ALLTURBOFULL) {
 378         case IEEE80211_CHAN_A:
 379         case IEEE80211_CHAN_ST:
 380                 pPowerExpn = &ee->ee_modePowerArray5112[headerInfo11A];
 381                 xpdGainMask = ee->ee_xgain[headerInfo11A];
 382                 break;
 383         case IEEE80211_CHAN_B:
 384                 pPowerExpn = &ee->ee_modePowerArray5112[headerInfo11B];
 385                 xpdGainMask = ee->ee_xgain[headerInfo11B];
 386                 break;
 387         case IEEE80211_CHAN_G:
 388         case IEEE80211_CHAN_108G:
 389                 pPowerExpn = &ee->ee_modePowerArray5112[headerInfo11G];
 390                 xpdGainMask = ee->ee_xgain[headerInfo11G];
 391                 break;
 392         default:
 393                 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown channel flags 0x%x\n",
 394                     __func__, chan->ic_flags);
 395                 return AH_FALSE;
 396         }
 397
 398         if ((xpdGainMask & pPowerExpn->xpdMask) < 1) {
 399                 HALDEBUG(ah, HAL_DEBUG_ANY,
 400                     "%s: desired xpdGainMask 0x%x not supported by "
 401                     "calibrated xpdMask 0x%x\n", __func__,
 402                     xpdGainMask, pPowerExpn->xpdMask);
 403                 return AH_FALSE;
 404         }
 405
 406         maxPwr_t4 = (int16_t)(2*(*pPowerMax));  /* pwr_t2 -> pwr_t4 */
 407         minPwr_t4 = (int16_t)(2*(*pPowerMin));  /* pwr_t2 -> pwr_t4 */
 408
 409         xgainList[0] = 0xDEAD;
 410         xgainList[1] = 0xDEAD;
 411
 412         kk = 0;
 413         xpdMask = pPowerExpn->xpdMask;
 414         for (jj = 0; jj < NUM_XPD_PER_CHANNEL; jj++) {
 415                 if (((xpdMask >> jj) & 1) > 0) {
 416                         if (kk > 1) {
 417                                 HALDEBUG(ah, HAL_DEBUG_ANY,
 418                                     "A maximum of 2 xpdGains supported"
 419                                     "in pExpnPower data\n");
 420                                 return AH_FALSE;
 421                         }
 422                         xgainList[kk++] = (uint16_t)jj;
 423                 }
 424         }
 425
 426         ar5212GetLowerUpperIndex(freq, &pPowerExpn->pChannels[0],
 427                 pPowerExpn->numChannels, &chan_idx_L, &chan_idx_R);
 428
 429         kk = 0;
 430         for (ii = chan_idx_L; ii <= chan_idx_R; ii++) {
 431                 pRawCh = &(pPowerExpn->pDataPerChannel[ii]);
 432                 if (xgainList[1] == 0xDEAD) {
 433                         jj = xgainList[0];
 434                         numPcd = pRawCh->pDataPerXPD[jj].numPcdacs;
 435                         OS_MEMCPY(&pcdacs[0], &pRawCh->pDataPerXPD[jj].pcdac[0],
 436                                 numPcd * sizeof(uint16_t));
 437                         OS_MEMCPY(&powers[0], &pRawCh->pDataPerXPD[jj].pwr_t4[0],
 438                                 numPcd * sizeof(int16_t));
 439                         if (!getFullPwrTable(numPcd, &pcdacs[0], &powers[0],
 440                                 pRawCh->maxPower_t4, &tmpPowerTable[0])) {
 441                                 return AH_FALSE;
 442                         }
 443                         OS_MEMCPY(&powTableLXPD[kk][0], &tmpPowerTable[0],
 444                                 64*sizeof(int16_t));
 445                 } else {
 446                         jj = xgainList[0];
 447                         numPcd = pRawCh->pDataPerXPD[jj].numPcdacs;
 448                         OS_MEMCPY(&pcdacs[0], &pRawCh->pDataPerXPD[jj].pcdac[0],
 449                                 numPcd*sizeof(uint16_t));
 450                         OS_MEMCPY(&powers[0],
 451                                 &pRawCh->pDataPerXPD[jj].pwr_t4[0],
 452                                 numPcd*sizeof(int16_t));
 453                         if (!getFullPwrTable(numPcd, &pcdacs[0], &powers[0],
 454                                 pRawCh->maxPower_t4, &tmpPowerTable[0])) {
 455                                 return AH_FALSE;
 456                         }
 457                         OS_MEMCPY(&powTableLXPD[kk][0], &tmpPowerTable[0],
 458                                 64 * sizeof(int16_t));
 459
 460                         jj = xgainList[1];
 461                         numPcd = pRawCh->pDataPerXPD[jj].numPcdacs;
 462                         OS_MEMCPY(&pcdacs[0], &pRawCh->pDataPerXPD[jj].pcdac[0],
 463                                 numPcd * sizeof(uint16_t));
 464                         OS_MEMCPY(&powers[0],
 465                                 &pRawCh->pDataPerXPD[jj].pwr_t4[0],
 466                                 numPcd * sizeof(int16_t));
 467                         if (!getFullPwrTable(numPcd, &pcdacs[0], &powers[0],
 468                                 pRawCh->maxPower_t4, &tmpPowerTable[0])) {
 469                                 return AH_FALSE;
 470                         }
 471                         OS_MEMCPY(&powTableHXPD[kk][0], &tmpPowerTable[0],
 472                                 64 * sizeof(int16_t));
 473                 }
 474                 kk++;
 475         }
 476
 477         chan_L = pPowerExpn->pChannels[chan_idx_L];
 478         chan_R = pPowerExpn->pChannels[chan_idx_R];
 479         kk = chan_idx_R - chan_idx_L;
 480
 481         if (xgainList[1] == 0xDEAD) {
 482                 for (jj = 0; jj < 64; jj++) {
 483                         pwr_table0[jj] = interpolate_signed(
 484                                 freq, chan_L, chan_R,
 485                                 powTableLXPD[0][jj], powTableLXPD[kk][jj]);
 486                 }
 487                 Pmin = getPminAndPcdacTableFromPowerTable(&pwr_table0[0],
 488                                 ahp->ah_pcdacTable);
 489                 *pPowerMin = (int16_t) (Pmin / 2);
 490                 *pPowerMid = (int16_t) (pwr_table0[63] / 2);
 491                 *pPowerMax = (int16_t) (pwr_table0[63] / 2);
 492                 rfXpdGain[0] = xgainList[0];
 493                 rfXpdGain[1] = rfXpdGain[0];
 494         } else {
 495                 for (jj = 0; jj < 64; jj++) {
 496                         pwr_table0[jj] = interpolate_signed(
 497                                 freq, chan_L, chan_R,
 498                                 powTableLXPD[0][jj], powTableLXPD[kk][jj]);
 499                         pwr_table1[jj] = interpolate_signed(
 500                                 freq, chan_L, chan_R,
 501                                 powTableHXPD[0][jj], powTableHXPD[kk][jj]);
 502                 }
 503                 if (numXpdGain == 2) {
 504                         Pmin = getPminAndPcdacTableFromTwoPowerTables(
 505                                 &pwr_table0[0], &pwr_table1[0],
 506                                 ahp->ah_pcdacTable, &Pmid);
 507                         *pPowerMin = (int16_t) (Pmin / 2);
 508                         *pPowerMid = (int16_t) (Pmid / 2);
 509                         *pPowerMax = (int16_t) (pwr_table0[63] / 2);
 510                         rfXpdGain[0] = xgainList[0];
 511                         rfXpdGain[1] = xgainList[1];
 512                 } else if (minPwr_t4 <= pwr_table1[63] &&
 513                            maxPwr_t4 <= pwr_table1[63]) {
 514                         Pmin = getPminAndPcdacTableFromPowerTable(
 515                                 &pwr_table1[0], ahp->ah_pcdacTable);
 516                         rfXpdGain[0] = xgainList[1];
 517                         rfXpdGain[1] = rfXpdGain[0];
 518                         *pPowerMin = (int16_t) (Pmin / 2);
 519                         *pPowerMid = (int16_t) (pwr_table1[63] / 2);
 520                         *pPowerMax = (int16_t) (pwr_table1[63] / 2);
 521                 } else {
 522                         Pmin = getPminAndPcdacTableFromPowerTable(
 523                                 &pwr_table0[0], ahp->ah_pcdacTable);
 524                         rfXpdGain[0] = xgainList[0];
 525                         rfXpdGain[1] = rfXpdGain[0];
 526                         *pPowerMin = (int16_t) (Pmin/2);
 527                         *pPowerMid = (int16_t) (pwr_table0[63] / 2);
 528                         *pPowerMax = (int16_t) (pwr_table0[63] / 2);
 529                 }
 530         }
 531
 532         /*
 533          * Move 5112 rates to match power tables where the max
 534          * power table entry corresponds with maxPower.
 535          */
 536         HALASSERT(*pPowerMax <= PCDAC_STOP);
 537         ahp->ah_txPowerIndexOffset = PCDAC_STOP - *pPowerMax;
 538
 539         return AH_TRUE;
 540 }
 541
 542 /*
 543  * Returns interpolated or the scaled up interpolated value
 544  */
 545 static int16_t
 546 interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight,
 547         int16_t targetLeft, int16_t targetRight)
 548 {
 549         int16_t rv;
 550
 551         if (srcRight != srcLeft) {
 552                 rv = ((target - srcLeft)*targetRight +
 553                       (srcRight - target)*targetLeft) / (srcRight - srcLeft);
 554         } else {
 555                 rv = targetLeft;
 556         }
 557         return rv;
 558 }
 559
 560 /*
 561  * Return indices surrounding the value in sorted integer lists.
 562  *
 563  * NB: the input list is assumed to be sorted in ascending order
 564  */
 565 static void
 566 ar5212GetLowerUpperIndex(uint16_t v, uint16_t *lp, uint16_t listSize,
 567                           uint32_t *vlo, uint32_t *vhi)
 568 {
 569         uint32_t target = v;
 570         uint16_t *ep = lp+listSize;
 571         uint16_t *tp;
 572
 573         /*
 574          * Check first and last elements for out-of-bounds conditions.
 575          */
 576         if (target < lp[0]) {
 577                 *vlo = *vhi = 0;
 578                 return;
 579         }
 580         if (target >= ep[-1]) {
 581                 *vlo = *vhi = listSize - 1;
 582                 return;
 583         }
 584
 585         /* look for value being near or between 2 values in list */
 586         for (tp = lp; tp < ep; tp++) {
 587                 /*
 588                  * If value is close to the current value of the list
 589                  * then target is not between values, it is one of the values
 590                  */
 591                 if (*tp == target) {
 592                         *vlo = *vhi = tp - lp;
 593                         return;
 594                 }
 595                 /*
 596                  * Look for value being between current value and next value
 597                  * if so return these 2 values
 598                  */
 599                 if (target < tp[1]) {
 600                         *vlo = tp - lp;
 601                         *vhi = *vlo + 1;
 602                         return;
 603                 }
 604         }
 605 }
 606
 607 static HAL_BOOL
 608 getFullPwrTable(uint16_t numPcdacs, uint16_t *pcdacs, int16_t *power, int16_t maxPower, int16_t *retVals)
 609 {
 610         uint16_t    ii;
 611         uint16_t    idxL = 0;
 612         uint16_t    idxR = 1;
 613
 614         if (numPcdacs < 2) {
 615                 HALDEBUG(AH_NULL, HAL_DEBUG_ANY,
 616                      "%s: at least 2 pcdac values needed [%d]\n",
 617                      __func__, numPcdacs);
 618                 return AH_FALSE;
 619         }
 620         for (ii = 0; ii < 64; ii++) {
 621                 if (ii>pcdacs[idxR] && idxR < numPcdacs-1) {
 622                         idxL++;
 623                         idxR++;
 624                 }
 625                 retVals[ii] = interpolate_signed(ii,
 626                         pcdacs[idxL], pcdacs[idxR], power[idxL], power[idxR]);
 627                 if (retVals[ii] >= maxPower) {
 628                         while (ii < 64)
 629                                 retVals[ii++] = maxPower;
 630                 }
 631         }
 632         return AH_TRUE;
 633 }
 634
 635 /*
 636  * Takes a single calibration curve and creates a power table.
 637  * Adjusts the new power table so the max power is relative
 638  * to the maximum index in the power table.
 639  *
 640  * WARNING: rates must be adjusted for this relative power table
 641  */
 642 static int16_t
 643 getPminAndPcdacTableFromPowerTable(int16_t *pwrTableT4, uint16_t retVals[])
 644 {
 645     int16_t ii, jj, jjMax;
 646     int16_t pMin, currPower, pMax;
 647
 648     /* If the spread is > 31.5dB, keep the upper 31.5dB range */
 649     if ((pwrTableT4[63] - pwrTableT4[0]) > 126) {
 650         pMin = pwrTableT4[63] - 126;
 651     } else {
 652         pMin = pwrTableT4[0];
 653     }
 654
 655     pMax = pwrTableT4[63];
 656     jjMax = 63;
 657
 658     /* Search for highest pcdac 0.25dB below maxPower */
 659     while ((pwrTableT4[jjMax] > (pMax - 1) ) && (jjMax >= 0)) {
 660         jjMax--;
 661     }
 662
 663     jj = jjMax;
 664     currPower = pMax;
 665     for (ii = 63; ii >= 0; ii--) {
 666         while ((jj < 64) && (jj > 0) && (pwrTableT4[jj] >= currPower)) {
 667             jj--;
 668         }
 669         if (jj == 0) {
 670             while (ii >= 0) {
 671                 retVals[ii] = retVals[ii + 1];
 672                 ii--;
 673             }
 674             break;
 675         }
 676         retVals[ii] = jj;
 677         currPower -= 2;  // corresponds to a 0.5dB step
 678     }
 679     return pMin;
 680 }
 681
 682 /*
 683  * Combines the XPD curves from two calibration sets into a single
 684  * power table and adjusts the power table so the max power is relative
 685  * to the maximum index in the power table
 686  *
 687  * WARNING: rates must be adjusted for this relative power table
 688  */
 689 static int16_t
 690 getPminAndPcdacTableFromTwoPowerTables(int16_t *pwrTableLXpdT4,
 691         int16_t *pwrTableHXpdT4, uint16_t retVals[], int16_t *pMid)
 692 {
 693     int16_t     ii, jj, jjMax;
 694     int16_t     pMin, pMax, currPower;
 695     int16_t     *pwrTableT4;
 696     uint16_t    msbFlag = 0x40;  // turns on the 7th bit of the pcdac
 697
 698     /* If the spread is > 31.5dB, keep the upper 31.5dB range */
 699     if ((pwrTableLXpdT4[63] - pwrTableHXpdT4[0]) > 126) {
 700         pMin = pwrTableLXpdT4[63] - 126;
 701     } else {
 702         pMin = pwrTableHXpdT4[0];
 703     }
 704
 705     pMax = pwrTableLXpdT4[63];
 706     jjMax = 63;
 707     /* Search for highest pcdac 0.25dB below maxPower */
 708     while ((pwrTableLXpdT4[jjMax] > (pMax - 1) ) && (jjMax >= 0)){
 709         jjMax--;
 710     }
 711
 712     *pMid = pwrTableHXpdT4[63];
 713     jj = jjMax;
 714     ii = 63;
 715     currPower = pMax;
 716     pwrTableT4 = &(pwrTableLXpdT4[0]);
 717     while (ii >= 0) {
 718         if ((currPower <= *pMid) || ( (jj == 0) && (msbFlag == 0x40))){
 719             msbFlag = 0x00;
 720             pwrTableT4 = &(pwrTableHXpdT4[0]);
 721             jj = 63;
 722         }
 723         while ((jj > 0) && (pwrTableT4[jj] >= currPower)) {
 724             jj--;
 725         }
 726         if ((jj == 0) && (msbFlag == 0x00)) {
 727             while (ii >= 0) {
 728                 retVals[ii] = retVals[ii+1];
 729                 ii--;
 730             }
 731             break;
 732         }
 733         retVals[ii] = jj | msbFlag;
 734         currPower -= 2;  // corresponds to a 0.5dB step
 735         ii--;
 736     }
 737     return pMin;
 738 }
 739
 740 static int16_t
 741 ar5112GetMinPower(struct ath_hal *ah, const EXPN_DATA_PER_CHANNEL_5112 *data)
 742 {
 743         int i, minIndex;
 744         int16_t minGain,minPwr,minPcdac,retVal;
 745
 746         /* Assume NUM_POINTS_XPD0 > 0 */
 747         minGain = data->pDataPerXPD[0].xpd_gain;
 748         for (minIndex=0,i=1; i<NUM_XPD_PER_CHANNEL; i++) {
 749                 if (data->pDataPerXPD[i].xpd_gain < minGain) {
 750                         minIndex = i;
 751                         minGain = data->pDataPerXPD[i].xpd_gain;
 752                 }
 753         }
 754         minPwr = data->pDataPerXPD[minIndex].pwr_t4[0];
 755         minPcdac = data->pDataPerXPD[minIndex].pcdac[0];
 756         for (i=1; i<NUM_POINTS_XPD0; i++) {
 757                 if (data->pDataPerXPD[minIndex].pwr_t4[i] < minPwr) {
 758                         minPwr = data->pDataPerXPD[minIndex].pwr_t4[i];
 759                         minPcdac = data->pDataPerXPD[minIndex].pcdac[i];
 760                 }
 761         }
 762         retVal = minPwr - (minPcdac*2);
 763         return(retVal);
 764 }
 765
 766 static HAL_BOOL
 767 ar5112GetChannelMaxMinPower(struct ath_hal *ah,
 768         const struct ieee80211_channel *chan,
 769         int16_t *maxPow, int16_t *minPow)
 770 {
 771         uint16_t freq = chan->ic_freq;          /* NB: never mapped */
 772         const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
 773         int numChannels=0,i,last;
 774         int totalD, totalF,totalMin;
 775         const EXPN_DATA_PER_CHANNEL_5112 *data=AH_NULL;
 776         const EEPROM_POWER_EXPN_5112 *powerArray=AH_NULL;
 777
 778         *maxPow = 0;
 779         if (IEEE80211_IS_CHAN_A(chan)) {
 780                 powerArray = ee->ee_modePowerArray5112;
 781                 data = powerArray[headerInfo11A].pDataPerChannel;
 782                 numChannels = powerArray[headerInfo11A].numChannels;
 783         } else if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan)) {
 784                 /* XXX - is this correct? Should we also use the same power for turbo G? */
 785                 powerArray = ee->ee_modePowerArray5112;
 786                 data = powerArray[headerInfo11G].pDataPerChannel;
 787                 numChannels = powerArray[headerInfo11G].numChannels;
 788         } else if (IEEE80211_IS_CHAN_B(chan)) {
 789                 powerArray = ee->ee_modePowerArray5112;
 790                 data = powerArray[headerInfo11B].pDataPerChannel;
 791                 numChannels = powerArray[headerInfo11B].numChannels;
 792         } else {
 793                 return (AH_TRUE);
 794         }
 795         /* Make sure the channel is in the range of the TP values
 796          *  (freq piers)
 797          */
 798         if (numChannels < 1)
 799                 return(AH_FALSE);
 800
 801         if ((freq < data[0].channelValue) ||
 802             (freq > data[numChannels-1].channelValue)) {
 803                 if (freq < data[0].channelValue) {
 804                         *maxPow = data[0].maxPower_t4;
 805                         *minPow = ar5112GetMinPower(ah, &data[0]);
 806                         return(AH_TRUE);
 807                 } else {
 808                         *maxPow = data[numChannels - 1].maxPower_t4;
 809                         *minPow = ar5112GetMinPower(ah, &data[numChannels - 1]);
 810                         return(AH_TRUE);
 811                 }
 812         }
 813
 814         /* Linearly interpolate the power value now */
 815         for (last=0,i=0;
 816              (i<numChannels) && (freq > data[i].channelValue);
 817              last=i++);
 818         totalD = data[i].channelValue - data[last].channelValue;
 819         if (totalD > 0) {
 820                 totalF = data[i].maxPower_t4 - data[last].maxPower_t4;
 821                 *maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) + data[last].maxPower_t4*totalD)/totalD);
 822
 823                 totalMin = ar5112GetMinPower(ah,&data[i]) - ar5112GetMinPower(ah, &data[last]);
 824                 *minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) + ar5112GetMinPower(ah, &data[last])*totalD)/totalD);
 825                 return (AH_TRUE);
 826         } else {
 827                 if (freq == data[i].channelValue) {
 828                         *maxPow = data[i].maxPower_t4;
 829                         *minPow = ar5112GetMinPower(ah, &data[i]);
 830                         return(AH_TRUE);
 831                 } else
 832                         return(AH_FALSE);
 833         }
 834 }
 835
 836 /*
 837  * Free memory for analog bank scratch buffers
 838  */
 839 static void
 840 ar5112RfDetach(struct ath_hal *ah)
 841 {
 842         struct ath_hal_5212 *ahp = AH5212(ah);
 843
 844         HALASSERT(ahp->ah_rfHal != AH_NULL);
 845         ath_hal_free(ahp->ah_rfHal);
 846         ahp->ah_rfHal = AH_NULL;
 847 }
 848
 849 /*
 850  * Allocate memory for analog bank scratch buffers
 851  * Scratch Buffer will be reinitialized every reset so no need to zero now
 852  */
 853 static HAL_BOOL
 854 ar5112RfAttach(struct ath_hal *ah, HAL_STATUS *status)
 855 {
 856         struct ath_hal_5212 *ahp = AH5212(ah);
 857         struct ar5112State *priv;
 858
 859         HALASSERT(ah->ah_magic == AR5212_MAGIC);
 860
 861         HALASSERT(ahp->ah_rfHal == AH_NULL);
 862         priv = ath_hal_malloc(sizeof(struct ar5112State));
 863         if (priv == AH_NULL) {
 864                 HALDEBUG(ah, HAL_DEBUG_ANY,
 865                     "%s: cannot allocate private state\n", __func__);
 866                 *status = HAL_ENOMEM;           /* XXX */
 867                 return AH_FALSE;
 868         }
 869         priv->base.rfDetach             = ar5112RfDetach;
 870         priv->base.writeRegs            = ar5112WriteRegs;
 871         priv->base.getRfBank            = ar5112GetRfBank;
 872         priv->base.setChannel           = ar5112SetChannel;
 873         priv->base.setRfRegs            = ar5112SetRfRegs;
 874         priv->base.setPowerTable        = ar5112SetPowerTable;
 875         priv->base.getChannelMaxMinPower = ar5112GetChannelMaxMinPower;
 876         priv->base.getNfAdjust          = ar5212GetNfAdjust;
 877
 878         ahp->ah_pcdacTable = priv->pcdacTable;
 879         ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
 880         ahp->ah_rfHal = &priv->base;
 881
 882         return AH_TRUE;
 883 }
 884
 885 static HAL_BOOL
 886 ar5112Probe(struct ath_hal *ah)
 887 {
 888         return IS_RAD5112(ah);
 889 }
 890 AH_RF(RF5112, ar5112Probe, ar5112RfAttach);