2 * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * $FreeBSD: src/sys/i386/isa/pcibus.c,v 1.57.2.11 2002/11/13 21:40:40 peter Exp $
27 * $DragonFly: src/sys/bus/pci/i386/pcibus.c,v 1.5 2004/01/15 19:58:30 joerg Exp $
31 #include <sys/param.h>
32 #include <sys/systm.h>
34 #include <sys/kernel.h>
36 #include <bus/pci/pcivar.h>
37 #include <bus/pci/pcireg.h>
39 #include <bus/isa/isavar.h>
40 #include <bus/pci/i386/pci_cfgreg.h>
41 #include <machine/md_var.h>
46 nexus_pcib_maxslots(device_t dev)
52 * Read configuration space register.
55 nexus_pcib_read_config(device_t dev, int bus, int slot, int func,
58 return (pci_cfgregread(bus, slot, func, reg, bytes));
62 nexus_pcib_write_config(device_t dev, int bus, int slot, int func,
63 int reg, u_int32_t data, int bytes)
65 pci_cfgregwrite(bus, slot, func, reg, data, bytes);
68 static devclass_t pcib_devclass;
71 nexus_pcib_is_host_bridge(pcicfgregs *cfg,
72 u_int32_t id, u_int8_t class, u_int8_t subclass,
76 static u_int8_t pxb[4]; /* hack for 450nx */
82 s = "Intel 824?? host to PCI bridge";
83 /* XXX This is a guess */
84 /* *busnum = pci_cfgread(cfg, 0x41, 1); */
88 s = "Intel 82810 (i810 GMCH) Host To Hub bridge";
91 s = "Intel 82810-DC100 (i810-DC100 GMCH) Host To Hub bridge";
94 s = "Intel 82810E (i810E GMCH) Host To Hub bridge";
97 s = "Intel 82443LX (440 LX) host to PCI bridge";
100 s = "Intel 82443BX (440 BX) host to PCI bridge";
103 s = "Intel 82443BX host to PCI bridge (AGP disabled)";
106 s = "Intel 82443MX host to PCI bridge";
109 s = "Intel 82443GX host to PCI bridge";
112 s = "Intel 82443GX host to AGP bridge";
115 s = "Intel 82443GX host to PCI bridge (AGP disabled)";
118 s = "Intel 82454KX/GX (Orion) host to PCI bridge";
119 *busnum = pci_cfgread(cfg, 0x4a, 1);
123 * For the 450nx chipset, there is a whole bundle of
124 * things pretending to be host bridges. The MIOC will
125 * be seen first and isn't really a pci bridge (the
126 * actual busses are attached to the PXB's). We need to
127 * read the registers of the MIOC to figure out the
128 * bus numbers for the PXB channels.
130 * Since the MIOC doesn't have a pci bus attached, we
131 * pretend it wasn't there.
133 pxb[0] = pci_cfgread(cfg, 0xd0, 1); /* BUSNO[0] */
134 pxb[1] = pci_cfgread(cfg, 0xd1, 1) + 1; /* SUBA[0]+1 */
135 pxb[2] = pci_cfgread(cfg, 0xd3, 1); /* BUSNO[1] */
136 pxb[3] = pci_cfgread(cfg, 0xd4, 1) + 1; /* SUBA[1]+1 */
141 s = "Intel 82454NX PXB#0, Bus#A";
145 s = "Intel 82454NX PXB#0, Bus#B";
149 s = "Intel 82454NX PXB#1, Bus#A";
153 s = "Intel 82454NX PXB#1, Bus#B";
159 s = "Intel 82845 Host to PCI bridge";
162 /* AMD -- vendor 0x1022 */
164 s = "AMD Elan SC520 host to PCI bridge";
166 init_AMD_Elan_sc520();
168 printf("*** WARNING: kernel option CPU_ELAN missing");
169 printf("-- timekeeping may be wrong\n");
173 s = "AMD-751 host to PCI bridge";
176 s = "AMD-761 host to PCI bridge";
179 /* SiS -- vendor 0x1039 */
190 s = "SiS 5591 host to PCI bridge";
193 s = "SiS 5591 host to AGP bridge";
196 /* VLSI -- vendor 0x1004 */
198 s = "VLSI 82C592 Host to PCI bridge";
201 /* XXX Here is MVP3, I got the datasheet but NO M/B to test it */
202 /* totally. Please let me know if anything wrong. -F */
203 /* XXX need info on the MVP3 -- any takers? */
205 s = "VIA 82C598MVP (Apollo MVP3) host bridge";
208 /* AcerLabs -- vendor 0x10b9 */
209 /* Funny : The datasheet told me vendor id is "10b8",sub-vendor */
210 /* id is '10b9" but the register always shows "10b9". -Foxfair */
212 s = "AcerLabs M1541 (Aladdin-V) PCI host bridge";
215 /* OPTi -- vendor 0x1045 */
217 s = "OPTi 82C822 host to PCI Bridge";
220 /* ServerWorks -- vendor 0x1166 */
222 s = "ServerWorks NB6536 2.0HE host to PCI bridge";
223 *busnum = pci_cfgread(cfg, 0x44, 1);
229 s = "ServerWorks host to PCI bridge";
230 *busnum = pci_cfgread(cfg, 0x44, 1);
234 s = "ServerWorks NB6635 3.0LE host to PCI bridge";
235 *busnum = pci_cfgread(cfg, 0x44, 1);
239 s = "ServerWorks CIOB30 host to PCI bridge";
240 *busnum = pci_cfgread(cfg, 0x44, 1);
243 /* XXX unknown chipset, but working */
247 s = "ServerWorks host to PCI bridge(unknown chipset)";
248 *busnum = pci_cfgread(cfg, 0x44, 1);
251 /* Integrated Micro Solutions -- vendor 0x10e0 */
253 s = "Integrated Micro Solutions VL Bridge";
257 if (class == PCIC_BRIDGE && subclass == PCIS_BRIDGE_HOST)
258 s = "Host to PCI bridge";
266 * Scan the first pci bus for host-pci bridges and add pcib instances
267 * to the nexus for each bridge.
270 nexus_pcib_identify(driver_t *driver, device_t parent)
279 if (pci_cfgregopen() == 0)
284 for (probe.slot = 0; probe.slot <= PCI_SLOTMAX; probe.slot++) {
286 hdrtype = pci_cfgread(&probe, PCIR_HEADERTYPE, 1);
287 if (hdrtype & PCIM_MFDEV && (!found_orion || hdrtype != 0xff) )
292 probe.func <= pcifunchigh;
295 * Read the IDs and class from the device.
298 u_int8_t class, subclass, busnum;
302 id = pci_cfgread(&probe, PCIR_DEVVENDOR, 4);
305 class = pci_cfgread(&probe, PCIR_CLASS, 1);
306 subclass = pci_cfgread(&probe, PCIR_SUBCLASS, 1);
308 s = nexus_pcib_is_host_bridge(&probe, id,
313 * Add at priority 100 to make sure we
314 * go after any motherboard resources
316 child = BUS_ADD_CHILD(parent, 100,
318 device_set_desc(child, s);
320 if (id == 0x12258086)
322 if (id == 0x84c48086)
327 if (found824xx && probe.bus == 0) {
333 * Make sure we add at least one bridge since some old
334 * hardware doesn't actually have a host-pci bridge device.
335 * Note that pci_cfgregopen() thinks we have PCI devices..
340 "nexus_pcib_identify: no bridge found, adding pcib0 anyway\n");
341 BUS_ADD_CHILD(parent, 100, "pcib", 0);
346 nexus_pcib_probe(device_t dev)
348 if (pci_cfgregopen() != 0) {
349 device_add_child(dev, "pci", device_get_unit(dev));
355 /* route interrupt */
358 nexus_pcib_route_interrupt(device_t pcib, device_t dev, int pin)
360 return(pci_cfgintr(pci_get_bus(dev), pci_get_slot(dev), pin,
364 static device_method_t nexus_pcib_methods[] = {
365 /* Device interface */
366 DEVMETHOD(device_identify, nexus_pcib_identify),
367 DEVMETHOD(device_probe, nexus_pcib_probe),
368 DEVMETHOD(device_attach, bus_generic_attach),
369 DEVMETHOD(device_shutdown, bus_generic_shutdown),
370 DEVMETHOD(device_suspend, bus_generic_suspend),
371 DEVMETHOD(device_resume, bus_generic_resume),
374 DEVMETHOD(bus_print_child, bus_generic_print_child),
375 DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
376 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
377 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
378 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
379 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
380 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
383 DEVMETHOD(pcib_maxslots, nexus_pcib_maxslots),
384 DEVMETHOD(pcib_read_config, nexus_pcib_read_config),
385 DEVMETHOD(pcib_write_config, nexus_pcib_write_config),
386 DEVMETHOD(pcib_route_interrupt, nexus_pcib_route_interrupt),
391 static driver_t nexus_pcib_driver = {
397 DRIVER_MODULE(pcib, nexus, nexus_pcib_driver, pcib_devclass, 0, 0);
401 * Provide a device to "eat" the host->pci bridges that we dug up above
402 * and stop them showing up twice on the probes. This also stops them
403 * showing up as 'none' in pciconf -l.
406 pci_hostb_probe(device_t dev)
408 if (pci_get_class(dev) == PCIC_BRIDGE &&
409 pci_get_subclass(dev) == PCIS_BRIDGE_HOST) {
410 device_set_desc(dev, "Host to PCI bridge");
418 pci_hostb_attach(device_t dev)
423 static device_method_t pci_hostb_methods[] = {
424 /* Device interface */
425 DEVMETHOD(device_probe, pci_hostb_probe),
426 DEVMETHOD(device_attach, pci_hostb_attach),
427 DEVMETHOD(device_shutdown, bus_generic_shutdown),
428 DEVMETHOD(device_suspend, bus_generic_suspend),
429 DEVMETHOD(device_resume, bus_generic_resume),
433 static driver_t pci_hostb_driver = {
438 static devclass_t pci_hostb_devclass;
440 DRIVER_MODULE(hostb, pci, pci_hostb_driver, pci_hostb_devclass, 0, 0);
444 * Install placeholder to claim the resources owned by the
445 * PCI bus interface. This could be used to extract the
446 * config space registers in the extreme case where the PnP
447 * ID is available and the PCI BIOS isn't, but for now we just
448 * eat the PnP ID and do nothing else.
450 * XXX we should silence this probe, as it will generally confuse
453 static struct isa_pnp_id pcibus_pnp_ids[] = {
454 { 0x030ad041 /* PNP030A */, "PCI Bus" },
459 pcibus_pnp_probe(device_t dev)
463 if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, pcibus_pnp_ids)) <= 0)
469 pcibus_pnp_attach(device_t dev)
474 static device_method_t pcibus_pnp_methods[] = {
475 /* Device interface */
476 DEVMETHOD(device_probe, pcibus_pnp_probe),
477 DEVMETHOD(device_attach, pcibus_pnp_attach),
478 DEVMETHOD(device_detach, bus_generic_detach),
479 DEVMETHOD(device_shutdown, bus_generic_shutdown),
480 DEVMETHOD(device_suspend, bus_generic_suspend),
481 DEVMETHOD(device_resume, bus_generic_resume),
485 static driver_t pcibus_pnp_driver = {
491 static devclass_t pcibus_pnp_devclass;
493 DRIVER_MODULE(pcibus_pnp, isa, pcibus_pnp_driver, pcibus_pnp_devclass, 0, 0);