Merge branch 'vendor/LESS'
[dragonfly.git] / sys / dev / drm / i915 / intel_lvds.c
1 /*
2  * Copyright © 2006-2007 Intel Corporation
3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22  * DEALINGS IN THE SOFTWARE.
23  *
24  * Authors:
25  *      Eric Anholt <eric@anholt.net>
26  *      Dave Airlie <airlied@linux.ie>
27  *      Jesse Barnes <jesse.barnes@intel.com>
28  */
29
30 #include <linux/dmi.h>
31 #include <linux/i2c.h>
32 #include <drm/drmP.h>
33 #include <drm/drm_crtc.h>
34 #include <drm/drm_edid.h>
35 #include "intel_drv.h"
36 #include <drm/i915_drm.h>
37 #include "i915_drv.h"
38
39 /* Private structure for the integrated LVDS support */
40 struct intel_lvds_connector {
41         struct intel_connector base;
42
43 #if 0
44         struct notifier_block lid_notifier;
45 #endif
46 };
47
48 struct intel_lvds_encoder {
49         struct intel_encoder base;
50
51         bool is_dual_link;
52         u32 reg;
53
54         struct intel_lvds_connector *attached_connector;
55 };
56
57 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
58 {
59         return container_of(encoder, struct intel_lvds_encoder, base.base);
60 }
61
62 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
63 {
64         return container_of(connector, struct intel_lvds_connector, base.base);
65 }
66
67 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
68                                     enum i915_pipe *pipe)
69 {
70         struct drm_device *dev = encoder->base.dev;
71         struct drm_i915_private *dev_priv = dev->dev_private;
72         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
73         u32 tmp;
74
75         tmp = I915_READ(lvds_encoder->reg);
76
77         if (!(tmp & LVDS_PORT_EN))
78                 return false;
79
80         if (HAS_PCH_CPT(dev))
81                 *pipe = PORT_TO_PIPE_CPT(tmp);
82         else
83                 *pipe = PORT_TO_PIPE(tmp);
84
85         return true;
86 }
87
88 static void intel_lvds_get_config(struct intel_encoder *encoder,
89                                   struct intel_crtc_config *pipe_config)
90 {
91         struct drm_device *dev = encoder->base.dev;
92         struct drm_i915_private *dev_priv = dev->dev_private;
93         u32 lvds_reg, tmp, flags = 0;
94
95         if (HAS_PCH_SPLIT(dev))
96                 lvds_reg = PCH_LVDS;
97         else
98                 lvds_reg = LVDS;
99
100         tmp = I915_READ(lvds_reg);
101         if (tmp & LVDS_HSYNC_POLARITY)
102                 flags |= DRM_MODE_FLAG_NHSYNC;
103         else
104                 flags |= DRM_MODE_FLAG_PHSYNC;
105         if (tmp & LVDS_VSYNC_POLARITY)
106                 flags |= DRM_MODE_FLAG_NVSYNC;
107         else
108                 flags |= DRM_MODE_FLAG_PVSYNC;
109
110         pipe_config->adjusted_mode.flags |= flags;
111
112         /* gen2/3 store dither state in pfit control, needs to match */
113         if (INTEL_INFO(dev)->gen < 4) {
114                 tmp = I915_READ(PFIT_CONTROL);
115
116                 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
117         }
118 }
119
120 /* The LVDS pin pair needs to be on before the DPLLs are enabled.
121  * This is an exception to the general rule that mode_set doesn't turn
122  * things on.
123  */
124 static void intel_pre_pll_enable_lvds(struct intel_encoder *encoder)
125 {
126         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
127         struct drm_device *dev = encoder->base.dev;
128         struct drm_i915_private *dev_priv = dev->dev_private;
129         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
130         struct drm_display_mode *fixed_mode =
131                 lvds_encoder->attached_connector->base.panel.fixed_mode;
132         int pipe = intel_crtc->pipe;
133         u32 temp;
134
135         temp = I915_READ(lvds_encoder->reg);
136         temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
137
138         if (HAS_PCH_CPT(dev)) {
139                 temp &= ~PORT_TRANS_SEL_MASK;
140                 temp |= PORT_TRANS_SEL_CPT(pipe);
141         } else {
142                 if (pipe == 1) {
143                         temp |= LVDS_PIPEB_SELECT;
144                 } else {
145                         temp &= ~LVDS_PIPEB_SELECT;
146                 }
147         }
148
149         /* set the corresponsding LVDS_BORDER bit */
150         temp &= ~LVDS_BORDER_ENABLE;
151         temp |= intel_crtc->config.gmch_pfit.lvds_border_bits;
152         /* Set the B0-B3 data pairs corresponding to whether we're going to
153          * set the DPLLs for dual-channel mode or not.
154          */
155         if (lvds_encoder->is_dual_link)
156                 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
157         else
158                 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
159
160         /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
161          * appropriately here, but we need to look more thoroughly into how
162          * panels behave in the two modes.
163          */
164
165         /* Set the dithering flag on LVDS as needed, note that there is no
166          * special lvds dither control bit on pch-split platforms, dithering is
167          * only controlled through the PIPECONF reg. */
168         if (INTEL_INFO(dev)->gen == 4) {
169                 /* Bspec wording suggests that LVDS port dithering only exists
170                  * for 18bpp panels. */
171                 if (intel_crtc->config.dither &&
172                     intel_crtc->config.pipe_bpp == 18)
173                         temp |= LVDS_ENABLE_DITHER;
174                 else
175                         temp &= ~LVDS_ENABLE_DITHER;
176         }
177         temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
178         if (fixed_mode->flags & DRM_MODE_FLAG_NHSYNC)
179                 temp |= LVDS_HSYNC_POLARITY;
180         if (fixed_mode->flags & DRM_MODE_FLAG_NVSYNC)
181                 temp |= LVDS_VSYNC_POLARITY;
182
183         I915_WRITE(lvds_encoder->reg, temp);
184 }
185
186 /**
187  * Sets the power state for the panel.
188  */
189 static void intel_enable_lvds(struct intel_encoder *encoder)
190 {
191         struct drm_device *dev = encoder->base.dev;
192         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
193         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
194         struct drm_i915_private *dev_priv = dev->dev_private;
195         u32 ctl_reg, stat_reg;
196
197         if (HAS_PCH_SPLIT(dev)) {
198                 ctl_reg = PCH_PP_CONTROL;
199                 stat_reg = PCH_PP_STATUS;
200         } else {
201                 ctl_reg = PP_CONTROL;
202                 stat_reg = PP_STATUS;
203         }
204
205         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
206
207         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
208         POSTING_READ(lvds_encoder->reg);
209         if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
210                 DRM_ERROR("timed out waiting for panel to power on\n");
211
212         intel_panel_enable_backlight(dev, intel_crtc->pipe);
213 }
214
215 static void intel_disable_lvds(struct intel_encoder *encoder)
216 {
217         struct drm_device *dev = encoder->base.dev;
218         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
219         struct drm_i915_private *dev_priv = dev->dev_private;
220         u32 ctl_reg, stat_reg;
221
222         if (HAS_PCH_SPLIT(dev)) {
223                 ctl_reg = PCH_PP_CONTROL;
224                 stat_reg = PCH_PP_STATUS;
225         } else {
226                 ctl_reg = PP_CONTROL;
227                 stat_reg = PP_STATUS;
228         }
229
230         intel_panel_disable_backlight(dev);
231
232         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
233         if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
234                 DRM_ERROR("timed out waiting for panel to power off\n");
235
236         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
237         POSTING_READ(lvds_encoder->reg);
238 }
239
240 static int intel_lvds_mode_valid(struct drm_connector *connector,
241                                  struct drm_display_mode *mode)
242 {
243         struct intel_connector *intel_connector = to_intel_connector(connector);
244         struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
245
246         if (mode->hdisplay > fixed_mode->hdisplay)
247                 return MODE_PANEL;
248         if (mode->vdisplay > fixed_mode->vdisplay)
249                 return MODE_PANEL;
250
251         return MODE_OK;
252 }
253
254 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
255                                       struct intel_crtc_config *pipe_config)
256 {
257         struct drm_device *dev = intel_encoder->base.dev;
258         struct drm_i915_private *dev_priv = dev->dev_private;
259         struct intel_lvds_encoder *lvds_encoder =
260                 to_lvds_encoder(&intel_encoder->base);
261         struct intel_connector *intel_connector =
262                 &lvds_encoder->attached_connector->base;
263         struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
264         struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
265         unsigned int lvds_bpp;
266
267         /* Should never happen!! */
268         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
269                 DRM_ERROR("Can't support LVDS on pipe A\n");
270                 return false;
271         }
272
273         if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
274             LVDS_A3_POWER_UP)
275                 lvds_bpp = 8*3;
276         else
277                 lvds_bpp = 6*3;
278
279         if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
280                 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
281                               pipe_config->pipe_bpp, lvds_bpp);
282                 pipe_config->pipe_bpp = lvds_bpp;
283         }
284
285         /*
286          * We have timings from the BIOS for the panel, put them in
287          * to the adjusted mode.  The CRTC will be set up for this mode,
288          * with the panel scaling set up to source from the H/VDisplay
289          * of the original mode.
290          */
291         intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
292                                adjusted_mode);
293
294         if (HAS_PCH_SPLIT(dev)) {
295                 pipe_config->has_pch_encoder = true;
296
297                 intel_pch_panel_fitting(intel_crtc, pipe_config,
298                                         intel_connector->panel.fitting_mode);
299         } else {
300                 intel_gmch_panel_fitting(intel_crtc, pipe_config,
301                                          intel_connector->panel.fitting_mode);
302
303         }
304
305         /*
306          * XXX: It would be nice to support lower refresh rates on the
307          * panels to reduce power consumption, and perhaps match the
308          * user's requested refresh rate.
309          */
310
311         return true;
312 }
313
314 static void intel_lvds_mode_set(struct drm_encoder *encoder,
315                                 struct drm_display_mode *mode,
316                                 struct drm_display_mode *adjusted_mode)
317 {
318         /*
319          * The LVDS pin pair will already have been turned on in the
320          * intel_crtc_mode_set since it has a large impact on the DPLL
321          * settings.
322          */
323 }
324
325 /**
326  * Detect the LVDS connection.
327  *
328  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
329  * connected and closed means disconnected.  We also send hotplug events as
330  * needed, using lid status notification from the input layer.
331  */
332 static enum drm_connector_status
333 intel_lvds_detect(struct drm_connector *connector, bool force)
334 {
335         struct drm_device *dev = connector->dev;
336         enum drm_connector_status status;
337
338         status = intel_panel_detect(dev);
339         if (status != connector_status_unknown)
340                 return status;
341
342         return connector_status_connected;
343 }
344
345 /**
346  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
347  */
348 static int intel_lvds_get_modes(struct drm_connector *connector)
349 {
350         struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
351         struct drm_device *dev = connector->dev;
352         struct drm_display_mode *mode;
353
354         /* use cached edid if we have one */
355         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
356                 return drm_add_edid_modes(connector, lvds_connector->base.edid);
357
358         mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
359         if (mode == NULL)
360                 return 0;
361
362         drm_mode_probed_add(connector, mode);
363         return 1;
364 }
365
366 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
367 {
368         DRM_INFO("Skipping forced modeset for %s\n", id->ident);
369         return 1;
370 }
371
372 /* The GPU hangs up on these systems if modeset is performed on LID open */
373 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
374         {
375                 .callback = intel_no_modeset_on_lid_dmi_callback,
376                 .ident = "Toshiba Tecra A11",
377                 .matches = {
378                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
379                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
380                 },
381         },
382
383         { }     /* terminating entry */
384 };
385
386 #if 0
387 /*
388  * Lid events. Note the use of 'modeset':
389  *  - we set it to MODESET_ON_LID_OPEN on lid close,
390  *    and set it to MODESET_DONE on open
391  *  - we use it as a "only once" bit (ie we ignore
392  *    duplicate events where it was already properly set)
393  *  - the suspend/resume paths will set it to
394  *    MODESET_SUSPENDED and ignore the lid open event,
395  *    because they restore the mode ("lid open").
396  */
397 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
398                             void *unused)
399 {
400         struct intel_lvds_connector *lvds_connector =
401                 container_of(nb, struct intel_lvds_connector, lid_notifier);
402         struct drm_connector *connector = &lvds_connector->base.base;
403         struct drm_device *dev = connector->dev;
404         struct drm_i915_private *dev_priv = dev->dev_private;
405
406         if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
407                 return NOTIFY_OK;
408
409         mutex_lock(&dev_priv->modeset_restore_lock);
410         if (dev_priv->modeset_restore == MODESET_SUSPENDED)
411                 goto exit;
412         /*
413          * check and update the status of LVDS connector after receiving
414          * the LID nofication event.
415          */
416         connector->status = connector->funcs->detect(connector, false);
417
418         /* Don't force modeset on machines where it causes a GPU lockup */
419         if (dmi_check_system(intel_no_modeset_on_lid))
420                 goto exit;
421         if (!acpi_lid_open()) {
422                 /* do modeset on next lid open event */
423                 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
424                 goto exit;
425         }
426
427         if (dev_priv->modeset_restore == MODESET_DONE)
428                 goto exit;
429
430         drm_modeset_lock_all(dev);
431         intel_modeset_setup_hw_state(dev, true);
432         drm_modeset_unlock_all(dev);
433
434         dev_priv->modeset_restore = MODESET_DONE;
435
436 exit:
437         mutex_unlock(&dev_priv->modeset_restore_lock);
438         return NOTIFY_OK;
439 }
440 #endif
441
442 /**
443  * intel_lvds_destroy - unregister and free LVDS structures
444  * @connector: connector to free
445  *
446  * Unregister the DDC bus for this connector then free the driver private
447  * structure.
448  */
449 static void intel_lvds_destroy(struct drm_connector *connector)
450 {
451         struct intel_lvds_connector *lvds_connector =
452                 to_lvds_connector(connector);
453
454 #if 0
455         if (lvds_connector->lid_notifier.notifier_call)
456                 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
457 #endif
458
459         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
460                 kfree(lvds_connector->base.edid);
461
462         intel_panel_fini(&lvds_connector->base.panel);
463
464 #if 0
465         drm_sysfs_connector_remove(connector);
466 #endif
467         drm_connector_cleanup(connector);
468         kfree(connector);
469 }
470
471 static int intel_lvds_set_property(struct drm_connector *connector,
472                                    struct drm_property *property,
473                                    uint64_t value)
474 {
475         struct intel_connector *intel_connector = to_intel_connector(connector);
476         struct drm_device *dev = connector->dev;
477
478         if (property == dev->mode_config.scaling_mode_property) {
479                 struct drm_crtc *crtc;
480
481                 if (value == DRM_MODE_SCALE_NONE) {
482                         DRM_DEBUG_KMS("no scaling not supported\n");
483                         return -EINVAL;
484                 }
485
486                 if (intel_connector->panel.fitting_mode == value) {
487                         /* the LVDS scaling property is not changed */
488                         return 0;
489                 }
490                 intel_connector->panel.fitting_mode = value;
491
492                 crtc = intel_attached_encoder(connector)->base.crtc;
493                 if (crtc && crtc->enabled) {
494                         /*
495                          * If the CRTC is enabled, the display will be changed
496                          * according to the new panel fitting mode.
497                          */
498                         intel_crtc_restore_mode(crtc);
499                 }
500         }
501
502         return 0;
503 }
504
505 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
506         .mode_set = intel_lvds_mode_set,
507 };
508
509 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
510         .get_modes = intel_lvds_get_modes,
511         .mode_valid = intel_lvds_mode_valid,
512         .best_encoder = intel_best_encoder,
513 };
514
515 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
516         .dpms = intel_connector_dpms,
517         .detect = intel_lvds_detect,
518         .fill_modes = drm_helper_probe_single_connector_modes,
519         .set_property = intel_lvds_set_property,
520         .destroy = intel_lvds_destroy,
521 };
522
523 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
524         .destroy = intel_encoder_destroy,
525 };
526
527 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
528 {
529         DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
530         return 1;
531 }
532
533 /* These systems claim to have LVDS, but really don't */
534 static const struct dmi_system_id intel_no_lvds[] = {
535         {
536                 .callback = intel_no_lvds_dmi_callback,
537                 .ident = "Apple Mac Mini (Core series)",
538                 .matches = {
539                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
540                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
541                 },
542         },
543         {
544                 .callback = intel_no_lvds_dmi_callback,
545                 .ident = "Apple Mac Mini (Core 2 series)",
546                 .matches = {
547                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
548                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
549                 },
550         },
551         {
552                 .callback = intel_no_lvds_dmi_callback,
553                 .ident = "MSI IM-945GSE-A",
554                 .matches = {
555                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
556                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
557                 },
558         },
559         {
560                 .callback = intel_no_lvds_dmi_callback,
561                 .ident = "Dell Studio Hybrid",
562                 .matches = {
563                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
564                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
565                 },
566         },
567         {
568                 .callback = intel_no_lvds_dmi_callback,
569                 .ident = "Dell OptiPlex FX170",
570                 .matches = {
571                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
572                         DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
573                 },
574         },
575         {
576                 .callback = intel_no_lvds_dmi_callback,
577                 .ident = "AOpen Mini PC",
578                 .matches = {
579                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
580                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
581                 },
582         },
583         {
584                 .callback = intel_no_lvds_dmi_callback,
585                 .ident = "AOpen Mini PC MP915",
586                 .matches = {
587                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
588                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
589                 },
590         },
591         {
592                 .callback = intel_no_lvds_dmi_callback,
593                 .ident = "AOpen i915GMm-HFS",
594                 .matches = {
595                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
596                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
597                 },
598         },
599         {
600                 .callback = intel_no_lvds_dmi_callback,
601                 .ident = "AOpen i45GMx-I",
602                 .matches = {
603                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
604                         DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
605                 },
606         },
607         {
608                 .callback = intel_no_lvds_dmi_callback,
609                 .ident = "Aopen i945GTt-VFA",
610                 .matches = {
611                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
612                 },
613         },
614         {
615                 .callback = intel_no_lvds_dmi_callback,
616                 .ident = "Clientron U800",
617                 .matches = {
618                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
619                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
620                 },
621         },
622         {
623                 .callback = intel_no_lvds_dmi_callback,
624                 .ident = "Clientron E830",
625                 .matches = {
626                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
627                         DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
628                 },
629         },
630         {
631                 .callback = intel_no_lvds_dmi_callback,
632                 .ident = "Asus EeeBox PC EB1007",
633                 .matches = {
634                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
635                         DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
636                 },
637         },
638         {
639                 .callback = intel_no_lvds_dmi_callback,
640                 .ident = "Asus AT5NM10T-I",
641                 .matches = {
642                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
643                         DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
644                 },
645         },
646         {
647                 .callback = intel_no_lvds_dmi_callback,
648                 .ident = "Hewlett-Packard HP t5740",
649                 .matches = {
650                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
651                         DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
652                 },
653         },
654         {
655                 .callback = intel_no_lvds_dmi_callback,
656                 .ident = "Hewlett-Packard t5745",
657                 .matches = {
658                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
659                         DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
660                 },
661         },
662         {
663                 .callback = intel_no_lvds_dmi_callback,
664                 .ident = "Hewlett-Packard st5747",
665                 .matches = {
666                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
667                         DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
668                 },
669         },
670         {
671                 .callback = intel_no_lvds_dmi_callback,
672                 .ident = "MSI Wind Box DC500",
673                 .matches = {
674                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
675                         DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
676                 },
677         },
678         {
679                 .callback = intel_no_lvds_dmi_callback,
680                 .ident = "Gigabyte GA-D525TUD",
681                 .matches = {
682                         DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
683                         DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
684                 },
685         },
686         {
687                 .callback = intel_no_lvds_dmi_callback,
688                 .ident = "Supermicro X7SPA-H",
689                 .matches = {
690                         DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
691                         DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
692                 },
693         },
694         {
695                 .callback = intel_no_lvds_dmi_callback,
696                 .ident = "Fujitsu Esprimo Q900",
697                 .matches = {
698                         DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
699                         DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
700                 },
701         },
702         {
703                 .callback = intel_no_lvds_dmi_callback,
704                 .ident = "Intel D510MO",
705                 .matches = {
706                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
707                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
708                 },
709         },
710         {
711                 .callback = intel_no_lvds_dmi_callback,
712                 .ident = "Intel D525MW",
713                 .matches = {
714                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
715                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
716                 },
717         },
718
719         { }     /* terminating entry */
720 };
721
722 /**
723  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
724  * @dev: drm device
725  * @connector: LVDS connector
726  *
727  * Find the reduced downclock for LVDS in EDID.
728  */
729 static void intel_find_lvds_downclock(struct drm_device *dev,
730                                       struct drm_display_mode *fixed_mode,
731                                       struct drm_connector *connector)
732 {
733         struct drm_i915_private *dev_priv = dev->dev_private;
734         struct drm_display_mode *scan;
735         int temp_downclock;
736
737         temp_downclock = fixed_mode->clock;
738         list_for_each_entry(scan, &connector->probed_modes, head) {
739                 /*
740                  * If one mode has the same resolution with the fixed_panel
741                  * mode while they have the different refresh rate, it means
742                  * that the reduced downclock is found for the LVDS. In such
743                  * case we can set the different FPx0/1 to dynamically select
744                  * between low and high frequency.
745                  */
746                 if (scan->hdisplay == fixed_mode->hdisplay &&
747                     scan->hsync_start == fixed_mode->hsync_start &&
748                     scan->hsync_end == fixed_mode->hsync_end &&
749                     scan->htotal == fixed_mode->htotal &&
750                     scan->vdisplay == fixed_mode->vdisplay &&
751                     scan->vsync_start == fixed_mode->vsync_start &&
752                     scan->vsync_end == fixed_mode->vsync_end &&
753                     scan->vtotal == fixed_mode->vtotal) {
754                         if (scan->clock < temp_downclock) {
755                                 /*
756                                  * The downclock is already found. But we
757                                  * expect to find the lower downclock.
758                                  */
759                                 temp_downclock = scan->clock;
760                         }
761                 }
762         }
763         if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
764                 /* We found the downclock for LVDS. */
765                 dev_priv->lvds_downclock_avail = 1;
766                 dev_priv->lvds_downclock = temp_downclock;
767                 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
768                               "Normal clock %dKhz, downclock %dKhz\n",
769                               fixed_mode->clock, temp_downclock);
770         }
771 }
772
773 /*
774  * Enumerate the child dev array parsed from VBT to check whether
775  * the LVDS is present.
776  * If it is present, return 1.
777  * If it is not present, return false.
778  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
779  */
780 static bool lvds_is_present_in_vbt(struct drm_device *dev,
781                                    u8 *i2c_pin)
782 {
783         struct drm_i915_private *dev_priv = dev->dev_private;
784         int i;
785
786         if (!dev_priv->vbt.child_dev_num)
787                 return true;
788
789         for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
790                 struct child_device_config *child = dev_priv->vbt.child_dev + i;
791
792                 /* If the device type is not LFP, continue.
793                  * We have to check both the new identifiers as well as the
794                  * old for compatibility with some BIOSes.
795                  */
796                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
797                     child->device_type != DEVICE_TYPE_LFP)
798                         continue;
799
800                 if (intel_gmbus_is_port_valid(child->i2c_pin))
801                         *i2c_pin = child->i2c_pin;
802
803                 /* However, we cannot trust the BIOS writers to populate
804                  * the VBT correctly.  Since LVDS requires additional
805                  * information from AIM blocks, a non-zero addin offset is
806                  * a good indicator that the LVDS is actually present.
807                  */
808                 if (child->addin_offset)
809                         return true;
810
811                 /* But even then some BIOS writers perform some black magic
812                  * and instantiate the device without reference to any
813                  * additional data.  Trust that if the VBT was written into
814                  * the OpRegion then they have validated the LVDS's existence.
815                  */
816                 if (dev_priv->opregion.vbt)
817                         return true;
818         }
819
820         return false;
821 }
822
823 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
824 {
825         DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
826         return 1;
827 }
828
829 static const struct dmi_system_id intel_dual_link_lvds[] = {
830         {
831                 .callback = intel_dual_link_lvds_callback,
832                 .ident = "Apple MacBook Pro (Core i5/i7 Series)",
833                 .matches = {
834                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
835                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
836                 },
837         },
838         { }     /* terminating entry */
839 };
840
841 bool intel_is_dual_link_lvds(struct drm_device *dev)
842 {
843         struct intel_encoder *encoder;
844         struct intel_lvds_encoder *lvds_encoder;
845
846         list_for_each_entry(encoder, &dev->mode_config.encoder_list,
847                             base.head) {
848                 if (encoder->type == INTEL_OUTPUT_LVDS) {
849                         lvds_encoder = to_lvds_encoder(&encoder->base);
850
851                         return lvds_encoder->is_dual_link;
852                 }
853         }
854
855         return false;
856 }
857
858 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
859 {
860         struct drm_device *dev = lvds_encoder->base.base.dev;
861         unsigned int val;
862         struct drm_i915_private *dev_priv = dev->dev_private;
863
864         /* use the module option value if specified */
865         if (i915_lvds_channel_mode > 0)
866                 return i915_lvds_channel_mode == 2;
867
868         if (dmi_check_system(intel_dual_link_lvds))
869                 return true;
870
871         /* BIOS should set the proper LVDS register value at boot, but
872          * in reality, it doesn't set the value when the lid is closed;
873          * we need to check "the value to be set" in VBT when LVDS
874          * register is uninitialized.
875          */
876         val = I915_READ(lvds_encoder->reg);
877         if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
878                 val = dev_priv->vbt.bios_lvds_val;
879
880         return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
881 }
882
883 static bool intel_lvds_supported(struct drm_device *dev)
884 {
885         /* With the introduction of the PCH we gained a dedicated
886          * LVDS presence pin, use it. */
887         if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
888                 return true;
889
890         /* Otherwise LVDS was only attached to mobile products,
891          * except for the inglorious 830gm */
892         if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
893                 return true;
894
895         return false;
896 }
897
898 /**
899  * intel_lvds_init - setup LVDS connectors on this device
900  * @dev: drm device
901  *
902  * Create the connector, register the LVDS DDC bus, and try to figure out what
903  * modes we can display on the LVDS panel (if present).
904  */
905 void intel_lvds_init(struct drm_device *dev)
906 {
907         struct drm_i915_private *dev_priv = dev->dev_private;
908         struct intel_lvds_encoder *lvds_encoder;
909         struct intel_encoder *intel_encoder;
910         struct intel_lvds_connector *lvds_connector;
911         struct intel_connector *intel_connector;
912         struct drm_connector *connector;
913         struct drm_encoder *encoder;
914         struct drm_display_mode *scan; /* *modes, *bios_mode; */
915         struct drm_display_mode *fixed_mode = NULL;
916         struct edid *edid;
917         struct drm_crtc *crtc;
918         u32 lvds;
919         int pipe;
920         u8 pin;
921
922         if (!intel_lvds_supported(dev))
923                 return;
924
925         /* Skip init on machines we know falsely report LVDS */
926         if (dmi_check_system(intel_no_lvds))
927                 return;
928
929         pin = GMBUS_PORT_PANEL;
930         if (!lvds_is_present_in_vbt(dev, &pin)) {
931                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
932                 return;
933         }
934
935         if (HAS_PCH_SPLIT(dev)) {
936                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
937                         return;
938                 if (dev_priv->vbt.edp_support) {
939                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
940                         return;
941                 }
942         }
943
944         lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
945         if (!lvds_encoder)
946                 return;
947
948         lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
949         if (!lvds_connector) {
950                 kfree(lvds_encoder);
951                 return;
952         }
953
954         lvds_encoder->attached_connector = lvds_connector;
955
956         intel_encoder = &lvds_encoder->base;
957         encoder = &intel_encoder->base;
958         intel_connector = &lvds_connector->base;
959         connector = &intel_connector->base;
960         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
961                            DRM_MODE_CONNECTOR_LVDS);
962
963         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
964                          DRM_MODE_ENCODER_LVDS);
965
966         intel_encoder->enable = intel_enable_lvds;
967         intel_encoder->pre_pll_enable = intel_pre_pll_enable_lvds;
968         intel_encoder->compute_config = intel_lvds_compute_config;
969         intel_encoder->disable = intel_disable_lvds;
970         intel_encoder->get_hw_state = intel_lvds_get_hw_state;
971         intel_encoder->get_config = intel_lvds_get_config;
972         intel_connector->get_hw_state = intel_connector_get_hw_state;
973
974         intel_connector_attach_encoder(intel_connector, intel_encoder);
975         intel_encoder->type = INTEL_OUTPUT_LVDS;
976
977         intel_encoder->cloneable = false;
978         if (HAS_PCH_SPLIT(dev))
979                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
980         else if (IS_GEN4(dev))
981                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
982         else
983                 intel_encoder->crtc_mask = (1 << 1);
984
985         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
986         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
987         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
988         connector->interlace_allowed = false;
989         connector->doublescan_allowed = false;
990
991         if (HAS_PCH_SPLIT(dev)) {
992                 lvds_encoder->reg = PCH_LVDS;
993         } else {
994                 lvds_encoder->reg = LVDS;
995         }
996
997         /* create the scaling mode property */
998         drm_mode_create_scaling_mode_property(dev);
999         drm_object_attach_property(&connector->base,
1000                                       dev->mode_config.scaling_mode_property,
1001                                       DRM_MODE_SCALE_ASPECT);
1002         intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
1003         /*
1004          * LVDS discovery:
1005          * 1) check for EDID on DDC
1006          * 2) check for VBT data
1007          * 3) check to see if LVDS is already on
1008          *    if none of the above, no panel
1009          * 4) make sure lid is open
1010          *    if closed, act like it's not there for now
1011          */
1012
1013         /*
1014          * Attempt to get the fixed panel mode from DDC.  Assume that the
1015          * preferred mode is the right one.
1016          */
1017         edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
1018         if (edid) {
1019                 if (drm_add_edid_modes(connector, edid)) {
1020                         drm_mode_connector_update_edid_property(connector,
1021                                                                 edid);
1022                 } else {
1023                         kfree(edid);
1024                         edid = ERR_PTR(-EINVAL);
1025                 }
1026         } else {
1027                 edid = ERR_PTR(-ENOENT);
1028         }
1029         lvds_connector->base.edid = edid;
1030
1031         if (IS_ERR_OR_NULL(edid)) {
1032                 /* Didn't get an EDID, so
1033                  * Set wide sync ranges so we get all modes
1034                  * handed to valid_mode for checking
1035                  */
1036                 connector->display_info.min_vfreq = 0;
1037                 connector->display_info.max_vfreq = 200;
1038                 connector->display_info.min_hfreq = 0;
1039                 connector->display_info.max_hfreq = 200;
1040         }
1041
1042         list_for_each_entry(scan, &connector->probed_modes, head) {
1043                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1044                         DRM_DEBUG_KMS("using preferred mode from EDID: ");
1045                         drm_mode_debug_printmodeline(scan);
1046
1047                         fixed_mode = drm_mode_duplicate(dev, scan);
1048                         if (fixed_mode) {
1049                                 intel_find_lvds_downclock(dev, fixed_mode,
1050                                                           connector);
1051                                 goto out;
1052                         }
1053                 }
1054         }
1055
1056         /* Failed to get EDID, what about VBT? */
1057         if (dev_priv->vbt.lfp_lvds_vbt_mode) {
1058                 DRM_DEBUG_KMS("using mode from VBT: ");
1059                 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
1060
1061                 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
1062                 if (fixed_mode) {
1063                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1064                         goto out;
1065                 }
1066         }
1067
1068         /*
1069          * If we didn't get EDID, try checking if the panel is already turned
1070          * on.  If so, assume that whatever is currently programmed is the
1071          * correct mode.
1072          */
1073
1074         /* Ironlake: FIXME if still fail, not try pipe mode now */
1075         if (HAS_PCH_SPLIT(dev))
1076                 goto failed;
1077
1078         lvds = I915_READ(LVDS);
1079         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1080         crtc = intel_get_crtc_for_pipe(dev, pipe);
1081
1082         if (crtc && (lvds & LVDS_PORT_EN)) {
1083                 fixed_mode = intel_crtc_mode_get(dev, crtc);
1084                 if (fixed_mode) {
1085                         DRM_DEBUG_KMS("using current (BIOS) mode: ");
1086                         drm_mode_debug_printmodeline(fixed_mode);
1087                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1088                         goto out;
1089                 }
1090         }
1091
1092         /* If we still don't have a mode after all that, give up. */
1093         if (!fixed_mode)
1094                 goto failed;
1095
1096 out:
1097         lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1098         DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1099                       lvds_encoder->is_dual_link ? "dual" : "single");
1100
1101         /*
1102          * Unlock registers and just
1103          * leave them unlocked
1104          */
1105         if (HAS_PCH_SPLIT(dev)) {
1106                 I915_WRITE(PCH_PP_CONTROL,
1107                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
1108         } else {
1109                 I915_WRITE(PP_CONTROL,
1110                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
1111         }
1112 #if 0
1113         lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1114         if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1115                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1116                 lvds_connector->lid_notifier.notifier_call = NULL;
1117         }
1118         drm_sysfs_connector_add(connector);
1119 #endif
1120
1121         intel_panel_init(&intel_connector->panel, fixed_mode);
1122         intel_panel_setup_backlight(connector);
1123
1124         return;
1125
1126 failed:
1127         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1128         drm_connector_cleanup(connector);
1129         drm_encoder_cleanup(encoder);
1130         if (fixed_mode)
1131                 drm_mode_destroy(dev, fixed_mode);
1132         kfree(lvds_encoder);
1133         kfree(lvds_connector);
1134         return;
1135 }