2 * Copyright (c) 2003,2004 The DragonFly Project. All rights reserved.
4 * This code is derived from software contributed to The DragonFly Project
5 * by Matthew Dillon <dillon@backplane.com>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * Copyright (c) 1997, by Steve Passe, All rights reserved.
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. The name of the developer may NOT be used to endorse or promote products
42 * derived from this software without specific prior written permission.
44 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
45 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
46 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
47 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
48 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
49 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
50 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
51 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
52 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
53 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
56 * $FreeBSD: src/sys/i386/isa/apic_ipl.s,v 1.27.2.2 2000/09/30 02:49:35 ps Exp $
57 * $DragonFly: src/sys/i386/isa/Attic/apic_ipl.s,v 1.9 2004/07/16 05:49:14 dillon Exp $
64 * Interrupt mask for APIC interrupts, defaults to all hardware
65 * interrupts turned off.
68 .p2align 2 /* MUST be 32bit aligned */
78 * Functions to enable and disable a hardware interrupt. Generally
79 * called with only one bit set in the mask but can handle multiple
80 * bits to present the same API as the ICU.
84 IMASK_LOCK /* enter critical reg */
92 movl CNAME(int_to_apicintpin) + 8(%ecx), %edx
93 movl CNAME(int_to_apicintpin) + 12(%ecx), %ecx
96 movl %ecx, (%edx) /* target register index */
97 orl $IOART_INTMASK,16(%edx) /* set intmask in target apic reg */
100 IMASK_UNLOCK /* exit critical reg */
104 IMASK_LOCK /* enter critical reg */
105 movl 4(%esp), %eax /* mask into %eax */
107 bsfl %eax, %ecx /* get pin index */
110 btrl %ecx, apic_imen /* update apic_imen */
112 movl CNAME(int_to_apicintpin) + 8(%ecx), %edx
113 movl CNAME(int_to_apicintpin) + 12(%ecx), %ecx
116 movl %ecx, (%edx) /* write the target register index */
117 andl $~IOART_INTMASK, 16(%edx) /* clear mask bit */
120 IMASK_UNLOCK /* exit critical reg */
123 /******************************************************************************
128 * u_int io_apic_write(int apic, int select);
131 movl 4(%esp), %ecx /* APIC # */
133 movl (%eax,%ecx,4), %edx /* APIC base register address */
134 movl 8(%esp), %eax /* target register index */
135 movl %eax, (%edx) /* write the target register index */
136 movl 16(%edx), %eax /* read the APIC register data */
137 ret /* %eax = register value */
140 * void io_apic_write(int apic, int select, int value);
143 movl 4(%esp), %ecx /* APIC # */
145 movl (%eax,%ecx,4), %edx /* APIC base register address */
146 movl 8(%esp), %eax /* target register index */
147 movl %eax, (%edx) /* write the target register index */
148 movl 12(%esp), %eax /* target register value */
149 movl %eax, 16(%edx) /* write the APIC register data */
150 ret /* %eax = void */
153 * Send an EOI to the local APIC.