2 * Copyright (c) 2003,2004,2008 The DragonFly Project. All rights reserved.
4 * This code is derived from software contributed to The DragonFly Project
5 * by Matthew Dillon <dillon@backplane.com>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * Copyright (c) 1997, by Steve Passe, All rights reserved.
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. The name of the developer may NOT be used to endorse or promote products
42 * derived from this software without specific prior written permission.
44 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
45 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
46 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
47 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
48 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
49 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
50 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
51 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
52 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
53 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
56 * $FreeBSD: src/sys/i386/isa/apic_ipl.s,v 1.27.2.2 2000/09/30 02:49:35 ps Exp $
57 * $DragonFly: src/sys/platform/pc64/apic/apic_ipl.s,v 1.1 2008/08/29 17:07:12 dillon Exp $
64 #include <machine/asmacros.h>
65 #include <machine/segments.h>
66 #include <machine/lock.h>
67 #include <machine/psl.h>
68 #include <machine/trap.h>
80 * Interrupt mask for APIC interrupts, defaults to all hardware
81 * interrupts turned off.
84 .p2align 2 /* MUST be 32bit aligned */
94 * Functions to enable and disable a hardware interrupt. The
95 * IRQ number is passed as an argument.
98 APIC_IMASK_LOCK /* enter critical reg */
102 imull $AIMI_SIZE, %eax
103 addq $CNAME(int_to_apicintpin), %rax
104 movq AIMI_APIC_ADDRESS(%rax), %rdx
105 movl AIMI_REDIRINDEX(%rax), %ecx
108 movl %ecx, (%rdx) /* target register index */
109 orl $IOART_INTMASK,16(%rdx) /* set intmask in target apic reg */
111 APIC_IMASK_UNLOCK /* exit critical reg */
115 APIC_IMASK_LOCK /* enter critical reg */
118 btrl %eax, apic_imen /* update apic_imen */
119 imull $AIMI_SIZE, %eax
120 addq $CNAME(int_to_apicintpin), %rax
121 movq AIMI_APIC_ADDRESS(%rax), %rdx
122 movl AIMI_REDIRINDEX(%rax), %ecx
125 movl %ecx, (%rdx) /* write the target register index */
126 andl $~IOART_INTMASK, 16(%rdx) /* clear mask bit */
128 APIC_IMASK_UNLOCK /* exit critical reg */
131 /******************************************************************************
136 * u_int io_apic_read(int apic, int select);
139 movl %edi, %ecx /* APIC # */
141 movq (%rax,%rcx,8), %rdx /* APIC base register address */
142 movl %esi, (%rdx) /* write the target register index */
143 movl 16(%rdx), %eax /* read the APIC register data */
144 ret /* %eax = register value */
147 * void io_apic_write(int apic, int select, u_int value);
150 movl %edi, %ecx /* APIC # */
152 movq (%rax,%rcx,8), %r8 /* APIC base register address */
153 movl %esi, (%r8) /* write the target register index */
154 movl %edx, 16(%r8) /* write the APIC register data */
155 ret /* %eax = void */