2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
27 #include <linux/i2c.h>
29 #include <drm/drm_atomic_helper.h>
30 #include <drm/drm_crtc.h>
31 #include "intel_drv.h"
32 #include <drm/i915_drm.h>
36 #define SIL164_ADDR 0x38
37 #define CH7xxx_ADDR 0x76
38 #define TFP410_ADDR 0x38
39 #define NS2501_ADDR 0x38
41 static const struct intel_dvo_device intel_dvo_devices[] = {
43 .type = INTEL_DVO_CHIP_TMDS,
46 .slave_addr = SIL164_ADDR,
47 .dev_ops = &sil164_ops,
50 .type = INTEL_DVO_CHIP_TMDS,
53 .slave_addr = CH7xxx_ADDR,
54 .dev_ops = &ch7xxx_ops,
57 .type = INTEL_DVO_CHIP_TMDS,
60 .slave_addr = 0x75, /* For some ch7010 */
61 .dev_ops = &ch7xxx_ops,
64 .type = INTEL_DVO_CHIP_LVDS,
67 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
71 .type = INTEL_DVO_CHIP_TMDS,
74 .slave_addr = TFP410_ADDR,
75 .dev_ops = &tfp410_ops,
78 .type = INTEL_DVO_CHIP_LVDS,
82 .gpio = GMBUS_PORT_DPB,
83 .dev_ops = &ch7017_ops,
86 .type = INTEL_DVO_CHIP_TMDS,
89 .slave_addr = NS2501_ADDR,
90 .dev_ops = &ns2501_ops,
95 struct intel_encoder base;
97 struct intel_dvo_device dev;
99 struct drm_display_mode *panel_fixed_mode;
100 bool panel_wants_dither;
103 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
105 return container_of(encoder, struct intel_dvo, base);
108 static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
110 return enc_to_dvo(intel_attached_encoder(connector));
113 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
115 struct drm_device *dev = connector->base.dev;
116 struct drm_i915_private *dev_priv = dev->dev_private;
117 struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
120 tmp = I915_READ(intel_dvo->dev.dvo_reg);
122 if (!(tmp & DVO_ENABLE))
125 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
128 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
129 enum i915_pipe *pipe)
131 struct drm_device *dev = encoder->base.dev;
132 struct drm_i915_private *dev_priv = dev->dev_private;
133 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
136 tmp = I915_READ(intel_dvo->dev.dvo_reg);
138 if (!(tmp & DVO_ENABLE))
141 *pipe = PORT_TO_PIPE(tmp);
146 static void intel_dvo_get_config(struct intel_encoder *encoder,
147 struct intel_crtc_state *pipe_config)
149 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
150 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
153 tmp = I915_READ(intel_dvo->dev.dvo_reg);
154 if (tmp & DVO_HSYNC_ACTIVE_HIGH)
155 flags |= DRM_MODE_FLAG_PHSYNC;
157 flags |= DRM_MODE_FLAG_NHSYNC;
158 if (tmp & DVO_VSYNC_ACTIVE_HIGH)
159 flags |= DRM_MODE_FLAG_PVSYNC;
161 flags |= DRM_MODE_FLAG_NVSYNC;
163 pipe_config->base.adjusted_mode.flags |= flags;
165 pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
168 static void intel_disable_dvo(struct intel_encoder *encoder)
170 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
171 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
172 u32 dvo_reg = intel_dvo->dev.dvo_reg;
173 u32 temp = I915_READ(dvo_reg);
175 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
176 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
180 static void intel_enable_dvo(struct intel_encoder *encoder)
182 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
183 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
184 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
185 u32 dvo_reg = intel_dvo->dev.dvo_reg;
186 u32 temp = I915_READ(dvo_reg);
188 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
189 &crtc->config->base.mode,
190 &crtc->config->base.adjusted_mode);
192 I915_WRITE(dvo_reg, temp | DVO_ENABLE);
195 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
198 /* Special dpms function to support cloning between dvo/sdvo/crt. */
199 static void intel_dvo_dpms(struct drm_connector *connector, int mode)
201 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
202 struct drm_crtc *crtc;
203 struct intel_crtc_state *config;
205 /* dvo supports only 2 dpms states. */
206 if (mode != DRM_MODE_DPMS_ON)
207 mode = DRM_MODE_DPMS_OFF;
209 if (mode == connector->dpms)
212 connector->dpms = mode;
214 /* Only need to change hw state when actually enabled */
215 crtc = intel_dvo->base.base.crtc;
217 intel_dvo->base.connectors_active = false;
221 /* We call connector dpms manually below in case pipe dpms doesn't
222 * change due to cloning. */
223 if (mode == DRM_MODE_DPMS_ON) {
224 config = to_intel_crtc(crtc)->config;
226 intel_dvo->base.connectors_active = true;
228 intel_crtc_update_dpms(crtc);
230 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
232 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
234 intel_dvo->base.connectors_active = false;
236 intel_crtc_update_dpms(crtc);
239 intel_modeset_check_state(connector->dev);
242 static enum drm_mode_status
243 intel_dvo_mode_valid(struct drm_connector *connector,
244 struct drm_display_mode *mode)
246 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
248 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
249 return MODE_NO_DBLESCAN;
251 /* XXX: Validate clock range */
253 if (intel_dvo->panel_fixed_mode) {
254 if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
256 if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
260 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
263 static bool intel_dvo_compute_config(struct intel_encoder *encoder,
264 struct intel_crtc_state *pipe_config)
266 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
267 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
269 /* If we have timings from the BIOS for the panel, put them in
270 * to the adjusted mode. The CRTC will be set up for this mode,
271 * with the panel scaling set up to source from the H/VDisplay
272 * of the original mode.
274 if (intel_dvo->panel_fixed_mode != NULL) {
275 #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
287 drm_mode_set_crtcinfo(adjusted_mode, 0);
293 static void intel_dvo_pre_enable(struct intel_encoder *encoder)
295 struct drm_device *dev = encoder->base.dev;
296 struct drm_i915_private *dev_priv = dev->dev_private;
297 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
298 struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
299 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
300 int pipe = crtc->pipe;
302 u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
307 dvo_srcdim_reg = DVOA_SRCDIM;
310 dvo_srcdim_reg = DVOB_SRCDIM;
313 dvo_srcdim_reg = DVOC_SRCDIM;
317 /* Save the data order, since I don't know what it should be set to. */
318 dvo_val = I915_READ(dvo_reg) &
319 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
320 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
321 DVO_BLANK_ACTIVE_HIGH;
324 dvo_val |= DVO_PIPE_B_SELECT;
325 dvo_val |= DVO_PIPE_STALL;
326 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
327 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
328 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
329 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
331 /*I915_WRITE(DVOB_SRCDIM,
332 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
333 (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
334 I915_WRITE(dvo_srcdim_reg,
335 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
336 (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
337 /*I915_WRITE(DVOB, dvo_val);*/
338 I915_WRITE(dvo_reg, dvo_val);
342 * Detect the output connection on our DVO device.
346 static enum drm_connector_status
347 intel_dvo_detect(struct drm_connector *connector, bool force)
349 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
350 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
351 connector->base.id, connector->name);
352 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
355 static int intel_dvo_get_modes(struct drm_connector *connector)
357 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
358 struct drm_i915_private *dev_priv = connector->dev->dev_private;
360 /* We should probably have an i2c driver get_modes function for those
361 * devices which will have a fixed set of modes determined by the chip
362 * (TV-out, for example), but for now with just TMDS and LVDS,
363 * that's not the case.
365 intel_ddc_get_modes(connector,
366 intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC));
367 if (!list_empty(&connector->probed_modes))
370 if (intel_dvo->panel_fixed_mode != NULL) {
371 struct drm_display_mode *mode;
372 mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
374 drm_mode_probed_add(connector, mode);
382 static void intel_dvo_destroy(struct drm_connector *connector)
384 drm_connector_cleanup(connector);
388 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
389 .dpms = intel_dvo_dpms,
390 .detect = intel_dvo_detect,
391 .destroy = intel_dvo_destroy,
392 .fill_modes = drm_helper_probe_single_connector_modes,
393 .atomic_get_property = intel_connector_atomic_get_property,
394 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
397 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
398 .mode_valid = intel_dvo_mode_valid,
399 .get_modes = intel_dvo_get_modes,
400 .best_encoder = intel_best_encoder,
403 static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
405 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
407 if (intel_dvo->dev.dev_ops->destroy)
408 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
410 kfree(intel_dvo->panel_fixed_mode);
412 intel_encoder_destroy(encoder);
415 static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
416 .destroy = intel_dvo_enc_destroy,
420 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
422 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
423 * chip being on DVOB/C and having multiple pipes.
425 static struct drm_display_mode *
426 intel_dvo_get_current_mode(struct drm_connector *connector)
428 struct drm_device *dev = connector->dev;
429 struct drm_i915_private *dev_priv = dev->dev_private;
430 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
431 uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
432 struct drm_display_mode *mode = NULL;
434 /* If the DVO port is active, that'll be the LVDS, so we can pull out
435 * its timings to get how the BIOS set up the panel.
437 if (dvo_val & DVO_ENABLE) {
438 struct drm_crtc *crtc;
439 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
441 crtc = intel_get_crtc_for_pipe(dev, pipe);
443 mode = intel_crtc_mode_get(dev, crtc);
445 mode->type |= DRM_MODE_TYPE_PREFERRED;
446 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
447 mode->flags |= DRM_MODE_FLAG_PHSYNC;
448 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
449 mode->flags |= DRM_MODE_FLAG_PVSYNC;
457 void intel_dvo_init(struct drm_device *dev)
459 struct drm_i915_private *dev_priv = dev->dev_private;
460 struct intel_encoder *intel_encoder;
461 struct intel_dvo *intel_dvo;
462 struct intel_connector *intel_connector;
464 int encoder_type = DRM_MODE_ENCODER_NONE;
466 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
470 intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL);
471 if (!intel_connector) {
476 intel_encoder = &intel_dvo->base;
477 drm_encoder_init(dev, &intel_encoder->base,
478 &intel_dvo_enc_funcs, encoder_type);
480 intel_encoder->disable = intel_disable_dvo;
481 intel_encoder->enable = intel_enable_dvo;
482 intel_encoder->get_hw_state = intel_dvo_get_hw_state;
483 intel_encoder->get_config = intel_dvo_get_config;
484 intel_encoder->compute_config = intel_dvo_compute_config;
485 intel_encoder->pre_enable = intel_dvo_pre_enable;
486 intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
487 intel_connector->unregister = intel_connector_unregister;
489 /* Now, try to find a controller */
490 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
491 struct drm_connector *connector = &intel_connector->base;
492 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
497 /* Allow the I2C driver info to specify the GPIO to be used in
498 * special cases, but otherwise default to what's defined
501 if (intel_gmbus_is_port_valid(dvo->gpio))
503 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
504 gpio = GMBUS_PORT_SSC;
506 gpio = GMBUS_PORT_DPB;
508 /* Set up the I2C bus necessary for the chip we're probing.
509 * It appears that everything is on GPIOE except for panels
510 * on i830 laptops, which are on GPIOB (DVOA).
512 i2c = intel_gmbus_get_adapter(dev_priv, gpio);
514 intel_dvo->dev = *dvo;
516 /* GMBUS NAK handling seems to be unstable, hence let the
517 * transmitter detection run in bit banging mode for now.
519 intel_gmbus_force_bit(i2c, true);
521 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
523 intel_gmbus_force_bit(i2c, false);
528 intel_encoder->type = INTEL_OUTPUT_DVO;
529 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
531 case INTEL_DVO_CHIP_TMDS:
532 intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
533 (1 << INTEL_OUTPUT_DVO);
534 drm_connector_init(dev, connector,
535 &intel_dvo_connector_funcs,
536 DRM_MODE_CONNECTOR_DVII);
537 encoder_type = DRM_MODE_ENCODER_TMDS;
539 case INTEL_DVO_CHIP_LVDS:
540 intel_encoder->cloneable = 0;
541 drm_connector_init(dev, connector,
542 &intel_dvo_connector_funcs,
543 DRM_MODE_CONNECTOR_LVDS);
544 encoder_type = DRM_MODE_ENCODER_LVDS;
548 drm_connector_helper_add(connector,
549 &intel_dvo_connector_helper_funcs);
550 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
551 connector->interlace_allowed = false;
552 connector->doublescan_allowed = false;
554 intel_connector_attach_encoder(intel_connector, intel_encoder);
555 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
556 /* For our LVDS chipsets, we should hopefully be able
557 * to dig the fixed panel mode out of the BIOS data.
558 * However, it's in a different format from the BIOS
559 * data on chipsets with integrated LVDS (stored in AIM
560 * headers, likely), so for now, just get the current
561 * mode being output through DVO.
563 intel_dvo->panel_fixed_mode =
564 intel_dvo_get_current_mode(connector);
565 intel_dvo->panel_wants_dither = true;
568 drm_connector_register(connector);
572 drm_encoder_cleanup(&intel_encoder->base);
574 kfree(intel_connector);