2 * Copyright (c) 2014-2017 François Tigeot <ftigeot@wolfpond.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 #define PCI_ANY_ID (~0u)
32 #include <sys/param.h>
34 #include <sys/pciio.h>
36 #include <bus/pci/pcivar.h>
37 #include <bus/pci/pcireg.h>
39 #include <linux/types.h>
40 #include <linux/list.h>
41 #include <linux/compiler.h>
42 #include <linux/errno.h>
43 #include <linux/kobject.h>
44 #include <linux/atomic.h>
45 #include <linux/device.h>
48 #include <linux/pci_ids.h>
52 struct pci_device_id {
59 unsigned long driver_data;
63 struct pci_bus *bus; /* bus device is nailed to */
66 uint16_t vendor; /* vendor ID */
67 uint16_t device; /* device ID */
68 uint16_t subsystem_vendor;
69 uint16_t subsystem_device;
71 uint8_t revision; /* revision ID */
73 unsigned int irq; /* handle with care */
76 /* DragonFly-specific data */
78 struct resource *_irqr;
83 struct pci_dev *self; /* handle to pdev self */
84 struct device *dev; /* handle to dev */
86 unsigned char number; /* bus addr number */
92 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
94 #define PCI_DMA_BIDIRECTIONAL 0
96 /* extracted from radeon/si.c radeon/cik.c */
97 #define PCI_EXP_LNKCTL PCIER_LINKCTRL /* 16 */
98 #define PCI_EXP_LNKCTL2 48
99 #define PCI_EXP_LNKCTL_HAWD PCIEM_LNKCTL_HAWD /* 0x0200 */
100 #define PCI_EXP_DEVSTA PCIER_DEVSTS /* 10 */
101 #define PCI_EXP_DEVSTA_TRPND 0x0020
102 #define PCI_EXP_LNKCAP_CLKPM 0x00040000
105 pci_read_config_byte(struct pci_dev *pdev, int where, u8 *val)
107 *val = (u8)pci_read_config(pdev->dev.bsddev, where, 1);
112 pci_read_config_word(struct pci_dev *pdev, int where, u16 *val)
114 *val = (u16)pci_read_config(pdev->dev.bsddev, where, 2);
119 pci_read_config_dword(struct pci_dev *pdev, int where, u32 *val)
121 *val = (u32)pci_read_config(pdev->dev.bsddev, where, 4);
126 pci_write_config_byte(struct pci_dev *pdev, int where, u8 val)
128 pci_write_config(pdev->dev.bsddev, where, val, 1);
133 pci_write_config_word(struct pci_dev *pdev, int where, u16 val)
135 pci_write_config(pdev->dev.bsddev, where, val, 2);
140 pci_write_config_dword(struct pci_dev *pdev, int where, u32 val)
142 pci_write_config(pdev->dev.bsddev, where, val, 4);
146 /* extracted from drm/radeon/evergreen.c */
148 pcie_get_readrq(struct pci_dev *pdev)
153 err = pci_find_extcap(pdev->dev.bsddev, PCIY_EXPRESS, &cap);
155 cap += PCIER_DEVCTRL;
157 ctl = pci_read_config(pdev->dev.bsddev, cap, 2);
159 return 128 << ((ctl & PCIEM_DEVCTL_MAX_READRQ_MASK) >> 12);
162 /* valid rq sizes: 128, 256, 512, 1024, 2048, 4096 (^2N) */
164 pcie_set_readrq(struct pci_dev *pdev, int rq)
169 if (rq < 128 || rq > 4096 || !is_power_of_2(rq))
172 err = pci_find_extcap(pdev->dev.bsddev, PCIY_EXPRESS, &cap);
176 cap += PCIER_DEVCTRL;
178 ctl = pci_read_config(pdev->dev.bsddev, cap, 2);
179 ctl &= ~PCIEM_DEVCTL_MAX_READRQ_MASK;
180 ctl |= ((ffs(rq) - 8) << 12);
181 pci_write_config(pdev->dev.bsddev, cap, ctl, 2);
185 static inline struct pci_dev *
186 pci_dev_get(struct pci_dev *dev)
188 /* Linux increments a reference count here */
192 static inline struct pci_dev *
193 pci_dev_put(struct pci_dev *dev)
195 /* Linux decrements a reference count here */
201 pci_set_dma_mask(struct pci_dev *dev, u64 mask)
207 pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
212 typedef int pci_power_t;
222 static inline struct resource_list_entry*
223 _pci_get_rle(struct pci_dev *pdev, int bar)
225 struct pci_devinfo *dinfo;
226 device_t dev = pdev->dev.bsddev;
227 struct resource_list_entry *rle;
229 dinfo = device_get_ivars(dev);
231 /* Some child devices don't have registered resources, they
232 * are only present in the parent */
234 dev = device_get_parent(dev);
235 dinfo = device_get_ivars(dev);
239 rle = resource_list_find(&dinfo->resources, SYS_RES_MEMORY, PCIR_BAR(bar));
241 rle = resource_list_find(&dinfo->resources,
242 SYS_RES_IOPORT, PCIR_BAR(bar));
249 * Returns the first address (memory address or I/O port number)
250 * associated with one of the PCI I/O regions.The region is selected by
251 * the integer bar (the base address register), ranging from 0–5 (inclusive).
252 * The return value can be used by ioremap()
254 static inline phys_addr_t
255 pci_resource_start(struct pci_dev *pdev, int bar)
257 struct resource *res;
261 res = bus_alloc_resource_any(pdev->dev.bsddev, SYS_RES_MEMORY, &rid, RF_SHAREABLE);
263 kprintf("pci_resource_start(0x%p, 0x%x) failed\n", pdev, PCIR_BAR(bar));
267 return rman_get_start(res);
270 static inline phys_addr_t
271 pci_resource_len(struct pci_dev *pdev, int bar)
273 struct resource_list_entry *rle;
275 rle = _pci_get_rle(pdev, bar);
279 return rman_get_size(rle->res);
282 static inline void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
284 resource_size_t base, size;
286 base = pci_resource_start(dev, bar);
287 size = pci_resource_len(dev, bar);
292 if (maxlen && size > maxlen)
295 return ioremap(base, size);
299 pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 *val)
301 const struct pci_dev *pdev = container_of(&bus, struct pci_dev, bus);
303 *val = (u8)pci_read_config(pdev->dev.bsddev, where, 1);
308 pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 *val)
310 const struct pci_dev *pdev = container_of(&bus, struct pci_dev, bus);
312 *val = (u16)pci_read_config(pdev->dev.bsddev, where, 2);
317 pci_get_drvdata(struct pci_dev *pdev)
319 return pdev->pci_dev_data;
323 pci_set_drvdata(struct pci_dev *pdev, void *data)
325 pdev->pci_dev_data = data;
329 pci_register_driver(struct pci_driver *drv)
334 #endif /* LINUX_PCI_H */