1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* $FreeBSD: src/contrib/gcc/reload.c,v 1.4.2.1 2001/04/10 19:23:12 obrien Exp $ */
23 /* $DragonFly: src/contrib/gcc/Attic/reload.c,v 1.2 2003/06/17 04:24:01 dillon Exp $ */
26 /* This file contains subroutines used only from the file reload1.c.
27 It knows how to scan one insn for operands and values
28 that need to be copied into registers to make valid code.
29 It also finds other operands and values which are valid
30 but for which equivalent values in registers exist and
31 ought to be used instead.
33 Before processing the first insn of the function, call `init_reload'.
35 To scan an insn, call `find_reloads'. This does two things:
36 1. sets up tables describing which values must be reloaded
37 for this insn, and what kind of hard regs they must be reloaded into;
38 2. optionally record the locations where those values appear in
39 the data, so they can be replaced properly later.
40 This is done only if the second arg to `find_reloads' is nonzero.
42 The third arg to `find_reloads' specifies the number of levels
43 of indirect addressing supported by the machine. If it is zero,
44 indirect addressing is not valid. If it is one, (MEM (REG n))
45 is valid even if (REG n) did not get a hard register; if it is two,
46 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
47 hard register, and similarly for higher values.
49 Then you must choose the hard regs to reload those pseudo regs into,
50 and generate appropriate load insns before this insn and perhaps
51 also store insns after this insn. Set up the array `reload_reg_rtx'
52 to contain the REG rtx's for the registers you used. In some
53 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
54 for certain reloads. Then that tells you which register to use,
55 so you do not need to allocate one. But you still do need to add extra
56 instructions to copy the value into and out of that register.
58 Finally you must call `subst_reloads' to substitute the reload reg rtx's
59 into the locations already recorded.
63 find_reloads can alter the operands of the instruction it is called on.
65 1. Two operands of any sort may be interchanged, if they are in a
66 commutative instruction.
67 This happens only if find_reloads thinks the instruction will compile
70 2. Pseudo-registers that are equivalent to constants are replaced
71 with those constants if they are not in hard registers.
73 1 happens every time find_reloads is called.
74 2 happens only when REPLACE is 1, which is only when
75 actually doing the reloads, not when just counting them.
78 Using a reload register for several reloads in one insn:
80 When an insn has reloads, it is considered as having three parts:
81 the input reloads, the insn itself after reloading, and the output reloads.
82 Reloads of values used in memory addresses are often needed for only one part.
84 When this is so, reload_when_needed records which part needs the reload.
85 Two reloads for different parts of the insn can share the same reload
88 When a reload is used for addresses in multiple parts, or when it is
89 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
90 a register with any other reload. */
97 #include "insn-config.h"
98 #include "insn-codes.h"
102 #include "hard-reg-set.h"
109 #ifndef REGISTER_MOVE_COST
110 #define REGISTER_MOVE_COST(x, y) 2
113 #ifndef REGNO_MODE_OK_FOR_BASE_P
114 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
117 #ifndef REG_MODE_OK_FOR_BASE_P
118 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
121 /* The variables set up by `find_reloads' are:
123 n_reloads number of distinct reloads needed; max reload # + 1
124 tables indexed by reload number
125 reload_in rtx for value to reload from
126 reload_out rtx for where to store reload-reg afterward if nec
127 (often the same as reload_in)
128 reload_reg_class enum reg_class, saying what regs to reload into
129 reload_inmode enum machine_mode; mode this operand should have
130 when reloaded, on input.
131 reload_outmode enum machine_mode; mode this operand should have
132 when reloaded, on output.
133 reload_optional char, nonzero for an optional reload.
134 Optional reloads are ignored unless the
135 value is already sitting in a register.
136 reload_nongroup char, nonzero when a reload must use a register
137 not already allocated to a group.
138 reload_inc int, positive amount to increment or decrement by if
139 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
140 Ignored otherwise (don't assume it is zero).
141 reload_in_reg rtx. A reg for which reload_in is the equivalent.
142 If reload_in is a symbol_ref which came from
143 reg_equiv_constant, then this is the pseudo
144 which has that symbol_ref as equivalent.
145 reload_reg_rtx rtx. This is the register to reload into.
146 If it is zero when `find_reloads' returns,
147 you must find a suitable register in the class
148 specified by reload_reg_class, and store here
149 an rtx for that register with mode from
150 reload_inmode or reload_outmode.
151 reload_nocombine char, nonzero if this reload shouldn't be
152 combined with another reload.
153 reload_opnum int, operand number being reloaded. This is
154 used to group related reloads and need not always
155 be equal to the actual operand number in the insn,
156 though it current will be; for in-out operands, it
157 is one of the two operand numbers.
158 reload_when_needed enum, classifies reload as needed either for
159 addressing an input reload, addressing an output,
160 for addressing a non-reloaded mem ref,
161 or for unspecified purposes (i.e., more than one
163 reload_secondary_p int, 1 if this is a secondary register for one
165 reload_secondary_in_reload
166 reload_secondary_out_reload
167 int, gives the reload number of a secondary
168 reload, when needed; otherwise -1
169 reload_secondary_in_icode
170 reload_secondary_out_icode
171 enum insn_code, if a secondary reload is required,
172 gives the INSN_CODE that uses the secondary
173 reload as a scratch register, or CODE_FOR_nothing
174 if the secondary reload register is to be an
175 intermediate register. */
178 rtx reload_in[MAX_RELOADS];
179 rtx reload_out[MAX_RELOADS];
180 enum reg_class reload_reg_class[MAX_RELOADS];
181 enum machine_mode reload_inmode[MAX_RELOADS];
182 enum machine_mode reload_outmode[MAX_RELOADS];
183 rtx reload_reg_rtx[MAX_RELOADS];
184 char reload_optional[MAX_RELOADS];
185 char reload_nongroup[MAX_RELOADS];
186 int reload_inc[MAX_RELOADS];
187 rtx reload_in_reg[MAX_RELOADS];
188 rtx reload_out_reg[MAX_RELOADS];
189 char reload_nocombine[MAX_RELOADS];
190 int reload_opnum[MAX_RELOADS];
191 enum reload_type reload_when_needed[MAX_RELOADS];
192 int reload_secondary_p[MAX_RELOADS];
193 int reload_secondary_in_reload[MAX_RELOADS];
194 int reload_secondary_out_reload[MAX_RELOADS];
195 enum insn_code reload_secondary_in_icode[MAX_RELOADS];
196 enum insn_code reload_secondary_out_icode[MAX_RELOADS];
198 /* All the "earlyclobber" operands of the current insn
199 are recorded here. */
201 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
203 int reload_n_operands;
205 /* Replacing reloads.
207 If `replace_reloads' is nonzero, then as each reload is recorded
208 an entry is made for it in the table `replacements'.
209 Then later `subst_reloads' can look through that table and
210 perform all the replacements needed. */
212 /* Nonzero means record the places to replace. */
213 static int replace_reloads;
215 /* Each replacement is recorded with a structure like this. */
218 rtx *where; /* Location to store in */
219 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
220 a SUBREG; 0 otherwise. */
221 int what; /* which reload this is for */
222 enum machine_mode mode; /* mode it must have */
225 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
227 /* Number of replacements currently recorded. */
228 static int n_replacements;
230 /* Used to track what is modified by an operand. */
233 int reg_flag; /* Nonzero if referencing a register. */
234 int safe; /* Nonzero if this can't conflict with anything. */
235 rtx base; /* Base address for MEM. */
236 HOST_WIDE_INT start; /* Starting offset or register number. */
237 HOST_WIDE_INT end; /* Ending offset or register number. */
240 #ifdef SECONDARY_MEMORY_NEEDED
242 /* Save MEMs needed to copy from one class of registers to another. One MEM
243 is used per mode, but normally only one or two modes are ever used.
245 We keep two versions, before and after register elimination. The one
246 after register elimination is record separately for each operand. This
247 is done in case the address is not valid to be sure that we separately
250 static rtx secondary_memlocs[NUM_MACHINE_MODES];
251 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
254 /* The instruction we are doing reloads for;
255 so we can test whether a register dies in it. */
256 static rtx this_insn;
258 /* Nonzero if this instruction is a user-specified asm with operands. */
259 static int this_insn_is_asm;
261 /* If hard_regs_live_known is nonzero,
262 we can tell which hard regs are currently live,
263 at least enough to succeed in choosing dummy reloads. */
264 static int hard_regs_live_known;
266 /* Indexed by hard reg number,
267 element is nonnegative if hard reg has been spilled.
268 This vector is passed to `find_reloads' as an argument
269 and is not changed here. */
270 static short *static_reload_reg_p;
272 /* Set to 1 in subst_reg_equivs if it changes anything. */
273 static int subst_reg_equivs_changed;
275 /* On return from push_reload, holds the reload-number for the OUT
276 operand, which can be different for that from the input operand. */
277 static int output_reloadnum;
279 /* Compare two RTX's. */
280 #define MATCHES(x, y) \
281 (x == y || (x != 0 && (GET_CODE (x) == REG \
282 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
283 : rtx_equal_p (x, y) && ! side_effects_p (x))))
285 /* Indicates if two reloads purposes are for similar enough things that we
286 can merge their reloads. */
287 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
288 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
289 || ((when1) == (when2) && (op1) == (op2)) \
290 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
291 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
292 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
293 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
294 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
296 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
297 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
298 ((when1) != (when2) \
299 || ! ((op1) == (op2) \
300 || (when1) == RELOAD_FOR_INPUT \
301 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
302 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
304 /* If we are going to reload an address, compute the reload type to
306 #define ADDR_TYPE(type) \
307 ((type) == RELOAD_FOR_INPUT_ADDRESS \
308 ? RELOAD_FOR_INPADDR_ADDRESS \
309 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
310 ? RELOAD_FOR_OUTADDR_ADDRESS \
313 #ifdef HAVE_SECONDARY_RELOADS
314 static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class,
315 enum machine_mode, enum reload_type,
318 static enum reg_class find_valid_class PROTO((enum machine_mode, int));
319 static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
320 enum machine_mode, enum machine_mode,
321 int, int, int, enum reload_type));
322 static void push_replacement PROTO((rtx *, int, enum machine_mode));
323 static void combine_reloads PROTO((void));
324 static int find_reusable_reload PROTO((rtx *, rtx, enum reg_class,
325 enum reload_type, int, int));
326 static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
327 enum machine_mode, enum machine_mode,
328 enum reg_class, int, int));
329 static int hard_reg_set_here_p PROTO((int, int, rtx));
330 static struct decomposition decompose PROTO((rtx));
331 static int immune_p PROTO((rtx, rtx, struct decomposition));
332 static int alternative_allows_memconst PROTO((const char *, int));
333 static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int, rtx));
334 static rtx make_memloc PROTO((rtx, int));
335 static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
336 int, enum reload_type, int, rtx));
337 static rtx subst_reg_equivs PROTO((rtx, rtx));
338 static rtx subst_indexed_address PROTO((rtx));
339 static int find_reloads_address_1 PROTO((enum machine_mode, rtx, int, rtx *,
340 int, enum reload_type,int, rtx));
341 static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
342 enum machine_mode, int,
343 enum reload_type, int));
344 static rtx find_reloads_subreg_address PROTO((rtx, int, int, enum reload_type,
346 static int find_inc_amount PROTO((rtx, rtx));
347 static int loc_mentioned_in_p PROTO((rtx *, rtx));
349 #ifdef HAVE_SECONDARY_RELOADS
351 /* Determine if any secondary reloads are needed for loading (if IN_P is
352 non-zero) or storing (if IN_P is zero) X to or from a reload register of
353 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
354 are needed, push them.
356 Return the reload number of the secondary reload we made, or -1 if
357 we didn't need one. *PICODE is set to the insn_code to use if we do
358 need a secondary reload. */
361 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
367 enum reg_class reload_class;
368 enum machine_mode reload_mode;
369 enum reload_type type;
370 enum insn_code *picode;
372 enum reg_class class = NO_REGS;
373 enum machine_mode mode = reload_mode;
374 enum insn_code icode = CODE_FOR_nothing;
375 enum reg_class t_class = NO_REGS;
376 enum machine_mode t_mode = VOIDmode;
377 enum insn_code t_icode = CODE_FOR_nothing;
378 enum reload_type secondary_type;
379 int s_reload, t_reload = -1;
381 if (type == RELOAD_FOR_INPUT_ADDRESS
382 || type == RELOAD_FOR_OUTPUT_ADDRESS
383 || type == RELOAD_FOR_INPADDR_ADDRESS
384 || type == RELOAD_FOR_OUTADDR_ADDRESS)
385 secondary_type = type;
387 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
389 *picode = CODE_FOR_nothing;
391 /* If X is a paradoxical SUBREG, use the inner value to determine both the
392 mode and object being reloaded. */
393 if (GET_CODE (x) == SUBREG
394 && (GET_MODE_SIZE (GET_MODE (x))
395 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
398 reload_mode = GET_MODE (x);
401 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
402 is still a pseudo-register by now, it *must* have an equivalent MEM
403 but we don't want to assume that), use that equivalent when seeing if
404 a secondary reload is needed since whether or not a reload is needed
405 might be sensitive to the form of the MEM. */
407 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
408 && reg_equiv_mem[REGNO (x)] != 0)
409 x = reg_equiv_mem[REGNO (x)];
411 #ifdef SECONDARY_INPUT_RELOAD_CLASS
413 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
416 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
418 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
421 /* If we don't need any secondary registers, done. */
422 if (class == NO_REGS)
425 /* Get a possible insn to use. If the predicate doesn't accept X, don't
428 icode = (in_p ? reload_in_optab[(int) reload_mode]
429 : reload_out_optab[(int) reload_mode]);
431 if (icode != CODE_FOR_nothing
432 && insn_operand_predicate[(int) icode][in_p]
433 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
434 icode = CODE_FOR_nothing;
436 /* If we will be using an insn, see if it can directly handle the reload
437 register we will be using. If it can, the secondary reload is for a
438 scratch register. If it can't, we will use the secondary reload for
439 an intermediate register and require a tertiary reload for the scratch
442 if (icode != CODE_FOR_nothing)
444 /* If IN_P is non-zero, the reload register will be the output in
445 operand 0. If IN_P is zero, the reload register will be the input
446 in operand 1. Outputs should have an initial "=", which we must
449 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
450 enum reg_class insn_class
451 = (insn_letter == 'r' ? GENERAL_REGS
452 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter));
454 if (insn_class == NO_REGS
455 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
456 /* The scratch register's constraint must start with "=&". */
457 || insn_operand_constraint[(int) icode][2][0] != '='
458 || insn_operand_constraint[(int) icode][2][1] != '&')
461 if (reg_class_subset_p (reload_class, insn_class))
462 mode = insn_operand_mode[(int) icode][2];
465 char t_letter = insn_operand_constraint[(int) icode][2][2];
467 t_mode = insn_operand_mode[(int) icode][2];
468 t_class = (t_letter == 'r' ? GENERAL_REGS
469 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter));
471 icode = CODE_FOR_nothing;
475 /* This case isn't valid, so fail. Reload is allowed to use the same
476 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
477 in the case of a secondary register, we actually need two different
478 registers for correct code. We fail here to prevent the possibility of
479 silently generating incorrect code later.
481 The convention is that secondary input reloads are valid only if the
482 secondary_class is different from class. If you have such a case, you
483 can not use secondary reloads, you must work around the problem some
486 Allow this when MODE is not reload_mode and assume that the generated
487 code handles this case (it does on the Alpha, which is the only place
488 this currently happens). */
490 if (in_p && class == reload_class && mode == reload_mode)
493 /* If we need a tertiary reload, see if we have one we can reuse or else
496 if (t_class != NO_REGS)
498 for (t_reload = 0; t_reload < n_reloads; t_reload++)
499 if (reload_secondary_p[t_reload]
500 && (reg_class_subset_p (t_class, reload_reg_class[t_reload])
501 || reg_class_subset_p (reload_reg_class[t_reload], t_class))
502 && ((in_p && reload_inmode[t_reload] == t_mode)
503 || (! in_p && reload_outmode[t_reload] == t_mode))
504 && ((in_p && (reload_secondary_in_icode[t_reload]
505 == CODE_FOR_nothing))
506 || (! in_p &&(reload_secondary_out_icode[t_reload]
507 == CODE_FOR_nothing)))
508 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
509 && MERGABLE_RELOADS (secondary_type,
510 reload_when_needed[t_reload],
511 opnum, reload_opnum[t_reload]))
514 reload_inmode[t_reload] = t_mode;
516 reload_outmode[t_reload] = t_mode;
518 if (reg_class_subset_p (t_class, reload_reg_class[t_reload]))
519 reload_reg_class[t_reload] = t_class;
521 reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum);
522 reload_optional[t_reload] &= optional;
523 reload_secondary_p[t_reload] = 1;
524 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload],
525 opnum, reload_opnum[t_reload]))
526 reload_when_needed[t_reload] = RELOAD_OTHER;
529 if (t_reload == n_reloads)
531 /* We need to make a new tertiary reload for this register class. */
532 reload_in[t_reload] = reload_out[t_reload] = 0;
533 reload_reg_class[t_reload] = t_class;
534 reload_inmode[t_reload] = in_p ? t_mode : VOIDmode;
535 reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode;
536 reload_reg_rtx[t_reload] = 0;
537 reload_optional[t_reload] = optional;
538 reload_nongroup[t_reload] = 0;
539 reload_inc[t_reload] = 0;
540 /* Maybe we could combine these, but it seems too tricky. */
541 reload_nocombine[t_reload] = 1;
542 reload_in_reg[t_reload] = 0;
543 reload_out_reg[t_reload] = 0;
544 reload_opnum[t_reload] = opnum;
545 reload_when_needed[t_reload] = secondary_type;
546 reload_secondary_in_reload[t_reload] = -1;
547 reload_secondary_out_reload[t_reload] = -1;
548 reload_secondary_in_icode[t_reload] = CODE_FOR_nothing;
549 reload_secondary_out_icode[t_reload] = CODE_FOR_nothing;
550 reload_secondary_p[t_reload] = 1;
556 /* See if we can reuse an existing secondary reload. */
557 for (s_reload = 0; s_reload < n_reloads; s_reload++)
558 if (reload_secondary_p[s_reload]
559 && (reg_class_subset_p (class, reload_reg_class[s_reload])
560 || reg_class_subset_p (reload_reg_class[s_reload], class))
561 && ((in_p && reload_inmode[s_reload] == mode)
562 || (! in_p && reload_outmode[s_reload] == mode))
563 && ((in_p && reload_secondary_in_reload[s_reload] == t_reload)
564 || (! in_p && reload_secondary_out_reload[s_reload] == t_reload))
565 && ((in_p && reload_secondary_in_icode[s_reload] == t_icode)
566 || (! in_p && reload_secondary_out_icode[s_reload] == t_icode))
567 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
568 && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload],
569 opnum, reload_opnum[s_reload]))
572 reload_inmode[s_reload] = mode;
574 reload_outmode[s_reload] = mode;
576 if (reg_class_subset_p (class, reload_reg_class[s_reload]))
577 reload_reg_class[s_reload] = class;
579 reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum);
580 reload_optional[s_reload] &= optional;
581 reload_secondary_p[s_reload] = 1;
582 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload],
583 opnum, reload_opnum[s_reload]))
584 reload_when_needed[s_reload] = RELOAD_OTHER;
587 if (s_reload == n_reloads)
589 #ifdef SECONDARY_MEMORY_NEEDED
590 /* If we need a memory location to copy between the two reload regs,
591 set it up now. Note that we do the input case before making
592 the reload and the output case after. This is due to the
593 way reloads are output. */
595 if (in_p && icode == CODE_FOR_nothing
596 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
598 get_secondary_mem (x, reload_mode, opnum, type);
600 /* We may have just added new reloads. Make sure we add
601 the new reload at the end. */
602 s_reload = n_reloads;
606 /* We need to make a new secondary reload for this register class. */
607 reload_in[s_reload] = reload_out[s_reload] = 0;
608 reload_reg_class[s_reload] = class;
610 reload_inmode[s_reload] = in_p ? mode : VOIDmode;
611 reload_outmode[s_reload] = ! in_p ? mode : VOIDmode;
612 reload_reg_rtx[s_reload] = 0;
613 reload_optional[s_reload] = optional;
614 reload_nongroup[s_reload] = 0;
615 reload_inc[s_reload] = 0;
616 /* Maybe we could combine these, but it seems too tricky. */
617 reload_nocombine[s_reload] = 1;
618 reload_in_reg[s_reload] = 0;
619 reload_out_reg[s_reload] = 0;
620 reload_opnum[s_reload] = opnum;
621 reload_when_needed[s_reload] = secondary_type;
622 reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1;
623 reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1;
624 reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing;
625 reload_secondary_out_icode[s_reload]
626 = ! in_p ? t_icode : CODE_FOR_nothing;
627 reload_secondary_p[s_reload] = 1;
631 #ifdef SECONDARY_MEMORY_NEEDED
632 if (! in_p && icode == CODE_FOR_nothing
633 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
634 get_secondary_mem (x, mode, opnum, type);
641 #endif /* HAVE_SECONDARY_RELOADS */
643 #ifdef SECONDARY_MEMORY_NEEDED
645 /* Return a memory location that will be used to copy X in mode MODE.
646 If we haven't already made a location for this mode in this insn,
647 call find_reloads_address on the location being returned. */
650 get_secondary_mem (x, mode, opnum, type)
652 enum machine_mode mode;
654 enum reload_type type;
659 /* By default, if MODE is narrower than a word, widen it to a word.
660 This is required because most machines that require these memory
661 locations do not support short load and stores from all registers
662 (e.g., FP registers). */
664 #ifdef SECONDARY_MEMORY_NEEDED_MODE
665 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
667 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
668 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
671 /* If we already have made a MEM for this operand in MODE, return it. */
672 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
673 return secondary_memlocs_elim[(int) mode][opnum];
675 /* If this is the first time we've tried to get a MEM for this mode,
676 allocate a new one. `something_changed' in reload will get set
677 by noticing that the frame size has changed. */
679 if (secondary_memlocs[(int) mode] == 0)
681 #ifdef SECONDARY_MEMORY_NEEDED_RTX
682 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
684 secondary_memlocs[(int) mode]
685 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
689 /* Get a version of the address doing any eliminations needed. If that
690 didn't give us a new MEM, make a new one if it isn't valid. */
692 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
693 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
695 if (! mem_valid && loc == secondary_memlocs[(int) mode])
696 loc = copy_rtx (loc);
698 /* The only time the call below will do anything is if the stack
699 offset is too large. In that case IND_LEVELS doesn't matter, so we
700 can just pass a zero. Adjust the type to be the address of the
701 corresponding object. If the address was valid, save the eliminated
702 address. If it wasn't valid, we need to make a reload each time, so
707 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
708 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
711 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
715 secondary_memlocs_elim[(int) mode][opnum] = loc;
719 /* Clear any secondary memory locations we've made. */
722 clear_secondary_mem ()
724 bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);
726 #endif /* SECONDARY_MEMORY_NEEDED */
728 /* Find the largest class for which every register number plus N is valid in
729 M1 (if in range). Abort if no such class exists. */
731 static enum reg_class
732 find_valid_class (m1, n)
733 enum machine_mode m1;
738 enum reg_class best_class;
741 for (class = 1; class < N_REG_CLASSES; class++)
744 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
745 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
746 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
747 && ! HARD_REGNO_MODE_OK (regno + n, m1))
750 if (! bad && reg_class_size[class] > best_size)
751 best_class = class, best_size = reg_class_size[class];
760 /* Return the number of a previously made reload that can be combined with
761 a new one, or n_reloads if none of the existing reloads can be used.
762 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
763 push_reload, they determine the kind of the new reload that we try to
764 combine. P_IN points to the corresponding value of IN, which can be
765 modified by this function.
766 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
768 find_reusable_reload (p_in, out, class, type, opnum, dont_share)
770 enum reg_class class;
771 enum reload_type type;
772 int opnum, dont_share;
776 /* We can't merge two reloads if the output of either one is
779 if (earlyclobber_operand_p (out))
782 /* We can use an existing reload if the class is right
783 and at least one of IN and OUT is a match
784 and the other is at worst neutral.
785 (A zero compared against anything is neutral.)
787 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
788 for the same thing since that can cause us to need more reload registers
789 than we otherwise would. */
791 for (i = 0; i < n_reloads; i++)
792 if ((reg_class_subset_p (class, reload_reg_class[i])
793 || reg_class_subset_p (reload_reg_class[i], class))
794 /* If the existing reload has a register, it must fit our class. */
795 && (reload_reg_rtx[i] == 0
796 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
797 true_regnum (reload_reg_rtx[i])))
798 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
799 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
801 (out != 0 && MATCHES (reload_out[i], out)
802 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
803 && (reload_out[i] == 0 || ! earlyclobber_operand_p (reload_out[i]))
804 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
805 && MERGABLE_RELOADS (type, reload_when_needed[i],
806 opnum, reload_opnum[i]))
809 /* Reloading a plain reg for input can match a reload to postincrement
810 that reg, since the postincrement's value is the right value.
811 Likewise, it can match a preincrement reload, since we regard
812 the preincrementation as happening before any ref in this insn
814 for (i = 0; i < n_reloads; i++)
815 if ((reg_class_subset_p (class, reload_reg_class[i])
816 || reg_class_subset_p (reload_reg_class[i], class))
817 /* If the existing reload has a register, it must fit our
819 && (reload_reg_rtx[i] == 0
820 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
821 true_regnum (reload_reg_rtx[i])))
822 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
823 && ((GET_CODE (in) == REG
824 && (GET_CODE (reload_in[i]) == POST_INC
825 || GET_CODE (reload_in[i]) == POST_DEC
826 || GET_CODE (reload_in[i]) == PRE_INC
827 || GET_CODE (reload_in[i]) == PRE_DEC)
828 && MATCHES (XEXP (reload_in[i], 0), in))
830 (GET_CODE (reload_in[i]) == REG
831 && (GET_CODE (in) == POST_INC
832 || GET_CODE (in) == POST_DEC
833 || GET_CODE (in) == PRE_INC
834 || GET_CODE (in) == PRE_DEC)
835 && MATCHES (XEXP (in, 0), reload_in[i])))
836 && (reload_out[i] == 0 || ! earlyclobber_operand_p (reload_out[i]))
837 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
838 && MERGABLE_RELOADS (type, reload_when_needed[i],
839 opnum, reload_opnum[i]))
841 /* Make sure reload_in ultimately has the increment,
842 not the plain register. */
843 if (GET_CODE (in) == REG)
844 *p_in = reload_in[i];
850 /* Record one reload that needs to be performed.
851 IN is an rtx saying where the data are to be found before this instruction.
852 OUT says where they must be stored after the instruction.
853 (IN is zero for data not read, and OUT is zero for data not written.)
854 INLOC and OUTLOC point to the places in the instructions where
855 IN and OUT were found.
856 If IN and OUT are both non-zero, it means the same register must be used
857 to reload both IN and OUT.
859 CLASS is a register class required for the reloaded data.
860 INMODE is the machine mode that the instruction requires
861 for the reg that replaces IN and OUTMODE is likewise for OUT.
863 If IN is zero, then OUT's location and mode should be passed as
866 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
868 OPTIONAL nonzero means this reload does not need to be performed:
869 it can be discarded if that is more convenient.
871 OPNUM and TYPE say what the purpose of this reload is.
873 The return value is the reload-number for this reload.
875 If both IN and OUT are nonzero, in some rare cases we might
876 want to make two separate reloads. (Actually we never do this now.)
877 Therefore, the reload-number for OUT is stored in
878 output_reloadnum when we return; the return value applies to IN.
879 Usually (presently always), when IN and OUT are nonzero,
880 the two reload-numbers are equal, but the caller should be careful to
884 push_reload (in, out, inloc, outloc, class,
885 inmode, outmode, strict_low, optional, opnum, type)
888 enum reg_class class;
889 enum machine_mode inmode, outmode;
893 enum reload_type type;
897 int dont_remove_subreg = 0;
898 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
899 int secondary_in_reload = -1, secondary_out_reload = -1;
900 enum insn_code secondary_in_icode = CODE_FOR_nothing;
901 enum insn_code secondary_out_icode = CODE_FOR_nothing;
903 /* INMODE and/or OUTMODE could be VOIDmode if no mode
904 has been specified for the operand. In that case,
905 use the operand's mode as the mode to reload. */
906 if (inmode == VOIDmode && in != 0)
907 inmode = GET_MODE (in);
908 if (outmode == VOIDmode && out != 0)
909 outmode = GET_MODE (out);
911 /* If IN is a pseudo register everywhere-equivalent to a constant, and
912 it is not in a hard register, reload straight from the constant,
913 since we want to get rid of such pseudo registers.
914 Often this is done earlier, but not always in find_reloads_address. */
915 if (in != 0 && GET_CODE (in) == REG)
917 register int regno = REGNO (in);
919 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
920 && reg_equiv_constant[regno] != 0)
921 in = reg_equiv_constant[regno];
924 /* Likewise for OUT. Of course, OUT will never be equivalent to
925 an actual constant, but it might be equivalent to a memory location
926 (in the case of a parameter). */
927 if (out != 0 && GET_CODE (out) == REG)
929 register int regno = REGNO (out);
931 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
932 && reg_equiv_constant[regno] != 0)
933 out = reg_equiv_constant[regno];
936 /* If we have a read-write operand with an address side-effect,
937 change either IN or OUT so the side-effect happens only once. */
938 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
940 if (GET_CODE (XEXP (in, 0)) == POST_INC
941 || GET_CODE (XEXP (in, 0)) == POST_DEC)
942 in = gen_rtx_MEM (GET_MODE (in), XEXP (XEXP (in, 0), 0));
943 if (GET_CODE (XEXP (in, 0)) == PRE_INC
944 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
945 out = gen_rtx_MEM (GET_MODE (out), XEXP (XEXP (out, 0), 0));
948 /* If we are reloading a (SUBREG constant ...), really reload just the
949 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
950 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
951 a pseudo and hence will become a MEM) with M1 wider than M2 and the
952 register is a pseudo, also reload the inside expression.
953 For machines that extend byte loads, do this for any SUBREG of a pseudo
954 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
955 M2 is an integral mode that gets extended when loaded.
956 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
957 either M1 is not valid for R or M2 is wider than a word but we only
958 need one word to store an M2-sized quantity in R.
959 (However, if OUT is nonzero, we need to reload the reg *and*
960 the subreg, so do nothing here, and let following statement handle it.)
962 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
963 we can't handle it here because CONST_INT does not indicate a mode.
965 Similarly, we must reload the inside expression if we have a
966 STRICT_LOW_PART (presumably, in == out in the cas).
968 Also reload the inner expression if it does not require a secondary
969 reload but the SUBREG does.
971 Finally, reload the inner expression if it is a register that is in
972 the class whose registers cannot be referenced in a different size
973 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
974 cannot reload just the inside since we might end up with the wrong
975 register class. But if it is inside a STRICT_LOW_PART, we have
976 no choice, so we hope we do get the right register class there. */
978 if (in != 0 && GET_CODE (in) == SUBREG
979 && (SUBREG_WORD (in) == 0 || strict_low)
980 #ifdef CLASS_CANNOT_CHANGE_SIZE
981 && class != CLASS_CANNOT_CHANGE_SIZE
983 && (CONSTANT_P (SUBREG_REG (in))
984 || GET_CODE (SUBREG_REG (in)) == PLUS
986 || (((GET_CODE (SUBREG_REG (in)) == REG
987 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
988 || GET_CODE (SUBREG_REG (in)) == MEM)
989 && ((GET_MODE_SIZE (inmode)
990 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
991 #ifdef LOAD_EXTEND_OP
992 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
993 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
995 && (GET_MODE_SIZE (inmode)
996 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
997 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
998 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
1000 #ifdef WORD_REGISTER_OPERATIONS
1001 || ((GET_MODE_SIZE (inmode)
1002 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1003 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1004 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1008 || (GET_CODE (SUBREG_REG (in)) == REG
1009 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1010 /* The case where out is nonzero
1011 is handled differently in the following statement. */
1012 && (out == 0 || SUBREG_WORD (in) == 0)
1013 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1014 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1016 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1018 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1019 GET_MODE (SUBREG_REG (in)))))
1020 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
1021 + SUBREG_WORD (in)),
1023 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1024 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
1025 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1026 GET_MODE (SUBREG_REG (in)),
1030 #ifdef CLASS_CANNOT_CHANGE_SIZE
1031 || (GET_CODE (SUBREG_REG (in)) == REG
1032 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1033 && (TEST_HARD_REG_BIT
1034 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
1035 REGNO (SUBREG_REG (in))))
1036 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1037 != GET_MODE_SIZE (inmode)))
1041 in_subreg_loc = inloc;
1042 inloc = &SUBREG_REG (in);
1044 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1045 if (GET_CODE (in) == MEM)
1046 /* This is supposed to happen only for paradoxical subregs made by
1047 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1048 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
1051 inmode = GET_MODE (in);
1054 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1055 either M1 is not valid for R or M2 is wider than a word but we only
1056 need one word to store an M2-sized quantity in R.
1058 However, we must reload the inner reg *as well as* the subreg in
1061 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1062 code above. This can happen if SUBREG_WORD != 0. */
1064 if (in != 0 && GET_CODE (in) == SUBREG
1065 && (CONSTANT_P (SUBREG_REG (in))
1066 || (GET_CODE (SUBREG_REG (in)) == REG
1067 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1068 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in))
1071 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1072 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1074 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1076 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1077 GET_MODE (SUBREG_REG (in)))))))))
1079 /* This relies on the fact that emit_reload_insns outputs the
1080 instructions for input reloads of type RELOAD_OTHER in the same
1081 order as the reloads. Thus if the outer reload is also of type
1082 RELOAD_OTHER, we are guaranteed that this inner reload will be
1083 output before the outer reload. */
1084 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
1085 find_valid_class (inmode, SUBREG_WORD (in)),
1086 VOIDmode, VOIDmode, 0, 0, opnum, type);
1087 dont_remove_subreg = 1;
1090 /* Similarly for paradoxical and problematical SUBREGs on the output.
1091 Note that there is no reason we need worry about the previous value
1092 of SUBREG_REG (out); even if wider than out,
1093 storing in a subreg is entitled to clobber it all
1094 (except in the case of STRICT_LOW_PART,
1095 and in that case the constraint should label it input-output.) */
1096 if (out != 0 && GET_CODE (out) == SUBREG
1097 && (SUBREG_WORD (out) == 0 || strict_low)
1098 #ifdef CLASS_CANNOT_CHANGE_SIZE
1099 && class != CLASS_CANNOT_CHANGE_SIZE
1101 && (CONSTANT_P (SUBREG_REG (out))
1103 || (((GET_CODE (SUBREG_REG (out)) == REG
1104 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1105 || GET_CODE (SUBREG_REG (out)) == MEM)
1106 && ((GET_MODE_SIZE (outmode)
1107 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1108 #ifdef WORD_REGISTER_OPERATIONS
1109 || ((GET_MODE_SIZE (outmode)
1110 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1111 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1112 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1116 || (GET_CODE (SUBREG_REG (out)) == REG
1117 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1118 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1119 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1121 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1123 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1124 GET_MODE (SUBREG_REG (out)))))
1125 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
1126 + SUBREG_WORD (out)),
1128 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1129 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1130 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1131 GET_MODE (SUBREG_REG (out)),
1135 #ifdef CLASS_CANNOT_CHANGE_SIZE
1136 || (GET_CODE (SUBREG_REG (out)) == REG
1137 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1138 && (TEST_HARD_REG_BIT
1139 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
1140 REGNO (SUBREG_REG (out))))
1141 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1142 != GET_MODE_SIZE (outmode)))
1146 out_subreg_loc = outloc;
1147 outloc = &SUBREG_REG (out);
1149 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1150 if (GET_CODE (out) == MEM
1151 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1154 outmode = GET_MODE (out);
1157 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1158 either M1 is not valid for R or M2 is wider than a word but we only
1159 need one word to store an M2-sized quantity in R.
1161 However, we must reload the inner reg *as well as* the subreg in
1162 that case. In this case, the inner reg is an in-out reload. */
1164 if (out != 0 && GET_CODE (out) == SUBREG
1165 && GET_CODE (SUBREG_REG (out)) == REG
1166 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1167 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)) + SUBREG_WORD (out),
1169 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1170 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1172 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1174 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1175 GET_MODE (SUBREG_REG (out)))))))
1177 /* This relies on the fact that emit_reload_insns outputs the
1178 instructions for output reloads of type RELOAD_OTHER in reverse
1179 order of the reloads. Thus if the outer reload is also of type
1180 RELOAD_OTHER, we are guaranteed that this inner reload will be
1181 output after the outer reload. */
1182 dont_remove_subreg = 1;
1183 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1185 find_valid_class (outmode, SUBREG_WORD (out)),
1186 VOIDmode, VOIDmode, 0, 0,
1187 opnum, RELOAD_OTHER);
1190 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1191 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1192 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1193 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1196 /* If IN is a SUBREG of a hard register, make a new REG. This
1197 simplifies some of the cases below. */
1199 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1200 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1201 && ! dont_remove_subreg)
1202 in = gen_rtx_REG (GET_MODE (in),
1203 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
1205 /* Similarly for OUT. */
1206 if (out != 0 && GET_CODE (out) == SUBREG
1207 && GET_CODE (SUBREG_REG (out)) == REG
1208 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1209 && ! dont_remove_subreg)
1210 out = gen_rtx_REG (GET_MODE (out),
1211 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
1213 /* Narrow down the class of register wanted if that is
1214 desirable on this machine for efficiency. */
1216 class = PREFERRED_RELOAD_CLASS (in, class);
1218 /* Output reloads may need analogous treatment, different in detail. */
1219 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1221 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1224 /* Make sure we use a class that can handle the actual pseudo
1225 inside any subreg. For example, on the 386, QImode regs
1226 can appear within SImode subregs. Although GENERAL_REGS
1227 can handle SImode, QImode needs a smaller class. */
1228 #ifdef LIMIT_RELOAD_CLASS
1230 class = LIMIT_RELOAD_CLASS (inmode, class);
1231 else if (in != 0 && GET_CODE (in) == SUBREG)
1232 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1235 class = LIMIT_RELOAD_CLASS (outmode, class);
1236 if (out != 0 && GET_CODE (out) == SUBREG)
1237 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1240 /* Verify that this class is at least possible for the mode that
1242 if (this_insn_is_asm)
1244 enum machine_mode mode;
1245 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1249 if (mode == VOIDmode)
1251 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1256 outmode = word_mode;
1258 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1259 if (HARD_REGNO_MODE_OK (i, mode)
1260 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1262 int nregs = HARD_REGNO_NREGS (i, mode);
1265 for (j = 1; j < nregs; j++)
1266 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1271 if (i == FIRST_PSEUDO_REGISTER)
1273 error_for_asm (this_insn, "impossible register constraint in `asm'");
1278 /* Optional output reloads are always OK even if we have no register class,
1279 since the function of these reloads is only to have spill_reg_store etc.
1280 set, so that the storing insn can be deleted later. */
1281 if (class == NO_REGS
1282 && (optional == 0 || type != RELOAD_FOR_OUTPUT))
1285 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1289 /* See if we need a secondary reload register to move between CLASS
1290 and IN or CLASS and OUT. Get the icode and push any required reloads
1291 needed for each of them if so. */
1293 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1296 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1297 &secondary_in_icode);
1300 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1301 if (out != 0 && GET_CODE (out) != SCRATCH)
1302 secondary_out_reload
1303 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1304 type, &secondary_out_icode);
1307 /* We found no existing reload suitable for re-use.
1308 So add an additional reload. */
1310 #ifdef SECONDARY_MEMORY_NEEDED
1311 /* If a memory location is needed for the copy, make one. */
1312 if (in != 0 && GET_CODE (in) == REG
1313 && REGNO (in) < FIRST_PSEUDO_REGISTER
1314 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1316 get_secondary_mem (in, inmode, opnum, type);
1321 reload_out[i] = out;
1322 reload_reg_class[i] = class;
1323 reload_inmode[i] = inmode;
1324 reload_outmode[i] = outmode;
1325 reload_reg_rtx[i] = 0;
1326 reload_optional[i] = optional;
1327 reload_nongroup[i] = 0;
1329 reload_nocombine[i] = 0;
1330 reload_in_reg[i] = inloc ? *inloc : 0;
1331 reload_out_reg[i] = outloc ? *outloc : 0;
1332 reload_opnum[i] = opnum;
1333 reload_when_needed[i] = type;
1334 reload_secondary_in_reload[i] = secondary_in_reload;
1335 reload_secondary_out_reload[i] = secondary_out_reload;
1336 reload_secondary_in_icode[i] = secondary_in_icode;
1337 reload_secondary_out_icode[i] = secondary_out_icode;
1338 reload_secondary_p[i] = 0;
1342 #ifdef SECONDARY_MEMORY_NEEDED
1343 if (out != 0 && GET_CODE (out) == REG
1344 && REGNO (out) < FIRST_PSEUDO_REGISTER
1345 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1347 get_secondary_mem (out, outmode, opnum, type);
1352 /* We are reusing an existing reload,
1353 but we may have additional information for it.
1354 For example, we may now have both IN and OUT
1355 while the old one may have just one of them. */
1357 /* The modes can be different. If they are, we want to reload in
1358 the larger mode, so that the value is valid for both modes. */
1359 if (inmode != VOIDmode
1360 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (reload_inmode[i]))
1361 reload_inmode[i] = inmode;
1362 if (outmode != VOIDmode
1363 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (reload_outmode[i]))
1364 reload_outmode[i] = outmode;
1367 rtx in_reg = inloc ? *inloc : 0;
1368 /* If we merge reloads for two distinct rtl expressions that
1369 are identical in content, there might be duplicate address
1370 reloads. Remove the extra set now, so that if we later find
1371 that we can inherit this reload, we can get rid of the
1372 address reloads altogether.
1374 Do not do this if both reloads are optional since the result
1375 would be an optional reload which could potentially leave
1376 unresolved address replacements.
1378 It is not sufficient to call transfer_replacements since
1379 choose_reload_regs will remove the replacements for address
1380 reloads of inherited reloads which results in the same
1382 if (reload_in[i] != in && rtx_equal_p (in, reload_in[i])
1383 && ! (reload_optional[i] && optional))
1385 /* We must keep the address reload with the lower operand
1387 if (opnum > reload_opnum[i])
1389 remove_address_replacements (in);
1391 in_reg = reload_in_reg[i];
1394 remove_address_replacements (reload_in[i]);
1397 reload_in_reg[i] = in_reg;
1401 reload_out[i] = out;
1402 reload_out_reg[i] = outloc ? *outloc : 0;
1404 if (reg_class_subset_p (class, reload_reg_class[i]))
1405 reload_reg_class[i] = class;
1406 reload_optional[i] &= optional;
1407 if (MERGE_TO_OTHER (type, reload_when_needed[i],
1408 opnum, reload_opnum[i]))
1409 reload_when_needed[i] = RELOAD_OTHER;
1410 reload_opnum[i] = MIN (reload_opnum[i], opnum);
1413 /* If the ostensible rtx being reload differs from the rtx found
1414 in the location to substitute, this reload is not safe to combine
1415 because we cannot reliably tell whether it appears in the insn. */
1417 if (in != 0 && in != *inloc)
1418 reload_nocombine[i] = 1;
1421 /* This was replaced by changes in find_reloads_address_1 and the new
1422 function inc_for_reload, which go with a new meaning of reload_inc. */
1424 /* If this is an IN/OUT reload in an insn that sets the CC,
1425 it must be for an autoincrement. It doesn't work to store
1426 the incremented value after the insn because that would clobber the CC.
1427 So we must do the increment of the value reloaded from,
1428 increment it, store it back, then decrement again. */
1429 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1433 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1434 /* If we did not find a nonzero amount-to-increment-by,
1435 that contradicts the belief that IN is being incremented
1436 in an address in this insn. */
1437 if (reload_inc[i] == 0)
1442 /* If we will replace IN and OUT with the reload-reg,
1443 record where they are located so that substitution need
1444 not do a tree walk. */
1446 if (replace_reloads)
1450 register struct replacement *r = &replacements[n_replacements++];
1452 r->subreg_loc = in_subreg_loc;
1456 if (outloc != 0 && outloc != inloc)
1458 register struct replacement *r = &replacements[n_replacements++];
1461 r->subreg_loc = out_subreg_loc;
1466 /* If this reload is just being introduced and it has both
1467 an incoming quantity and an outgoing quantity that are
1468 supposed to be made to match, see if either one of the two
1469 can serve as the place to reload into.
1471 If one of them is acceptable, set reload_reg_rtx[i]
1474 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1476 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1478 reload_reg_class[i], i,
1479 earlyclobber_operand_p (out));
1481 /* If the outgoing register already contains the same value
1482 as the incoming one, we can dispense with loading it.
1483 The easiest way to tell the caller that is to give a phony
1484 value for the incoming operand (same as outgoing one). */
1485 if (reload_reg_rtx[i] == out
1486 && (GET_CODE (in) == REG || CONSTANT_P (in))
1487 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1488 static_reload_reg_p, i, inmode))
1492 /* If this is an input reload and the operand contains a register that
1493 dies in this insn and is used nowhere else, see if it is the right class
1494 to be used for this reload. Use it if so. (This occurs most commonly
1495 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1496 this if it is also an output reload that mentions the register unless
1497 the output is a SUBREG that clobbers an entire register.
1499 Note that the operand might be one of the spill regs, if it is a
1500 pseudo reg and we are in a block where spilling has not taken place.
1501 But if there is no spilling in this block, that is OK.
1502 An explicitly used hard reg cannot be a spill reg. */
1504 if (reload_reg_rtx[i] == 0 && in != 0)
1509 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1510 if (REG_NOTE_KIND (note) == REG_DEAD
1511 && GET_CODE (XEXP (note, 0)) == REG
1512 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1513 && reg_mentioned_p (XEXP (note, 0), in)
1514 && ! refers_to_regno_for_reload_p (regno,
1516 + HARD_REGNO_NREGS (regno,
1518 PATTERN (this_insn), inloc)
1519 /* If this is also an output reload, IN cannot be used as
1520 the reload register if it is set in this insn unless IN
1522 && (out == 0 || in == out
1523 || ! hard_reg_set_here_p (regno,
1525 + HARD_REGNO_NREGS (regno,
1527 PATTERN (this_insn)))
1528 /* ??? Why is this code so different from the previous?
1529 Is there any simple coherent way to describe the two together?
1530 What's going on here. */
1532 || (GET_CODE (in) == SUBREG
1533 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1535 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1536 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1537 /* Make sure the operand fits in the reg that dies. */
1538 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1539 && HARD_REGNO_MODE_OK (regno, inmode)
1540 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1541 && HARD_REGNO_MODE_OK (regno, outmode))
1544 unsigned int nregs = MAX (HARD_REGNO_NREGS (regno, inmode),
1545 HARD_REGNO_NREGS (regno, outmode));
1547 for (offs = 0; offs < nregs; offs++)
1548 if (fixed_regs[regno + offs]
1549 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1555 reload_reg_rtx[i] = gen_rtx_REG (inmode, regno);
1562 output_reloadnum = i;
1567 /* Record an additional place we must replace a value
1568 for which we have already recorded a reload.
1569 RELOADNUM is the value returned by push_reload
1570 when the reload was recorded.
1571 This is used in insn patterns that use match_dup. */
1574 push_replacement (loc, reloadnum, mode)
1577 enum machine_mode mode;
1579 if (replace_reloads)
1581 register struct replacement *r = &replacements[n_replacements++];
1582 r->what = reloadnum;
1589 /* Transfer all replacements that used to be in reload FROM to be in
1593 transfer_replacements (to, from)
1598 for (i = 0; i < n_replacements; i++)
1599 if (replacements[i].what == from)
1600 replacements[i].what = to;
1603 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1604 or a subpart of it. If we have any replacements registered for IN_RTX,
1605 cancel the reloads that were supposed to load them.
1606 Return non-zero if we canceled any reloads. */
1608 remove_address_replacements (in_rtx)
1612 char reload_flags[MAX_RELOADS];
1613 int something_changed = 0;
1615 bzero (reload_flags, sizeof reload_flags);
1616 for (i = 0, j = 0; i < n_replacements; i++)
1618 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1619 reload_flags[replacements[i].what] |= 1;
1622 replacements[j++] = replacements[i];
1623 reload_flags[replacements[i].what] |= 2;
1626 /* Note that the following store must be done before the recursive calls. */
1629 for (i = n_reloads - 1; i >= 0; i--)
1631 if (reload_flags[i] == 1)
1633 deallocate_reload_reg (i);
1634 remove_address_replacements (reload_in[i]);
1636 something_changed = 1;
1639 return something_changed;
1642 /* Return non-zero if IN contains a piece of rtl that has the address LOC */
1644 loc_mentioned_in_p (loc, in)
1647 enum rtx_code code = GET_CODE (in);
1648 char *fmt = GET_RTX_FORMAT (code);
1651 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1653 if (loc == &XEXP (in, i))
1657 if (loc_mentioned_in_p (loc, XEXP (in, i)))
1660 else if (fmt[i] == 'E')
1661 for (j = XVECLEN (in, i) - 1; i >= 0; i--)
1662 if (loc_mentioned_in_p (loc, XVECEXP (in, i, j)))
1668 /* If there is only one output reload, and it is not for an earlyclobber
1669 operand, try to combine it with a (logically unrelated) input reload
1670 to reduce the number of reload registers needed.
1672 This is safe if the input reload does not appear in
1673 the value being output-reloaded, because this implies
1674 it is not needed any more once the original insn completes.
1676 If that doesn't work, see we can use any of the registers that
1677 die in this insn as a reload register. We can if it is of the right
1678 class and does not appear in the value being output-reloaded. */
1684 int output_reload = -1;
1685 int secondary_out = -1;
1688 /* Find the output reload; return unless there is exactly one
1689 and that one is mandatory. */
1691 for (i = 0; i < n_reloads; i++)
1692 if (reload_out[i] != 0)
1694 if (output_reload >= 0)
1699 if (output_reload < 0 || reload_optional[output_reload])
1702 /* An input-output reload isn't combinable. */
1704 if (reload_in[output_reload] != 0)
1707 /* If this reload is for an earlyclobber operand, we can't do anything. */
1708 if (earlyclobber_operand_p (reload_out[output_reload]))
1711 /* Check each input reload; can we combine it? */
1713 for (i = 0; i < n_reloads; i++)
1714 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1715 /* Life span of this reload must not extend past main insn. */
1716 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
1717 && reload_when_needed[i] != RELOAD_FOR_OUTADDR_ADDRESS
1718 && reload_when_needed[i] != RELOAD_OTHER
1719 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
1720 == CLASS_MAX_NREGS (reload_reg_class[output_reload],
1721 reload_outmode[output_reload]))
1722 && reload_inc[i] == 0
1723 && reload_reg_rtx[i] == 0
1724 #ifdef SECONDARY_MEMORY_NEEDED
1725 /* Don't combine two reloads with different secondary
1726 memory locations. */
1727 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
1728 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
1729 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
1730 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
1732 && (SMALL_REGISTER_CLASSES
1733 ? (reload_reg_class[i] == reload_reg_class[output_reload])
1734 : (reg_class_subset_p (reload_reg_class[i],
1735 reload_reg_class[output_reload])
1736 || reg_class_subset_p (reload_reg_class[output_reload],
1737 reload_reg_class[i])))
1738 && (MATCHES (reload_in[i], reload_out[output_reload])
1739 /* Args reversed because the first arg seems to be
1740 the one that we imagine being modified
1741 while the second is the one that might be affected. */
1742 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1744 /* However, if the input is a register that appears inside
1745 the output, then we also can't share.
1746 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1747 If the same reload reg is used for both reg 69 and the
1748 result to be stored in memory, then that result
1749 will clobber the address of the memory ref. */
1750 && ! (GET_CODE (reload_in[i]) == REG
1751 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1752 reload_out[output_reload]))))
1753 && (reg_class_size[(int) reload_reg_class[i]]
1754 || SMALL_REGISTER_CLASSES)
1755 /* We will allow making things slightly worse by combining an
1756 input and an output, but no worse than that. */
1757 && (reload_when_needed[i] == RELOAD_FOR_INPUT
1758 || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
1762 /* We have found a reload to combine with! */
1763 reload_out[i] = reload_out[output_reload];
1764 reload_out_reg[i] = reload_out_reg[output_reload];
1765 reload_outmode[i] = reload_outmode[output_reload];
1766 /* Mark the old output reload as inoperative. */
1767 reload_out[output_reload] = 0;
1768 /* The combined reload is needed for the entire insn. */
1769 reload_when_needed[i] = RELOAD_OTHER;
1770 /* If the output reload had a secondary reload, copy it. */
1771 if (reload_secondary_out_reload[output_reload] != -1)
1773 reload_secondary_out_reload[i]
1774 = reload_secondary_out_reload[output_reload];
1775 reload_secondary_out_icode[i]
1776 = reload_secondary_out_icode[output_reload];
1779 #ifdef SECONDARY_MEMORY_NEEDED
1780 /* Copy any secondary MEM. */
1781 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
1782 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
1783 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
1785 /* If required, minimize the register class. */
1786 if (reg_class_subset_p (reload_reg_class[output_reload],
1787 reload_reg_class[i]))
1788 reload_reg_class[i] = reload_reg_class[output_reload];
1790 /* Transfer all replacements from the old reload to the combined. */
1791 for (j = 0; j < n_replacements; j++)
1792 if (replacements[j].what == output_reload)
1793 replacements[j].what = i;
1798 /* If this insn has only one operand that is modified or written (assumed
1799 to be the first), it must be the one corresponding to this reload. It
1800 is safe to use anything that dies in this insn for that output provided
1801 that it does not occur in the output (we already know it isn't an
1802 earlyclobber. If this is an asm insn, give up. */
1804 if (INSN_CODE (this_insn) == -1)
1807 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1808 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1809 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1812 /* See if some hard register that dies in this insn and is not used in
1813 the output is the right class. Only works if the register we pick
1814 up can fully hold our output reload. */
1815 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1816 if (REG_NOTE_KIND (note) == REG_DEAD
1817 && GET_CODE (XEXP (note, 0)) == REG
1818 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1819 reload_out[output_reload])
1820 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1821 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1822 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1823 REGNO (XEXP (note, 0)))
1824 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1825 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1826 /* Ensure that a secondary or tertiary reload for this output
1827 won't want this register. */
1828 && ((secondary_out = reload_secondary_out_reload[output_reload]) == -1
1829 || (! (TEST_HARD_REG_BIT
1830 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1831 REGNO (XEXP (note, 0))))
1832 && ((secondary_out = reload_secondary_out_reload[secondary_out]) == -1
1833 || ! (TEST_HARD_REG_BIT
1834 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1835 REGNO (XEXP (note, 0)))))))
1836 && ! fixed_regs[REGNO (XEXP (note, 0))])
1838 reload_reg_rtx[output_reload]
1839 = gen_rtx_REG (reload_outmode[output_reload],
1840 REGNO (XEXP (note, 0)));
1845 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1846 See if one of IN and OUT is a register that may be used;
1847 this is desirable since a spill-register won't be needed.
1848 If so, return the register rtx that proves acceptable.
1850 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1851 CLASS is the register class required for the reload.
1853 If FOR_REAL is >= 0, it is the number of the reload,
1854 and in some cases when it can be discovered that OUT doesn't need
1855 to be computed, clear out reload_out[FOR_REAL].
1857 If FOR_REAL is -1, this should not be done, because this call
1858 is just to see if a register can be found, not to find and install it.
1860 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1861 puts an additional constraint on being able to use IN for OUT since
1862 IN must not appear elsewhere in the insn (it is assumed that IN itself
1863 is safe from the earlyclobber). */
1866 find_dummy_reload (real_in, real_out, inloc, outloc,
1867 inmode, outmode, class, for_real, earlyclobber)
1868 rtx real_in, real_out;
1869 rtx *inloc, *outloc;
1870 enum machine_mode inmode, outmode;
1871 enum reg_class class;
1881 /* If operands exceed a word, we can't use either of them
1882 unless they have the same size. */
1883 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1884 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1885 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1888 /* Find the inside of any subregs. */
1889 while (GET_CODE (out) == SUBREG)
1891 out_offset = SUBREG_WORD (out);
1892 out = SUBREG_REG (out);
1894 while (GET_CODE (in) == SUBREG)
1896 in_offset = SUBREG_WORD (in);
1897 in = SUBREG_REG (in);
1900 /* Narrow down the reg class, the same way push_reload will;
1901 otherwise we might find a dummy now, but push_reload won't. */
1902 class = PREFERRED_RELOAD_CLASS (in, class);
1904 /* See if OUT will do. */
1905 if (GET_CODE (out) == REG
1906 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1908 register int regno = REGNO (out) + out_offset;
1909 int nwords = HARD_REGNO_NREGS (regno, outmode);
1912 /* When we consider whether the insn uses OUT,
1913 ignore references within IN. They don't prevent us
1914 from copying IN into OUT, because those refs would
1915 move into the insn that reloads IN.
1917 However, we only ignore IN in its role as this reload.
1918 If the insn uses IN elsewhere and it contains OUT,
1919 that counts. We can't be sure it's the "same" operand
1920 so it might not go through this reload. */
1922 *inloc = const0_rtx;
1924 if (regno < FIRST_PSEUDO_REGISTER
1925 /* A fixed reg that can overlap other regs better not be used
1926 for reloading in any way. */
1927 #ifdef OVERLAPPING_REGNO_P
1928 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1930 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1931 PATTERN (this_insn), outloc))
1934 for (i = 0; i < nwords; i++)
1935 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1941 if (GET_CODE (real_out) == REG)
1944 value = gen_rtx_REG (outmode, regno);
1951 /* Consider using IN if OUT was not acceptable
1952 or if OUT dies in this insn (like the quotient in a divmod insn).
1953 We can't use IN unless it is dies in this insn,
1954 which means we must know accurately which hard regs are live.
1955 Also, the result can't go in IN if IN is used within OUT,
1956 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1957 if (hard_regs_live_known
1958 && GET_CODE (in) == REG
1959 && REGNO (in) < FIRST_PSEUDO_REGISTER
1961 || find_reg_note (this_insn, REG_UNUSED, real_out))
1962 && find_reg_note (this_insn, REG_DEAD, real_in)
1963 && !fixed_regs[REGNO (in)]
1964 && HARD_REGNO_MODE_OK (REGNO (in),
1965 /* The only case where out and real_out might
1966 have different modes is where real_out
1967 is a subreg, and in that case, out
1969 (GET_MODE (out) != VOIDmode
1970 ? GET_MODE (out) : outmode)))
1972 register int regno = REGNO (in) + in_offset;
1973 int nwords = HARD_REGNO_NREGS (regno, inmode);
1975 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1976 && ! hard_reg_set_here_p (regno, regno + nwords,
1977 PATTERN (this_insn))
1979 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1980 PATTERN (this_insn), inloc)))
1983 for (i = 0; i < nwords; i++)
1984 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1990 /* If we were going to use OUT as the reload reg
1991 and changed our mind, it means OUT is a dummy that
1992 dies here. So don't bother copying value to it. */
1993 if (for_real >= 0 && value == real_out)
1994 reload_out[for_real] = 0;
1995 if (GET_CODE (real_in) == REG)
1998 value = gen_rtx_REG (inmode, regno);
2006 /* This page contains subroutines used mainly for determining
2007 whether the IN or an OUT of a reload can serve as the
2010 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2013 earlyclobber_operand_p (x)
2018 for (i = 0; i < n_earlyclobbers; i++)
2019 if (reload_earlyclobbers[i] == x)
2025 /* Return 1 if expression X alters a hard reg in the range
2026 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2027 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2028 X should be the body of an instruction. */
2031 hard_reg_set_here_p (beg_regno, end_regno, x)
2032 register int beg_regno, end_regno;
2035 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2037 register rtx op0 = SET_DEST (x);
2038 while (GET_CODE (op0) == SUBREG)
2039 op0 = SUBREG_REG (op0);
2040 if (GET_CODE (op0) == REG)
2042 register int r = REGNO (op0);
2043 /* See if this reg overlaps range under consideration. */
2045 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
2049 else if (GET_CODE (x) == PARALLEL)
2051 register int i = XVECLEN (x, 0) - 1;
2053 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2060 /* Return 1 if ADDR is a valid memory address for mode MODE,
2061 and check that each pseudo reg has the proper kind of
2065 strict_memory_address_p (mode, addr)
2066 enum machine_mode mode;
2069 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2076 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2077 if they are the same hard reg, and has special hacks for
2078 autoincrement and autodecrement.
2079 This is specifically intended for find_reloads to use
2080 in determining whether two operands match.
2081 X is the operand whose number is the lower of the two.
2083 The value is 2 if Y contains a pre-increment that matches
2084 a non-incrementing address in X. */
2086 /* ??? To be completely correct, we should arrange to pass
2087 for X the output operand and for Y the input operand.
2088 For now, we assume that the output operand has the lower number
2089 because that is natural in (SET output (... input ...)). */
2092 operands_match_p (x, y)
2096 register RTX_CODE code = GET_CODE (x);
2102 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2103 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2104 && GET_CODE (SUBREG_REG (y)) == REG)))
2110 i = REGNO (SUBREG_REG (x));
2111 if (i >= FIRST_PSEUDO_REGISTER)
2113 i += SUBREG_WORD (x);
2118 if (GET_CODE (y) == SUBREG)
2120 j = REGNO (SUBREG_REG (y));
2121 if (j >= FIRST_PSEUDO_REGISTER)
2123 j += SUBREG_WORD (y);
2128 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2129 multiple hard register group, so that for example (reg:DI 0) and
2130 (reg:SI 1) will be considered the same register. */
2131 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2132 && i < FIRST_PSEUDO_REGISTER)
2133 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
2134 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2135 && j < FIRST_PSEUDO_REGISTER)
2136 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
2140 /* If two operands must match, because they are really a single
2141 operand of an assembler insn, then two postincrements are invalid
2142 because the assembler insn would increment only once.
2143 On the other hand, an postincrement matches ordinary indexing
2144 if the postincrement is the output operand. */
2145 if (code == POST_DEC || code == POST_INC)
2146 return operands_match_p (XEXP (x, 0), y);
2147 /* Two preincrements are invalid
2148 because the assembler insn would increment only once.
2149 On the other hand, an preincrement matches ordinary indexing
2150 if the preincrement is the input operand.
2151 In this case, return 2, since some callers need to do special
2152 things when this happens. */
2153 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
2154 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2158 /* Now we have disposed of all the cases
2159 in which different rtx codes can match. */
2160 if (code != GET_CODE (y))
2162 if (code == LABEL_REF)
2163 return XEXP (x, 0) == XEXP (y, 0);
2164 if (code == SYMBOL_REF)
2165 return XSTR (x, 0) == XSTR (y, 0);
2167 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2169 if (GET_MODE (x) != GET_MODE (y))
2172 /* Compare the elements. If any pair of corresponding elements
2173 fail to match, return 0 for the whole things. */
2176 fmt = GET_RTX_FORMAT (code);
2177 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2183 if (XWINT (x, i) != XWINT (y, i))
2188 if (XINT (x, i) != XINT (y, i))
2193 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2196 /* If any subexpression returns 2,
2197 we should return 2 if we are successful. */
2206 if (XVECLEN (x, i) != XVECLEN (y, i))
2208 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2210 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2218 /* It is believed that rtx's at this level will never
2219 contain anything but integers and other rtx's,
2220 except for within LABEL_REFs and SYMBOL_REFs. */
2225 return 1 + success_2;
2228 /* Describe the range of registers or memory referenced by X.
2229 If X is a register, set REG_FLAG and put the first register
2230 number into START and the last plus one into END.
2231 If X is a memory reference, put a base address into BASE
2232 and a range of integer offsets into START and END.
2233 If X is pushing on the stack, we can assume it causes no trouble,
2234 so we set the SAFE field. */
2236 static struct decomposition
2240 struct decomposition val;
2246 if (GET_CODE (x) == MEM)
2248 rtx base, offset = 0;
2249 rtx addr = XEXP (x, 0);
2251 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2252 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2254 val.base = XEXP (addr, 0);
2255 val.start = - GET_MODE_SIZE (GET_MODE (x));
2256 val.end = GET_MODE_SIZE (GET_MODE (x));
2257 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2261 if (GET_CODE (addr) == CONST)
2263 addr = XEXP (addr, 0);
2266 if (GET_CODE (addr) == PLUS)
2268 if (CONSTANT_P (XEXP (addr, 0)))
2270 base = XEXP (addr, 1);
2271 offset = XEXP (addr, 0);
2273 else if (CONSTANT_P (XEXP (addr, 1)))
2275 base = XEXP (addr, 0);
2276 offset = XEXP (addr, 1);
2283 offset = const0_rtx;
2285 if (GET_CODE (offset) == CONST)
2286 offset = XEXP (offset, 0);
2287 if (GET_CODE (offset) == PLUS)
2289 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2291 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2292 offset = XEXP (offset, 0);
2294 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2296 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2297 offset = XEXP (offset, 1);
2301 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2302 offset = const0_rtx;
2305 else if (GET_CODE (offset) != CONST_INT)
2307 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2308 offset = const0_rtx;
2311 if (all_const && GET_CODE (base) == PLUS)
2312 base = gen_rtx_CONST (GET_MODE (base), base);
2314 if (GET_CODE (offset) != CONST_INT)
2317 val.start = INTVAL (offset);
2318 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2322 else if (GET_CODE (x) == REG)
2325 val.start = true_regnum (x);
2328 /* A pseudo with no hard reg. */
2329 val.start = REGNO (x);
2330 val.end = val.start + 1;
2334 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2336 else if (GET_CODE (x) == SUBREG)
2338 if (GET_CODE (SUBREG_REG (x)) != REG)
2339 /* This could be more precise, but it's good enough. */
2340 return decompose (SUBREG_REG (x));
2342 val.start = true_regnum (x);
2344 return decompose (SUBREG_REG (x));
2347 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2349 else if (CONSTANT_P (x)
2350 /* This hasn't been assigned yet, so it can't conflict yet. */
2351 || GET_CODE (x) == SCRATCH)
2358 /* Return 1 if altering Y will not modify the value of X.
2359 Y is also described by YDATA, which should be decompose (Y). */
2362 immune_p (x, y, ydata)
2364 struct decomposition ydata;
2366 struct decomposition xdata;
2369 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2373 if (GET_CODE (y) != MEM)
2375 /* If Y is memory and X is not, Y can't affect X. */
2376 if (GET_CODE (x) != MEM)
2379 xdata = decompose (x);
2381 if (! rtx_equal_p (xdata.base, ydata.base))
2383 /* If bases are distinct symbolic constants, there is no overlap. */
2384 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2386 /* Constants and stack slots never overlap. */
2387 if (CONSTANT_P (xdata.base)
2388 && (ydata.base == frame_pointer_rtx
2389 || ydata.base == hard_frame_pointer_rtx
2390 || ydata.base == stack_pointer_rtx))
2392 if (CONSTANT_P (ydata.base)
2393 && (xdata.base == frame_pointer_rtx
2394 || xdata.base == hard_frame_pointer_rtx
2395 || xdata.base == stack_pointer_rtx))
2397 /* If either base is variable, we don't know anything. */
2402 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2405 /* Similar, but calls decompose. */
2408 safe_from_earlyclobber (op, clobber)
2411 struct decomposition early_data;
2413 early_data = decompose (clobber);
2414 return immune_p (op, clobber, early_data);
2417 /* Main entry point of this file: search the body of INSN
2418 for values that need reloading and record them with push_reload.
2419 REPLACE nonzero means record also where the values occur
2420 so that subst_reloads can be used.
2422 IND_LEVELS says how many levels of indirection are supported by this
2423 machine; a value of zero means that a memory reference is not a valid
2426 LIVE_KNOWN says we have valid information about which hard
2427 regs are live at each point in the program; this is true when
2428 we are called from global_alloc but false when stupid register
2429 allocation has been done.
2431 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2432 which is nonnegative if the reg has been commandeered for reloading into.
2433 It is copied into STATIC_RELOAD_REG_P and referenced from there
2434 by various subroutines.
2436 Return TRUE if some operands need to be changed, because of swapping
2437 commutative operands, reg_equiv_address substitution, or whatever. */
2440 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2442 int replace, ind_levels;
2444 short *reload_reg_p;
2446 #ifdef REGISTER_CONSTRAINTS
2448 register int insn_code_number;
2451 /* These start out as the constraints for the insn
2452 and they are chewed up as we consider alternatives. */
2453 char *constraints[MAX_RECOG_OPERANDS];
2454 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2456 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2457 char pref_or_nothing[MAX_RECOG_OPERANDS];
2458 /* Nonzero for a MEM operand whose entire address needs a reload. */
2459 int address_reloaded[MAX_RECOG_OPERANDS];
2460 /* Value of enum reload_type to use for operand. */
2461 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2462 /* Value of enum reload_type to use within address of operand. */
2463 enum reload_type address_type[MAX_RECOG_OPERANDS];
2464 /* Save the usage of each operand. */
2465 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2466 int no_input_reloads = 0, no_output_reloads = 0;
2468 int this_alternative[MAX_RECOG_OPERANDS];
2469 char this_alternative_win[MAX_RECOG_OPERANDS];
2470 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2471 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2472 int this_alternative_matches[MAX_RECOG_OPERANDS];
2474 int goal_alternative[MAX_RECOG_OPERANDS];
2475 int this_alternative_number;
2476 int goal_alternative_number;
2477 int operand_reloadnum[MAX_RECOG_OPERANDS];
2478 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2479 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2480 char goal_alternative_win[MAX_RECOG_OPERANDS];
2481 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2482 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2483 int goal_alternative_swapped;
2487 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2488 rtx substed_operand[MAX_RECOG_OPERANDS];
2489 rtx body = PATTERN (insn);
2490 rtx set = single_set (insn);
2491 int goal_earlyclobber, this_earlyclobber;
2492 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2494 /* Cache the last regno for the last pseudo we did an output reload
2495 for in case the next insn uses it. */
2496 static int last_output_reload_regno = -1;
2501 n_earlyclobbers = 0;
2502 replace_reloads = replace;
2503 hard_regs_live_known = live_known;
2504 static_reload_reg_p = reload_reg_p;
2506 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2507 neither are insns that SET cc0. Insns that use CC0 are not allowed
2508 to have any input reloads. */
2509 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2510 no_output_reloads = 1;
2513 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2514 no_input_reloads = 1;
2515 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2516 no_output_reloads = 1;
2519 #ifdef SECONDARY_MEMORY_NEEDED
2520 /* The eliminated forms of any secondary memory locations are per-insn, so
2521 clear them out here. */
2523 bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2526 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2527 is cheap to move between them. If it is not, there may not be an insn
2528 to do the copy, so we may need a reload. */
2529 if (GET_CODE (body) == SET
2530 && GET_CODE (SET_DEST (body)) == REG
2531 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2532 && GET_CODE (SET_SRC (body)) == REG
2533 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2534 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2535 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2538 extract_insn (insn);
2540 noperands = reload_n_operands = recog_n_operands;
2541 n_alternatives = recog_n_alternatives;
2543 /* Just return "no reloads" if insn has no operands with constraints. */
2544 if (noperands == 0 || n_alternatives == 0)
2547 insn_code_number = INSN_CODE (insn);
2548 this_insn_is_asm = insn_code_number < 0;
2550 bcopy ((char *) recog_operand_mode, (char *) operand_mode,
2551 noperands * sizeof (enum machine_mode));
2552 bcopy ((char *) recog_constraints, (char *) constraints,
2553 noperands * sizeof (char *));
2557 /* If we will need to know, later, whether some pair of operands
2558 are the same, we must compare them now and save the result.
2559 Reloading the base and index registers will clobber them
2560 and afterward they will fail to match. */
2562 for (i = 0; i < noperands; i++)
2567 substed_operand[i] = recog_operand[i];
2570 modified[i] = RELOAD_READ;
2572 /* Scan this operand's constraint to see if it is an output operand,
2573 an in-out operand, is commutative, or should match another. */
2578 modified[i] = RELOAD_WRITE;
2580 modified[i] = RELOAD_READ_WRITE;
2583 /* The last operand should not be marked commutative. */
2584 if (i == noperands - 1)
2589 else if (c >= '0' && c <= '9')
2592 operands_match[c][i]
2593 = operands_match_p (recog_operand[c], recog_operand[i]);
2595 /* An operand may not match itself. */
2599 /* If C can be commuted with C+1, and C might need to match I,
2600 then C+1 might also need to match I. */
2601 if (commutative >= 0)
2603 if (c == commutative || c == commutative + 1)
2605 int other = c + (c == commutative ? 1 : -1);
2606 operands_match[other][i]
2607 = operands_match_p (recog_operand[other], recog_operand[i]);
2609 if (i == commutative || i == commutative + 1)
2611 int other = i + (i == commutative ? 1 : -1);
2612 operands_match[c][other]
2613 = operands_match_p (recog_operand[c], recog_operand[other]);
2615 /* Note that C is supposed to be less than I.
2616 No need to consider altering both C and I because in
2617 that case we would alter one into the other. */
2623 /* Examine each operand that is a memory reference or memory address
2624 and reload parts of the addresses into index registers.
2625 Also here any references to pseudo regs that didn't get hard regs
2626 but are equivalent to constants get replaced in the insn itself
2627 with those constants. Nobody will ever see them again.
2629 Finally, set up the preferred classes of each operand. */
2631 for (i = 0; i < noperands; i++)
2633 register RTX_CODE code = GET_CODE (recog_operand[i]);
2635 address_reloaded[i] = 0;
2636 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2637 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2640 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2641 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2644 if (*constraints[i] == 0)
2645 /* Ignore things like match_operator operands. */
2647 else if (constraints[i][0] == 'p')
2649 find_reloads_address (VOIDmode, NULL_PTR,
2650 recog_operand[i], recog_operand_loc[i],
2651 i, operand_type[i], ind_levels, insn);
2653 /* If we now have a simple operand where we used to have a
2654 PLUS or MULT, re-recognize and try again. */
2655 if ((GET_RTX_CLASS (GET_CODE (*recog_operand_loc[i])) == 'o'
2656 || GET_CODE (*recog_operand_loc[i]) == SUBREG)
2657 && (GET_CODE (recog_operand[i]) == MULT
2658 || GET_CODE (recog_operand[i]) == PLUS))
2660 INSN_CODE (insn) = -1;
2661 retval = find_reloads (insn, replace, ind_levels, live_known,
2666 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2668 else if (code == MEM)
2671 = find_reloads_address (GET_MODE (recog_operand[i]),
2672 recog_operand_loc[i],
2673 XEXP (recog_operand[i], 0),
2674 &XEXP (recog_operand[i], 0),
2675 i, address_type[i], ind_levels, insn);
2676 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2678 else if (code == SUBREG)
2680 rtx reg = SUBREG_REG (recog_operand[i]);
2682 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2685 && &SET_DEST (set) == recog_operand_loc[i],
2688 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2689 that didn't get a hard register, emit a USE with a REG_EQUAL
2690 note in front so that we might inherit a previous, possibly
2694 && GET_CODE (op) == MEM
2695 && GET_CODE (reg) == REG
2696 && (GET_MODE_SIZE (GET_MODE (reg))
2697 >= GET_MODE_SIZE (GET_MODE (op))))
2698 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode, reg), insn))
2699 = gen_rtx_EXPR_LIST (REG_EQUAL,
2700 reg_equiv_memory_loc[REGNO (reg)], NULL_RTX);
2702 substed_operand[i] = recog_operand[i] = op;
2704 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2705 /* We can get a PLUS as an "operand" as a result of register
2706 elimination. See eliminate_regs and gen_reload. We handle
2707 a unary operator by reloading the operand. */
2708 substed_operand[i] = recog_operand[i]
2709 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2710 ind_levels, 0, insn);
2711 else if (code == REG)
2713 /* This is equivalent to calling find_reloads_toplev.
2714 The code is duplicated for speed.
2715 When we find a pseudo always equivalent to a constant,
2716 we replace it by the constant. We must be sure, however,
2717 that we don't try to replace it in the insn in which it
2719 register int regno = REGNO (recog_operand[i]);
2720 if (reg_equiv_constant[regno] != 0
2721 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2723 /* Record the existing mode so that the check if constants are
2724 allowed will work when operand_mode isn't specified. */
2726 if (operand_mode[i] == VOIDmode)
2727 operand_mode[i] = GET_MODE (recog_operand[i]);
2729 substed_operand[i] = recog_operand[i]
2730 = reg_equiv_constant[regno];
2732 if (reg_equiv_memory_loc[regno] != 0
2733 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2734 /* We need not give a valid is_set_dest argument since the case
2735 of a constant equivalence was checked above. */
2736 substed_operand[i] = recog_operand[i]
2737 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2738 ind_levels, 0, insn);
2740 /* If the operand is still a register (we didn't replace it with an
2741 equivalent), get the preferred class to reload it into. */
2742 code = GET_CODE (recog_operand[i]);
2744 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
2745 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2747 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
2748 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2752 /* If we made any reloads for addresses, see if they violate a
2753 "no input reloads" requirement for this insn. */
2754 if (no_input_reloads)
2755 for (i = 0; i < n_reloads; i++)
2756 if (reload_in[i] != 0)
2760 /* If this is simply a copy from operand 1 to operand 0, merge the
2761 preferred classes for the operands. */
2762 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2763 && recog_operand[1] == SET_SRC (set))
2765 preferred_class[0] = preferred_class[1]
2766 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2767 pref_or_nothing[0] |= pref_or_nothing[1];
2768 pref_or_nothing[1] |= pref_or_nothing[0];
2771 /* Now see what we need for pseudo-regs that didn't get hard regs
2772 or got the wrong kind of hard reg. For this, we must consider
2773 all the operands together against the register constraints. */
2775 best = MAX_RECOG_OPERANDS * 2 + 600;
2778 goal_alternative_swapped = 0;
2781 /* The constraints are made of several alternatives.
2782 Each operand's constraint looks like foo,bar,... with commas
2783 separating the alternatives. The first alternatives for all
2784 operands go together, the second alternatives go together, etc.
2786 First loop over alternatives. */
2788 for (this_alternative_number = 0;
2789 this_alternative_number < n_alternatives;
2790 this_alternative_number++)
2792 /* Loop over operands for one constraint alternative. */
2793 /* LOSERS counts those that don't fit this alternative
2794 and would require loading. */
2796 /* BAD is set to 1 if it some operand can't fit this alternative
2797 even after reloading. */
2799 /* REJECT is a count of how undesirable this alternative says it is
2800 if any reloading is required. If the alternative matches exactly
2801 then REJECT is ignored, but otherwise it gets this much
2802 counted against it in addition to the reloading needed. Each
2803 ? counts three times here since we want the disparaging caused by
2804 a bad register class to only count 1/3 as much. */
2807 this_earlyclobber = 0;
2809 for (i = 0; i < noperands; i++)
2811 register char *p = constraints[i];
2812 register int win = 0;
2813 /* 0 => this operand can be reloaded somehow for this alternative */
2815 /* 0 => this operand can be reloaded if the alternative allows regs. */
2818 register rtx operand = recog_operand[i];
2820 /* Nonzero means this is a MEM that must be reloaded into a reg
2821 regardless of what the constraint says. */
2822 int force_reload = 0;
2824 /* Nonzero if a constant forced into memory would be OK for this
2827 int earlyclobber = 0;
2829 /* If the predicate accepts a unary operator, it means that
2830 we need to reload the operand, but do not do this for
2831 match_operator and friends. */
2832 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2833 operand = XEXP (operand, 0);
2835 /* If the operand is a SUBREG, extract
2836 the REG or MEM (or maybe even a constant) within.
2837 (Constants can occur as a result of reg_equiv_constant.) */
2839 while (GET_CODE (operand) == SUBREG)
2841 offset += SUBREG_WORD (operand);
2842 operand = SUBREG_REG (operand);
2843 /* Force reload if this is a constant or PLUS or if there may
2844 be a problem accessing OPERAND in the outer mode. */
2845 if (CONSTANT_P (operand)
2846 || GET_CODE (operand) == PLUS
2847 /* We must force a reload of paradoxical SUBREGs
2848 of a MEM because the alignment of the inner value
2849 may not be enough to do the outer reference. On
2850 big-endian machines, it may also reference outside
2853 On machines that extend byte operations and we have a
2854 SUBREG where both the inner and outer modes are no wider
2855 than a word and the inner mode is narrower, is integral,
2856 and gets extended when loaded from memory, combine.c has
2857 made assumptions about the behavior of the machine in such
2858 register access. If the data is, in fact, in memory we
2859 must always load using the size assumed to be in the
2860 register and let the insn do the different-sized
2863 This is doubly true if WORD_REGISTER_OPERATIONS. In
2864 this case eliminate_regs has left non-paradoxical
2865 subregs for push_reloads to see. Make sure it does
2866 by forcing the reload.
2868 ??? When is it right at this stage to have a subreg
2869 of a mem that is _not_ to be handled specialy? IMO
2870 those should have been reduced to just a mem. */
2871 || ((GET_CODE (operand) == MEM
2872 || (GET_CODE (operand)== REG
2873 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2874 #ifndef WORD_REGISTER_OPERATIONS
2875 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2876 < BIGGEST_ALIGNMENT)
2877 && (GET_MODE_SIZE (operand_mode[i])
2878 > GET_MODE_SIZE (GET_MODE (operand))))
2879 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2880 #ifdef LOAD_EXTEND_OP
2881 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2882 && (GET_MODE_SIZE (GET_MODE (operand))
2884 && (GET_MODE_SIZE (operand_mode[i])
2885 > GET_MODE_SIZE (GET_MODE (operand)))
2886 && INTEGRAL_MODE_P (GET_MODE (operand))
2887 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2892 /* Subreg of a hard reg which can't handle the subreg's mode
2893 or which would handle that mode in the wrong number of
2894 registers for subregging to work. */
2895 || (GET_CODE (operand) == REG
2896 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2897 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2898 && (GET_MODE_SIZE (GET_MODE (operand))
2900 && ((GET_MODE_SIZE (GET_MODE (operand))
2902 != HARD_REGNO_NREGS (REGNO (operand),
2903 GET_MODE (operand))))
2904 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2909 this_alternative[i] = (int) NO_REGS;
2910 this_alternative_win[i] = 0;
2911 this_alternative_offmemok[i] = 0;
2912 this_alternative_earlyclobber[i] = 0;
2913 this_alternative_matches[i] = -1;
2915 /* An empty constraint or empty alternative
2916 allows anything which matched the pattern. */
2917 if (*p == 0 || *p == ',')
2920 /* Scan this alternative's specs for this operand;
2921 set WIN if the operand fits any letter in this alternative.
2922 Otherwise, clear BADOP if this operand could
2923 fit some letter after reloads,
2924 or set WINREG if this operand could fit after reloads
2925 provided the constraint allows some registers. */
2927 while (*p && (c = *p++) != ',')
2936 /* The last operand should not be marked commutative. */
2937 if (i != noperands - 1)
2950 /* Ignore rest of this alternative as far as
2951 reloading is concerned. */
2952 while (*p && *p != ',') p++;
2961 this_alternative_matches[i] = c;
2962 /* We are supposed to match a previous operand.
2963 If we do, we win if that one did.
2964 If we do not, count both of the operands as losers.
2965 (This is too conservative, since most of the time
2966 only a single reload insn will be needed to make
2967 the two operands win. As a result, this alternative
2968 may be rejected when it is actually desirable.) */
2969 if ((swapped && (c != commutative || i != commutative + 1))
2970 /* If we are matching as if two operands were swapped,
2971 also pretend that operands_match had been computed
2973 But if I is the second of those and C is the first,
2974 don't exchange them, because operands_match is valid
2975 only on one side of its diagonal. */
2977 [(c == commutative || c == commutative + 1)
2978 ? 2*commutative + 1 - c : c]
2979 [(i == commutative || i == commutative + 1)
2980 ? 2*commutative + 1 - i : i])
2981 : operands_match[c][i])
2983 /* If we are matching a non-offsettable address where an
2984 offsettable address was expected, then we must reject
2985 this combination, because we can't reload it. */
2986 if (this_alternative_offmemok[c]
2987 && GET_CODE (recog_operand[c]) == MEM
2988 && this_alternative[c] == (int) NO_REGS
2989 && ! this_alternative_win[c])
2992 win = this_alternative_win[c];
2996 /* Operands don't match. */
2998 /* Retroactively mark the operand we had to match
2999 as a loser, if it wasn't already. */
3000 if (this_alternative_win[c])
3002 this_alternative_win[c] = 0;
3003 if (this_alternative[c] == (int) NO_REGS)
3005 /* But count the pair only once in the total badness of
3006 this alternative, if the pair can be a dummy reload. */
3008 = find_dummy_reload (recog_operand[i], recog_operand[c],
3009 recog_operand_loc[i], recog_operand_loc[c],
3010 operand_mode[i], operand_mode[c],
3011 this_alternative[c], -1,
3012 this_alternative_earlyclobber[c]);
3017 /* This can be fixed with reloads if the operand
3018 we are supposed to match can be fixed with reloads. */
3020 this_alternative[i] = this_alternative[c];
3022 /* If we have to reload this operand and some previous
3023 operand also had to match the same thing as this
3024 operand, we don't know how to do that. So reject this
3026 if (! win || force_reload)
3027 for (j = 0; j < i; j++)
3028 if (this_alternative_matches[j]
3029 == this_alternative_matches[i])
3035 /* All necessary reloads for an address_operand
3036 were handled in find_reloads_address. */
3037 this_alternative[i] = (int) BASE_REG_CLASS;
3044 if (GET_CODE (operand) == MEM
3045 || (GET_CODE (operand) == REG
3046 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3047 && reg_renumber[REGNO (operand)] < 0))
3049 if (CONSTANT_P (operand)
3050 /* force_const_mem does not accept HIGH. */
3051 && GET_CODE (operand) != HIGH)
3057 if (GET_CODE (operand) == MEM
3058 && ! address_reloaded[i]
3059 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3060 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3065 if (GET_CODE (operand) == MEM
3066 && ! address_reloaded[i]
3067 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3068 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3072 /* Memory operand whose address is not offsettable. */
3076 if (GET_CODE (operand) == MEM
3077 && ! (ind_levels ? offsettable_memref_p (operand)
3078 : offsettable_nonstrict_memref_p (operand))
3079 /* Certain mem addresses will become offsettable
3080 after they themselves are reloaded. This is important;
3081 we don't want our own handling of unoffsettables
3082 to override the handling of reg_equiv_address. */
3083 && !(GET_CODE (XEXP (operand, 0)) == REG
3085 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3089 /* Memory operand whose address is offsettable. */
3093 if ((GET_CODE (operand) == MEM
3094 /* If IND_LEVELS, find_reloads_address won't reload a
3095 pseudo that didn't get a hard reg, so we have to
3096 reject that case. */
3097 && ((ind_levels ? offsettable_memref_p (operand)
3098 : offsettable_nonstrict_memref_p (operand))
3099 /* A reloaded address is offsettable because it is now
3100 just a simple register indirect. */
3101 || address_reloaded[i]))
3102 || (GET_CODE (operand) == REG
3103 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3104 && reg_renumber[REGNO (operand)] < 0
3105 /* If reg_equiv_address is nonzero, we will be
3106 loading it into a register; hence it will be
3107 offsettable, but we cannot say that reg_equiv_mem
3108 is offsettable without checking. */
3109 && ((reg_equiv_mem[REGNO (operand)] != 0
3110 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3111 || (reg_equiv_address[REGNO (operand)] != 0))))
3113 /* force_const_mem does not accept HIGH. */
3114 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3115 || GET_CODE (operand) == MEM)
3122 /* Output operand that is stored before the need for the
3123 input operands (and their index registers) is over. */
3124 earlyclobber = 1, this_earlyclobber = 1;
3128 #ifndef REAL_ARITHMETIC
3129 /* Match any floating double constant, but only if
3130 we can examine the bits of it reliably. */
3131 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
3132 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
3133 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
3136 if (GET_CODE (operand) == CONST_DOUBLE)
3141 if (GET_CODE (operand) == CONST_DOUBLE)
3147 if (GET_CODE (operand) == CONST_DOUBLE
3148 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
3153 if (GET_CODE (operand) == CONST_INT
3154 || (GET_CODE (operand) == CONST_DOUBLE
3155 && GET_MODE (operand) == VOIDmode))
3158 if (CONSTANT_P (operand)
3159 #ifdef LEGITIMATE_PIC_OPERAND_P
3160 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3167 if (GET_CODE (operand) == CONST_INT
3168 || (GET_CODE (operand) == CONST_DOUBLE
3169 && GET_MODE (operand) == VOIDmode))
3181 if (GET_CODE (operand) == CONST_INT
3182 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
3192 /* A PLUS is never a valid operand, but reload can make
3193 it from a register when eliminating registers. */
3194 && GET_CODE (operand) != PLUS
3195 /* A SCRATCH is not a valid operand. */
3196 && GET_CODE (operand) != SCRATCH
3197 #ifdef LEGITIMATE_PIC_OPERAND_P
3198 && (! CONSTANT_P (operand)
3200 || LEGITIMATE_PIC_OPERAND_P (operand))
3202 && (GENERAL_REGS == ALL_REGS
3203 || GET_CODE (operand) != REG
3204 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3205 && reg_renumber[REGNO (operand)] < 0)))
3207 /* Drop through into 'r' case */
3211 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3214 #ifdef EXTRA_CONSTRAINT
3220 if (EXTRA_CONSTRAINT (operand, c))
3227 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3230 if (GET_MODE (operand) == BLKmode)
3233 if (GET_CODE (operand) == REG
3234 && reg_fits_class_p (operand, this_alternative[i],
3235 offset, GET_MODE (recog_operand[i])))
3242 /* If this operand could be handled with a reg,
3243 and some reg is allowed, then this operand can be handled. */
3244 if (winreg && this_alternative[i] != (int) NO_REGS)
3247 /* Record which operands fit this alternative. */
3248 this_alternative_earlyclobber[i] = earlyclobber;
3249 if (win && ! force_reload)
3250 this_alternative_win[i] = 1;
3253 int const_to_mem = 0;
3255 this_alternative_offmemok[i] = offmemok;
3259 /* Alternative loses if it has no regs for a reg operand. */
3260 if (GET_CODE (operand) == REG
3261 && this_alternative[i] == (int) NO_REGS
3262 && this_alternative_matches[i] < 0)
3266 /* If this is a pseudo-register that is set in the previous
3267 insns, there's a good chance that it will already be in a
3268 spill register and we can use that spill register. So
3269 make this case cheaper.
3271 Disabled for egcs. egcs has better inheritance code and
3272 this change causes problems with the improved reload
3273 inheritance code. */
3274 if (GET_CODE (operand) == REG
3275 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3276 && REGNO (operand) == last_output_reload_regno)
3280 /* If this is a constant that is reloaded into the desired
3281 class by copying it to memory first, count that as another
3282 reload. This is consistent with other code and is
3283 required to avoid choosing another alternative when
3284 the constant is moved into memory by this function on
3285 an early reload pass. Note that the test here is
3286 precisely the same as in the code below that calls
3288 if (CONSTANT_P (operand)
3289 /* force_const_mem does not accept HIGH. */
3290 && GET_CODE (operand) != HIGH
3291 && ((PREFERRED_RELOAD_CLASS (operand,
3292 (enum reg_class) this_alternative[i])
3294 || no_input_reloads)
3295 && operand_mode[i] != VOIDmode)
3298 if (this_alternative[i] != (int) NO_REGS)
3302 /* If we can't reload this value at all, reject this
3303 alternative. Note that we could also lose due to
3304 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3307 if (! CONSTANT_P (operand)
3308 && (enum reg_class) this_alternative[i] != NO_REGS
3309 && (PREFERRED_RELOAD_CLASS (operand,
3310 (enum reg_class) this_alternative[i])
3314 /* Alternative loses if it requires a type of reload not
3315 permitted for this insn. We can always reload SCRATCH
3316 and objects with a REG_UNUSED note. */
3317 else if (GET_CODE (operand) != SCRATCH
3318 && modified[i] != RELOAD_READ && no_output_reloads
3319 && ! find_reg_note (insn, REG_UNUSED, operand))
3321 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3326 /* We prefer to reload pseudos over reloading other things,
3327 since such reloads may be able to be eliminated later.
3328 If we are reloading a SCRATCH, we won't be generating any
3329 insns, just using a register, so it is also preferred.
3330 So bump REJECT in other cases. Don't do this in the
3331 case where we are forcing a constant into memory and
3332 it will then win since we don't want to have a different
3333 alternative match then. */
3334 if (! (GET_CODE (operand) == REG
3335 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3336 && GET_CODE (operand) != SCRATCH
3337 && ! (const_to_mem && constmemok))
3340 /* Input reloads can be inherited more often than output
3341 reloads can be removed, so penalize output reloads. */
3342 if (operand_type[i] != RELOAD_FOR_INPUT
3343 && GET_CODE (operand) != SCRATCH)
3347 /* If this operand is a pseudo register that didn't get a hard
3348 reg and this alternative accepts some register, see if the
3349 class that we want is a subset of the preferred class for this
3350 register. If not, but it intersects that class, use the
3351 preferred class instead. If it does not intersect the preferred
3352 class, show that usage of this alternative should be discouraged;
3353 it will be discouraged more still if the register is `preferred
3354 or nothing'. We do this because it increases the chance of
3355 reusing our spill register in a later insn and avoiding a pair
3356 of memory stores and loads.
3358 Don't bother with this if this alternative will accept this
3361 Don't do this for a multiword operand, since it is only a
3362 small win and has the risk of requiring more spill registers,
3363 which could cause a large loss.
3365 Don't do this if the preferred class has only one register
3366 because we might otherwise exhaust the class. */
3369 if (! win && this_alternative[i] != (int) NO_REGS
3370 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3371 && reg_class_size[(int) preferred_class[i]] > 1)
3373 if (! reg_class_subset_p (this_alternative[i],
3374 preferred_class[i]))
3376 /* Since we don't have a way of forming the intersection,
3377 we just do something special if the preferred class
3378 is a subset of the class we have; that's the most
3379 common case anyway. */
3380 if (reg_class_subset_p (preferred_class[i],
3381 this_alternative[i]))
3382 this_alternative[i] = (int) preferred_class[i];
3384 reject += (2 + 2 * pref_or_nothing[i]);
3389 /* Now see if any output operands that are marked "earlyclobber"
3390 in this alternative conflict with any input operands
3391 or any memory addresses. */
3393 for (i = 0; i < noperands; i++)
3394 if (this_alternative_earlyclobber[i]
3395 && this_alternative_win[i])
3397 struct decomposition early_data;
3399 early_data = decompose (recog_operand[i]);
3401 if (modified[i] == RELOAD_READ)
3404 if (this_alternative[i] == NO_REGS)
3406 this_alternative_earlyclobber[i] = 0;
3407 if (this_insn_is_asm)
3408 error_for_asm (this_insn,
3409 "`&' constraint used with no register class");
3414 for (j = 0; j < noperands; j++)
3415 /* Is this an input operand or a memory ref? */
3416 if ((GET_CODE (recog_operand[j]) == MEM
3417 || modified[j] != RELOAD_WRITE)
3419 /* Ignore things like match_operator operands. */
3420 && *recog_constraints[j] != 0
3421 /* Don't count an input operand that is constrained to match
3422 the early clobber operand. */
3423 && ! (this_alternative_matches[j] == i
3424 && rtx_equal_p (recog_operand[i], recog_operand[j]))
3425 /* Is it altered by storing the earlyclobber operand? */
3426 && !immune_p (recog_operand[j], recog_operand[i], early_data))
3428 /* If the output is in a single-reg class,
3429 it's costly to reload it, so reload the input instead. */
3430 if (reg_class_size[this_alternative[i]] == 1
3431 && (GET_CODE (recog_operand[j]) == REG
3432 || GET_CODE (recog_operand[j]) == SUBREG))
3435 this_alternative_win[j] = 0;
3440 /* If an earlyclobber operand conflicts with something,
3441 it must be reloaded, so request this and count the cost. */
3445 this_alternative_win[i] = 0;
3446 for (j = 0; j < noperands; j++)
3447 if (this_alternative_matches[j] == i
3448 && this_alternative_win[j])
3450 this_alternative_win[j] = 0;
3456 /* If one alternative accepts all the operands, no reload required,
3457 choose that alternative; don't consider the remaining ones. */
3460 /* Unswap these so that they are never swapped at `finish'. */
3461 if (commutative >= 0)
3463 recog_operand[commutative] = substed_operand[commutative];
3464 recog_operand[commutative + 1]
3465 = substed_operand[commutative + 1];
3467 for (i = 0; i < noperands; i++)
3469 goal_alternative_win[i] = 1;
3470 goal_alternative[i] = this_alternative[i];
3471 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3472 goal_alternative_matches[i] = this_alternative_matches[i];
3473 goal_alternative_earlyclobber[i]
3474 = this_alternative_earlyclobber[i];
3476 goal_alternative_number = this_alternative_number;
3477 goal_alternative_swapped = swapped;
3478 goal_earlyclobber = this_earlyclobber;
3482 /* REJECT, set by the ! and ? constraint characters and when a register
3483 would be reloaded into a non-preferred class, discourages the use of
3484 this alternative for a reload goal. REJECT is incremented by six
3485 for each ? and two for each non-preferred class. */
3486 losers = losers * 6 + reject;
3488 /* If this alternative can be made to work by reloading,
3489 and it needs less reloading than the others checked so far,
3490 record it as the chosen goal for reloading. */
3491 if (! bad && best > losers)
3493 for (i = 0; i < noperands; i++)
3495 goal_alternative[i] = this_alternative[i];
3496 goal_alternative_win[i] = this_alternative_win[i];
3497 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3498 goal_alternative_matches[i] = this_alternative_matches[i];
3499 goal_alternative_earlyclobber[i]
3500 = this_alternative_earlyclobber[i];
3502 goal_alternative_swapped = swapped;
3504 goal_alternative_number = this_alternative_number;
3505 goal_earlyclobber = this_earlyclobber;
3509 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3510 then we need to try each alternative twice,
3511 the second time matching those two operands
3512 as if we had exchanged them.
3513 To do this, really exchange them in operands.
3515 If we have just tried the alternatives the second time,
3516 return operands to normal and drop through. */
3518 if (commutative >= 0)
3523 register enum reg_class tclass;
3526 recog_operand[commutative] = substed_operand[commutative + 1];
3527 recog_operand[commutative + 1] = substed_operand[commutative];
3529 tclass = preferred_class[commutative];
3530 preferred_class[commutative] = preferred_class[commutative + 1];
3531 preferred_class[commutative + 1] = tclass;
3533 t = pref_or_nothing[commutative];
3534 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3535 pref_or_nothing[commutative + 1] = t;
3537 bcopy ((char *) recog_constraints, (char *) constraints,
3538 noperands * sizeof (char *));
3543 recog_operand[commutative] = substed_operand[commutative];
3544 recog_operand[commutative + 1] = substed_operand[commutative + 1];
3548 /* The operands don't meet the constraints.
3549 goal_alternative describes the alternative
3550 that we could reach by reloading the fewest operands.
3551 Reload so as to fit it. */
3553 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3555 /* No alternative works with reloads?? */
3556 if (insn_code_number >= 0)
3557 fatal_insn ("Unable to generate reloads for:", insn);
3558 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3559 /* Avoid further trouble with this insn. */
3560 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3565 /* Jump to `finish' from above if all operands are valid already.
3566 In that case, goal_alternative_win is all 1. */
3569 /* Right now, for any pair of operands I and J that are required to match,
3571 goal_alternative_matches[J] is I.
3572 Set up goal_alternative_matched as the inverse function:
3573 goal_alternative_matched[I] = J. */
3575 for (i = 0; i < noperands; i++)
3576 goal_alternative_matched[i] = -1;
3578 for (i = 0; i < noperands; i++)
3579 if (! goal_alternative_win[i]
3580 && goal_alternative_matches[i] >= 0)
3581 goal_alternative_matched[goal_alternative_matches[i]] = i;
3583 /* If the best alternative is with operands 1 and 2 swapped,
3584 consider them swapped before reporting the reloads. Update the
3585 operand numbers of any reloads already pushed. */
3587 if (goal_alternative_swapped)
3591 tem = substed_operand[commutative];
3592 substed_operand[commutative] = substed_operand[commutative + 1];
3593 substed_operand[commutative + 1] = tem;
3594 tem = recog_operand[commutative];
3595 recog_operand[commutative] = recog_operand[commutative + 1];
3596 recog_operand[commutative + 1] = tem;
3597 tem = *recog_operand_loc[commutative];
3598 *recog_operand_loc[commutative] = *recog_operand_loc[commutative+1];
3599 *recog_operand_loc[commutative+1] = tem;
3601 for (i = 0; i < n_reloads; i++)
3603 if (reload_opnum[i] == commutative)
3604 reload_opnum[i] = commutative + 1;
3605 else if (reload_opnum[i] == commutative + 1)
3606 reload_opnum[i] = commutative;
3610 for (i = 0; i < noperands; i++)
3612 operand_reloadnum[i] = -1;
3614 /* If this is an earlyclobber operand, we need to widen the scope.
3615 The reload must remain valid from the start of the insn being
3616 reloaded until after the operand is stored into its destination.
3617 We approximate this with RELOAD_OTHER even though we know that we
3618 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3620 One special case that is worth checking is when we have an
3621 output that is earlyclobber but isn't used past the insn (typically
3622 a SCRATCH). In this case, we only need have the reload live
3623 through the insn itself, but not for any of our input or output
3625 But we must not accidentally narrow the scope of an existing
3626 RELOAD_OTHER reload - leave these alone.
3628 In any case, anything needed to address this operand can remain
3629 however they were previously categorized. */
3631 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3633 = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
3634 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3637 /* Any constants that aren't allowed and can't be reloaded
3638 into registers are here changed into memory references. */
3639 for (i = 0; i < noperands; i++)
3640 if (! goal_alternative_win[i]
3641 && CONSTANT_P (recog_operand[i])
3642 /* force_const_mem does not accept HIGH. */
3643 && GET_CODE (recog_operand[i]) != HIGH
3644 && ((PREFERRED_RELOAD_CLASS (recog_operand[i],
3645 (enum reg_class) goal_alternative[i])
3647 || no_input_reloads)
3648 && operand_mode[i] != VOIDmode)
3650 substed_operand[i] = recog_operand[i]
3651 = find_reloads_toplev (force_const_mem (operand_mode[i],
3653 i, address_type[i], ind_levels, 0, insn);
3654 if (alternative_allows_memconst (recog_constraints[i],
3655 goal_alternative_number))
3656 goal_alternative_win[i] = 1;
3659 /* Record the values of the earlyclobber operands for the caller. */
3660 if (goal_earlyclobber)
3661 for (i = 0; i < noperands; i++)
3662 if (goal_alternative_earlyclobber[i])
3663 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3665 /* Now record reloads for all the operands that need them. */
3666 last_output_reload_regno = -1;
3667 for (i = 0; i < noperands; i++)
3668 if (! goal_alternative_win[i])
3670 /* Operands that match previous ones have already been handled. */
3671 if (goal_alternative_matches[i] >= 0)
3673 /* Handle an operand with a nonoffsettable address
3674 appearing where an offsettable address will do
3675 by reloading the address into a base register.
3677 ??? We can also do this when the operand is a register and
3678 reg_equiv_mem is not offsettable, but this is a bit tricky,
3679 so we don't bother with it. It may not be worth doing. */
3680 else if (goal_alternative_matched[i] == -1
3681 && goal_alternative_offmemok[i]
3682 && GET_CODE (recog_operand[i]) == MEM)
3684 operand_reloadnum[i]
3685 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
3686 &XEXP (recog_operand[i], 0), NULL_PTR,
3687 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
3688 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3689 reload_inc[operand_reloadnum[i]]
3690 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
3692 /* If this operand is an output, we will have made any
3693 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3694 now we are treating part of the operand as an input, so
3695 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3697 if (modified[i] == RELOAD_WRITE)
3699 for (j = 0; j < n_reloads; j++)
3701 if (reload_opnum[j] == i)
3703 if (reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3704 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
3705 else if (reload_when_needed[j]
3706 == RELOAD_FOR_OUTADDR_ADDRESS)
3707 reload_when_needed[j] = RELOAD_FOR_INPADDR_ADDRESS;
3712 else if (goal_alternative_matched[i] == -1)
3714 operand_reloadnum[i]
3715 = push_reload ((modified[i] != RELOAD_WRITE
3716 ? recog_operand[i] : 0),
3717 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3718 (modified[i] != RELOAD_WRITE
3719 ? recog_operand_loc[i] : 0),
3720 (modified[i] != RELOAD_READ
3721 ? recog_operand_loc[i] : 0),
3722 (enum reg_class) goal_alternative[i],
3723 (modified[i] == RELOAD_WRITE
3724 ? VOIDmode : operand_mode[i]),
3725 (modified[i] == RELOAD_READ
3726 ? VOIDmode : operand_mode[i]),
3727 (insn_code_number < 0 ? 0
3728 : insn_operand_strict_low[insn_code_number][i]),
3729 0, i, operand_type[i]);
3730 if (modified[i] != RELOAD_READ
3731 && GET_CODE (recog_operand[i]) == REG)
3732 last_output_reload_regno = REGNO (recog_operand[i]);
3734 /* In a matching pair of operands, one must be input only
3735 and the other must be output only.
3736 Pass the input operand as IN and the other as OUT. */
3737 else if (modified[i] == RELOAD_READ
3738 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3740 operand_reloadnum[i]
3741 = push_reload (recog_operand[i],
3742 recog_operand[goal_alternative_matched[i]],
3743 recog_operand_loc[i],
3744 recog_operand_loc[goal_alternative_matched[i]],
3745 (enum reg_class) goal_alternative[i],
3747 operand_mode[goal_alternative_matched[i]],
3748 0, 0, i, RELOAD_OTHER);
3749 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3750 if (GET_CODE (recog_operand[goal_alternative_matched[i]]) == REG)
3751 last_output_reload_regno
3752 = REGNO (recog_operand[goal_alternative_matched[i]]);
3754 else if (modified[i] == RELOAD_WRITE
3755 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3757 operand_reloadnum[goal_alternative_matched[i]]
3758 = push_reload (recog_operand[goal_alternative_matched[i]],
3760 recog_operand_loc[goal_alternative_matched[i]],
3761 recog_operand_loc[i],
3762 (enum reg_class) goal_alternative[i],
3763 operand_mode[goal_alternative_matched[i]],
3765 0, 0, i, RELOAD_OTHER);
3766 operand_reloadnum[i] = output_reloadnum;
3767 if (GET_CODE (recog_operand[i]) == REG)
3768 last_output_reload_regno = REGNO (recog_operand[i]);
3770 else if (insn_code_number >= 0)
3774 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3775 /* Avoid further trouble with this insn. */
3776 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3781 else if (goal_alternative_matched[i] < 0
3782 && goal_alternative_matches[i] < 0
3785 /* For each non-matching operand that's a MEM or a pseudo-register
3786 that didn't get a hard register, make an optional reload.
3787 This may get done even if the insn needs no reloads otherwise. */
3789 rtx operand = recog_operand[i];
3791 while (GET_CODE (operand) == SUBREG)
3792 operand = XEXP (operand, 0);
3793 if ((GET_CODE (operand) == MEM
3794 || (GET_CODE (operand) == REG
3795 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3796 /* If this is only for an output, the optional reload would not
3797 actually cause us to use a register now, just note that
3798 something is stored here. */
3799 && ((enum reg_class) goal_alternative[i] != NO_REGS
3800 || modified[i] == RELOAD_WRITE)
3801 && ! no_input_reloads
3802 /* An optional output reload might allow to delete INSN later.
3803 We mustn't make in-out reloads on insns that are not permitted
3805 If this is an asm, we can't delete it; we must not even call
3806 push_reload for an optional output reload in this case,
3807 because we can't be sure that the constraint allows a register,
3808 and push_reload verifies the constraints for asms. */
3809 && (modified[i] == RELOAD_READ
3810 || (! no_output_reloads && ! this_insn_is_asm)))
3811 operand_reloadnum[i]
3812 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3813 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3814 (modified[i] != RELOAD_WRITE
3815 ? recog_operand_loc[i] : 0),
3816 (modified[i] != RELOAD_READ
3817 ? recog_operand_loc[i] : 0),
3818 (enum reg_class) goal_alternative[i],
3819 (modified[i] == RELOAD_WRITE
3820 ? VOIDmode : operand_mode[i]),
3821 (modified[i] == RELOAD_READ
3822 ? VOIDmode : operand_mode[i]),
3823 (insn_code_number < 0 ? 0
3824 : insn_operand_strict_low[insn_code_number][i]),
3825 1, i, operand_type[i]);
3826 /* If a memory reference remains (either as a MEM or a pseudo that
3827 did not get a hard register), yet we can't make an optional
3828 reload, check if this is actually a pseudo register reference;
3829 we then need to emit a USE and/or a CLOBBER so that reload
3830 inheritance will do the right thing. */
3832 && (GET_CODE (operand) == MEM
3833 || (GET_CODE (operand) == REG
3834 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3835 && reg_renumber [REGNO (operand)] < 0)))
3837 operand = *recog_operand_loc[i];
3839 while (GET_CODE (operand) == SUBREG)
3840 operand = XEXP (operand, 0);
3841 if (GET_CODE (operand) == REG)
3843 if (modified[i] != RELOAD_WRITE)
3844 emit_insn_before (gen_rtx_USE (VOIDmode, operand), insn);
3845 if (modified[i] != RELOAD_READ)
3846 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3850 else if (goal_alternative_matches[i] >= 0
3851 && goal_alternative_win[goal_alternative_matches[i]]
3852 && modified[i] == RELOAD_READ
3853 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3854 && ! no_input_reloads && ! no_output_reloads
3857 /* Similarly, make an optional reload for a pair of matching
3858 objects that are in MEM or a pseudo that didn't get a hard reg. */
3860 rtx operand = recog_operand[i];
3862 while (GET_CODE (operand) == SUBREG)
3863 operand = XEXP (operand, 0);
3864 if ((GET_CODE (operand) == MEM
3865 || (GET_CODE (operand) == REG
3866 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3867 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3869 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3870 = push_reload (recog_operand[goal_alternative_matches[i]],
3872 recog_operand_loc[goal_alternative_matches[i]],
3873 recog_operand_loc[i],
3874 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3875 operand_mode[goal_alternative_matches[i]],
3877 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3880 /* Perform whatever substitutions on the operands we are supposed
3881 to make due to commutativity or replacement of registers
3882 with equivalent constants or memory slots. */
3884 for (i = 0; i < noperands; i++)
3886 /* We only do this on the last pass through reload, because it is
3887 possible for some data (like reg_equiv_address) to be changed during
3888 later passes. Moreover, we loose the opportunity to get a useful
3889 reload_{in,out}_reg when we do these replacements. */
3893 rtx substitution = substed_operand[i];
3895 *recog_operand_loc[i] = substitution;
3897 /* If we're replacing an operand with a LABEL_REF, we need
3898 to make sure that there's a REG_LABEL note attached to
3899 this instruction. */
3900 if (GET_CODE (insn) != JUMP_INSN
3901 && GET_CODE (substitution) == LABEL_REF
3902 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
3903 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL,
3904 XEXP (substitution, 0),
3908 retval |= (substed_operand[i] != *recog_operand_loc[i]);
3911 /* If this insn pattern contains any MATCH_DUP's, make sure that
3912 they will be substituted if the operands they match are substituted.
3913 Also do now any substitutions we already did on the operands.
3915 Don't do this if we aren't making replacements because we might be
3916 propagating things allocated by frame pointer elimination into places
3917 it doesn't expect. */
3919 if (insn_code_number >= 0 && replace)
3920 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3922 int opno = recog_dup_num[i];
3923 *recog_dup_loc[i] = *recog_operand_loc[opno];
3924 if (operand_reloadnum[opno] >= 0)
3925 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3926 insn_operand_mode[insn_code_number][opno]);
3930 /* This loses because reloading of prior insns can invalidate the equivalence
3931 (or at least find_equiv_reg isn't smart enough to find it any more),
3932 causing this insn to need more reload regs than it needed before.
3933 It may be too late to make the reload regs available.
3934 Now this optimization is done safely in choose_reload_regs. */
3936 /* For each reload of a reg into some other class of reg,
3937 search for an existing equivalent reg (same value now) in the right class.
3938 We can use it as long as we don't need to change its contents. */
3939 for (i = 0; i < n_reloads; i++)
3940 if (reload_reg_rtx[i] == 0
3941 && reload_in[i] != 0
3942 && GET_CODE (reload_in[i]) == REG
3943 && reload_out[i] == 0)
3946 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3947 static_reload_reg_p, 0, reload_inmode[i]);
3948 /* Prevent generation of insn to load the value
3949 because the one we found already has the value. */
3950 if (reload_reg_rtx[i])
3951 reload_in[i] = reload_reg_rtx[i];
3955 /* Perhaps an output reload can be combined with another
3956 to reduce needs by one. */
3957 if (!goal_earlyclobber)
3960 /* If we have a pair of reloads for parts of an address, they are reloading
3961 the same object, the operands themselves were not reloaded, and they
3962 are for two operands that are supposed to match, merge the reloads and
3963 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3965 for (i = 0; i < n_reloads; i++)
3969 for (j = i + 1; j < n_reloads; j++)
3970 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3971 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3972 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3973 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3974 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
3975 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS
3976 || reload_when_needed[j] == RELOAD_FOR_INPADDR_ADDRESS
3977 || reload_when_needed[j] == RELOAD_FOR_OUTADDR_ADDRESS)
3978 && rtx_equal_p (reload_in[i], reload_in[j])
3979 && (operand_reloadnum[reload_opnum[i]] < 0
3980 || reload_optional[operand_reloadnum[reload_opnum[i]]])
3981 && (operand_reloadnum[reload_opnum[j]] < 0
3982 || reload_optional[operand_reloadnum[reload_opnum[j]]])
3983 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
3984 || (goal_alternative_matches[reload_opnum[j]]
3985 == reload_opnum[i])))
3987 for (k = 0; k < n_replacements; k++)
3988 if (replacements[k].what == j)
3989 replacements[k].what = i;
3991 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3992 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3993 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
3995 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
4000 /* Scan all the reloads and update their type.
4001 If a reload is for the address of an operand and we didn't reload
4002 that operand, change the type. Similarly, change the operand number
4003 of a reload when two operands match. If a reload is optional, treat it
4004 as though the operand isn't reloaded.
4006 ??? This latter case is somewhat odd because if we do the optional
4007 reload, it means the object is hanging around. Thus we need only
4008 do the address reload if the optional reload was NOT done.
4010 Change secondary reloads to be the address type of their operand, not
4013 If an operand's reload is now RELOAD_OTHER, change any
4014 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4015 RELOAD_FOR_OTHER_ADDRESS. */
4017 for (i = 0; i < n_reloads; i++)
4019 if (reload_secondary_p[i]
4020 && reload_when_needed[i] == operand_type[reload_opnum[i]])
4021 reload_when_needed[i] = address_type[reload_opnum[i]];
4023 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
4024 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
4025 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
4026 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
4027 && (operand_reloadnum[reload_opnum[i]] < 0
4028 || reload_optional[operand_reloadnum[reload_opnum[i]]]))
4030 /* If we have a secondary reload to go along with this reload,
4031 change its type to RELOAD_FOR_OPADDR_ADDR. */
4033 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
4034 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
4035 && reload_secondary_in_reload[i] != -1)
4037 int secondary_in_reload = reload_secondary_in_reload[i];
4039 reload_when_needed[secondary_in_reload]
4040 = RELOAD_FOR_OPADDR_ADDR;
4042 /* If there's a tertiary reload we have to change it also. */
4043 if (secondary_in_reload > 0
4044 && reload_secondary_in_reload[secondary_in_reload] != -1)
4045 reload_when_needed[reload_secondary_in_reload[secondary_in_reload]]
4046 = RELOAD_FOR_OPADDR_ADDR;
4049 if ((reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
4050 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
4051 && reload_secondary_out_reload[i] != -1)
4053 int secondary_out_reload = reload_secondary_out_reload[i];
4055 reload_when_needed[secondary_out_reload]
4056 = RELOAD_FOR_OPADDR_ADDR;
4058 /* If there's a tertiary reload we have to change it also. */
4059 if (secondary_out_reload
4060 && reload_secondary_out_reload[secondary_out_reload] != -1)
4061 reload_when_needed[reload_secondary_out_reload[secondary_out_reload]]
4062 = RELOAD_FOR_OPADDR_ADDR;
4065 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
4066 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
4067 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
4069 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
4072 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
4073 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
4074 && operand_reloadnum[reload_opnum[i]] >= 0
4075 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
4077 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
4079 if (goal_alternative_matches[reload_opnum[i]] >= 0)
4080 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
4083 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4084 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4085 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4087 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4088 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4089 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4090 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4091 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4092 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4093 This is complicated by the fact that a single operand can have more
4094 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4095 choose_reload_regs without affecting code quality, and cases that
4096 actually fail are extremely rare, so it turns out to be better to fix
4097 the problem here by not generating cases that choose_reload_regs will
4099 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4100 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4102 We can reduce the register pressure by exploiting that a
4103 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4104 does not conflict with any of them, if it is only used for the first of
4105 the RELOAD_FOR_X_ADDRESS reloads. */
4107 int first_op_addr_num = -2;
4108 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4109 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4111 /* We use last_op_addr_reload and the contents of the above arrays
4112 first as flags - -2 means no instance encountered, -1 means exactly
4113 one instance encountered.
4114 If more than one instance has been encountered, we store the reload
4115 number of the first reload of the kind in question; reload numbers
4116 are known to be non-negative. */
4117 for (i = 0; i < noperands; i++)
4118 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4119 for (i = n_reloads - 1; i >= 0; i--)
4121 switch (reload_when_needed[i])
4123 case RELOAD_FOR_OPERAND_ADDRESS:
4124 if (++first_op_addr_num >= 0)
4126 first_op_addr_num = i;
4130 case RELOAD_FOR_INPUT_ADDRESS:
4131 if (++first_inpaddr_num[reload_opnum[i]] >= 0)
4133 first_inpaddr_num[reload_opnum[i]] = i;
4137 case RELOAD_FOR_OUTPUT_ADDRESS:
4138 if (++first_outpaddr_num[reload_opnum[i]] >= 0)
4140 first_outpaddr_num[reload_opnum[i]] = i;
4151 for (i = 0; i < n_reloads; i++)
4153 int first_num, type;
4155 switch (reload_when_needed[i])
4157 case RELOAD_FOR_OPADDR_ADDR:
4158 first_num = first_op_addr_num;
4159 type = RELOAD_FOR_OPERAND_ADDRESS;
4161 case RELOAD_FOR_INPADDR_ADDRESS:
4162 first_num = first_inpaddr_num[reload_opnum[i]];
4163 type = RELOAD_FOR_INPUT_ADDRESS;
4165 case RELOAD_FOR_OUTADDR_ADDRESS:
4166 first_num = first_outpaddr_num[reload_opnum[i]];
4167 type = RELOAD_FOR_OUTPUT_ADDRESS;
4174 else if (i > first_num)
4175 reload_when_needed[i] = type;
4178 /* Check if the only TYPE reload that uses reload I is
4179 reload FIRST_NUM. */
4180 for (j = n_reloads - 1; j > first_num; j--)
4182 if (reload_when_needed[j] == type
4183 && (reload_secondary_p[i]
4184 ? reload_secondary_in_reload[j] == i
4185 : reg_mentioned_p (reload_in[i], reload_in[j])))
4187 reload_when_needed[i] = type;
4196 /* See if we have any reloads that are now allowed to be merged
4197 because we've changed when the reload is needed to
4198 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4199 check for the most common cases. */
4201 for (i = 0; i < n_reloads; i++)
4202 if (reload_in[i] != 0 && reload_out[i] == 0
4203 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
4204 || reload_when_needed[i] == RELOAD_FOR_OPADDR_ADDR
4205 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
4206 for (j = 0; j < n_reloads; j++)
4207 if (i != j && reload_in[j] != 0 && reload_out[j] == 0
4208 && reload_when_needed[j] == reload_when_needed[i]
4209 && MATCHES (reload_in[i], reload_in[j])
4210 && reload_reg_class[i] == reload_reg_class[j]
4211 && !reload_nocombine[i] && !reload_nocombine[j]
4212 && reload_reg_rtx[i] == reload_reg_rtx[j])
4214 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
4215 transfer_replacements (i, j);
4219 /* Set which reloads must use registers not used in any group. Start
4220 with those that conflict with a group and then include ones that
4221 conflict with ones that are already known to conflict with a group. */
4224 for (i = 0; i < n_reloads; i++)
4226 enum machine_mode mode = reload_inmode[i];
4227 enum reg_class class = reload_reg_class[i];
4230 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode))
4231 mode = reload_outmode[i];
4232 size = CLASS_MAX_NREGS (class, mode);
4235 for (j = 0; j < n_reloads; j++)
4236 if ((CLASS_MAX_NREGS (reload_reg_class[j],
4237 (GET_MODE_SIZE (reload_outmode[j])
4238 > GET_MODE_SIZE (reload_inmode[j]))
4239 ? reload_outmode[j] : reload_inmode[j])
4241 && !reload_optional[j]
4242 && (reload_in[j] != 0 || reload_out[j] != 0
4243 || reload_secondary_p[j])
4244 && reloads_conflict (i, j)
4245 && reg_classes_intersect_p (class, reload_reg_class[j]))
4247 reload_nongroup[i] = 1;
4257 for (i = 0; i < n_reloads; i++)
4259 enum machine_mode mode = reload_inmode[i];
4260 enum reg_class class = reload_reg_class[i];
4263 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode))
4264 mode = reload_outmode[i];
4265 size = CLASS_MAX_NREGS (class, mode);
4267 if (! reload_nongroup[i] && size == 1)
4268 for (j = 0; j < n_reloads; j++)
4269 if (reload_nongroup[j]
4270 && reloads_conflict (i, j)
4271 && reg_classes_intersect_p (class, reload_reg_class[j]))
4273 reload_nongroup[i] = 1;
4280 #else /* no REGISTER_CONSTRAINTS */
4282 int insn_code_number;
4283 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
4285 rtx body = PATTERN (insn);
4290 n_earlyclobbers = 0;
4291 replace_reloads = replace;
4294 extract_insn (insn);
4296 noperands = reload_n_operands = recog_n_operands;
4298 /* Return if the insn needs no reload processing. */
4302 for (i = 0; i < noperands; i++)
4304 register RTX_CODE code = GET_CODE (recog_operand[i]);
4305 int is_set_dest = GET_CODE (body) == SET && (i == 0);
4307 if (insn_code_number >= 0)
4308 if (insn_operand_address_p[insn_code_number][i])
4309 find_reloads_address (VOIDmode, NULL_PTR,
4310 recog_operand[i], recog_operand_loc[i],
4311 i, RELOAD_FOR_INPUT, ind_levels, insn);
4313 /* In these cases, we can't tell if the operand is an input
4314 or an output, so be conservative. In practice it won't be
4318 find_reloads_address (GET_MODE (recog_operand[i]),
4319 recog_operand_loc[i],
4320 XEXP (recog_operand[i], 0),
4321 &XEXP (recog_operand[i], 0),
4322 i, RELOAD_OTHER, ind_levels, insn);
4324 recog_operand[i] = *recog_operand_loc[i]
4325 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
4326 ind_levels, is_set_dest);
4329 register int regno = REGNO (recog_operand[i]);
4330 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4331 recog_operand[i] = *recog_operand_loc[i]
4332 = reg_equiv_constant[regno];
4333 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4334 that feeds this insn. */
4335 if (reg_equiv_mem[regno] != 0)
4336 recog_operand[i] = *recog_operand_loc[i]
4337 = reg_equiv_mem[regno];
4342 /* Perhaps an output reload can be combined with another
4343 to reduce needs by one. */
4344 if (!goal_earlyclobber)
4346 #endif /* no REGISTER_CONSTRAINTS */
4350 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4351 accepts a memory operand with constant address. */
4354 alternative_allows_memconst (constraint, altnum)
4355 const char *constraint;
4359 /* Skip alternatives before the one requested. */
4362 while (*constraint++ != ',');
4365 /* Scan the requested alternative for 'm' or 'o'.
4366 If one of them is present, this alternative accepts memory constants. */
4367 while ((c = *constraint++) && c != ',' && c != '#')
4368 if (c == 'm' || c == 'o')
4373 /* Scan X for memory references and scan the addresses for reloading.
4374 Also checks for references to "constant" regs that we want to eliminate
4375 and replaces them with the values they stand for.
4376 We may alter X destructively if it contains a reference to such.
4377 If X is just a constant reg, we return the equivalent value
4380 IND_LEVELS says how many levels of indirect addressing this machine
4383 OPNUM and TYPE identify the purpose of the reload.
4385 IS_SET_DEST is true if X is the destination of a SET, which is not
4386 appropriate to be replaced by a constant.
4388 INSN, if nonzero, is the insn in which we do the reload. It is used
4389 to determine if we may generate output reloads, and where to put USEs
4390 for pseudos that we have to replace with stack slots. */
4393 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn)
4396 enum reload_type type;
4401 register RTX_CODE code = GET_CODE (x);
4403 register char *fmt = GET_RTX_FORMAT (code);
4409 /* This code is duplicated for speed in find_reloads. */
4410 register int regno = REGNO (x);
4411 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4412 x = reg_equiv_constant[regno];
4414 /* This creates (subreg (mem...)) which would cause an unnecessary
4415 reload of the mem. */
4416 else if (reg_equiv_mem[regno] != 0)
4417 x = reg_equiv_mem[regno];
4419 else if (reg_equiv_memory_loc[regno]
4420 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4422 rtx mem = make_memloc (x, regno);
4423 if (reg_equiv_address[regno]
4424 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4426 /* If this is not a toplevel operand, find_reloads doesn't see
4427 this substitution. We have to emit a USE of the pseudo so
4428 that delete_output_reload can see it. */
4429 if (replace_reloads && recog_operand[opnum] != x)
4430 emit_insn_before (gen_rtx_USE (VOIDmode, x), insn);
4432 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4433 opnum, type, ind_levels, insn);
4441 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4442 opnum, type, ind_levels, insn);
4446 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4448 /* Check for SUBREG containing a REG that's equivalent to a constant.
4449 If the constant has a known value, truncate it right now.
4450 Similarly if we are extracting a single-word of a multi-word
4451 constant. If the constant is symbolic, allow it to be substituted
4452 normally. push_reload will strip the subreg later. If the
4453 constant is VOIDmode, abort because we will lose the mode of
4454 the register (this should never happen because one of the cases
4455 above should handle it). */
4457 register int regno = REGNO (SUBREG_REG (x));
4460 if (subreg_lowpart_p (x)
4461 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4462 && reg_equiv_constant[regno] != 0
4463 && (tem = gen_lowpart_common (GET_MODE (x),
4464 reg_equiv_constant[regno])) != 0)
4467 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
4468 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4469 && reg_equiv_constant[regno] != 0
4470 && (tem = operand_subword (reg_equiv_constant[regno],
4472 GET_MODE (SUBREG_REG (x)))) != 0)
4474 /* TEM is now a word sized constant for the bits from X that
4475 we wanted. However, TEM may be the wrong representation.
4477 Use gen_lowpart_common to convert a CONST_INT into a
4478 CONST_DOUBLE and vice versa as needed according to by the mode
4480 tem = gen_lowpart_common (GET_MODE (x), tem);
4486 /* If the SUBREG is wider than a word, the above test will fail.
4487 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4488 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4489 a 32 bit target. We still can - and have to - handle this
4490 for non-paradoxical subregs of CONST_INTs. */
4491 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4492 && reg_equiv_constant[regno] != 0
4493 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT
4494 && (GET_MODE_SIZE (GET_MODE (x))
4495 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
4497 int shift = SUBREG_WORD (x) * BITS_PER_WORD;
4498 if (WORDS_BIG_ENDIAN)
4499 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
4500 - GET_MODE_BITSIZE (GET_MODE (x))
4502 /* Here we use the knowledge that CONST_INTs have a
4503 HOST_WIDE_INT field. */
4504 if (shift >= HOST_BITS_PER_WIDE_INT)
4505 shift = HOST_BITS_PER_WIDE_INT - 1;
4506 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift);
4509 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4510 && reg_equiv_constant[regno] != 0
4511 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
4514 /* If the subreg contains a reg that will be converted to a mem,
4515 convert the subreg to a narrower memref now.
4516 Otherwise, we would get (subreg (mem ...) ...),
4517 which would force reload of the mem.
4519 We also need to do this if there is an equivalent MEM that is
4520 not offsettable. In that case, alter_subreg would produce an
4521 invalid address on big-endian machines.
4523 For machines that extend byte loads, we must not reload using
4524 a wider mode if we have a paradoxical SUBREG. find_reloads will
4525 force a reload in that case. So we should not do anything here. */
4527 else if (regno >= FIRST_PSEUDO_REGISTER
4528 #ifdef LOAD_EXTEND_OP
4529 && (GET_MODE_SIZE (GET_MODE (x))
4530 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4532 && (reg_equiv_address[regno] != 0
4533 || (reg_equiv_mem[regno] != 0
4534 && (! strict_memory_address_p (GET_MODE (x),
4535 XEXP (reg_equiv_mem[regno], 0))
4536 || ! offsettable_memref_p (reg_equiv_mem[regno])
4537 || num_not_at_initial_offset))))
4538 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4542 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4546 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4547 ind_levels, is_set_dest, insn);
4548 /* If we have replaced a reg with it's equivalent memory loc -
4549 that can still be handled here e.g. if it's in a paradoxical
4550 subreg - we must make the change in a copy, rather than using
4551 a destructive change. This way, find_reloads can still elect
4552 not to do the change. */
4553 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4555 x = shallow_copy_rtx (x);
4558 XEXP (x, i) = new_part;
4564 /* Return a mem ref for the memory equivalent of reg REGNO.
4565 This mem ref is not shared with anything. */
4568 make_memloc (ad, regno)
4572 /* We must rerun eliminate_regs, in case the elimination
4573 offsets have changed. */
4575 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4577 /* If TEM might contain a pseudo, we must copy it to avoid
4578 modifying it when we do the substitution for the reload. */
4579 if (rtx_varies_p (tem))
4580 tem = copy_rtx (tem);
4582 tem = gen_rtx_MEM (GET_MODE (ad), tem);
4583 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4587 /* Record all reloads needed for handling memory address AD
4588 which appears in *LOC in a memory reference to mode MODE
4589 which itself is found in location *MEMREFLOC.
4590 Note that we take shortcuts assuming that no multi-reg machine mode
4591 occurs as part of an address.
4593 OPNUM and TYPE specify the purpose of this reload.
4595 IND_LEVELS says how many levels of indirect addressing this machine
4598 INSN, if nonzero, is the insn in which we do the reload. It is used
4599 to determine if we may generate output reloads, and where to put USEs
4600 for pseudos that we have to replace with stack slots.
4602 Value is nonzero if this address is reloaded or replaced as a whole.
4603 This is interesting to the caller if the address is an autoincrement.
4605 Note that there is no verification that the address will be valid after
4606 this routine does its work. Instead, we rely on the fact that the address
4607 was valid when reload started. So we need only undo things that reload
4608 could have broken. These are wrong register types, pseudos not allocated
4609 to a hard register, and frame pointer elimination. */
4612 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn)
4613 enum machine_mode mode;
4618 enum reload_type type;
4623 int removed_and = 0;
4626 /* If the address is a register, see if it is a legitimate address and
4627 reload if not. We first handle the cases where we need not reload
4628 or where we must reload in a non-standard way. */
4630 if (GET_CODE (ad) == REG)
4634 if (reg_equiv_constant[regno] != 0
4635 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
4637 *loc = ad = reg_equiv_constant[regno];
4641 tem = reg_equiv_memory_loc[regno];
4644 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4646 tem = make_memloc (ad, regno);
4647 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4649 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
4650 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
4653 /* We can avoid a reload if the register's equivalent memory
4654 expression is valid as an indirect memory address.
4655 But not all addresses are valid in a mem used as an indirect
4656 address: only reg or reg+constant. */
4659 && strict_memory_address_p (mode, tem)
4660 && (GET_CODE (XEXP (tem, 0)) == REG
4661 || (GET_CODE (XEXP (tem, 0)) == PLUS
4662 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4663 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4665 /* TEM is not the same as what we'll be replacing the
4666 pseudo with after reload, put a USE in front of INSN
4667 in the final reload pass. */
4669 && num_not_at_initial_offset
4670 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4673 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
4674 /* This doesn't really count as replacing the address
4675 as a whole, since it is still a memory access. */
4683 /* The only remaining case where we can avoid a reload is if this is a
4684 hard register that is valid as a base register and which is not the
4685 subject of a CLOBBER in this insn. */
4687 else if (regno < FIRST_PSEUDO_REGISTER
4688 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4689 && ! regno_clobbered_p (regno, this_insn, GET_MODE (ad), 0))
4692 /* If we do not have one of the cases above, we must do the reload. */
4693 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
4694 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4698 if (strict_memory_address_p (mode, ad))
4700 /* The address appears valid, so reloads are not needed.
4701 But the address may contain an eliminable register.
4702 This can happen because a machine with indirect addressing
4703 may consider a pseudo register by itself a valid address even when
4704 it has failed to get a hard reg.
4705 So do a tree-walk to find and eliminate all such regs. */
4707 /* But first quickly dispose of a common case. */
4708 if (GET_CODE (ad) == PLUS
4709 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4710 && GET_CODE (XEXP (ad, 0)) == REG
4711 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4714 subst_reg_equivs_changed = 0;
4715 *loc = subst_reg_equivs (ad, insn);
4717 if (! subst_reg_equivs_changed)
4720 /* Check result for validity after substitution. */
4721 if (strict_memory_address_p (mode, ad))
4725 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4730 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4735 *memrefloc = copy_rtx (*memrefloc);
4736 XEXP (*memrefloc, 0) = ad;
4737 move_replacements (&ad, &XEXP (*memrefloc, 0));
4743 /* The address is not valid. We have to figure out why. First see if
4744 we have an outer AND and remove it if so. Then analyze what's inside. */
4746 if (GET_CODE (ad) == AND)
4749 loc = &XEXP (ad, 0);
4753 /* One possibility for why the address is invalid is that it is itself
4754 a MEM. This can happen when the frame pointer is being eliminated, a
4755 pseudo is not allocated to a hard register, and the offset between the
4756 frame and stack pointers is not its initial value. In that case the
4757 pseudo will have been replaced by a MEM referring to the
4759 if (GET_CODE (ad) == MEM)
4761 /* First ensure that the address in this MEM is valid. Then, unless
4762 indirect addresses are valid, reload the MEM into a register. */
4764 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4765 opnum, ADDR_TYPE (type),
4766 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4768 /* If tem was changed, then we must create a new memory reference to
4769 hold it and store it back into memrefloc. */
4770 if (tem != ad && memrefloc)
4772 *memrefloc = copy_rtx (*memrefloc);
4773 copy_replacements (tem, XEXP (*memrefloc, 0));
4774 loc = &XEXP (*memrefloc, 0);
4776 loc = &XEXP (*loc, 0);
4779 /* Check similar cases as for indirect addresses as above except
4780 that we can allow pseudos and a MEM since they should have been
4781 taken care of above. */
4784 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4785 || GET_CODE (XEXP (tem, 0)) == MEM
4786 || ! (GET_CODE (XEXP (tem, 0)) == REG
4787 || (GET_CODE (XEXP (tem, 0)) == PLUS
4788 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4789 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4791 /* Must use TEM here, not AD, since it is the one that will
4792 have any subexpressions reloaded, if needed. */
4793 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4794 BASE_REG_CLASS, GET_MODE (tem),
4797 return ! removed_and;
4803 /* If we have address of a stack slot but it's not valid because the
4804 displacement is too large, compute the sum in a register.
4805 Handle all base registers here, not just fp/ap/sp, because on some
4806 targets (namely SH) we can also get too large displacements from
4807 big-endian corrections. */
4808 else if (GET_CODE (ad) == PLUS
4809 && GET_CODE (XEXP (ad, 0)) == REG
4810 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4811 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4812 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4814 /* Unshare the MEM rtx so we can safely alter it. */
4817 *memrefloc = copy_rtx (*memrefloc);
4818 loc = &XEXP (*memrefloc, 0);
4820 loc = &XEXP (*loc, 0);
4823 if (double_reg_address_ok)
4825 /* Unshare the sum as well. */
4826 *loc = ad = copy_rtx (ad);
4828 /* Reload the displacement into an index reg.
4829 We assume the frame pointer or arg pointer is a base reg. */
4830 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4831 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4837 /* If the sum of two regs is not necessarily valid,
4838 reload the sum into a base reg.
4839 That will at least work. */
4840 find_reloads_address_part (ad, loc, BASE_REG_CLASS,
4841 Pmode, opnum, type, ind_levels);
4843 return ! removed_and;
4846 /* If we have an indexed stack slot, there are three possible reasons why
4847 it might be invalid: The index might need to be reloaded, the address
4848 might have been made by frame pointer elimination and hence have a
4849 constant out of range, or both reasons might apply.
4851 We can easily check for an index needing reload, but even if that is the
4852 case, we might also have an invalid constant. To avoid making the
4853 conservative assumption and requiring two reloads, we see if this address
4854 is valid when not interpreted strictly. If it is, the only problem is
4855 that the index needs a reload and find_reloads_address_1 will take care
4858 There is still a case when we might generate an extra reload,
4859 however. In certain cases eliminate_regs will return a MEM for a REG
4860 (see the code there for details). In those cases, memory_address_p
4861 applied to our address will return 0 so we will think that our offset
4862 must be too large. But it might indeed be valid and the only problem
4863 is that a MEM is present where a REG should be. This case should be
4864 very rare and there doesn't seem to be any way to avoid it.
4866 If we decide to do something here, it must be that
4867 `double_reg_address_ok' is true and that this address rtl was made by
4868 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4869 rework the sum so that the reload register will be added to the index.
4870 This is safe because we know the address isn't shared.
4872 We check for fp/ap/sp as both the first and second operand of the
4875 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4876 && GET_CODE (XEXP (ad, 0)) == PLUS
4877 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4878 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4879 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4881 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4882 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4884 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4885 && ! memory_address_p (mode, ad))
4887 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4888 plus_constant (XEXP (XEXP (ad, 0), 0),
4889 INTVAL (XEXP (ad, 1))),
4890 XEXP (XEXP (ad, 0), 1));
4891 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4892 GET_MODE (ad), opnum, type, ind_levels);
4893 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4899 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4900 && GET_CODE (XEXP (ad, 0)) == PLUS
4901 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4902 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4903 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4905 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4906 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4908 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4909 && ! memory_address_p (mode, ad))
4911 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4912 XEXP (XEXP (ad, 0), 0),
4913 plus_constant (XEXP (XEXP (ad, 0), 1),
4914 INTVAL (XEXP (ad, 1))));
4915 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), BASE_REG_CLASS,
4916 GET_MODE (ad), opnum, type, ind_levels);
4917 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4923 /* See if address becomes valid when an eliminable register
4924 in a sum is replaced. */
4927 if (GET_CODE (ad) == PLUS)
4928 tem = subst_indexed_address (ad);
4929 if (tem != ad && strict_memory_address_p (mode, tem))
4931 /* Ok, we win that way. Replace any additional eliminable
4934 subst_reg_equivs_changed = 0;
4935 tem = subst_reg_equivs (tem, insn);
4937 /* Make sure that didn't make the address invalid again. */
4939 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4946 /* If constants aren't valid addresses, reload the constant address
4948 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4950 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4951 Unshare it so we can safely alter it. */
4952 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4953 && CONSTANT_POOL_ADDRESS_P (ad))
4955 *memrefloc = copy_rtx (*memrefloc);
4956 loc = &XEXP (*memrefloc, 0);
4958 loc = &XEXP (*loc, 0);
4961 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
4963 return ! removed_and;
4966 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
4970 /* Find all pseudo regs appearing in AD
4971 that are eliminable in favor of equivalent values
4972 and do not have hard regs; replace them by their equivalents.
4973 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4974 front of it for pseudos that we have to replace with stack slots. */
4977 subst_reg_equivs (ad, insn)
4981 register RTX_CODE code = GET_CODE (ad);
4999 register int regno = REGNO (ad);
5001 if (reg_equiv_constant[regno] != 0)
5003 subst_reg_equivs_changed = 1;
5004 return reg_equiv_constant[regno];
5006 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
5008 rtx mem = make_memloc (ad, regno);
5009 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
5011 subst_reg_equivs_changed = 1;
5012 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
5020 /* Quickly dispose of a common case. */
5021 if (XEXP (ad, 0) == frame_pointer_rtx
5022 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
5030 fmt = GET_RTX_FORMAT (code);
5031 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5033 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5037 /* Compute the sum of X and Y, making canonicalizations assumed in an
5038 address, namely: sum constant integers, surround the sum of two
5039 constants with a CONST, put the constant as the second operand, and
5040 group the constant on the outermost sum.
5042 This routine assumes both inputs are already in canonical form. */
5049 enum machine_mode mode = GET_MODE (x);
5051 if (mode == VOIDmode)
5052 mode = GET_MODE (y);
5054 if (mode == VOIDmode)
5057 if (GET_CODE (x) == CONST_INT)
5058 return plus_constant (y, INTVAL (x));
5059 else if (GET_CODE (y) == CONST_INT)
5060 return plus_constant (x, INTVAL (y));
5061 else if (CONSTANT_P (x))
5062 tem = x, x = y, y = tem;
5064 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5065 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5067 /* Note that if the operands of Y are specified in the opposite
5068 order in the recursive calls below, infinite recursion will occur. */
5069 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5070 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5072 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5073 constant will have been placed second. */
5074 if (CONSTANT_P (x) && CONSTANT_P (y))
5076 if (GET_CODE (x) == CONST)
5078 if (GET_CODE (y) == CONST)
5081 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5084 return gen_rtx_PLUS (mode, x, y);
5087 /* If ADDR is a sum containing a pseudo register that should be
5088 replaced with a constant (from reg_equiv_constant),
5089 return the result of doing so, and also apply the associative
5090 law so that the result is more likely to be a valid address.
5091 (But it is not guaranteed to be one.)
5093 Note that at most one register is replaced, even if more are
5094 replaceable. Also, we try to put the result into a canonical form
5095 so it is more likely to be a valid address.
5097 In all other cases, return ADDR. */
5100 subst_indexed_address (addr)
5103 rtx op0 = 0, op1 = 0, op2 = 0;
5107 if (GET_CODE (addr) == PLUS)
5109 /* Try to find a register to replace. */
5110 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5111 if (GET_CODE (op0) == REG
5112 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5113 && reg_renumber[regno] < 0
5114 && reg_equiv_constant[regno] != 0)
5115 op0 = reg_equiv_constant[regno];
5116 else if (GET_CODE (op1) == REG
5117 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5118 && reg_renumber[regno] < 0
5119 && reg_equiv_constant[regno] != 0)
5120 op1 = reg_equiv_constant[regno];
5121 else if (GET_CODE (op0) == PLUS
5122 && (tem = subst_indexed_address (op0)) != op0)
5124 else if (GET_CODE (op1) == PLUS
5125 && (tem = subst_indexed_address (op1)) != op1)
5130 /* Pick out up to three things to add. */
5131 if (GET_CODE (op1) == PLUS)
5132 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5133 else if (GET_CODE (op0) == PLUS)
5134 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5136 /* Compute the sum. */
5138 op1 = form_sum (op1, op2);
5140 op0 = form_sum (op0, op1);
5147 /* Record the pseudo registers we must reload into hard registers in a
5148 subexpression of a would-be memory address, X referring to a value
5149 in mode MODE. (This function is not called if the address we find
5152 CONTEXT = 1 means we are considering regs as index regs,
5153 = 0 means we are considering them as base regs.
5155 OPNUM and TYPE specify the purpose of any reloads made.
5157 IND_LEVELS says how many levels of indirect addressing are
5158 supported at this point in the address.
5160 INSN, if nonzero, is the insn in which we do the reload. It is used
5161 to determine if we may generate output reloads.
5163 We return nonzero if X, as a whole, is reloaded or replaced. */
5165 /* Note that we take shortcuts assuming that no multi-reg machine mode
5166 occurs as part of an address.
5167 Also, this is not fully machine-customizable; it works for machines
5168 such as vaxes and 68000's and 32000's, but other possible machines
5169 could have addressing modes that this does not handle right. */
5172 find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
5173 enum machine_mode mode;
5178 enum reload_type type;
5182 register RTX_CODE code = GET_CODE (x);
5188 register rtx orig_op0 = XEXP (x, 0);
5189 register rtx orig_op1 = XEXP (x, 1);
5190 register RTX_CODE code0 = GET_CODE (orig_op0);
5191 register RTX_CODE code1 = GET_CODE (orig_op1);
5192 register rtx op0 = orig_op0;
5193 register rtx op1 = orig_op1;
5195 if (GET_CODE (op0) == SUBREG)
5197 op0 = SUBREG_REG (op0);
5198 code0 = GET_CODE (op0);
5199 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5200 op0 = gen_rtx_REG (word_mode,
5201 REGNO (op0) + SUBREG_WORD (orig_op0));
5204 if (GET_CODE (op1) == SUBREG)
5206 op1 = SUBREG_REG (op1);
5207 code1 = GET_CODE (op1);
5208 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5209 op1 = gen_rtx_REG (GET_MODE (op1),
5210 REGNO (op1) + SUBREG_WORD (orig_op1));
5213 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5214 || code0 == ZERO_EXTEND || code1 == MEM)
5216 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5217 type, ind_levels, insn);
5218 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5219 type, ind_levels, insn);
5222 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5223 || code1 == ZERO_EXTEND || code0 == MEM)
5225 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5226 type, ind_levels, insn);
5227 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5228 type, ind_levels, insn);
5231 else if (code0 == CONST_INT || code0 == CONST
5232 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5233 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5234 type, ind_levels, insn);
5236 else if (code1 == CONST_INT || code1 == CONST
5237 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5238 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5239 type, ind_levels, insn);
5241 else if (code0 == REG && code1 == REG)
5243 if (REG_OK_FOR_INDEX_P (op0)
5244 && REG_MODE_OK_FOR_BASE_P (op1, mode))
5246 else if (REG_OK_FOR_INDEX_P (op1)
5247 && REG_MODE_OK_FOR_BASE_P (op0, mode))
5249 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5250 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5251 type, ind_levels, insn);
5252 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5253 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5254 type, ind_levels, insn);
5255 else if (REG_OK_FOR_INDEX_P (op1))
5256 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5257 type, ind_levels, insn);
5258 else if (REG_OK_FOR_INDEX_P (op0))
5259 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5260 type, ind_levels, insn);
5263 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5264 type, ind_levels, insn);
5265 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5266 type, ind_levels, insn);
5270 else if (code0 == REG)
5272 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5273 type, ind_levels, insn);
5274 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5275 type, ind_levels, insn);
5278 else if (code1 == REG)
5280 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5281 type, ind_levels, insn);
5282 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5283 type, ind_levels, insn);
5293 if (GET_CODE (XEXP (x, 0)) == REG)
5295 register int regno = REGNO (XEXP (x, 0));
5299 /* A register that is incremented cannot be constant! */
5300 if (regno >= FIRST_PSEUDO_REGISTER
5301 && reg_equiv_constant[regno] != 0)
5304 /* Handle a register that is equivalent to a memory location
5305 which cannot be addressed directly. */
5306 if (reg_equiv_memory_loc[regno] != 0
5307 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5309 rtx tem = make_memloc (XEXP (x, 0), regno);
5310 if (reg_equiv_address[regno]
5311 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5313 /* First reload the memory location's address.
5314 We can't use ADDR_TYPE (type) here, because we need to
5315 write back the value after reading it, hence we actually
5316 need two registers. */
5317 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5318 &XEXP (tem, 0), opnum, type,
5320 /* Put this inside a new increment-expression. */
5321 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5322 /* Proceed to reload that, as if it contained a register. */
5326 /* If we have a hard register that is ok as an index,
5327 don't make a reload. If an autoincrement of a nice register
5328 isn't "valid", it must be that no autoincrement is "valid".
5329 If that is true and something made an autoincrement anyway,
5330 this must be a special context where one is allowed.
5331 (For example, a "push" instruction.)
5332 We can't improve this address, so leave it alone. */
5334 /* Otherwise, reload the autoincrement into a suitable hard reg
5335 and record how much to increment by. */
5337 if (reg_renumber[regno] >= 0)
5338 regno = reg_renumber[regno];
5339 if ((regno >= FIRST_PSEUDO_REGISTER
5340 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5341 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5348 /* If we can output the register afterwards, do so, this
5349 saves the extra update.
5350 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5351 CALL_INSN - and it does not set CC0.
5352 But don't do this if we cannot directly address the
5353 memory location, since this will make it harder to
5354 reuse address reloads, and increases register pressure.
5355 Also don't do this if we can probably update x directly. */
5356 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM
5358 : reg_equiv_mem[regno]);
5359 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5360 if (insn && GET_CODE (insn) == INSN && equiv
5361 && memory_operand (equiv, GET_MODE (equiv))
5363 && ! sets_cc0_p (PATTERN (insn))
5365 && ! (icode != CODE_FOR_nothing
5366 && (*insn_operand_predicate[icode][0]) (equiv, Pmode)
5367 && (*insn_operand_predicate[icode][1]) (equiv, Pmode)))
5369 /* We use the original pseudo for loc, so that
5370 emit_reload_insns() knows which pseudo this
5371 reload refers to and updates the pseudo rtx, not
5372 its equivalent memory location, as well as the
5373 corresponding entry in reg_last_reload_reg. */
5374 loc = &XEXP (x_orig, 0);
5377 = push_reload (x, x, loc, loc,
5378 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5379 GET_MODE (x), GET_MODE (x), 0, 0,
5380 opnum, RELOAD_OTHER);
5386 = push_reload (x, NULL_RTX, loc, NULL_PTR,
5387 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5388 GET_MODE (x), GET_MODE (x), 0, 0,
5390 reload_inc[reloadnum]
5391 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5397 /* Update the REG_INC notes. */
5399 for (link = REG_NOTES (this_insn);
5400 link; link = XEXP (link, 1))
5401 if (REG_NOTE_KIND (link) == REG_INC
5402 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
5403 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5409 else if (GET_CODE (XEXP (x, 0)) == MEM)
5411 /* This is probably the result of a substitution, by eliminate_regs,
5412 of an equivalent address for a pseudo that was not allocated to a
5413 hard register. Verify that the specified address is valid and
5414 reload it into a register. */
5415 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5416 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5420 /* Since we know we are going to reload this item, don't decrement
5421 for the indirection level.
5423 Note that this is actually conservative: it would be slightly
5424 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5426 /* We can't use ADDR_TYPE (type) here, because we need to
5427 write back the value after reading it, hence we actually
5428 need two registers. */
5429 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5430 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5431 opnum, type, ind_levels, insn);
5433 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
5434 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5435 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5436 reload_inc[reloadnum]
5437 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5439 link = FIND_REG_INC_NOTE (this_insn, tem);
5441 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5448 /* This is probably the result of a substitution, by eliminate_regs, of
5449 an equivalent address for a pseudo that was not allocated to a hard
5450 register. Verify that the specified address is valid and reload it
5453 Since we know we are going to reload this item, don't decrement for
5454 the indirection level.
5456 Note that this is actually conservative: it would be slightly more
5457 efficient to use the value of SPILL_INDIRECT_LEVELS from
5460 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5461 opnum, ADDR_TYPE (type), ind_levels, insn);
5462 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
5463 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5464 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5469 register int regno = REGNO (x);
5471 if (reg_equiv_constant[regno] != 0)
5473 find_reloads_address_part (reg_equiv_constant[regno], loc,
5474 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5475 GET_MODE (x), opnum, type, ind_levels);
5479 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5480 that feeds this insn. */
5481 if (reg_equiv_mem[regno] != 0)
5483 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
5484 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5485 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5490 if (reg_equiv_memory_loc[regno]
5491 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5493 rtx tem = make_memloc (x, regno);
5494 if (reg_equiv_address[regno] != 0
5495 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5498 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5499 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5504 if (reg_renumber[regno] >= 0)
5505 regno = reg_renumber[regno];
5507 if ((regno >= FIRST_PSEUDO_REGISTER
5508 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5509 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5511 push_reload (x, NULL_RTX, loc, NULL_PTR,
5512 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5513 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5517 /* If a register appearing in an address is the subject of a CLOBBER
5518 in this insn, reload it into some other register to be safe.
5519 The CLOBBER is supposed to make the register unavailable
5520 from before this insn to after it. */
5521 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5523 push_reload (x, NULL_RTX, loc, NULL_PTR,
5524 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5525 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5532 if (GET_CODE (SUBREG_REG (x)) == REG)
5534 /* If this is a SUBREG of a hard register and the resulting register
5535 is of the wrong class, reload the whole SUBREG. This avoids
5536 needless copies if SUBREG_REG is multi-word. */
5537 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5539 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5541 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5542 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5544 push_reload (x, NULL_RTX, loc, NULL_PTR,
5545 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5546 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5550 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5551 is larger than the class size, then reload the whole SUBREG. */
5554 enum reg_class class = (context ? INDEX_REG_CLASS
5556 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5557 > reg_class_size[class])
5559 x = find_reloads_subreg_address (x, 0, opnum, type,
5561 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5562 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5574 register char *fmt = GET_RTX_FORMAT (code);
5577 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5580 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5581 opnum, type, ind_levels, insn);
5588 /* X, which is found at *LOC, is a part of an address that needs to be
5589 reloaded into a register of class CLASS. If X is a constant, or if
5590 X is a PLUS that contains a constant, check that the constant is a
5591 legitimate operand and that we are supposed to be able to load
5592 it into the register.
5594 If not, force the constant into memory and reload the MEM instead.
5596 MODE is the mode to use, in case X is an integer constant.
5598 OPNUM and TYPE describe the purpose of any reloads made.
5600 IND_LEVELS says how many levels of indirect addressing this machine
5604 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
5607 enum reg_class class;
5608 enum machine_mode mode;
5610 enum reload_type type;
5614 && (! LEGITIMATE_CONSTANT_P (x)
5615 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5619 /* If this is a CONST_INT, it could have been created by a
5620 plus_constant call in eliminate_regs, which means it may be
5621 on the reload_obstack. reload_obstack will be freed later, so
5622 we can't allow such RTL to be put in the constant pool. There
5623 is code in force_const_mem to check for this case, but it doesn't
5624 work because we have already popped off the reload_obstack, so
5625 rtl_obstack == saveable_obstack is true at this point. */
5626 if (GET_CODE (x) == CONST_INT)
5627 tem = x = force_const_mem (mode, GEN_INT (INTVAL (x)));
5629 tem = x = force_const_mem (mode, x);
5631 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5632 opnum, type, ind_levels, 0);
5635 else if (GET_CODE (x) == PLUS
5636 && CONSTANT_P (XEXP (x, 1))
5637 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5638 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5642 /* See comment above. */
5643 if (GET_CODE (XEXP (x, 1)) == CONST_INT)
5644 tem = force_const_mem (GET_MODE (x), GEN_INT (INTVAL (XEXP (x, 1))));
5646 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5648 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5649 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5650 opnum, type, ind_levels, 0);
5653 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5654 mode, VOIDmode, 0, 0, opnum, type);
5657 /* X, a subreg of a pseudo, is a part of an address that needs to be
5660 If the pseudo is equivalent to a memory location that cannot be directly
5661 addressed, make the necessary address reloads.
5663 If address reloads have been necessary, or if the address is changed
5664 by register elimination, return the rtx of the memory location;
5665 otherwise, return X.
5667 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5670 OPNUM and TYPE identify the purpose of the reload.
5672 IND_LEVELS says how many levels of indirect addressing are
5673 supported at this point in the address.
5675 INSN, if nonzero, is the insn in which we do the reload. It is used
5676 to determine where to put USEs for pseudos that we have to replace with
5680 find_reloads_subreg_address (x, force_replace, opnum, type,
5685 enum reload_type type;
5689 int regno = REGNO (SUBREG_REG (x));
5691 if (reg_equiv_memory_loc[regno])
5693 /* If the address is not directly addressable, or if the address is not
5694 offsettable, then it must be replaced. */
5696 && (reg_equiv_address[regno]
5697 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5700 if (force_replace || num_not_at_initial_offset)
5702 rtx tem = make_memloc (SUBREG_REG (x), regno);
5704 /* If the address changes because of register elimination, then
5705 it must be replaced. */
5707 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5709 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
5711 if (BYTES_BIG_ENDIAN)
5715 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5716 offset += MIN (size, UNITS_PER_WORD);
5717 size = GET_MODE_SIZE (GET_MODE (x));
5718 offset -= MIN (size, UNITS_PER_WORD);
5720 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5721 PUT_MODE (tem, GET_MODE (x));
5722 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5723 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
5725 /* If this is not a toplevel operand, find_reloads doesn't see
5726 this substitution. We have to emit a USE of the pseudo so
5727 that delete_output_reload can see it. */
5728 if (replace_reloads && recog_operand[opnum] != x)
5729 emit_insn_before (gen_rtx_USE (VOIDmode, SUBREG_REG (x)), insn);
5737 /* Substitute into the current INSN the registers into which we have reloaded
5738 the things that need reloading. The array `replacements'
5739 says contains the locations of all pointers that must be changed
5740 and says what to replace them with.
5742 Return the rtx that X translates into; usually X, but modified. */
5749 for (i = 0; i < n_replacements; i++)
5751 register struct replacement *r = &replacements[i];
5752 register rtx reloadreg = reload_reg_rtx[r->what];
5755 /* Encapsulate RELOADREG so its machine mode matches what
5756 used to be there. Note that gen_lowpart_common will
5757 do the wrong thing if RELOADREG is multi-word. RELOADREG
5758 will always be a REG here. */
5759 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5760 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5762 /* If we are putting this into a SUBREG and RELOADREG is a
5763 SUBREG, we would be making nested SUBREGs, so we have to fix
5764 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5766 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5768 if (GET_MODE (*r->subreg_loc)
5769 == GET_MODE (SUBREG_REG (reloadreg)))
5770 *r->subreg_loc = SUBREG_REG (reloadreg);
5773 *r->where = SUBREG_REG (reloadreg);
5774 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
5778 *r->where = reloadreg;
5780 /* If reload got no reg and isn't optional, something's wrong. */
5781 else if (! reload_optional[r->what])
5786 /* Make a copy of any replacements being done into X and move those copies
5787 to locations in Y, a copy of X. We only look at the highest level of
5791 copy_replacements (x, y)
5796 enum rtx_code code = GET_CODE (x);
5797 char *fmt = GET_RTX_FORMAT (code);
5798 struct replacement *r;
5800 /* We can't support X being a SUBREG because we might then need to know its
5801 location if something inside it was replaced. */
5805 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5807 for (j = 0; j < n_replacements; j++)
5809 if (replacements[j].subreg_loc == &XEXP (x, i))
5811 r = &replacements[n_replacements++];
5812 r->where = replacements[j].where;
5813 r->subreg_loc = &XEXP (y, i);
5814 r->what = replacements[j].what;
5815 r->mode = replacements[j].mode;
5817 else if (replacements[j].where == &XEXP (x, i))
5819 r = &replacements[n_replacements++];
5820 r->where = &XEXP (y, i);
5822 r->what = replacements[j].what;
5823 r->mode = replacements[j].mode;
5828 /* Change any replacements being done to *X to be done to *Y */
5831 move_replacements (x, y)
5837 for (i = 0; i < n_replacements; i++)
5838 if (replacements[i].subreg_loc == x)
5839 replacements[i].subreg_loc = y;
5840 else if (replacements[i].where == x)
5842 replacements[i].where = y;
5843 replacements[i].subreg_loc = 0;
5847 /* If LOC was scheduled to be replaced by something, return the replacement.
5848 Otherwise, return *LOC. */
5851 find_replacement (loc)
5854 struct replacement *r;
5856 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
5858 rtx reloadreg = reload_reg_rtx[r->what];
5860 if (reloadreg && r->where == loc)
5862 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
5863 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5867 else if (reloadreg && r->subreg_loc == loc)
5869 /* RELOADREG must be either a REG or a SUBREG.
5871 ??? Is it actually still ever a SUBREG? If so, why? */
5873 if (GET_CODE (reloadreg) == REG)
5874 return gen_rtx_REG (GET_MODE (*loc),
5875 REGNO (reloadreg) + SUBREG_WORD (*loc));
5876 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
5879 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
5880 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
5884 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5885 what's inside and make a new rtl if so. */
5886 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
5887 || GET_CODE (*loc) == MULT)
5889 rtx x = find_replacement (&XEXP (*loc, 0));
5890 rtx y = find_replacement (&XEXP (*loc, 1));
5892 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
5893 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
5899 /* Return nonzero if register in range [REGNO, ENDREGNO)
5900 appears either explicitly or implicitly in X
5901 other than being stored into (except for earlyclobber operands).
5903 References contained within the substructure at LOC do not count.
5904 LOC may be zero, meaning don't ignore anything.
5906 This is similar to refers_to_regno_p in rtlanal.c except that we
5907 look at equivalences for pseudos that didn't get hard registers. */
5910 refers_to_regno_for_reload_p (regno, endregno, x, loc)
5911 int regno, endregno;
5916 register RTX_CODE code;
5923 code = GET_CODE (x);
5930 /* If this is a pseudo, a hard register must not have been allocated.
5931 X must therefore either be a constant or be in memory. */
5932 if (i >= FIRST_PSEUDO_REGISTER)
5934 if (reg_equiv_memory_loc[i])
5935 return refers_to_regno_for_reload_p (regno, endregno,
5936 reg_equiv_memory_loc[i],
5939 if (reg_equiv_constant[i])
5945 return (endregno > i
5946 && regno < i + (i < FIRST_PSEUDO_REGISTER
5947 ? HARD_REGNO_NREGS (i, GET_MODE (x))
5951 /* If this is a SUBREG of a hard reg, we can see exactly which
5952 registers are being modified. Otherwise, handle normally. */
5953 if (GET_CODE (SUBREG_REG (x)) == REG
5954 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5956 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5958 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
5959 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5961 return endregno > inner_regno && regno < inner_endregno;
5967 if (&SET_DEST (x) != loc
5968 /* Note setting a SUBREG counts as referring to the REG it is in for
5969 a pseudo but not for hard registers since we can
5970 treat each word individually. */
5971 && ((GET_CODE (SET_DEST (x)) == SUBREG
5972 && loc != &SUBREG_REG (SET_DEST (x))
5973 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
5974 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
5975 && refers_to_regno_for_reload_p (regno, endregno,
5976 SUBREG_REG (SET_DEST (x)),
5978 /* If the output is an earlyclobber operand, this is
5980 || ((GET_CODE (SET_DEST (x)) != REG
5981 || earlyclobber_operand_p (SET_DEST (x)))
5982 && refers_to_regno_for_reload_p (regno, endregno,
5983 SET_DEST (x), loc))))
5986 if (code == CLOBBER || loc == &SET_SRC (x))
5995 /* X does not match, so try its subexpressions. */
5997 fmt = GET_RTX_FORMAT (code);
5998 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6000 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6008 if (refers_to_regno_for_reload_p (regno, endregno,
6012 else if (fmt[i] == 'E')
6015 for (j = XVECLEN (x, i) - 1; j >=0; j--)
6016 if (loc != &XVECEXP (x, i, j)
6017 && refers_to_regno_for_reload_p (regno, endregno,
6018 XVECEXP (x, i, j), loc))
6025 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6026 we check if any register number in X conflicts with the relevant register
6027 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6028 contains a MEM (we don't bother checking for memory addresses that can't
6029 conflict because we expect this to be a rare case.
6031 This function is similar to reg_overlap_mention_p in rtlanal.c except
6032 that we look at equivalences for pseudos that didn't get hard registers. */
6035 reg_overlap_mentioned_for_reload_p (x, in)
6038 int regno, endregno;
6040 /* Overly conservative. */
6041 if (GET_CODE (x) == STRICT_LOW_PART)
6044 /* If either argument is a constant, then modifying X can not affect IN. */
6045 if (CONSTANT_P (x) || CONSTANT_P (in))
6047 else if (GET_CODE (x) == SUBREG)
6049 regno = REGNO (SUBREG_REG (x));
6050 if (regno < FIRST_PSEUDO_REGISTER)
6051 regno += SUBREG_WORD (x);
6053 else if (GET_CODE (x) == REG)
6057 /* If this is a pseudo, it must not have been assigned a hard register.
6058 Therefore, it must either be in memory or be a constant. */
6060 if (regno >= FIRST_PSEUDO_REGISTER)
6062 if (reg_equiv_memory_loc[regno])
6063 return refers_to_mem_for_reload_p (in);
6064 else if (reg_equiv_constant[regno])
6069 else if (GET_CODE (x) == MEM)
6070 return refers_to_mem_for_reload_p (in);
6071 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6072 || GET_CODE (x) == CC0)
6073 return reg_mentioned_p (x, in);
6077 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6078 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6080 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
6083 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6087 refers_to_mem_for_reload_p (x)
6093 if (GET_CODE (x) == MEM)
6096 if (GET_CODE (x) == REG)
6097 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6098 && reg_equiv_memory_loc[REGNO (x)]);
6100 fmt = GET_RTX_FORMAT (GET_CODE (x));
6101 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6103 && (GET_CODE (XEXP (x, i)) == MEM
6104 || refers_to_mem_for_reload_p (XEXP (x, i))))
6110 /* Check the insns before INSN to see if there is a suitable register
6111 containing the same value as GOAL.
6112 If OTHER is -1, look for a register in class CLASS.
6113 Otherwise, just see if register number OTHER shares GOAL's value.
6115 Return an rtx for the register found, or zero if none is found.
6117 If RELOAD_REG_P is (short *)1,
6118 we reject any hard reg that appears in reload_reg_rtx
6119 because such a hard reg is also needed coming into this insn.
6121 If RELOAD_REG_P is any other nonzero value,
6122 it is a vector indexed by hard reg number
6123 and we reject any hard reg whose element in the vector is nonnegative
6124 as well as any that appears in reload_reg_rtx.
6126 If GOAL is zero, then GOALREG is a register number; we look
6127 for an equivalent for that register.
6129 MODE is the machine mode of the value we want an equivalence for.
6130 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6132 This function is used by jump.c as well as in the reload pass.
6134 If GOAL is the sum of the stack pointer and a constant, we treat it
6135 as if it were a constant except that sp is required to be unchanging. */
6138 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
6141 enum reg_class class;
6143 short *reload_reg_p;
6145 enum machine_mode mode;
6147 register rtx p = insn;
6148 rtx goaltry, valtry, value, where;
6150 register int regno = -1;
6154 int goal_mem_addr_varies = 0;
6155 int need_stable_sp = 0;
6161 else if (GET_CODE (goal) == REG)
6162 regno = REGNO (goal);
6163 else if (GET_CODE (goal) == MEM)
6165 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6166 if (MEM_VOLATILE_P (goal))
6168 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
6170 /* An address with side effects must be reexecuted. */
6183 else if (CONSTANT_P (goal))
6185 else if (GET_CODE (goal) == PLUS
6186 && XEXP (goal, 0) == stack_pointer_rtx
6187 && CONSTANT_P (XEXP (goal, 1)))
6188 goal_const = need_stable_sp = 1;
6189 else if (GET_CODE (goal) == PLUS
6190 && XEXP (goal, 0) == frame_pointer_rtx
6191 && CONSTANT_P (XEXP (goal, 1)))
6196 /* On some machines, certain regs must always be rejected
6197 because they don't behave the way ordinary registers do. */
6199 #ifdef OVERLAPPING_REGNO_P
6200 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6201 && OVERLAPPING_REGNO_P (regno))
6205 /* Scan insns back from INSN, looking for one that copies
6206 a value into or out of GOAL.
6207 Stop and give up if we reach a label. */
6212 if (p == 0 || GET_CODE (p) == CODE_LABEL)
6214 if (GET_CODE (p) == INSN
6215 /* If we don't want spill regs ... */
6216 && (! (reload_reg_p != 0
6217 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6218 /* ... then ignore insns introduced by reload; they aren't useful
6219 and can cause results in reload_as_needed to be different
6220 from what they were when calculating the need for spills.
6221 If we notice an input-reload insn here, we will reject it below,
6222 but it might hide a usable equivalent. That makes bad code.
6223 It may even abort: perhaps no reg was spilled for this insn
6224 because it was assumed we would find that equivalent. */
6225 || INSN_UID (p) < reload_first_uid))
6228 pat = single_set (p);
6229 /* First check for something that sets some reg equal to GOAL. */
6232 && true_regnum (SET_SRC (pat)) == regno
6233 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6236 && true_regnum (SET_DEST (pat)) == regno
6237 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6239 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6240 /* When looking for stack pointer + const,
6241 make sure we don't use a stack adjust. */
6242 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6243 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6245 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6246 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6248 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6249 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6250 /* If we are looking for a constant,
6251 and something equivalent to that constant was copied
6252 into a reg, we can use that reg. */
6253 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6255 && rtx_equal_p (XEXP (tem, 0), goal)
6256 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6257 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6259 && GET_CODE (SET_DEST (pat)) == REG
6260 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6261 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
6262 && GET_CODE (goal) == CONST_INT
6263 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
6265 && rtx_equal_p (goal, goaltry)
6266 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
6268 && (valueno = true_regnum (valtry)) >= 0)
6269 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6271 && GET_CODE (SET_DEST (pat)) == REG
6272 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6273 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
6274 && GET_CODE (goal) == CONST_INT
6275 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6277 && rtx_equal_p (goal, goaltry)
6279 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6280 && (valueno = true_regnum (valtry)) >= 0)))
6284 if (valueno != other)
6287 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6293 for (i = HARD_REGNO_NREGS (valueno, mode) - 1; i >= 0; i--)
6294 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6307 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6308 (or copying VALUE into GOAL, if GOAL is also a register).
6309 Now verify that VALUE is really valid. */
6311 /* VALUENO is the register number of VALUE; a hard register. */
6313 /* Don't try to re-use something that is killed in this insn. We want
6314 to be able to trust REG_UNUSED notes. */
6315 if (find_reg_note (where, REG_UNUSED, value))
6318 /* If we propose to get the value from the stack pointer or if GOAL is
6319 a MEM based on the stack pointer, we need a stable SP. */
6320 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6321 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6325 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6326 if (GET_MODE (value) != mode)
6329 /* Reject VALUE if it was loaded from GOAL
6330 and is also a register that appears in the address of GOAL. */
6332 if (goal_mem && value == SET_DEST (single_set (where))
6333 && refers_to_regno_for_reload_p (valueno,
6335 + HARD_REGNO_NREGS (valueno, mode)),
6339 /* Reject registers that overlap GOAL. */
6341 if (!goal_mem && !goal_const
6342 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
6343 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
6346 nregs = HARD_REGNO_NREGS (regno, mode);
6347 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6349 /* Reject VALUE if it is one of the regs reserved for reloads.
6350 Reload1 knows how to reuse them anyway, and it would get
6351 confused if we allocated one without its knowledge.
6352 (Now that insns introduced by reload are ignored above,
6353 this case shouldn't happen, but I'm not positive.) */
6355 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6358 for (i = 0; i < valuenregs; ++i)
6359 if (reload_reg_p[valueno + i] >= 0)
6363 /* On some machines, certain regs must always be rejected
6364 because they don't behave the way ordinary registers do. */
6366 #ifdef OVERLAPPING_REGNO_P
6367 if (OVERLAPPING_REGNO_P (valueno))
6371 /* Reject VALUE if it is a register being used for an input reload
6372 even if it is not one of those reserved. */
6374 if (reload_reg_p != 0)
6377 for (i = 0; i < n_reloads; i++)
6378 if (reload_reg_rtx[i] != 0 && reload_in[i])
6380 int regno1 = REGNO (reload_reg_rtx[i]);
6381 int nregs1 = HARD_REGNO_NREGS (regno1,
6382 GET_MODE (reload_reg_rtx[i]));
6383 if (regno1 < valueno + valuenregs
6384 && regno1 + nregs1 > valueno)
6390 /* We must treat frame pointer as varying here,
6391 since it can vary--in a nonlocal goto as generated by expand_goto. */
6392 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6394 /* Now verify that the values of GOAL and VALUE remain unaltered
6395 until INSN is reached. */
6404 /* Don't trust the conversion past a function call
6405 if either of the two is in a call-clobbered register, or memory. */
6406 if (GET_CODE (p) == CALL_INSN)
6410 if (goal_mem || need_stable_sp)
6413 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6414 for (i = 0; i < nregs; ++i)
6415 if (call_used_regs[regno + i])
6418 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6419 for (i = 0; i < valuenregs; ++i)
6420 if (call_used_regs[valueno + i])
6424 #ifdef NON_SAVING_SETJMP
6425 if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE
6426 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6430 #ifdef INSN_CLOBBERS_REGNO_P
6431 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
6432 && INSN_CLOBBERS_REGNO_P (p, valueno))
6433 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6434 && INSN_CLOBBERS_REGNO_P (p, regno)))
6438 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
6442 /* Watch out for unspec_volatile, and volatile asms. */
6443 if (volatile_insn_p (pat))
6446 /* If this insn P stores in either GOAL or VALUE, return 0.
6447 If GOAL is a memory ref and this insn writes memory, return 0.
6448 If GOAL is a memory ref and its address is not constant,
6449 and this insn P changes a register used in GOAL, return 0. */
6451 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6453 register rtx dest = SET_DEST (pat);
6454 while (GET_CODE (dest) == SUBREG
6455 || GET_CODE (dest) == ZERO_EXTRACT
6456 || GET_CODE (dest) == SIGN_EXTRACT
6457 || GET_CODE (dest) == STRICT_LOW_PART)
6458 dest = XEXP (dest, 0);
6459 if (GET_CODE (dest) == REG)
6461 register int xregno = REGNO (dest);
6463 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6464 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6467 if (xregno < regno + nregs && xregno + xnregs > regno)
6469 if (xregno < valueno + valuenregs
6470 && xregno + xnregs > valueno)
6472 if (goal_mem_addr_varies
6473 && reg_overlap_mentioned_for_reload_p (dest, goal))
6475 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6478 else if (goal_mem && GET_CODE (dest) == MEM
6479 && ! push_operand (dest, GET_MODE (dest)))
6481 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6482 && reg_equiv_memory_loc[regno] != 0)
6484 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6487 else if (GET_CODE (pat) == PARALLEL)
6490 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6492 register rtx v1 = XVECEXP (pat, 0, i);
6493 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6495 register rtx dest = SET_DEST (v1);
6496 while (GET_CODE (dest) == SUBREG
6497 || GET_CODE (dest) == ZERO_EXTRACT
6498 || GET_CODE (dest) == SIGN_EXTRACT
6499 || GET_CODE (dest) == STRICT_LOW_PART)
6500 dest = XEXP (dest, 0);
6501 if (GET_CODE (dest) == REG)
6503 register int xregno = REGNO (dest);
6505 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6506 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6509 if (xregno < regno + nregs
6510 && xregno + xnregs > regno)
6512 if (xregno < valueno + valuenregs
6513 && xregno + xnregs > valueno)
6515 if (goal_mem_addr_varies
6516 && reg_overlap_mentioned_for_reload_p (dest,
6519 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6522 else if (goal_mem && GET_CODE (dest) == MEM
6523 && ! push_operand (dest, GET_MODE (dest)))
6525 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6526 && reg_equiv_memory_loc[regno] != 0)
6528 else if (need_stable_sp
6529 && push_operand (dest, GET_MODE (dest)))
6535 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
6539 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6540 link = XEXP (link, 1))
6542 pat = XEXP (link, 0);
6543 if (GET_CODE (pat) == CLOBBER)
6545 register rtx dest = SET_DEST (pat);
6546 while (GET_CODE (dest) == SUBREG
6547 || GET_CODE (dest) == ZERO_EXTRACT
6548 || GET_CODE (dest) == SIGN_EXTRACT
6549 || GET_CODE (dest) == STRICT_LOW_PART)
6550 dest = XEXP (dest, 0);
6551 if (GET_CODE (dest) == REG)
6553 register int xregno = REGNO (dest);
6555 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6556 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6559 if (xregno < regno + nregs
6560 && xregno + xnregs > regno)
6562 if (xregno < valueno + valuenregs
6563 && xregno + xnregs > valueno)
6565 if (goal_mem_addr_varies
6566 && reg_overlap_mentioned_for_reload_p (dest,
6570 else if (goal_mem && GET_CODE (dest) == MEM
6571 && ! push_operand (dest, GET_MODE (dest)))
6573 else if (need_stable_sp
6574 && push_operand (dest, GET_MODE (dest)))
6581 /* If this insn auto-increments or auto-decrements
6582 either regno or valueno, return 0 now.
6583 If GOAL is a memory ref and its address is not constant,
6584 and this insn P increments a register used in GOAL, return 0. */
6588 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6589 if (REG_NOTE_KIND (link) == REG_INC
6590 && GET_CODE (XEXP (link, 0)) == REG)
6592 register int incno = REGNO (XEXP (link, 0));
6593 if (incno < regno + nregs && incno >= regno)
6595 if (incno < valueno + valuenregs && incno >= valueno)
6597 if (goal_mem_addr_varies
6598 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6608 /* Find a place where INCED appears in an increment or decrement operator
6609 within X, and return the amount INCED is incremented or decremented by.
6610 The value is always positive. */
6613 find_inc_amount (x, inced)
6616 register enum rtx_code code = GET_CODE (x);
6622 register rtx addr = XEXP (x, 0);
6623 if ((GET_CODE (addr) == PRE_DEC
6624 || GET_CODE (addr) == POST_DEC
6625 || GET_CODE (addr) == PRE_INC
6626 || GET_CODE (addr) == POST_INC)
6627 && XEXP (addr, 0) == inced)
6628 return GET_MODE_SIZE (GET_MODE (x));
6631 fmt = GET_RTX_FORMAT (code);
6632 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6636 register int tem = find_inc_amount (XEXP (x, i), inced);
6643 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6645 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6655 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6658 regno_clobbered_p (regno, insn, mode, sets)
6661 enum machine_mode mode;
6664 int nregs = HARD_REGNO_NREGS (regno, mode);
6665 int endregno = regno + nregs;
6667 if ((GET_CODE (PATTERN (insn)) == CLOBBER
6668 || (sets && GET_CODE (PATTERN (insn)) == SET))
6669 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6671 int test = REGNO (XEXP (PATTERN (insn), 0));
6673 return test >= regno && test < endregno;
6676 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6678 int i = XVECLEN (PATTERN (insn), 0) - 1;
6682 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6683 if ((GET_CODE (elt) == CLOBBER
6684 || (sets && GET_CODE (PATTERN (insn)) == SET))
6685 && GET_CODE (XEXP (elt, 0)) == REG)
6687 int test = REGNO (XEXP (elt, 0));
6689 if (test >= regno && test < endregno)
6698 static char *reload_when_needed_name[] =
6701 "RELOAD_FOR_OUTPUT",
6703 "RELOAD_FOR_INPUT_ADDRESS",
6704 "RELOAD_FOR_INPADDR_ADDRESS",
6705 "RELOAD_FOR_OUTPUT_ADDRESS",
6706 "RELOAD_FOR_OUTADDR_ADDRESS",
6707 "RELOAD_FOR_OPERAND_ADDRESS",
6708 "RELOAD_FOR_OPADDR_ADDR",
6710 "RELOAD_FOR_OTHER_ADDRESS"
6713 static char *reg_class_names[] = REG_CLASS_NAMES;
6715 /* These functions are used to print the variables set by 'find_reloads' */
6718 debug_reload_to_stream (f)
6726 for (r = 0; r < n_reloads; r++)
6728 fprintf (f, "Reload %d: ", r);
6730 if (reload_in[r] != 0)
6732 fprintf (f, "reload_in (%s) = ",
6733 GET_MODE_NAME (reload_inmode[r]));
6734 print_inline_rtx (f, reload_in[r], 24);
6735 fprintf (f, "\n\t");
6738 if (reload_out[r] != 0)
6740 fprintf (f, "reload_out (%s) = ",
6741 GET_MODE_NAME (reload_outmode[r]));
6742 print_inline_rtx (f, reload_out[r], 24);
6743 fprintf (f, "\n\t");
6746 fprintf (f, "%s, ", reg_class_names[(int) reload_reg_class[r]]);
6748 fprintf (f, "%s (opnum = %d)",
6749 reload_when_needed_name[(int) reload_when_needed[r]],
6752 if (reload_optional[r])
6753 fprintf (f, ", optional");
6755 if (reload_nongroup[r])
6756 fprintf (stderr, ", nongroup");
6758 if (reload_inc[r] != 0)
6759 fprintf (f, ", inc by %d", reload_inc[r]);
6761 if (reload_nocombine[r])
6762 fprintf (f, ", can't combine");
6764 if (reload_secondary_p[r])
6765 fprintf (f, ", secondary_reload_p");
6767 if (reload_in_reg[r] != 0)
6769 fprintf (f, "\n\treload_in_reg: ");
6770 print_inline_rtx (f, reload_in_reg[r], 24);
6773 if (reload_out_reg[r] != 0)
6775 fprintf (f, "\n\treload_out_reg: ");
6776 print_inline_rtx (f, reload_out_reg[r], 24);
6779 if (reload_reg_rtx[r] != 0)
6781 fprintf (f, "\n\treload_reg_rtx: ");
6782 print_inline_rtx (f, reload_reg_rtx[r], 24);
6786 if (reload_secondary_in_reload[r] != -1)
6788 fprintf (f, "%ssecondary_in_reload = %d",
6789 prefix, reload_secondary_in_reload[r]);
6793 if (reload_secondary_out_reload[r] != -1)
6794 fprintf (f, "%ssecondary_out_reload = %d\n",
6795 prefix, reload_secondary_out_reload[r]);
6798 if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
6800 fprintf (stderr, "%ssecondary_in_icode = %s", prefix,
6801 insn_name[reload_secondary_in_icode[r]]);
6805 if (reload_secondary_out_icode[r] != CODE_FOR_nothing)
6806 fprintf (stderr, "%ssecondary_out_icode = %s", prefix,
6807 insn_name[reload_secondary_out_icode[r]]);
6816 debug_reload_to_stream (stderr);
projects / dragonfly.git / blob