sys/dev/raid/ips/ips.h

   1 /*-
   2  * Copyright (c) 2002 Adaptec Inc.
   3  * All rights reserved.
   4  *
   5  * Written by: David Jeffery
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26  * SUCH DAMAGE.
  27  *
  28  * $FreeBSD: src/sys/dev/ips/ips.h,v 1.10 2004/05/30 20:08:34 phk Exp $
  29  * $DragonFly: src/sys/dev/raid/ips/ips.h,v 1.6 2005/06/07 00:52:34 y0netan1 Exp $
  30  */
  31
  32
  33 #include <sys/param.h>
  34 #include <sys/systm.h>
  35 #include <sys/kernel.h>
  36 #include <sys/module.h>
  37 #include <sys/bus.h>
  38 #include <sys/conf.h>
  39 #include <sys/types.h>
  40 #include <sys/queue.h>
  41 #include <sys/buf.h>
  42 #include <sys/malloc.h>
  43 #include <sys/time.h>
  44
  45 #include <machine/bus_memio.h>
  46 #include <machine/bus.h>
  47 #include <sys/rman.h>
  48 #include <machine/resource.h>
  49
  50 #include <bus/pci/pcireg.h>
  51 #include <bus/pci/pcivar.h>
  52
  53 MALLOC_DECLARE(M_IPSBUF);
  54
  55 /*
  56  *   IPS CONSTANTS
  57  */
  58 #define IPS_VENDOR_ID                   0x1014
  59 #define IPS_VENDOR_ID_ADAPTEC           0x9005
  60 #define IPS_MORPHEUS_DEVICE_ID          0x01BD
  61 #define IPS_COPPERHEAD_DEVICE_ID        0x002E
  62 #define IPS_MARCO_DEVICE_ID             0x0250
  63 #define IPS_CSL                         0xff
  64 #define IPS_POCL                        0x30
  65
  66 /* amounts of memory to allocate for certain commands */
  67 #define IPS_ADAPTER_INFO_LEN            (sizeof(ips_adapter_info_t))
  68 #define IPS_DRIVE_INFO_LEN              (sizeof(ips_drive_info_t))
  69 #define IPS_COMMAND_LEN                 24
  70 #define IPS_MAX_SG_LEN                  (sizeof(ips_sg_element_t) * IPS_MAX_SG_ELEMENTS)
  71 #define IPS_NVRAM_PAGE_SIZE             128
  72 /* various flags */
  73 #define IPS_NOWAIT_FLAG                 1
  74
  75 /* states for the card to be in */
  76 #define IPS_DEV_OPEN                    0x01
  77 #define IPS_TIMEOUT                     0x02 /* command time out, need reset */
  78 #define IPS_OFFLINE                     0x04 /* can't reset card/card failure */
  79
  80 /* max number of commands set to something low for now */
  81 #define IPS_MAX_CMD_NUM                 128
  82 #define IPS_MAX_NUM_DRIVES              8
  83 #define IPS_MAX_SG_ELEMENTS             32
  84 #define IPS_MAX_IOBUF_SIZE              (64 * 1024)
  85 #define IPS_BLKSIZE                     512
  86
  87 /* logical drive states */
  88
  89 #define IPS_LD_OFFLINE                  0x02
  90 #define IPS_LD_OKAY                     0x03
  91 #define IPS_LD_DEGRADED                 0x04
  92 #define IPS_LD_FREE                     0x00
  93 #define IPS_LD_SYS                      0x06
  94 #define IPS_LD_CRS                      0x24
  95
  96 /* register offsets */
  97 #define MORPHEUS_REG_OMR0               0x0018 /* Outbound Msg. Reg. 0 */
  98 #define MORPHEUS_REG_OMR1               0x001C /* Outbound Msg. Reg. 1 */
  99 #define MORPHEUS_REG_IDR                0x0020 /* Inbound Doorbell Reg. */
 100 #define MORPHEUS_REG_IISR               0x0024 /* Inbound IRQ Status Reg. */
 101 #define MORPHEUS_REG_IIMR               0x0028 /* Inbound IRQ Mask Reg. */
 102 #define MORPHEUS_REG_OISR               0x0030 /* Outbound IRQ Status Reg. */
 103 #define MORPHEUS_REG_OIMR               0x0034 /* Outbound IRQ Status Reg. */
 104 #define MORPHEUS_REG_IQPR               0x0040 /* Inbound Queue Port Reg. */
 105 #define MORPHEUS_REG_OQPR               0x0044 /* Outbound Queue Port Reg. */
 106
 107 #define COPPER_REG_SCPR                 0x05    /* Subsystem Ctrl. Port Reg. */
 108 #define COPPER_REG_ISPR                 0x06    /* IRQ Status Port Reg. */
 109 #define COPPER_REG_CBSP                 0x07    /* ? Reg. */
 110 #define COPPER_REG_HISR                 0x08    /* Host IRQ Status Reg.    */
 111 #define COPPER_REG_CCSAR                0x10    /* Cmd. Channel Sys Addr Reg.*/
 112 #define COPPER_REG_CCCR                 0x14    /* Cmd. Channel Ctrl. Reg. */
 113 #define COPPER_REG_SQHR                 0x20    /* Status Queue Head Reg.  */
 114 #define COPPER_REG_SQTR                 0x24    /* Status Queue Tail Reg.  */
 115 #define COPPER_REG_SQER                 0x28    /* Status Queue End Reg.   */
 116 #define COPPER_REG_SQSR                 0x2C    /* Status Queue Start Reg. */
 117
 118 /* bit definitions */
 119 #define MORPHEUS_BIT_POST1              0x01
 120 #define MORPHEUS_BIT_POST2              0x02
 121 #define MORPHEUS_BIT_CMD_IRQ            0x08
 122
 123 #define COPPER_CMD_START                0x101A
 124 #define COPPER_SEM_BIT                  0x08
 125 #define COPPER_EI_BIT                   0x80
 126 #define COPPER_EBM_BIT                  0x02
 127 #define COPPER_RESET_BIT                0x80
 128 #define COPPER_GHI_BIT                  0x04
 129 #define COPPER_SCE_BIT                  0x01
 130 #define COPPER_OP_BIT                   0x01
 131 #define COPPER_ILE_BIT                  0x10
 132
 133 /* status defines */
 134 #define IPS_POST1_OK                    0x8000
 135 #define IPS_POST2_OK                    0x000f
 136
 137 /* command op codes */
 138 #define IPS_READ_CMD                    0x02
 139 #define IPS_WRITE_CMD                   0x03
 140 #define IPS_ADAPTER_INFO_CMD            0x05
 141 #define IPS_CACHE_FLUSH_CMD             0x0A
 142 #define IPS_REBUILD_STATUS_CMD          0x0C
 143 #define IPS_ERROR_TABLE_CMD             0x17
 144 #define IPS_DRIVE_INFO_CMD              0x19
 145 #define IPS_SUBSYS_PARAM_CMD            0x40
 146 #define IPS_CONFIG_SYNC_CMD             0x58
 147 #define IPS_SG_READ_CMD                 0x82
 148 #define IPS_SG_WRITE_CMD                0x83
 149 #define IPS_RW_NVRAM_CMD                0xBC
 150 #define IPS_FFDC_CMD                    0xD7
 151
 152 /* error information returned by the adapter */
 153 #define IPS_MIN_ERROR                   0x02
 154 #define IPS_ERROR_STATUS                0x13000200 /* ahh, magic numbers */
 155
 156 #define IPS_OS_FREEBSD                  8
 157 #define IPS_VERSION_MAJOR               "0.90"
 158 #define IPS_VERSION_MINOR               ".10"
 159
 160 /* Adapter Types */
 161 #define IPS_ADAPTER_COPPERHEAD          0x01
 162 #define IPS_ADAPTER_COPPERHEAD2         0x02
 163 #define IPS_ADAPTER_COPPERHEADOB1       0x03
 164 #define IPS_ADAPTER_COPPERHEADOB2       0x04
 165 #define IPS_ADAPTER_CLARINET            0x05
 166 #define IPS_ADAPTER_CLARINETLITE        0x06
 167 #define IPS_ADAPTER_TROMBONE            0x07
 168 #define IPS_ADAPTER_MORPHEUS            0x08
 169 #define IPS_ADAPTER_MORPHEUSLITE        0x09
 170 #define IPS_ADAPTER_NEO                 0x0A
 171 #define IPS_ADAPTER_NEOLITE             0x0B
 172 #define IPS_ADAPTER_SARASOTA2           0x0C
 173 #define IPS_ADAPTER_SARASOTA1           0x0D
 174 #define IPS_ADAPTER_MARCO               0x0E
 175 #define IPS_ADAPTER_SEBRING             0x0F
 176 #define IPS_ADAPTER_MAX_T               IPS_ADAPTER_SEBRING
 177
 178 /* values for ffdc_settime (from gmtime) */
 179 #define IPS_SECSPERMIN      60
 180 #define IPS_MINSPERHOUR     60
 181 #define IPS_HOURSPERDAY     24
 182 #define IPS_DAYSPERWEEK     7
 183 #define IPS_DAYSPERNYEAR    365
 184 #define IPS_DAYSPERLYEAR    366
 185 #define IPS_SECSPERHOUR     (IPS_SECSPERMIN * IPS_MINSPERHOUR)
 186 #define IPS_SECSPERDAY      ((long) IPS_SECSPERHOUR * IPS_HOURSPERDAY)
 187 #define IPS_MONSPERYEAR     12
 188 #define IPS_EPOCH_YEAR      1970
 189 #define IPS_LEAPS_THRU_END_OF(y)    ((y) / 4 - (y) / 100 + (y) / 400)
 190 #define ips_isleap(y) (((y) % 4) == 0 && (((y) % 100) != 0 || ((y) % 400) == 0))
 191
 192
 193 /*
 194  * for compatibility
 195  */
 196 /* struct buf to struct bio changes */
 197 #define BIO_ERROR       B_ERROR
 198 #define BIO_READ        B_READ
 199 #define bio             buf
 200 #define bio_error       b_error
 201 #define bio_flags       b_flags
 202 #define bio_driver1     b_driver1
 203 #define bio_pblkno      b_pblkno
 204 #define bio_data        b_data
 205 #define bio_bcount      b_bcount
 206 #define bio_dev         b_dev
 207 #define bio_resid       b_resid
 208
 209 /* geom */
 210 #define bio_disk        bio_dev
 211 #define d_drv1          si_drv1
 212 #define d_maxsize       si_iosize_max
 213
 214 #define disk_open_t     d_open_t
 215 #define disk_close_t    d_close_t
 216 #define disk_strategy_t d_strategy_t
 217
 218 #if defined(PCIR_MAPS) && !defined(PCIR_BARS)
 219 # define PCIR_BAR(x)    (PCIR_BARS + (x) * 4)
 220 # define PCIR_BARS      PCIR_MAPS
 221 #endif
 222
 223
 224 /*
 225  *  IPS MACROS
 226  */
 227
 228 #define ips_read_1(sc,offset)           bus_space_read_1(sc->bustag, sc->bushandle, offset)
 229 #define ips_read_2(sc,offset)           bus_space_read_2(sc->bustag, sc->bushandle, offset)
 230 #define ips_read_4(sc,offset)           bus_space_read_4(sc->bustag, sc->bushandle, offset)
 231
 232 #define ips_write_1(sc,offset,value)    bus_space_write_1(sc->bustag, sc->bushandle, offset, value)
 233 #define ips_write_2(sc,offset,value)    bus_space_write_2(sc->bustag, sc->bushandle, offset, value)
 234 #define ips_write_4(sc,offset,value)    bus_space_write_4(sc->bustag, sc->bushandle, offset, value)
 235
 236 #define ips_read_request(iobuf)         ((iobuf)->b_flags & B_READ)
 237
 238 /* this is ugly.  It zeros the end elements in an ips_command_t struct starting with the status element */
 239 #define clear_ips_command(command)      bzero(&((command)->status), (unsigned long)(&(command)[1])-(unsigned long)&((command)->status))
 240
 241 #define COMMAND_ERROR(status)           (((status)->fields.basic_status & 0x0f) >= IPS_MIN_ERROR)
 242
 243 #ifndef IPS_DEBUG
 244 #define DEVICE_PRINTF(x...)
 245 #define PRINTF(x...)
 246 #else
 247 #define DEVICE_PRINTF(level,x...)       if(IPS_DEBUG >= level)device_printf(x)
 248 #define PRINTF(level,x...)              if(IPS_DEBUG >= level)printf(x)
 249 #endif
 250
 251 /*
 252  *   IPS STRUCTS
 253  */
 254 struct ips_softc;
 255
 256 typedef struct {
 257         u_int8_t        command;
 258         u_int8_t        id;
 259         u_int8_t        drivenum;
 260         u_int8_t        reserve2;
 261         u_int32_t       lba;
 262         u_int32_t       buffaddr;
 263         u_int32_t       reserve3;
 264 } __attribute__ ((packed)) ips_generic_cmd;
 265
 266 typedef struct {
 267         u_int8_t        command;
 268         u_int8_t        id;
 269         u_int8_t        drivenum;
 270         u_int8_t        segnum;
 271         u_int32_t       lba;
 272         u_int32_t       buffaddr;
 273         u_int16_t       length;
 274         u_int16_t       reserve1;
 275 } __attribute__ ((packed)) ips_io_cmd;
 276
 277 typedef struct {
 278         u_int8_t        command;
 279         u_int8_t        id;
 280         u_int8_t        pagenum;
 281         u_int8_t        rw;
 282         u_int32_t       reserve1;
 283         u_int32_t       buffaddr;
 284         u_int32_t       reserve3;
 285 } __attribute__ ((packed)) ips_rw_nvram_cmd;
 286
 287 typedef struct {
 288         u_int8_t        command;
 289         u_int8_t        id;
 290         u_int8_t        drivenum;
 291         u_int8_t        reserve1;
 292         u_int32_t       reserve2;
 293         u_int32_t       buffaddr;
 294         u_int32_t       reserve3;
 295 } __attribute__ ((packed)) ips_drive_cmd;
 296
 297 typedef struct {
 298         u_int8_t        command;
 299         u_int8_t        id;
 300         u_int8_t        reserve1;
 301         u_int8_t        commandtype;
 302         u_int32_t       reserve2;
 303         u_int32_t       buffaddr;
 304         u_int32_t       reserve3;
 305 } __attribute__((packed)) ips_adapter_info_cmd;
 306
 307 typedef struct {
 308         u_int8_t        command;
 309         u_int8_t        id;
 310         u_int8_t        reset_count;
 311         u_int8_t        reset_type;
 312         u_int8_t        second;
 313         u_int8_t        minute;
 314         u_int8_t        hour;
 315         u_int8_t        day;
 316         u_int8_t        reserve1[4];
 317         u_int8_t        month;
 318         u_int8_t        yearH;
 319         u_int8_t        yearL;
 320         u_int8_t        reserve2;
 321 } __attribute__((packed)) ips_adapter_ffdc_cmd;
 322
 323 typedef union{
 324         ips_generic_cmd         generic_cmd;
 325         ips_drive_cmd           drive_cmd;
 326         ips_adapter_info_cmd    adapter_info_cmd;
 327 } ips_cmd_buff_t;
 328
 329 typedef struct {
 330    u_int32_t  signature;
 331    u_int8_t   reserved;
 332    u_int8_t   adapter_slot;
 333    u_int16_t  adapter_type;
 334    u_int8_t   bios_high[4];
 335    u_int8_t   bios_low[4];
 336    u_int16_t  reserve2;
 337    u_int8_t   reserve3;
 338    u_int8_t   operating_system;
 339    u_int8_t   driver_high[4];
 340    u_int8_t   driver_low[4];
 341    u_int8_t   reserve4[100];
 342 } __attribute__((packed)) ips_nvram_page5;
 343
 344 typedef struct {
 345         u_int32_t       addr;
 346         u_int32_t       len;
 347 } ips_sg_element_t;
 348
 349 typedef struct {
 350         u_int8_t        drivenum;
 351         u_int8_t        merge_id;
 352         u_int8_t        raid_lvl;
 353         u_int8_t        state;
 354         u_int32_t       sector_count;
 355 } __attribute__((packed)) ips_drive_t;
 356
 357 typedef struct {
 358         u_int8_t        drivecount;
 359         u_int8_t        reserve1;
 360         u_int16_t       reserve2;
 361         ips_drive_t drives[IPS_MAX_NUM_DRIVES];
 362 } __attribute__((packed)) ips_drive_info_t;
 363
 364 typedef struct {
 365         u_int8_t        drivecount;
 366         u_int8_t        miscflags;
 367         u_int8_t        SLTflags;
 368         u_int8_t        BSTflags;
 369         u_int8_t        pwr_chg_count;
 370         u_int8_t        wrong_addr_count;
 371         u_int8_t        unident_count;
 372         u_int8_t        nvram_dev_chg_count;
 373         u_int8_t        codeblock_version[8];
 374         u_int8_t        bootblock_version[8];
 375         u_int32_t       drive_sector_count[IPS_MAX_NUM_DRIVES];
 376         u_int8_t        max_concurrent_cmds;
 377         u_int8_t        max_phys_devices;
 378         u_int16_t       flash_prog_count;
 379         u_int8_t        defunct_disks;
 380         u_int8_t        rebuildflags;
 381         u_int8_t        offline_drivecount;
 382         u_int8_t        critical_drivecount;
 383         u_int16_t       config_update_count;
 384         u_int8_t        blockedflags;
 385         u_int8_t        psdn_error;
 386         u_int16_t       addr_dead_disk[4*16];   /* ugly, max # channels * max # scsi devices per channel */
 387 } __attribute__((packed)) ips_adapter_info_t;
 388
 389 typedef struct {
 390         u_int32_t       status[IPS_MAX_CMD_NUM];
 391         u_int32_t       base_phys_addr;
 392         int             nextstatus;
 393         bus_dma_tag_t   dmatag;
 394         bus_dmamap_t    dmamap;
 395 } ips_copper_queue_t;
 396
 397 typedef union {
 398    struct {
 399       u_int8_t  reserved;
 400       u_int8_t  command_id;
 401       u_int8_t  basic_status;
 402       u_int8_t  extended_status;
 403    } fields;
 404    volatile u_int32_t    value;
 405 } ips_cmd_status_t;
 406
 407 /* used to keep track of current commands to the card */
 408 typedef struct ips_command {
 409         u_int8_t                command_number;
 410         u_int8_t                id;
 411         u_int8_t                timeout;
 412         struct ips_softc        *sc;
 413         bus_dmamap_t            command_dmamap;
 414         void                    *command_buffer;
 415         u_int32_t               command_phys_addr;      /*WARNING! must be changed if 64bit addressing ever used*/
 416         ips_cmd_status_t        status;
 417         SLIST_ENTRY(ips_command)        next;
 418         bus_dma_tag_t           data_dmatag;
 419         bus_dmamap_t            data_dmamap;
 420         void                    *data_buffer;
 421         void                    *arg;
 422         void                    (*callback)(struct ips_command *command);
 423 } ips_command_t;
 424
 425 typedef struct ips_wait_list {
 426         STAILQ_ENTRY(ips_wait_list) next;
 427         void                    *data;
 428         int                     (* callback)(ips_command_t *command);
 429 } ips_wait_list_t;
 430
 431 typedef struct ips_softc {
 432         struct resource         *iores;
 433         struct resource         *irqres;
 434         struct intr_config_hook ips_ich;
 435         int                     configured;
 436         int                     state;
 437         int                     iotype;
 438         int                     rid;
 439         int                     irqrid;
 440         void                    *irqcookie;
 441         bus_space_tag_t         bustag;
 442         bus_space_handle_t      bushandle;
 443         bus_dma_tag_t           adapter_dmatag;
 444         bus_dma_tag_t           command_dmatag;
 445         bus_dma_tag_t           sg_dmatag;
 446         device_t                dev;
 447         struct callout          timer;
 448         u_int16_t               adapter_type;
 449         ips_adapter_info_t      adapter_info;
 450         device_t                diskdev[IPS_MAX_NUM_DRIVES];
 451         ips_drive_t             drives[IPS_MAX_NUM_DRIVES];
 452         u_int8_t                drivecount;
 453         u_int16_t               ffdc_resetcount;
 454         struct timeval          ffdc_resettime;
 455         u_int8_t                next_drive;
 456         u_int8_t                max_cmds;
 457         volatile u_int8_t       used_commands;
 458         ips_command_t           commandarray[IPS_MAX_CMD_NUM];
 459         SLIST_HEAD(command_list, ips_command) free_cmd_list;
 460         STAILQ_HEAD(command_wait_list,ips_wait_list)  cmd_wait_list;
 461         int                     (*ips_adapter_reinit)(struct ips_softc *sc,
 462                                                        int force);
 463         void                    (*ips_adapter_intr)(void *sc);
 464         void                    (*ips_issue_cmd)(ips_command_t *command);
 465         ips_copper_queue_t      *copper_queue;
 466 } ips_softc_t;
 467
 468 /* function defines from ips_ioctl.c */
 469 extern int ips_ioctl_request(ips_softc_t *sc, u_long ioctl_cmd, caddr_t addr,
 470                                 int32_t flags);
 471 /* function defines from ips_disk.c */
 472 extern void ipsd_finish(struct bio *iobuf);
 473
 474 /* function defines from ips_commands.c */
 475 extern int ips_flush_cache(ips_softc_t *sc);
 476 extern void ips_start_io_request(ips_softc_t *sc, struct bio *iobuf);
 477 extern int ips_get_drive_info(ips_softc_t *sc);
 478 extern int ips_get_adapter_info(ips_softc_t *sc);
 479 extern int ips_ffdc_reset(ips_softc_t *sc);
 480 extern int ips_update_nvram(ips_softc_t *sc);
 481 extern int ips_clear_adapter(ips_softc_t *sc);
 482
 483 /* function defines from ips.c */
 484 extern int ips_get_free_cmd(ips_softc_t *sc, int (*callback)(ips_command_t *),
 485                                 void *data, unsigned long flags);
 486 extern void ips_insert_free_cmd(ips_softc_t *sc, ips_command_t *command);
 487 extern int ips_adapter_init(ips_softc_t *sc);
 488 extern int ips_morpheus_reinit(ips_softc_t *sc, int force);
 489 extern int ips_adapter_free(ips_softc_t *sc);
 490 extern void ips_morpheus_intr(void *sc);
 491 extern void ips_issue_morpheus_cmd(ips_command_t *command);
 492 extern int ips_copperhead_reinit(ips_softc_t *sc, int force);
 493 extern void ips_copperhead_intr(void *sc);
 494 extern void ips_issue_copperhead_cmd(ips_command_t *command);
 495
 496 #define IPS_CDEV_MAJOR 175
 497 #define IPSD_CDEV_MAJOR 176