2 * Copyright (c) 1990 The Regents of the University of California.
4 * LWKT threads Copyright (c) 2003 Matthew Dillon
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * $FreeBSD: src/sys/i386/i386/swtch.s,v 1.89.2.10 2003/01/23 03:36:24 ps Exp $
38 * $DragonFly: src/sys/i386/i386/Attic/swtch.s,v 1.10 2003/06/22 04:30:39 dillon Exp $
42 #include "opt_user_ldt.h"
44 #include <sys/rtprio.h>
46 #include <machine/asmacros.h>
47 #include <machine/ipl.h>
50 #include <machine/pmap.h>
51 #include <machine/smptests.h> /** GRAB_LOPRIO */
52 #include <machine/apic.h>
53 #include <machine/lock.h>
62 #if defined(SWTCH_OPTIM_STATS)
63 .globl _swtch_optim_stats, _tlb_flush_count
64 _swtch_optim_stats: .long 0 /* number of _swtch_optims */
65 _tlb_flush_count: .long 0
72 * cpu_heavy_switch(next_thread)
74 * Switch from the current thread to a new thread. This entry
75 * is normally called via the thread->td_switch function, and will
76 * only be called when the current thread is a heavy weight process.
78 * YYY disable interrupts once giant is removed.
80 ENTRY(cpu_heavy_switch)
82 movl _cpl,%edx /* YYY temporary */
83 movl %edx,TD_MACH+MTD_CPL(%ecx) /* YYY temporary */
84 movl TD_PROC(%ecx),%ecx
88 movb P_ONCPU(%ecx), %al /* save "last" cpu */
89 movb %al, P_LASTCPU(%ecx)
90 movb $0xff, P_ONCPU(%ecx) /* "leave" the cpu */
92 movl P_VMSPACE(%ecx), %edx
98 btrl %eax, VM_PMAP+PM_ACTIVE(%edx)
103 movl P_THREAD(%ecx),%edx
104 movl TD_PCB(%edx),%edx
105 movl (%esp),%eax /* Hardware registers */
106 movl %eax,PCB_EIP(%edx)
107 movl %ebx,PCB_EBX(%edx)
108 movl %esp,PCB_ESP(%edx)
109 movl %ebp,PCB_EBP(%edx)
110 movl %esi,PCB_ESI(%edx)
111 movl %edi,PCB_EDI(%edx)
112 movl %gs,PCB_GS(%edx)
115 * Push the LWKT switch restore function, which resumes a heavy
116 * weight process. Note that the LWKT switcher is based on
117 * TD_SP, while the heavy weight process switcher is based on
118 * PCB_ESP. TD_SP is usually one pointer pushed relative to
121 movl P_THREAD(%ecx),%eax
122 pushl $cpu_heavy_restore
123 movl %esp,TD_SP(%eax)
126 * Save debug regs if necessary
128 movb PCB_FLAGS(%edx),%al
130 jz 1f /* no, skip over */
131 movl %dr7,%eax /* yes, do the save */
132 movl %eax,PCB_DR7(%edx)
133 andl $0x0000fc00, %eax /* disable all watchpoints */
136 movl %eax,PCB_DR6(%edx)
138 movl %eax,PCB_DR3(%edx)
140 movl %eax,PCB_DR2(%edx)
142 movl %eax,PCB_DR1(%edx)
144 movl %eax,PCB_DR0(%edx)
148 * Save BGL nesting count. Note that we hold the BGL with a
149 * count of at least 1 on entry to cpu_heavy_switch().
153 /* XXX FIXME: we should be saving the local APIC TPR */
155 cmpl $FREE_LOCK, %eax /* is it free? */
156 je badsw4 /* yes, bad medicine! */
157 #endif /* DIAGNOSTIC */
158 andl $COUNT_FIELD, %eax /* clear CPU portion */
159 movl %eax, PCB_MPNEST(%edx) /* store it */
163 * Save the FP state if we have used the FP.
166 movl P_THREAD(%ecx),%ecx
169 addl $PCB_SAVEFPU,%edx /* h/w bugs make saving complicated */
171 call _npxsave /* do it in a big C function */
174 /* %ecx,%edx trashed */
175 #endif /* NNPX > 0 */
178 * Switch to the next thread, which was passed as an argument
179 * to cpu_heavy_switch(). Due to the switch-restore function we pushed,
180 * the argument is at 8(%esp). Set the current thread, load the
181 * stack pointer, and 'ret' into the switch-restore function.
185 movl TD_SP(%eax),%esp
191 * The switch function is changed to this when a thread is going away
192 * for good. We have to ensure that the MMU state is not cached, and
193 * we don't bother saving the existing thread state before switching.
195 * At this point we are in a critical section and this cpu owns the
196 * thread's token, which serves as an interlock until the switchout is
199 ENTRY(cpu_exit_switch)
201 * Get us out of the vmspace
211 * Switch to the next thread.
216 movl TD_SP(%eax),%esp
219 * We are now effectively the next thread, transfer ownership to
220 * this thread and release the original thread's RW lock, which
221 * will allow it to be reaped. Messy but rock solid.
224 movl %eax,RW_OWNER(%ecx)
232 * Restore the next thread's state and resume it. Note: the
233 * restore function assumes that the next thread's address is
239 * cpu_heavy_restore() (current thread in %eax on entry)
241 * Restore the thread after an LWKT switch. This entry is normally
242 * called via the LWKT switch restore function, which was pulled
243 * off the thread stack and jumped to.
245 * This entry is only called if the thread was previously saved
246 * using cpu_heavy_switch() (the heavy weight process thread switcher).
248 * YYY theoretically we do not have to restore everything here, a lot
249 * of this junk can wait until we return to usermode. But for now
250 * we restore everything.
252 * YYY STI/CLI sequencing.
254 * YYY note: spl check is done in mi_switch when it splx()'s.
256 ENTRY(cpu_heavy_restore)
257 /* interrupts are disabled */
258 movl TD_MACH+MTD_CPL(%eax),%edx
259 movl %edx,_cpl /* YYY temporary */
260 movl TD_PCB(%eax),%edx /* YYY temporary */
261 movl TD_PROC(%eax),%ecx
263 cmpb $SRUN,P_STAT(%ecx)
267 #if defined(SWTCH_OPTIM_STATS)
268 incl _swtch_optim_stats
271 * Restore the MMU address space
274 cmpl PCB_CR3(%edx),%ebx
276 #if defined(SWTCH_OPTIM_STATS)
277 decl _swtch_optim_stats
278 incl _tlb_flush_count
280 movl PCB_CR3(%edx),%ebx
285 * Deal with the PCB extension, restore the private tss
292 cmpl $0, PCB_EXT(%edx) /* has pcb extension? */
294 btsl %esi, _private_tss /* mark use of private tss */
295 movl PCB_EXT(%edx), %edi /* new tss descriptor */
300 * update common_tss.tss_esp0 pointer. This is the supervisor
301 * stack pointer on entry from user mode. Since the pcb is
302 * at the top of the supervisor stack esp0 starts just below it.
303 * We leave enough space for vm86 (16 bytes).
305 * common_tss.tss_esp0 is needed when user mode traps into the
309 movl %ebx, _common_tss + TSS_ESP0
311 btrl %esi, _private_tss
314 movl $gd_common_tssd, %edi
317 movl $_common_tssd, %edi
320 * Move the correct TSS descriptor into the GDT slot, then reload
321 * tr. YYY not sure what is going on here
324 movl _tss_gdt, %ebx /* entry in GDT */
329 movl $GPROC0_SEL*8, %esi /* GSEL(entry, SEL_KPL) */
333 * Tell the pmap that our cpu is using the VMSPACE now.
336 movl P_VMSPACE(%ecx), %ebx
342 btsl %eax, VM_PMAP+PM_ACTIVE(%ebx)
345 * Restore general registers.
347 movl PCB_EBX(%edx),%ebx
348 movl PCB_ESP(%edx),%esp
349 movl PCB_EBP(%edx),%ebp
350 movl PCB_ESI(%edx),%esi
351 movl PCB_EDI(%edx),%edi
352 movl PCB_EIP(%edx),%eax
356 * SMP ickyness to direct interrupts.
360 #ifdef GRAB_LOPRIO /* hold LOPRIO for INTs */
364 andl $~APIC_TPR_PRIO, lapic_tpr
365 #endif /** CHEAP_TPR */
366 #endif /** GRAB_LOPRIO */
368 movb %al, P_ONCPU(%ecx)
372 * Restore the BGL nesting count. Note that the nesting count will
376 movl _cpu_lockid, %eax
377 orl PCB_MPNEST(%edx), %eax /* add next count from PROC */
378 movl %eax, _mp_lock /* load the mp_lock */
379 /* XXX FIXME: we should be restoring the local APIC TPR */
383 * Restore the user LDT if we have one
386 cmpl $0, PCB_USERLDT(%edx)
388 movl __default_ldt,%eax
389 cmpl _currentldt,%eax
392 movl %eax,_currentldt
400 * Restore the %gs segment register, which must be done after
401 * loading the user LDT. Since user processes can modify the
402 * register via procfs, this may result in a fault which is
403 * detected by checking the fault address against cpu_switch_load_gs
404 * in i386/i386/trap.c
406 .globl cpu_switch_load_gs
408 movl PCB_GS(%edx),%gs
411 * Restore the DEBUG register state if necessary.
413 movb PCB_FLAGS(%edx),%al
415 jz 1f /* no, skip over */
416 movl PCB_DR6(%edx),%eax /* yes, do the restore */
418 movl PCB_DR3(%edx),%eax
420 movl PCB_DR2(%edx),%eax
422 movl PCB_DR1(%edx),%eax
424 movl PCB_DR0(%edx),%eax
426 movl %dr7,%eax /* load dr7 so as not to disturb */
427 andl $0x0000fc00,%eax /* reserved bits */
429 movl PCB_DR7(%edx),%ebx
430 andl $~0x0000fc00,%ebx
437 * Remove the heavy weight process from the heavy weight queue.
438 * this will also have the side effect of removing the thread from
439 * the run queue. YYY temporary?
441 * LWKT threads stay on the run queue until explicitly removed.
451 CROSSJUMPTARGET(sw1a)
458 sw0_1: .asciz "cpu_switch: has wchan"
464 sw0_2: .asciz "cpu_switch: not SRUN"
467 #if defined(SMP) && defined(DIAGNOSTIC)
472 sw0_4: .asciz "cpu_switch: do not have lock"
473 #endif /* SMP && DIAGNOSTIC */
477 * Update pcb, saving current processor state.
483 /* caller's return address - child won't execute this routine */
485 movl %eax,PCB_EIP(%ecx)
488 movl %eax,PCB_CR3(%ecx)
490 movl %ebx,PCB_EBX(%ecx)
491 movl %esp,PCB_ESP(%ecx)
492 movl %ebp,PCB_EBP(%ecx)
493 movl %esi,PCB_ESI(%ecx)
494 movl %edi,PCB_EDI(%ecx)
495 movl %gs,PCB_GS(%ecx)
499 * If npxthread == NULL, then the npx h/w state is irrelevant and the
500 * state had better already be in the pcb. This is true for forks
501 * but not for dumps (the old book-keeping with FP flags in the pcb
502 * always lost for dumps because the dump pcb has 0 flags).
504 * If npxthread != NULL, then we have to save the npx h/w state to
505 * npxthread's pcb and copy it to the requested pcb, or save to the
506 * requested pcb and reload. Copying is easier because we would
507 * have to handle h/w bugs for reloading. We used to lose the
508 * parent's npx state for forks by forgetting to reload.
515 movl TD_PCB(%eax),%eax
516 leal PCB_SAVEFPU(%eax),%eax
524 pushl $PCB_SAVEFPU_SIZE
525 leal PCB_SAVEFPU(%ecx),%ecx
530 #endif /* NNPX > 0 */
536 * cpu_idle_restore() (current thread in %eax on entry)
538 * Don't bother setting up any regs other then %ebp so backtraces
539 * don't die. This restore function is used to bootstrap into the
540 * cpu_idle() LWKT only, after that cpu_lwkt_*() will be used for
543 ENTRY(cpu_idle_restore)
551 * Standard LWKT switching function. Only non-scratch registers are
552 * saved and we don't bother with the MMU state or anything else.
555 ENTRY(cpu_lwkt_switch)
563 movl _cpl,%edx /* YYY temporary */
564 movl %edx,TD_MACH+MTD_CPL(%ecx) /* YYY temporary */
565 pushl $cpu_lwkt_restore
567 movl %esp,TD_SP(%ecx)
569 movl TD_SP(%eax),%esp
573 * cpu_idle_restore() (current thread in %eax on entry)
575 * Don't bother setting up any regs other then %ebp so backtraces
578 ENTRY(cpu_lwkt_restore)
584 movl TD_MACH+MTD_CPL(%eax),%ecx /* YYY temporary */
585 movl %ecx,_cpl /* YYY temporary */
586 andl _ipending,%ecx /* YYY temporary */
589 call splx /* YYY set gd_reqpri instead? */