2 * $NetBSD: ohci.c,v 1.138 2003/02/08 03:32:50 ichiro Exp $
3 * $FreeBSD: src/sys/dev/usb/ohci.c,v 1.141 2003/12/22 15:40:10 shiba Exp $
4 * $DragonFly: src/sys/bus/usb/ohci.c,v 1.8 2004/03/12 03:43:06 dillon Exp $
6 /* Also, already ported:
7 * $NetBSD: ohci.c,v 1.140 2003/05/13 04:42:00 gson Exp $
8 * $NetBSD: ohci.c,v 1.141 2003/09/10 20:08:29 mycroft Exp $
9 * $NetBSD: ohci.c,v 1.142 2003/10/11 03:04:26 toshii Exp $
10 * $NetBSD: ohci.c,v 1.143 2003/10/18 04:50:35 simonb Exp $
14 * Copyright (c) 1998 The NetBSD Foundation, Inc.
15 * All rights reserved.
17 * This code is derived from software contributed to The NetBSD Foundation
18 * by Lennart Augustsson (lennart@augustsson.net) at
19 * Carlstedt Research & Technology.
21 * Redistribution and use in source and binary forms, with or without
22 * modification, are permitted provided that the following conditions
24 * 1. Redistributions of source code must retain the above copyright
25 * notice, this list of conditions and the following disclaimer.
26 * 2. Redistributions in binary form must reproduce the above copyright
27 * notice, this list of conditions and the following disclaimer in the
28 * documentation and/or other materials provided with the distribution.
29 * 3. All advertising materials mentioning features or use of this software
30 * must display the following acknowledgement:
31 * This product includes software developed by the NetBSD
32 * Foundation, Inc. and its contributors.
33 * 4. Neither the name of The NetBSD Foundation nor the names of its
34 * contributors may be used to endorse or promote products derived
35 * from this software without specific prior written permission.
37 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
38 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
39 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
40 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
41 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
42 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
43 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
44 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
45 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
46 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
47 * POSSIBILITY OF SUCH DAMAGE.
51 * USB Open Host Controller driver.
53 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
54 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
57 #include <sys/param.h>
58 #include <sys/systm.h>
59 #include <sys/malloc.h>
60 #include <sys/kernel.h>
61 #if defined(__NetBSD__) || defined(__OpenBSD__)
62 #include <sys/device.h>
63 #include <sys/select.h>
64 #elif defined(__FreeBSD__) || defined(__DragonFly__)
65 #include <sys/endian.h>
66 #include <sys/module.h>
68 #include <machine/bus_pio.h>
69 #include <machine/bus_memio.h>
70 #if defined(DIAGNOSTIC) && defined(__i386__)
71 #include <machine/cpu.h>
75 #include <sys/queue.h>
76 #include <sys/sysctl.h>
78 #include <machine/bus.h>
79 #include <machine/endian.h>
85 #include "usb_quirks.h"
90 #if defined(__FreeBSD__) || defined(__DragonFly__)
91 #include <machine/clock.h>
93 #define delay(d) DELAY(d)
96 #if defined(__OpenBSD__)
97 struct cfdriver ohci_cd = {
103 #define DPRINTF(x) if (ohcidebug) logprintf x
104 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x
106 SYSCTL_NODE(_hw_usb, OID_AUTO, ohci, CTLFLAG_RW, 0, "USB ohci");
107 SYSCTL_INT(_hw_usb_ohci, OID_AUTO, debug, CTLFLAG_RW,
108 &ohcidebug, 0, "ohci debug level");
110 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
114 #define DPRINTFN(n,x)
118 * The OHCI controller is little endian, so on big endian machines
119 * the data strored in memory needs to be swapped.
121 #if defined(__OpenBSD__)
122 #if BYTE_ORDER == BIG_ENDIAN
123 #define htole32(x) (bswap32(x))
124 #define le32toh(x) (bswap32(x))
126 #define htole32(x) (x)
127 #define le32toh(x) (x)
133 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *);
134 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
136 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *);
137 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
139 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
140 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
143 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
146 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *,
147 ohci_softc_t *, int, int, usbd_xfer_handle,
148 ohci_soft_td_t *, ohci_soft_td_t **);
150 #if defined(__NetBSD__) || defined(__OpenBSD__)
151 Static void ohci_shutdown(void *v);
152 Static void ohci_power(int, void *);
154 Static usbd_status ohci_open(usbd_pipe_handle);
155 Static void ohci_poll(struct usbd_bus *);
156 Static void ohci_softintr(void *);
157 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
158 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t);
159 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
161 Static usbd_status ohci_device_request(usbd_xfer_handle xfer);
162 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
163 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
164 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
165 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
166 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
167 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
168 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
169 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
171 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe);
172 Static void ohci_device_isoc_enter(usbd_xfer_handle);
174 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
175 Static void ohci_freem(struct usbd_bus *, usb_dma_t *);
177 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *);
178 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle);
180 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle);
181 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle);
182 Static void ohci_root_ctrl_abort(usbd_xfer_handle);
183 Static void ohci_root_ctrl_close(usbd_pipe_handle);
184 Static void ohci_root_ctrl_done(usbd_xfer_handle);
186 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle);
187 Static usbd_status ohci_root_intr_start(usbd_xfer_handle);
188 Static void ohci_root_intr_abort(usbd_xfer_handle);
189 Static void ohci_root_intr_close(usbd_pipe_handle);
190 Static void ohci_root_intr_done(usbd_xfer_handle);
192 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle);
193 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle);
194 Static void ohci_device_ctrl_abort(usbd_xfer_handle);
195 Static void ohci_device_ctrl_close(usbd_pipe_handle);
196 Static void ohci_device_ctrl_done(usbd_xfer_handle);
198 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle);
199 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle);
200 Static void ohci_device_bulk_abort(usbd_xfer_handle);
201 Static void ohci_device_bulk_close(usbd_pipe_handle);
202 Static void ohci_device_bulk_done(usbd_xfer_handle);
204 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle);
205 Static usbd_status ohci_device_intr_start(usbd_xfer_handle);
206 Static void ohci_device_intr_abort(usbd_xfer_handle);
207 Static void ohci_device_intr_close(usbd_pipe_handle);
208 Static void ohci_device_intr_done(usbd_xfer_handle);
210 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle);
211 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle);
212 Static void ohci_device_isoc_abort(usbd_xfer_handle);
213 Static void ohci_device_isoc_close(usbd_pipe_handle);
214 Static void ohci_device_isoc_done(usbd_xfer_handle);
216 Static usbd_status ohci_device_setintr(ohci_softc_t *sc,
217 struct ohci_pipe *pipe, int ival);
219 Static int ohci_str(usb_string_descriptor_t *, int, const char *);
221 Static void ohci_timeout(void *);
222 Static void ohci_timeout_task(void *);
223 Static void ohci_rhsc_able(ohci_softc_t *, int);
224 Static void ohci_rhsc_enable(void *);
226 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
227 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status);
229 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe);
230 Static void ohci_noop(usbd_pipe_handle pipe);
232 Static usbd_status ohci_controller_init(ohci_softc_t *sc);
235 Static void ohci_dumpregs(ohci_softc_t *);
236 Static void ohci_dump_tds(ohci_soft_td_t *);
237 Static void ohci_dump_td(ohci_soft_td_t *);
238 Static void ohci_dump_ed(ohci_soft_ed_t *);
239 Static void ohci_dump_itd(ohci_soft_itd_t *);
240 Static void ohci_dump_itds(ohci_soft_itd_t *);
243 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
244 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
245 #define OWRITE1(sc, r, x) \
246 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
247 #define OWRITE2(sc, r, x) \
248 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
249 #define OWRITE4(sc, r, x) \
250 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
251 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
252 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
253 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
255 /* Reverse the bits in a value 0 .. 31 */
256 Static u_int8_t revbits[OHCI_NO_INTRS] =
257 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
258 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
259 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
260 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
263 struct usbd_pipe pipe;
268 ohci_soft_itd_t *itd;
270 /* Info needed for different pipe kinds. */
276 ohci_soft_td_t *setup, *data, *stat;
295 #define OHCI_INTR_ENDPT 1
297 Static struct usbd_bus_methods ohci_bus_methods = {
307 Static struct usbd_pipe_methods ohci_root_ctrl_methods = {
308 ohci_root_ctrl_transfer,
309 ohci_root_ctrl_start,
310 ohci_root_ctrl_abort,
311 ohci_root_ctrl_close,
316 Static struct usbd_pipe_methods ohci_root_intr_methods = {
317 ohci_root_intr_transfer,
318 ohci_root_intr_start,
319 ohci_root_intr_abort,
320 ohci_root_intr_close,
325 Static struct usbd_pipe_methods ohci_device_ctrl_methods = {
326 ohci_device_ctrl_transfer,
327 ohci_device_ctrl_start,
328 ohci_device_ctrl_abort,
329 ohci_device_ctrl_close,
331 ohci_device_ctrl_done,
334 Static struct usbd_pipe_methods ohci_device_intr_methods = {
335 ohci_device_intr_transfer,
336 ohci_device_intr_start,
337 ohci_device_intr_abort,
338 ohci_device_intr_close,
339 ohci_device_clear_toggle,
340 ohci_device_intr_done,
343 Static struct usbd_pipe_methods ohci_device_bulk_methods = {
344 ohci_device_bulk_transfer,
345 ohci_device_bulk_start,
346 ohci_device_bulk_abort,
347 ohci_device_bulk_close,
348 ohci_device_clear_toggle,
349 ohci_device_bulk_done,
352 Static struct usbd_pipe_methods ohci_device_isoc_methods = {
353 ohci_device_isoc_transfer,
354 ohci_device_isoc_start,
355 ohci_device_isoc_abort,
356 ohci_device_isoc_close,
358 ohci_device_isoc_done,
361 #if defined(__NetBSD__) || defined(__OpenBSD__)
363 ohci_activate(device_ptr_t self, enum devact act)
365 struct ohci_softc *sc = (struct ohci_softc *)self;
372 case DVACT_DEACTIVATE:
373 if (sc->sc_child != NULL)
374 rv = config_deactivate(sc->sc_child);
382 ohci_detach(struct ohci_softc *sc, int flags)
386 if (sc->sc_child != NULL)
387 rv = config_detach(sc->sc_child, flags);
392 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc);
394 #if defined(__NetBSD__) || defined(__OpenBSD__)
395 powerhook_disestablish(sc->sc_powerhook);
396 shutdownhook_disestablish(sc->sc_shutdownhook);
399 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
401 /* free data structures XXX */
408 ohci_alloc_sed(ohci_softc_t *sc)
415 if (sc->sc_freeeds == NULL) {
416 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
417 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
418 OHCI_ED_ALIGN, &dma);
421 for(i = 0; i < OHCI_SED_CHUNK; i++) {
422 offs = i * OHCI_SED_SIZE;
423 sed = KERNADDR(&dma, offs);
424 sed->physaddr = DMAADDR(&dma, offs);
425 sed->next = sc->sc_freeeds;
426 sc->sc_freeeds = sed;
429 sed = sc->sc_freeeds;
430 sc->sc_freeeds = sed->next;
431 memset(&sed->ed, 0, sizeof(ohci_ed_t));
437 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
439 sed->next = sc->sc_freeeds;
440 sc->sc_freeeds = sed;
444 ohci_alloc_std(ohci_softc_t *sc)
452 if (sc->sc_freetds == NULL) {
453 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
454 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
455 OHCI_TD_ALIGN, &dma);
459 for(i = 0; i < OHCI_STD_CHUNK; i++) {
460 offs = i * OHCI_STD_SIZE;
461 std = KERNADDR(&dma, offs);
462 std->physaddr = DMAADDR(&dma, offs);
463 std->nexttd = sc->sc_freetds;
464 sc->sc_freetds = std;
470 std = sc->sc_freetds;
471 sc->sc_freetds = std->nexttd;
472 memset(&std->td, 0, sizeof(ohci_td_t));
475 ohci_hash_add_td(sc, std);
482 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
487 ohci_hash_rem_td(sc, std);
488 std->nexttd = sc->sc_freetds;
489 sc->sc_freetds = std;
494 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
495 int alen, int rd, usbd_xfer_handle xfer,
496 ohci_soft_td_t *sp, ohci_soft_td_t **ep)
498 ohci_soft_td_t *next, *cur;
499 ohci_physaddr_t dataphys;
503 usb_dma_t *dma = &xfer->dmabuf;
504 u_int16_t flags = xfer->flags;
506 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
512 (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
513 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
514 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
517 next = ohci_alloc_std(sc);
521 dataphys = DMAADDR(dma, offset);
524 * The OHCI hardware can handle at most one 4k crossing.
525 * XXX - currently we only allocate contigous buffers, but
526 * the OHCI spec says: If during the data transfer the buffer
527 * address contained in the HC's working copy of
528 * CurrentBufferPointer crosses a 4K boundary, the upper 20
529 * bits of Buffer End are copied to the working value of
530 * CurrentBufferPointer causing the next buffer address to
531 * be the 0th byte in the same 4K page that contains the
532 * last byte of the buffer (the 4K boundary crossing may
533 * occur within a data packet transfer.)
535 * If/when dma has multiple segments, this will need to
536 * properly handle fragmenting TD's.
538 * We can describe the above using maxsegsz = 4k and nsegs = 2
541 if (OHCI_PAGE(dataphys) == OHCI_PAGE(DMAADDR(dma, offset +
542 len - 1)) || len - (OHCI_PAGE_SIZE -
543 OHCI_PAGE_OFFSET(dataphys)) <= OHCI_PAGE_SIZE) {
544 /* we can handle it in this TD */
547 /* XXX The calculation below is wrong and could
548 * result in a packet that is not a multiple of the
549 * MaxPacketSize in the case where the buffer does not
550 * start on an appropriate address (like for example in
551 * the case of an mbuf cluster). You'll get an early
554 /* must use multiple TDs, fill as much as possible. */
555 curlen = 2 * OHCI_PAGE_SIZE -
556 OHCI_PAGE_OFFSET(dataphys);
557 /* the length must be a multiple of the max size */
559 UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
562 panic("ohci_alloc_std: curlen == 0");
565 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
566 "len=%d curlen=%d\n",
567 dataphys, len, curlen));
570 cur->td.td_flags = tdflags;
571 cur->td.td_cbp = htole32(dataphys);
573 cur->td.td_nexttd = htole32(next->physaddr);
574 cur->td.td_be = htole32(DMAADDR(dma, offset + curlen - 1));
576 cur->flags = OHCI_ADD_LEN;
578 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
579 dataphys, dataphys + curlen - 1));
583 panic("Length went negative: %d curlen %d dma %p offset %08x", len, curlen, dma, (int)0);
585 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
589 if ((flags & USBD_FORCE_SHORT_XFER) &&
590 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
591 /* Force a 0 length transfer at the end. */
595 next = ohci_alloc_std(sc);
599 cur->td.td_flags = tdflags;
600 cur->td.td_cbp = 0; /* indicate 0 length packet */
602 cur->td.td_nexttd = htole32(next->physaddr);
607 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
611 return (USBD_NORMAL_COMPLETION);
620 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
621 ohci_soft_td_t *stdend)
625 for (; std != stdend; std = p) {
627 ohci_free_std(sc, std);
633 ohci_alloc_sitd(ohci_softc_t *sc)
635 ohci_soft_itd_t *sitd;
640 if (sc->sc_freeitds == NULL) {
641 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
642 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
643 OHCI_ITD_ALIGN, &dma);
647 for(i = 0; i < OHCI_SITD_CHUNK; i++) {
648 offs = i * OHCI_SITD_SIZE;
649 sitd = KERNADDR(&dma, offs);
650 sitd->physaddr = DMAADDR(&dma, offs);
651 sitd->nextitd = sc->sc_freeitds;
652 sc->sc_freeitds = sitd;
658 sitd = sc->sc_freeitds;
659 sc->sc_freeitds = sitd->nextitd;
660 memset(&sitd->itd, 0, sizeof(ohci_itd_t));
661 sitd->nextitd = NULL;
663 ohci_hash_add_itd(sc, sitd);
674 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
678 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
682 panic("ohci_free_sitd: sitd=%p not done", sitd);
685 /* Warn double free */
690 ohci_hash_rem_itd(sc, sitd);
691 sitd->nextitd = sc->sc_freeitds;
692 sc->sc_freeitds = sitd;
697 ohci_init(ohci_softc_t *sc)
699 ohci_soft_ed_t *sed, *psed;
704 DPRINTF(("ohci_init: start\n"));
705 #if defined(__OpenBSD__)
708 printf("%s:", USBDEVNAME(sc->sc_bus.bdev));
710 rev = OREAD4(sc, OHCI_REVISION);
711 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev),
712 OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
714 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
715 printf("%s: unsupported OHCI revision\n",
716 USBDEVNAME(sc->sc_bus.bdev));
717 sc->sc_bus.usbrev = USBREV_UNKNOWN;
720 sc->sc_bus.usbrev = USBREV_1_0;
722 for (i = 0; i < OHCI_HASH_SIZE; i++)
723 LIST_INIT(&sc->sc_hash_tds[i]);
724 for (i = 0; i < OHCI_HASH_SIZE; i++)
725 LIST_INIT(&sc->sc_hash_itds[i]);
727 SIMPLEQ_INIT(&sc->sc_free_xfers);
729 /* XXX determine alignment by R/W */
730 /* Allocate the HCCA area. */
731 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
732 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
735 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
736 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
738 sc->sc_eintrs = OHCI_NORMAL_INTRS;
740 /* Allocate dummy ED that starts the control list. */
741 sc->sc_ctrl_head = ohci_alloc_sed(sc);
742 if (sc->sc_ctrl_head == NULL) {
746 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
748 /* Allocate dummy ED that starts the bulk list. */
749 sc->sc_bulk_head = ohci_alloc_sed(sc);
750 if (sc->sc_bulk_head == NULL) {
754 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
756 /* Allocate dummy ED that starts the isochronous list. */
757 sc->sc_isoc_head = ohci_alloc_sed(sc);
758 if (sc->sc_isoc_head == NULL) {
762 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
764 /* Allocate all the dummy EDs that make up the interrupt tree. */
765 for (i = 0; i < OHCI_NO_EDS; i++) {
766 sed = ohci_alloc_sed(sc);
769 ohci_free_sed(sc, sc->sc_eds[i]);
773 /* All ED fields are set to 0. */
775 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
777 psed = sc->sc_eds[(i-1) / 2];
779 psed= sc->sc_isoc_head;
781 sed->ed.ed_nexted = htole32(psed->physaddr);
784 * Fill HCCA interrupt table. The bit reversal is to get
785 * the tree set up properly to spread the interrupts.
787 for (i = 0; i < OHCI_NO_INTRS; i++)
788 sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
789 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
792 if (ohcidebug > 15) {
793 for (i = 0; i < OHCI_NO_EDS; i++) {
795 ohci_dump_ed(sc->sc_eds[i]);
798 ohci_dump_ed(sc->sc_isoc_head);
802 err = ohci_controller_init(sc);
803 if (err != USBD_NORMAL_COMPLETION)
806 /* Set up the bus struct. */
807 sc->sc_bus.methods = &ohci_bus_methods;
808 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
810 #if defined(__NetBSD__) || defined(__OpenBSD__)
811 sc->sc_control = sc->sc_intre = 0;
812 sc->sc_powerhook = powerhook_establish(ohci_power, sc);
813 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc);
816 usb_callout_init(sc->sc_tmo_rhsc);
818 return (USBD_NORMAL_COMPLETION);
821 for (i = 0; i < OHCI_NO_EDS; i++)
822 ohci_free_sed(sc, sc->sc_eds[i]);
824 ohci_free_sed(sc, sc->sc_isoc_head);
826 ohci_free_sed(sc, sc->sc_ctrl_head);
828 ohci_free_sed(sc, sc->sc_bulk_head);
830 usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
835 ohci_controller_init(ohci_softc_t *sc)
838 u_int32_t s, ctl, ival, hcr, fm, per, desca;
840 /* Determine in what context we are running. */
841 ctl = OREAD4(sc, OHCI_CONTROL);
843 /* SMM active, request change */
844 DPRINTF(("ohci_init: SMM active, request owner change\n"));
845 s = OREAD4(sc, OHCI_COMMAND_STATUS);
846 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
847 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
848 usb_delay_ms(&sc->sc_bus, 1);
849 ctl = OREAD4(sc, OHCI_CONTROL);
851 if ((ctl & OHCI_IR) == 0) {
852 printf("%s: SMM does not respond, resetting\n",
853 USBDEVNAME(sc->sc_bus.bdev));
854 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
858 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
859 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
860 /* BIOS started controller. */
861 DPRINTF(("ohci_init: BIOS active\n"));
862 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
863 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
864 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
868 DPRINTF(("ohci_init: cold started\n"));
870 /* Controller was cold started. */
871 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
875 * This reset should not be necessary according to the OHCI spec, but
876 * without it some controllers do not start.
878 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
879 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
880 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
882 /* We now own the host controller and the bus has been reset. */
883 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
885 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
886 /* Nominal time for a reset is 10 us. */
887 for (i = 0; i < 10; i++) {
889 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
894 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
895 return (USBD_IOERROR);
902 /* The controller is now in SUSPEND state, we have 2ms to finish. */
904 /* Set up HC registers. */
905 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
906 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
907 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
908 /* disable all interrupts and then switch on all desired interrupts */
909 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
910 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
911 /* switch on desired functional features */
912 ctl = OREAD4(sc, OHCI_CONTROL);
913 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
914 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
915 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
916 /* And finally start it! */
917 OWRITE4(sc, OHCI_CONTROL, ctl);
920 * The controller is now OPERATIONAL. Set a some final
921 * registers that should be set earlier, but that the
922 * controller ignores when in the SUSPEND state.
924 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
925 fm |= OHCI_FSMPS(ival) | ival;
926 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
927 per = OHCI_PERIODIC(ival); /* 90% periodic */
928 OWRITE4(sc, OHCI_PERIODIC_START, per);
930 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
931 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
932 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
933 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
934 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
935 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
938 * The AMD756 requires a delay before re-reading the register,
939 * otherwise it will occasionally report 0 ports.
941 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
942 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
948 return (USBD_NORMAL_COMPLETION);
952 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
954 return (usb_allocmem(bus, size, 0, dma));
958 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
960 usb_freemem(bus, dma);
964 ohci_allocx(struct usbd_bus *bus)
966 struct ohci_softc *sc = (struct ohci_softc *)bus;
967 usbd_xfer_handle xfer;
969 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
971 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
973 if (xfer->busy_free != XFER_FREE) {
974 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer,
979 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_INTWAIT);
982 memset(xfer, 0, sizeof (struct ohci_xfer));
984 xfer->busy_free = XFER_BUSY;
991 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
993 struct ohci_softc *sc = (struct ohci_softc *)bus;
994 struct ohci_xfer *oxfer = (struct ohci_xfer *)xfer;
995 ohci_soft_itd_t *sitd;
997 if (oxfer->ohci_xfer_flags & OHCI_ISOC_DIRTY) {
998 for (sitd = xfer->hcpriv; sitd != NULL && sitd->xfer == xfer;
999 sitd = sitd->nextitd)
1000 ohci_free_sitd(sc, sitd);
1004 if (xfer->busy_free != XFER_BUSY) {
1005 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
1009 xfer->busy_free = XFER_FREE;
1011 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1015 * Shut down the controller when the system is going down.
1018 ohci_shutdown(void *v)
1020 ohci_softc_t *sc = v;
1022 DPRINTF(("ohci_shutdown: stopping the HC\n"));
1023 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1027 * Handle suspend/resume.
1029 * We need to switch to polling mode here, because this routine is
1030 * called from an intterupt context. This is all right since we
1031 * are almost suspended anyway.
1034 ohci_power(int why, void *v)
1036 ohci_softc_t *sc = v;
1041 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
1046 if (why != PWR_RESUME) {
1047 sc->sc_bus.use_polling++;
1048 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
1049 if (sc->sc_control == 0) {
1051 * Preserve register values, in case that APM BIOS
1052 * does not recover them.
1054 sc->sc_control = ctl;
1055 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE);
1057 ctl |= OHCI_HCFS_SUSPEND;
1058 OWRITE4(sc, OHCI_CONTROL, ctl);
1059 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1060 sc->sc_bus.use_polling--;
1062 sc->sc_bus.use_polling++;
1064 /* Some broken BIOSes never initialize Controller chip */
1065 ohci_controller_init(sc);
1068 OWRITE4(sc, OHCI_INTERRUPT_ENABLE,
1069 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE));
1071 ctl = sc->sc_control;
1073 ctl = OREAD4(sc, OHCI_CONTROL);
1074 ctl |= OHCI_HCFS_RESUME;
1075 OWRITE4(sc, OHCI_CONTROL, ctl);
1076 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
1077 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
1078 OWRITE4(sc, OHCI_CONTROL, ctl);
1079 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
1080 sc->sc_control = sc->sc_intre = 0;
1081 sc->sc_bus.use_polling--;
1088 ohci_dumpregs(ohci_softc_t *sc)
1090 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1091 OREAD4(sc, OHCI_REVISION),
1092 OREAD4(sc, OHCI_CONTROL),
1093 OREAD4(sc, OHCI_COMMAND_STATUS)));
1094 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1095 OREAD4(sc, OHCI_INTERRUPT_STATUS),
1096 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1097 OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
1098 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1099 OREAD4(sc, OHCI_HCCA),
1100 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1101 OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
1102 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1103 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1104 OREAD4(sc, OHCI_BULK_HEAD_ED),
1105 OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1106 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1107 OREAD4(sc, OHCI_DONE_HEAD),
1108 OREAD4(sc, OHCI_FM_INTERVAL),
1109 OREAD4(sc, OHCI_FM_REMAINING)));
1110 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1111 OREAD4(sc, OHCI_FM_NUMBER),
1112 OREAD4(sc, OHCI_PERIODIC_START),
1113 OREAD4(sc, OHCI_LS_THRESHOLD)));
1114 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
1115 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1116 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1117 OREAD4(sc, OHCI_RH_STATUS)));
1118 DPRINTF((" port1=0x%08x port2=0x%08x\n",
1119 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1120 OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1121 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
1122 le32toh(sc->sc_hcca->hcca_frame_number),
1123 le32toh(sc->sc_hcca->hcca_done_head)));
1127 Static int ohci_intr1(ohci_softc_t *);
1132 ohci_softc_t *sc = p;
1134 if (sc == NULL || sc->sc_dying)
1137 /* If we get an interrupt while polling, then just ignore it. */
1138 if (sc->sc_bus.use_polling) {
1140 printf("ohci_intr: ignored interrupt while polling\n");
1145 return (ohci_intr1(sc));
1149 ohci_intr1(ohci_softc_t *sc)
1151 u_int32_t intrs, eintrs;
1152 ohci_physaddr_t done;
1154 DPRINTFN(14,("ohci_intr1: enter\n"));
1156 /* In case the interrupt occurs before initialization has completed. */
1157 if (sc == NULL || sc->sc_hcca == NULL) {
1159 printf("ohci_intr: sc->sc_hcca == NULL\n");
1165 done = le32toh(sc->sc_hcca->hcca_done_head);
1167 /* The LSb of done is used to inform the HC Driver that an interrupt
1168 * condition exists for both the Done list and for another event
1169 * recorded in HcInterruptStatus. On an interrupt from the HC, the HC
1170 * Driver checks the HccaDoneHead Value. If this value is 0, then the
1171 * interrupt was caused by other than the HccaDoneHead update and the
1172 * HcInterruptStatus register needs to be accessed to determine that
1173 * exact interrupt cause. If HccaDoneHead is nonzero, then a Done list
1174 * update interrupt is indicated and if the LSb of done is nonzero,
1175 * then an additional interrupt event is indicated and
1176 * HcInterruptStatus should be checked to determine its cause.
1179 if (done & ~OHCI_DONE_INTRS)
1181 if (done & OHCI_DONE_INTRS) {
1182 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1183 done &= ~OHCI_DONE_INTRS;
1185 sc->sc_hcca->hcca_done_head = 0;
1187 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH;
1189 if (intrs == 0) /* nothing to be done (PCI shared interrupt) */
1193 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
1194 eintrs = intrs & sc->sc_eintrs;
1198 sc->sc_bus.intr_context++;
1199 sc->sc_bus.no_intrs++;
1200 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1201 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1204 if (eintrs & OHCI_SO) {
1205 sc->sc_overrun_cnt++;
1206 if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1207 printf("%s: %u scheduling overruns\n",
1208 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt);
1209 sc->sc_overrun_cnt = 0;
1214 if (eintrs & OHCI_WDH) {
1215 ohci_add_done(sc, done &~ OHCI_DONE_INTRS);
1216 usb_schedsoftintr(&sc->sc_bus);
1217 eintrs &= ~OHCI_WDH;
1219 if (eintrs & OHCI_RD) {
1220 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
1221 /* XXX process resume detect */
1223 if (eintrs & OHCI_UE) {
1224 printf("%s: unrecoverable error, controller halted\n",
1225 USBDEVNAME(sc->sc_bus.bdev));
1226 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1229 if (eintrs & OHCI_RHSC) {
1230 ohci_rhsc(sc, sc->sc_intrxfer);
1232 * Disable RHSC interrupt for now, because it will be
1233 * on until the port has been reset.
1235 ohci_rhsc_able(sc, 0);
1236 /* Do not allow RHSC interrupts > 1 per second */
1237 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1238 eintrs &= ~OHCI_RHSC;
1241 sc->sc_bus.intr_context--;
1244 /* Block unprocessed interrupts. XXX */
1245 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1246 sc->sc_eintrs &= ~eintrs;
1247 printf("%s: blocking intrs 0x%x\n",
1248 USBDEVNAME(sc->sc_bus.bdev), eintrs);
1255 ohci_rhsc_able(ohci_softc_t *sc, int on)
1257 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
1259 sc->sc_eintrs |= OHCI_RHSC;
1260 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1262 sc->sc_eintrs &= ~OHCI_RHSC;
1263 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1268 ohci_rhsc_enable(void *v_sc)
1270 ohci_softc_t *sc = v_sc;
1274 ohci_rhsc_able(sc, 1);
1279 char *ohci_cc_strs[] = {
1283 "DATA_TOGGLE_MISMATCH",
1285 "DEVICE_NOT_RESPONDING",
1286 "PID_CHECK_FAILURE",
1300 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done)
1302 ohci_soft_itd_t *sitd, *sidone, **ip;
1303 ohci_soft_td_t *std, *sdone, **p;
1305 /* Reverse the done list. */
1306 for (sdone = NULL, sidone = NULL; done != 0; ) {
1307 std = ohci_hash_find_td(sc, done);
1310 done = le32toh(std->td.td_nexttd);
1312 DPRINTFN(10,("add TD %p\n", std));
1315 sitd = ohci_hash_find_itd(sc, done);
1317 sitd->dnext = sidone;
1318 done = le32toh(sitd->itd.itd_nextitd);
1320 DPRINTFN(5,("add ITD %p\n", sitd));
1323 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done);
1326 /* sdone & sidone now hold the done lists. */
1327 /* Put them on the already processed lists. */
1328 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext)
1331 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext)
1337 ohci_softintr(void *v)
1339 ohci_softc_t *sc = v;
1340 ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1341 ohci_soft_td_t *std, *sdone, *stdnext;
1342 usbd_xfer_handle xfer;
1343 struct ohci_pipe *opipe;
1346 DPRINTFN(10,("ohci_softintr: enter\n"));
1348 sc->sc_bus.intr_context++;
1351 sdone = sc->sc_sdone;
1352 sc->sc_sdone = NULL;
1353 sidone = sc->sc_sidone;
1354 sc->sc_sidone = NULL;
1357 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
1360 if (ohcidebug > 10) {
1361 DPRINTF(("ohci_process_done: TD done:\n"));
1362 ohci_dump_tds(sdone);
1366 for (std = sdone; std; std = stdnext) {
1368 stdnext = std->dnext;
1369 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1370 std, xfer, (xfer ? xfer->hcpriv : NULL)));
1371 if (xfer == NULL || (std->flags & OHCI_TD_HANDLED)) {
1373 * xfer == NULL: There seems to be no xfer associated
1374 * with this TD. It is tailp that happened to end up on
1376 * flags & OHCI_TD_HANDLED: The TD has already been
1377 * handled by process_done and should not be done again.
1378 * Shouldn't happen, but some chips are broken(?).
1382 if (xfer->status == USBD_CANCELLED ||
1383 xfer->status == USBD_TIMEOUT) {
1384 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1386 /* Handled by abort routine. */
1389 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
1392 if (std->td.td_cbp != 0)
1393 len -= le32toh(std->td.td_be) -
1394 le32toh(std->td.td_cbp) + 1;
1395 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
1397 if (std->flags & OHCI_ADD_LEN)
1398 xfer->actlen += len;
1400 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags));
1401 if (cc == OHCI_CC_NO_ERROR) {
1402 if (std->flags & OHCI_CALL_DONE) {
1403 xfer->status = USBD_NORMAL_COMPLETION;
1405 usb_transfer_complete(xfer);
1408 ohci_free_std(sc, std);
1411 * Endpoint is halted. First unlink all the TDs
1412 * belonging to the failed transfer, and then restart
1415 ohci_soft_td_t *p, *n;
1416 opipe = (struct ohci_pipe *)xfer->pipe;
1418 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1419 OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1420 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))]));
1423 /* Mark all the TDs in the done queue for the current
1426 for (p = stdnext; p; p = p->dnext) {
1427 if (p->xfer == xfer)
1428 p->flags |= OHCI_TD_HANDLED;
1432 for (p = std; p->xfer == xfer; p = n) {
1434 ohci_free_std(sc, p);
1438 opipe->sed->ed.ed_headp = htole32(p->physaddr);
1439 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1441 if (cc == OHCI_CC_STALL)
1442 xfer->status = USBD_STALLED;
1444 xfer->status = USBD_IOERROR;
1446 usb_transfer_complete(xfer);
1452 if (ohcidebug > 10) {
1453 DPRINTF(("ohci_softintr: ITD done:\n"));
1454 ohci_dump_itds(sidone);
1458 for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1460 sitdnext = sitd->dnext;
1461 sitd->flags |= OHCI_ITD_INTFIN;
1462 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1463 sitd, xfer, xfer ? xfer->hcpriv : 0));
1466 if (xfer->status == USBD_CANCELLED ||
1467 xfer->status == USBD_TIMEOUT) {
1468 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1470 /* Handled by abort routine. */
1474 if (xfer->pipe->aborting)
1475 continue; /*Ignore.*/
1478 printf("ohci_softintr: sitd=%p is done\n", sitd);
1481 opipe = (struct ohci_pipe *)xfer->pipe;
1482 if (opipe->aborting)
1485 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags));
1486 if (cc == OHCI_CC_NO_ERROR) {
1487 /* XXX compute length for input */
1488 if (sitd->flags & OHCI_CALL_DONE) {
1489 opipe->u.iso.inuse -= xfer->nframes;
1490 /* XXX update frlengths with actual length */
1491 /* XXX xfer->actlen = actlen; */
1492 xfer->status = USBD_NORMAL_COMPLETION;
1494 usb_transfer_complete(xfer);
1499 xfer->status = USBD_IOERROR;
1501 usb_transfer_complete(xfer);
1506 #ifdef USB_USE_SOFTINTR
1507 if (sc->sc_softwake) {
1508 sc->sc_softwake = 0;
1509 wakeup(&sc->sc_softwake);
1511 #endif /* USB_USE_SOFTINTR */
1513 sc->sc_bus.intr_context--;
1514 DPRINTFN(10,("ohci_softintr: done:\n"));
1518 ohci_device_ctrl_done(usbd_xfer_handle xfer)
1520 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
1523 if (!(xfer->rqflags & URQ_REQUEST)) {
1524 panic("ohci_device_ctrl_done: not a request");
1527 xfer->hcpriv = NULL;
1531 ohci_device_intr_done(usbd_xfer_handle xfer)
1533 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1534 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1535 ohci_soft_ed_t *sed = opipe->sed;
1536 ohci_soft_td_t *data, *tail;
1539 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n",
1540 xfer, xfer->actlen));
1542 xfer->hcpriv = NULL;
1544 if (xfer->pipe->repeat) {
1545 data = opipe->tail.td;
1546 tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1548 xfer->status = USBD_NOMEM;
1553 data->td.td_flags = htole32(
1554 OHCI_TD_IN | OHCI_TD_NOCC |
1555 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1556 if (xfer->flags & USBD_SHORT_XFER_OK)
1557 data->td.td_flags |= htole32(OHCI_TD_R);
1558 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
1559 data->nexttd = tail;
1560 data->td.td_nexttd = htole32(tail->physaddr);
1561 data->td.td_be = htole32(le32toh(data->td.td_cbp) +
1563 data->len = xfer->length;
1565 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1566 xfer->hcpriv = data;
1569 sed->ed.ed_tailp = htole32(tail->physaddr);
1570 opipe->tail.td = tail;
1575 ohci_device_bulk_done(usbd_xfer_handle xfer)
1577 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n",
1578 xfer, xfer->actlen));
1580 xfer->hcpriv = NULL;
1584 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1586 usbd_pipe_handle pipe;
1591 hstatus = OREAD4(sc, OHCI_RH_STATUS);
1592 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1593 sc, xfer, hstatus));
1596 /* Just ignore the change. */
1602 p = KERNADDR(&xfer->dmabuf, 0);
1603 m = min(sc->sc_noport, xfer->length * 8 - 1);
1604 memset(p, 0, xfer->length);
1605 for (i = 1; i <= m; i++) {
1606 /* Pick out CHANGE bits from the status reg. */
1607 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1608 p[i/8] |= 1 << (i%8);
1610 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1611 xfer->actlen = xfer->length;
1612 xfer->status = USBD_NORMAL_COMPLETION;
1614 usb_transfer_complete(xfer);
1618 ohci_root_intr_done(usbd_xfer_handle xfer)
1620 xfer->hcpriv = NULL;
1624 ohci_root_ctrl_done(usbd_xfer_handle xfer)
1626 xfer->hcpriv = NULL;
1630 * Wait here until controller claims to have an interrupt.
1631 * Then call ohci_intr and return. Use timeout to avoid waiting
1635 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1637 int timo = xfer->timeout;
1641 xfer->status = USBD_IN_PROGRESS;
1642 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
1643 usb_delay_ms(&sc->sc_bus, 1);
1646 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1647 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1654 if (xfer->status != USBD_IN_PROGRESS)
1660 DPRINTF(("ohci_waitintr: timeout\n"));
1661 xfer->status = USBD_TIMEOUT;
1662 usb_transfer_complete(xfer);
1663 /* XXX should free TD */
1667 ohci_poll(struct usbd_bus *bus)
1669 ohci_softc_t *sc = (ohci_softc_t *)bus;
1673 new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1675 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1680 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1685 ohci_device_request(usbd_xfer_handle xfer)
1687 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1688 usb_device_request_t *req = &xfer->request;
1689 usbd_device_handle dev = opipe->pipe.device;
1690 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1691 int addr = dev->address;
1692 ohci_soft_td_t *setup, *stat, *next, *tail;
1693 ohci_soft_ed_t *sed;
1699 isread = req->bmRequestType & UT_READ;
1700 len = UGETW(req->wLength);
1702 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1703 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1704 req->bmRequestType, req->bRequest, UGETW(req->wValue),
1705 UGETW(req->wIndex), len, addr,
1706 opipe->pipe.endpoint->edesc->bEndpointAddress));
1708 setup = opipe->tail.td;
1709 stat = ohci_alloc_std(sc);
1714 tail = ohci_alloc_std(sc);
1722 opipe->u.ctl.length = len;
1724 /* Update device address and length since they may have changed. */
1725 /* XXX This only needs to be done once, but it's too early in open. */
1726 /* XXXX Should not touch ED here! */
1727 sed->ed.ed_flags = htole32(
1728 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1729 OHCI_ED_SET_FA(addr) |
1730 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1734 /* Set up data transaction */
1736 ohci_soft_td_t *std = stat;
1738 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1740 stat = stat->nexttd; /* point at free TD */
1743 /* Start toggle at 1 and then use the carried toggle. */
1744 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK);
1745 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1748 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
1750 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1751 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1752 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0));
1753 setup->nexttd = next;
1754 setup->td.td_nexttd = htole32(next->physaddr);
1755 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1);
1759 xfer->hcpriv = setup;
1761 stat->td.td_flags = htole32(
1762 (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1763 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1764 stat->td.td_cbp = 0;
1765 stat->nexttd = tail;
1766 stat->td.td_nexttd = htole32(tail->physaddr);
1768 stat->flags = OHCI_CALL_DONE;
1773 if (ohcidebug > 5) {
1774 DPRINTF(("ohci_device_request:\n"));
1776 ohci_dump_tds(setup);
1780 /* Insert ED in schedule */
1782 sed->ed.ed_tailp = htole32(tail->physaddr);
1783 opipe->tail.td = tail;
1784 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1785 if (xfer->timeout && !sc->sc_bus.use_polling) {
1786 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
1787 ohci_timeout, xfer);
1792 if (ohcidebug > 20) {
1794 DPRINTF(("ohci_device_request: status=%x\n",
1795 OREAD4(sc, OHCI_COMMAND_STATUS)));
1797 printf("ctrl head:\n");
1798 ohci_dump_ed(sc->sc_ctrl_head);
1801 ohci_dump_tds(setup);
1805 return (USBD_NORMAL_COMPLETION);
1808 ohci_free_std(sc, tail);
1810 ohci_free_std(sc, stat);
1816 * Add an ED to the schedule. Called at splusb().
1819 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1821 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
1824 sed->next = head->next;
1825 sed->ed.ed_nexted = head->ed.ed_nexted;
1827 head->ed.ed_nexted = htole32(sed->physaddr);
1831 * Remove an ED from the schedule. Called at splusb().
1834 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1841 for (p = head; p != NULL && p->next != sed; p = p->next)
1844 panic("ohci_rem_ed: ED not found");
1845 p->next = sed->next;
1846 p->ed.ed_nexted = sed->ed.ed_nexted;
1850 * When a transfer is completed the TD is added to the done queue by
1851 * the host controller. This queue is the processed by software.
1852 * Unfortunately the queue contains the physical address of the TD
1853 * and we have no simple way to translate this back to a kernel address.
1854 * To make the translation possible (and fast) we use a hash table of
1855 * TDs currently in the schedule. The physical address is used as the
1859 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1860 /* Called at splusb() */
1862 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1864 int h = HASH(std->physaddr);
1868 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1871 /* Called at splusb() */
1873 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1877 LIST_REMOVE(std, hnext);
1881 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1884 ohci_soft_td_t *std;
1886 /* if these are present they should be masked out at an earlier
1889 KASSERT((a&~OHCI_HEADMASK) == 0, ("%s: 0x%b has lower bits set\n",
1890 USBDEVNAME(sc->sc_bus.bdev),
1891 (int) a, "\20\1HALT\2TOGGLE"));
1893 for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1895 std = LIST_NEXT(std, hnext))
1896 if (std->physaddr == a)
1899 DPRINTF(("%s: ohci_hash_find_td: addr 0x%08lx not found\n",
1900 USBDEVNAME(sc->sc_bus.bdev), (u_long) a));
1904 /* Called at splusb() */
1906 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1908 int h = HASH(sitd->physaddr);
1912 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1913 sitd, (u_long)sitd->physaddr));
1915 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1918 /* Called at splusb() */
1920 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1924 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1925 sitd, (u_long)sitd->physaddr));
1927 LIST_REMOVE(sitd, hnext);
1931 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1934 ohci_soft_itd_t *sitd;
1936 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1938 sitd = LIST_NEXT(sitd, hnext))
1939 if (sitd->physaddr == a)
1945 ohci_timeout(void *addr)
1947 struct ohci_xfer *oxfer = addr;
1948 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe;
1949 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1951 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
1954 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
1958 /* Execute the abort in a process context. */
1959 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr);
1960 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task);
1964 ohci_timeout_task(void *addr)
1966 usbd_xfer_handle xfer = addr;
1969 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
1972 ohci_abort_xfer(xfer, USBD_TIMEOUT);
1978 ohci_dump_tds(ohci_soft_td_t *std)
1980 for (; std; std = std->nexttd)
1985 ohci_dump_td(ohci_soft_td_t *std)
1989 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags),
1990 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1991 sbuf, sizeof(sbuf));
1993 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1994 "nexttd=0x%08lx be=0x%08lx\n",
1995 std, (u_long)std->physaddr, sbuf,
1996 OHCI_TD_GET_DI(le32toh(std->td.td_flags)),
1997 OHCI_TD_GET_EC(le32toh(std->td.td_flags)),
1998 OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1999 (u_long)le32toh(std->td.td_cbp),
2000 (u_long)le32toh(std->td.td_nexttd),
2001 (u_long)le32toh(std->td.td_be));
2005 ohci_dump_itd(ohci_soft_itd_t *sitd)
2009 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
2010 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
2011 sitd, (u_long)sitd->physaddr,
2012 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)),
2013 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)),
2014 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)),
2015 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)),
2016 (u_long)le32toh(sitd->itd.itd_bp0),
2017 (u_long)le32toh(sitd->itd.itd_nextitd),
2018 (u_long)le32toh(sitd->itd.itd_be));
2019 for (i = 0; i < OHCI_ITD_NOFFSET; i++)
2020 printf("offs[%d]=0x%04x ", i,
2021 (u_int)le16toh(sitd->itd.itd_offset[i]));
2026 ohci_dump_itds(ohci_soft_itd_t *sitd)
2028 for (; sitd; sitd = sitd->nextitd)
2029 ohci_dump_itd(sitd);
2033 ohci_dump_ed(ohci_soft_ed_t *sed)
2035 char sbuf[128], sbuf2[128];
2037 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags),
2038 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
2039 sbuf, sizeof(sbuf));
2040 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp),
2041 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2));
2043 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
2044 "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
2045 sed, (u_long)sed->physaddr,
2046 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)),
2047 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)),
2048 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf,
2049 (u_long)le32toh(sed->ed.ed_tailp), sbuf2,
2050 (u_long)le32toh(sed->ed.ed_headp),
2051 (u_long)le32toh(sed->ed.ed_nexted));
2056 ohci_open(usbd_pipe_handle pipe)
2058 usbd_device_handle dev = pipe->device;
2059 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2060 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2061 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2062 u_int8_t addr = dev->address;
2063 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
2064 ohci_soft_ed_t *sed;
2065 ohci_soft_td_t *std;
2066 ohci_soft_itd_t *sitd;
2067 ohci_physaddr_t tdphys;
2073 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2074 pipe, addr, ed->bEndpointAddress, sc->sc_addr));
2077 return (USBD_IOERROR);
2082 if (addr == sc->sc_addr) {
2083 switch (ed->bEndpointAddress) {
2084 case USB_CONTROL_ENDPOINT:
2085 pipe->methods = &ohci_root_ctrl_methods;
2087 case UE_DIR_IN | OHCI_INTR_ENDPT:
2088 pipe->methods = &ohci_root_intr_methods;
2091 return (USBD_INVAL);
2094 sed = ohci_alloc_sed(sc);
2098 if (xfertype == UE_ISOCHRONOUS) {
2099 sitd = ohci_alloc_sitd(sc);
2102 opipe->tail.itd = sitd;
2103 opipe->aborting = 0;
2104 tdphys = sitd->physaddr;
2105 fmt = OHCI_ED_FORMAT_ISO;
2106 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2107 fmt |= OHCI_ED_DIR_IN;
2109 fmt |= OHCI_ED_DIR_OUT;
2111 std = ohci_alloc_std(sc);
2114 opipe->tail.td = std;
2115 tdphys = std->physaddr;
2116 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
2118 sed->ed.ed_flags = htole32(
2119 OHCI_ED_SET_FA(addr) |
2120 OHCI_ED_SET_EN(ed->bEndpointAddress) |
2121 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2123 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
2124 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys);
2128 pipe->methods = &ohci_device_ctrl_methods;
2129 err = usb_allocmem(&sc->sc_bus,
2130 sizeof(usb_device_request_t),
2131 0, &opipe->u.ctl.reqdma);
2135 ohci_add_ed(sed, sc->sc_ctrl_head);
2139 pipe->methods = &ohci_device_intr_methods;
2140 ival = pipe->interval;
2141 if (ival == USBD_DEFAULT_INTERVAL)
2142 ival = ed->bInterval;
2143 return (ohci_device_setintr(sc, opipe, ival));
2144 case UE_ISOCHRONOUS:
2145 pipe->methods = &ohci_device_isoc_methods;
2146 return (ohci_setup_isoc(pipe));
2148 pipe->methods = &ohci_device_bulk_methods;
2150 ohci_add_ed(sed, sc->sc_bulk_head);
2155 return (USBD_NORMAL_COMPLETION);
2159 ohci_free_std(sc, std);
2162 ohci_free_sed(sc, sed);
2164 return (USBD_NOMEM);
2169 * Close a reqular pipe.
2170 * Assumes that there are no pending transactions.
2173 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
2175 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2176 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2177 ohci_soft_ed_t *sed = opipe->sed;
2182 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
2183 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2184 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2185 ohci_soft_td_t *std;
2186 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp));
2187 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2188 "tl=0x%x pipe=%p, std=%p\n", sed,
2189 (int)le32toh(sed->ed.ed_headp),
2190 (int)le32toh(sed->ed.ed_tailp),
2193 usbd_dump_pipe(&opipe->pipe);
2200 usb_delay_ms(&sc->sc_bus, 2);
2201 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2202 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
2203 printf("ohci_close_pipe: pipe still not empty\n");
2206 ohci_rem_ed(sed, head);
2207 /* Make sure the host controller is not touching this ED */
2208 usb_delay_ms(&sc->sc_bus, 1);
2210 ohci_free_sed(sc, opipe->sed);
2214 * Abort a device request.
2215 * If this routine is called at splusb() it guarantees that the request
2216 * will be removed from the hardware scheduling and that the callback
2217 * for it will be called with USBD_CANCELLED status.
2218 * It's impossible to guarantee that the requested transfer will not
2219 * have happened since the hardware runs concurrently.
2220 * If the transaction has already happened we rely on the ordinary
2221 * interrupt processing to process it.
2224 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2226 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2227 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
2228 ohci_soft_ed_t *sed = opipe->sed;
2229 ohci_soft_td_t *p, *n;
2230 ohci_physaddr_t headp;
2233 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed));
2236 /* If we're dying, just do the software part. */
2238 xfer->status = status; /* make software ignore it */
2239 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2240 usb_transfer_complete(xfer);
2244 if (xfer->device->bus->intr_context /* || !curproc REMOVED DFly */)
2245 panic("ohci_abort_xfer: not in process context");
2248 * Step 1: Make interrupt routine and hardware ignore xfer.
2251 xfer->status = status; /* make software ignore it */
2252 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2254 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2255 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
2258 * Step 2: Wait until we know hardware has finished any possible
2259 * use of the xfer. Also make sure the soft interrupt routine
2262 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */
2264 #ifdef USB_USE_SOFTINTR
2265 sc->sc_softwake = 1;
2266 #endif /* USB_USE_SOFTINTR */
2267 usb_schedsoftintr(&sc->sc_bus);
2268 #ifdef USB_USE_SOFTINTR
2269 tsleep(&sc->sc_softwake, 0, "ohciab", 0);
2270 #endif /* USB_USE_SOFTINTR */
2274 * Step 3: Remove any vestiges of the xfer from the hardware.
2275 * The complication here is that the hardware may have executed
2276 * beyond the xfer we're trying to abort. So as we're scanning
2277 * the TDs of this xfer we check if the hardware points to
2280 s = splusb(); /* XXX why? */
2285 printf("ohci_abort_xfer: hcpriv is NULL\n");
2290 if (ohcidebug > 1) {
2291 DPRINTF(("ohci_abort_xfer: sed=\n"));
2296 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK;
2298 for (; p->xfer == xfer; p = n) {
2299 hit |= headp == p->physaddr;
2301 ohci_free_std(sc, p);
2303 /* Zap headp register if hardware pointed inside the xfer. */
2305 DPRINTFN(1,("ohci_abort_xfer: set hd=0x08%x, tl=0x%08x\n",
2306 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp)));
2307 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */
2309 DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2313 * Step 4: Turn on hardware again.
2315 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
2318 * Step 5: Execute callback.
2320 usb_transfer_complete(xfer);
2326 * Data structures and routines to emulate the root hub.
2328 Static usb_device_descriptor_t ohci_devd = {
2329 USB_DEVICE_DESCRIPTOR_SIZE,
2330 UDESC_DEVICE, /* type */
2331 {0x00, 0x01}, /* USB version */
2332 UDCLASS_HUB, /* class */
2333 UDSUBCLASS_HUB, /* subclass */
2334 UDPROTO_FSHUB, /* protocol */
2335 64, /* max packet */
2336 {0},{0},{0x00,0x01}, /* device id */
2337 1,2,0, /* string indicies */
2338 1 /* # of configurations */
2341 Static usb_config_descriptor_t ohci_confd = {
2342 USB_CONFIG_DESCRIPTOR_SIZE,
2344 {USB_CONFIG_DESCRIPTOR_SIZE +
2345 USB_INTERFACE_DESCRIPTOR_SIZE +
2346 USB_ENDPOINT_DESCRIPTOR_SIZE},
2354 Static usb_interface_descriptor_t ohci_ifcd = {
2355 USB_INTERFACE_DESCRIPTOR_SIZE,
2366 Static usb_endpoint_descriptor_t ohci_endpd = {
2367 USB_ENDPOINT_DESCRIPTOR_SIZE,
2369 UE_DIR_IN | OHCI_INTR_ENDPT,
2371 {8, 0}, /* max packet */
2375 Static usb_hub_descriptor_t ohci_hubd = {
2376 USB_HUB_DESCRIPTOR_SIZE,
2386 ohci_str(usb_string_descriptor_t *p, int l, const char *s)
2392 p->bLength = 2 * strlen(s) + 2;
2395 p->bDescriptorType = UDESC_STRING;
2397 for (i = 0; s[i] && l > 1; i++, l -= 2)
2398 USETW2(p->bString[i], 0, s[i]);
2403 * Simulate a hardware hub by handling all the necessary requests.
2406 ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2410 /* Insert last in queue. */
2411 err = usb_insert_transfer(xfer);
2415 /* Pipe isn't running, start first */
2416 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2420 ohci_root_ctrl_start(usbd_xfer_handle xfer)
2422 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2423 usb_device_request_t *req;
2426 int s, len, value, index, l, totlen = 0;
2427 usb_port_status_t ps;
2428 usb_hub_descriptor_t hubd;
2433 return (USBD_IOERROR);
2436 if (!(xfer->rqflags & URQ_REQUEST))
2438 return (USBD_INVAL);
2440 req = &xfer->request;
2442 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2443 req->bmRequestType, req->bRequest));
2445 len = UGETW(req->wLength);
2446 value = UGETW(req->wValue);
2447 index = UGETW(req->wIndex);
2450 buf = KERNADDR(&xfer->dmabuf, 0);
2452 #define C(x,y) ((x) | ((y) << 8))
2453 switch(C(req->bRequest, req->bmRequestType)) {
2454 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2455 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2456 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2458 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2459 * for the integrated root hub.
2462 case C(UR_GET_CONFIG, UT_READ_DEVICE):
2464 *(u_int8_t *)buf = sc->sc_conf;
2468 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2469 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2470 switch(value >> 8) {
2472 if ((value & 0xff) != 0) {
2476 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2477 USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2478 memcpy(buf, &ohci_devd, l);
2481 if ((value & 0xff) != 0) {
2485 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2486 memcpy(buf, &ohci_confd, l);
2487 buf = (char *)buf + l;
2489 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2491 memcpy(buf, &ohci_ifcd, l);
2492 buf = (char *)buf + l;
2494 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2496 memcpy(buf, &ohci_endpd, l);
2501 *(u_int8_t *)buf = 0;
2503 switch (value & 0xff) {
2504 case 1: /* Vendor */
2505 totlen = ohci_str(buf, len, sc->sc_vendor);
2507 case 2: /* Product */
2508 totlen = ohci_str(buf, len, "OHCI root hub");
2517 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2519 *(u_int8_t *)buf = 0;
2523 case C(UR_GET_STATUS, UT_READ_DEVICE):
2525 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2529 case C(UR_GET_STATUS, UT_READ_INTERFACE):
2530 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2532 USETW(((usb_status_t *)buf)->wStatus, 0);
2536 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2537 if (value >= USB_MAX_DEVICES) {
2541 sc->sc_addr = value;
2543 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2544 if (value != 0 && value != 1) {
2548 sc->sc_conf = value;
2550 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2552 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2553 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2554 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2557 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2559 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2562 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2564 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2565 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2566 "port=%d feature=%d\n",
2568 if (index < 1 || index > sc->sc_noport) {
2572 port = OHCI_RH_PORT_STATUS(index);
2574 case UHF_PORT_ENABLE:
2575 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2577 case UHF_PORT_SUSPEND:
2578 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2580 case UHF_PORT_POWER:
2581 /* Yes, writing to the LOW_SPEED bit clears power. */
2582 OWRITE4(sc, port, UPS_LOW_SPEED);
2584 case UHF_C_PORT_CONNECTION:
2585 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2587 case UHF_C_PORT_ENABLE:
2588 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2590 case UHF_C_PORT_SUSPEND:
2591 OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2593 case UHF_C_PORT_OVER_CURRENT:
2594 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2596 case UHF_C_PORT_RESET:
2597 OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2604 case UHF_C_PORT_CONNECTION:
2605 case UHF_C_PORT_ENABLE:
2606 case UHF_C_PORT_SUSPEND:
2607 case UHF_C_PORT_OVER_CURRENT:
2608 case UHF_C_PORT_RESET:
2609 /* Enable RHSC interrupt if condition is cleared. */
2610 if ((OREAD4(sc, port) >> 16) == 0)
2611 ohci_rhsc_able(sc, 1);
2617 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2622 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2624 hubd.bNbrPorts = sc->sc_noport;
2625 USETW(hubd.wHubCharacteristics,
2626 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2627 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2628 /* XXX overcurrent */
2630 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2631 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2632 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2633 hubd.DeviceRemovable[i++] = (u_int8_t)v;
2634 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2635 l = min(len, hubd.bDescLength);
2637 memcpy(buf, &hubd, l);
2639 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2644 memset(buf, 0, len); /* ? XXX */
2647 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2648 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2650 if (index < 1 || index > sc->sc_noport) {
2658 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2659 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2661 USETW(ps.wPortStatus, v);
2662 USETW(ps.wPortChange, v >> 16);
2663 l = min(len, sizeof ps);
2664 memcpy(buf, &ps, l);
2667 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2670 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2672 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2673 if (index < 1 || index > sc->sc_noport) {
2677 port = OHCI_RH_PORT_STATUS(index);
2679 case UHF_PORT_ENABLE:
2680 OWRITE4(sc, port, UPS_PORT_ENABLED);
2682 case UHF_PORT_SUSPEND:
2683 OWRITE4(sc, port, UPS_SUSPEND);
2685 case UHF_PORT_RESET:
2686 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2688 OWRITE4(sc, port, UPS_RESET);
2689 for (i = 0; i < 5; i++) {
2690 usb_delay_ms(&sc->sc_bus,
2691 USB_PORT_ROOT_RESET_DELAY);
2696 if ((OREAD4(sc, port) & UPS_RESET) == 0)
2699 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2700 index, OREAD4(sc, port)));
2702 case UHF_PORT_POWER:
2703 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2705 OWRITE4(sc, port, UPS_PORT_POWER);
2716 xfer->actlen = totlen;
2717 err = USBD_NORMAL_COMPLETION;
2721 usb_transfer_complete(xfer);
2723 return (USBD_IN_PROGRESS);
2726 /* Abort a root control request. */
2728 ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2730 /* Nothing to do, all transfers are synchronous. */
2733 /* Close the root pipe. */
2735 ohci_root_ctrl_close(usbd_pipe_handle pipe)
2737 DPRINTF(("ohci_root_ctrl_close\n"));
2738 /* Nothing to do. */
2742 ohci_root_intr_transfer(usbd_xfer_handle xfer)
2746 /* Insert last in queue. */
2747 err = usb_insert_transfer(xfer);
2751 /* Pipe isn't running, start first */
2752 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2756 ohci_root_intr_start(usbd_xfer_handle xfer)
2758 usbd_pipe_handle pipe = xfer->pipe;
2759 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2762 return (USBD_IOERROR);
2764 sc->sc_intrxfer = xfer;
2766 return (USBD_IN_PROGRESS);
2769 /* Abort a root interrupt request. */
2771 ohci_root_intr_abort(usbd_xfer_handle xfer)
2775 if (xfer->pipe->intrxfer == xfer) {
2776 DPRINTF(("ohci_root_intr_abort: remove\n"));
2777 xfer->pipe->intrxfer = NULL;
2779 xfer->status = USBD_CANCELLED;
2781 usb_transfer_complete(xfer);
2785 /* Close the root pipe. */
2787 ohci_root_intr_close(usbd_pipe_handle pipe)
2789 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2791 DPRINTF(("ohci_root_intr_close\n"));
2793 sc->sc_intrxfer = NULL;
2796 /************************/
2799 ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2803 /* Insert last in queue. */
2804 err = usb_insert_transfer(xfer);
2808 /* Pipe isn't running, start first */
2809 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2813 ohci_device_ctrl_start(usbd_xfer_handle xfer)
2815 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2819 return (USBD_IOERROR);
2822 if (!(xfer->rqflags & URQ_REQUEST)) {
2824 printf("ohci_device_ctrl_transfer: not a request\n");
2825 return (USBD_INVAL);
2829 err = ohci_device_request(xfer);
2833 if (sc->sc_bus.use_polling)
2834 ohci_waitintr(sc, xfer);
2835 return (USBD_IN_PROGRESS);
2838 /* Abort a device control request. */
2840 ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2842 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2843 ohci_abort_xfer(xfer, USBD_CANCELLED);
2846 /* Close a device control pipe. */
2848 ohci_device_ctrl_close(usbd_pipe_handle pipe)
2850 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2851 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2853 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2854 ohci_close_pipe(pipe, sc->sc_ctrl_head);
2855 ohci_free_std(sc, opipe->tail.td);
2858 /************************/
2861 ohci_device_clear_toggle(usbd_pipe_handle pipe)
2863 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2865 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY);
2869 ohci_noop(usbd_pipe_handle pipe)
2874 ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2878 /* Insert last in queue. */
2879 err = usb_insert_transfer(xfer);
2883 /* Pipe isn't running, start first */
2884 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2888 ohci_device_bulk_start(usbd_xfer_handle xfer)
2890 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2891 usbd_device_handle dev = opipe->pipe.device;
2892 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2893 int addr = dev->address;
2894 ohci_soft_td_t *data, *tail, *tdp;
2895 ohci_soft_ed_t *sed;
2896 int s, len, isread, endpt;
2900 return (USBD_IOERROR);
2903 if (xfer->rqflags & URQ_REQUEST) {
2905 printf("ohci_device_bulk_start: a request\n");
2906 return (USBD_INVAL);
2911 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2912 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2915 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2916 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2919 opipe->u.bulk.isread = isread;
2920 opipe->u.bulk.length = len;
2922 /* Update device address */
2923 sed->ed.ed_flags = htole32(
2924 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2925 OHCI_ED_SET_FA(addr));
2927 /* Allocate a chain of new TDs (including a new tail). */
2928 data = opipe->tail.td;
2929 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
2931 /* We want interrupt at the end of the transfer. */
2932 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK);
2933 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1));
2934 tail->flags |= OHCI_CALL_DONE;
2935 tail = tail->nexttd; /* point at sentinel */
2940 xfer->hcpriv = data;
2942 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2943 "td_cbp=0x%08x td_be=0x%08x\n",
2944 (int)le32toh(sed->ed.ed_flags),
2945 (int)le32toh(data->td.td_flags),
2946 (int)le32toh(data->td.td_cbp),
2947 (int)le32toh(data->td.td_be)));
2950 if (ohcidebug > 5) {
2952 ohci_dump_tds(data);
2956 /* Insert ED in schedule */
2958 for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2961 sed->ed.ed_tailp = htole32(tail->physaddr);
2962 opipe->tail.td = tail;
2963 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
2964 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2965 if (xfer->timeout && !sc->sc_bus.use_polling) {
2966 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2967 ohci_timeout, xfer);
2971 /* This goes wrong if we are too slow. */
2972 if (ohcidebug > 10) {
2974 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2975 OREAD4(sc, OHCI_COMMAND_STATUS)));
2977 ohci_dump_tds(data);
2983 return (USBD_IN_PROGRESS);
2987 ohci_device_bulk_abort(usbd_xfer_handle xfer)
2989 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
2990 ohci_abort_xfer(xfer, USBD_CANCELLED);
2994 * Close a device bulk pipe.
2997 ohci_device_bulk_close(usbd_pipe_handle pipe)
2999 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3000 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3002 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
3003 ohci_close_pipe(pipe, sc->sc_bulk_head);
3004 ohci_free_std(sc, opipe->tail.td);
3007 /************************/
3010 ohci_device_intr_transfer(usbd_xfer_handle xfer)
3014 /* Insert last in queue. */
3015 err = usb_insert_transfer(xfer);
3019 /* Pipe isn't running, start first */
3020 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3024 ohci_device_intr_start(usbd_xfer_handle xfer)
3026 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3027 usbd_device_handle dev = opipe->pipe.device;
3028 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3029 ohci_soft_ed_t *sed = opipe->sed;
3030 ohci_soft_td_t *data, *tail;
3035 return (USBD_IOERROR);
3037 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
3038 "flags=%d priv=%p\n",
3039 xfer, xfer->length, xfer->flags, xfer->priv));
3042 if (xfer->rqflags & URQ_REQUEST)
3043 panic("ohci_device_intr_transfer: a request");
3048 data = opipe->tail.td;
3049 tail = ohci_alloc_std(sc);
3051 return (USBD_NOMEM);
3054 data->td.td_flags = htole32(
3055 OHCI_TD_IN | OHCI_TD_NOCC |
3056 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
3057 if (xfer->flags & USBD_SHORT_XFER_OK)
3058 data->td.td_flags |= htole32(OHCI_TD_R);
3059 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
3060 data->nexttd = tail;
3061 data->td.td_nexttd = htole32(tail->physaddr);
3062 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1);
3065 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
3066 xfer->hcpriv = data;
3069 if (ohcidebug > 5) {
3070 DPRINTF(("ohci_device_intr_transfer:\n"));
3072 ohci_dump_tds(data);
3076 /* Insert ED in schedule */
3078 sed->ed.ed_tailp = htole32(tail->physaddr);
3079 opipe->tail.td = tail;
3080 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3084 * This goes horribly wrong, printing thousands of descriptors,
3085 * because false references are followed due to the fact that the
3088 if (ohcidebug > 5) {
3089 usb_delay_ms(&sc->sc_bus, 5);
3090 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3091 OREAD4(sc, OHCI_COMMAND_STATUS)));
3093 ohci_dump_tds(data);
3098 return (USBD_IN_PROGRESS);
3101 /* Abort a device control request. */
3103 ohci_device_intr_abort(usbd_xfer_handle xfer)
3105 if (xfer->pipe->intrxfer == xfer) {
3106 DPRINTF(("ohci_device_intr_abort: remove\n"));
3107 xfer->pipe->intrxfer = NULL;
3109 ohci_abort_xfer(xfer, USBD_CANCELLED);
3112 /* Close a device interrupt pipe. */
3114 ohci_device_intr_close(usbd_pipe_handle pipe)
3116 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3117 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3118 int nslots = opipe->u.intr.nslots;
3119 int pos = opipe->u.intr.pos;
3121 ohci_soft_ed_t *p, *sed = opipe->sed;
3124 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
3125 pipe, nslots, pos));
3127 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
3128 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3129 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
3130 usb_delay_ms(&sc->sc_bus, 2);
3132 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3133 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
3134 panic("%s: Intr pipe %p still has TDs queued",
3135 USBDEVNAME(sc->sc_bus.bdev), pipe);
3138 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3142 panic("ohci_device_intr_close: ED not found");
3144 p->next = sed->next;
3145 p->ed.ed_nexted = sed->ed.ed_nexted;
3148 for (j = 0; j < nslots; j++)
3149 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3151 ohci_free_std(sc, opipe->tail.td);
3152 ohci_free_sed(sc, opipe->sed);
3156 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3159 u_int npoll, slow, shigh, nslots;
3161 ohci_soft_ed_t *hsed, *sed = opipe->sed;
3163 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
3165 printf("ohci_setintr: 0 interval\n");
3166 return (USBD_INVAL);
3169 npoll = OHCI_NO_INTRS;
3170 while (npoll > ival)
3172 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
3175 * We now know which level in the tree the ED must go into.
3176 * Figure out which slot has most bandwidth left over.
3182 * 8 7 8 9 10 11 12 13 14
3183 * N (N-1) .. (N-1+N-1)
3186 shigh = slow + npoll;
3187 nslots = OHCI_NO_INTRS / npoll;
3188 for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3190 for (j = 0; j < nslots; j++)
3191 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3197 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
3198 best, slow, shigh, bestbw));
3201 hsed = sc->sc_eds[best];
3202 sed->next = hsed->next;
3203 sed->ed.ed_nexted = hsed->ed.ed_nexted;
3205 hsed->ed.ed_nexted = htole32(sed->physaddr);
3208 for (j = 0; j < nslots; j++)
3209 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3210 opipe->u.intr.nslots = nslots;
3211 opipe->u.intr.pos = best;
3213 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
3214 return (USBD_NORMAL_COMPLETION);
3217 /***********************/
3220 ohci_device_isoc_transfer(usbd_xfer_handle xfer)
3224 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
3226 /* Put it on our queue, */
3227 err = usb_insert_transfer(xfer);
3229 /* bail out on error, */
3230 if (err && err != USBD_IN_PROGRESS)
3233 /* XXX should check inuse here */
3235 /* insert into schedule, */
3236 ohci_device_isoc_enter(xfer);
3238 /* and start if the pipe wasn't running */
3240 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
3246 ohci_device_isoc_enter(usbd_xfer_handle xfer)
3248 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3249 usbd_device_handle dev = opipe->pipe.device;
3250 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3251 ohci_soft_ed_t *sed = opipe->sed;
3252 struct iso *iso = &opipe->u.iso;
3253 struct ohci_xfer *oxfer = (struct ohci_xfer *)xfer;
3254 ohci_soft_itd_t *sitd, *nsitd;
3255 ohci_physaddr_t buf, offs, noffs, bp0, tdphys;
3256 int i, ncur, nframes;
3259 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3261 iso->inuse, iso->next, xfer, xfer->nframes));
3266 if (iso->next == -1) {
3267 /* Not in use yet, schedule it a few frames ahead. */
3268 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5;
3269 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3274 for (sitd = xfer->hcpriv; sitd != NULL && sitd->xfer == xfer;
3275 sitd = sitd->nextitd)
3276 ohci_free_sitd(sc, sitd); /* Free ITDs in prev xfer*/
3279 sitd = ohci_alloc_sitd(sc);
3281 panic("cant alloc isoc");
3282 opipe->tail.itd = sitd;
3283 tdphys = sitd->physaddr;
3284 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* Stop*/
3286 sed->ed.ed_tailp = htole32(tdphys);
3287 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* Start.*/
3291 sitd = opipe->tail.itd;
3292 buf = DMAADDR(&xfer->dmabuf, 0);
3293 bp0 = OHCI_PAGE(buf);
3294 offs = OHCI_PAGE_OFFSET(buf);
3295 nframes = xfer->nframes;
3296 xfer->hcpriv = sitd;
3297 for (i = ncur = 0; i < nframes; i++, ncur++) {
3298 noffs = offs + xfer->frlengths[i];
3299 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
3300 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3302 /* Allocate next ITD */
3303 nsitd = ohci_alloc_sitd(sc);
3304 if (nsitd == NULL) {
3306 printf("%s: isoc TD alloc failed\n",
3307 USBDEVNAME(sc->sc_bus.bdev));
3311 /* Fill current ITD */
3312 sitd->itd.itd_flags = htole32(
3314 OHCI_ITD_SET_SF(iso->next) |
3315 OHCI_ITD_SET_DI(6) | /* delay intr a little */
3316 OHCI_ITD_SET_FC(ncur));
3317 sitd->itd.itd_bp0 = htole32(bp0);
3318 sitd->nextitd = nsitd;
3319 sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3320 sitd->itd.itd_be = htole32(bp0 + offs - 1);
3322 sitd->flags = OHCI_ITD_ACTIVE;
3325 iso->next = iso->next + ncur;
3326 bp0 = OHCI_PAGE(buf + offs);
3329 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs));
3332 nsitd = ohci_alloc_sitd(sc);
3333 if (nsitd == NULL) {
3335 printf("%s: isoc TD alloc failed\n",
3336 USBDEVNAME(sc->sc_bus.bdev));
3339 /* Fixup last used ITD */
3340 sitd->itd.itd_flags = htole32(
3342 OHCI_ITD_SET_SF(iso->next) |
3343 OHCI_ITD_SET_DI(0) |
3344 OHCI_ITD_SET_FC(ncur));
3345 sitd->itd.itd_bp0 = htole32(bp0);
3346 sitd->nextitd = nsitd;
3347 sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3348 sitd->itd.itd_be = htole32(bp0 + offs - 1);
3350 sitd->flags = OHCI_CALL_DONE | OHCI_ITD_ACTIVE;
3352 iso->next = iso->next + ncur;
3353 iso->inuse += nframes;
3355 xfer->actlen = offs; /* XXX pretend we did it all */
3357 xfer->status = USBD_IN_PROGRESS;
3359 oxfer->ohci_xfer_flags |= OHCI_ISOC_DIRTY;
3362 if (ohcidebug > 5) {
3363 DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3364 le32toh(sc->sc_hcca->hcca_frame_number)));
3365 ohci_dump_itds(xfer->hcpriv);
3371 opipe->tail.itd = nsitd;
3372 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3373 sed->ed.ed_tailp = htole32(nsitd->physaddr);
3377 if (ohcidebug > 5) {
3379 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3380 le32toh(sc->sc_hcca->hcca_frame_number)));
3381 ohci_dump_itds(xfer->hcpriv);
3388 ohci_device_isoc_start(usbd_xfer_handle xfer)
3390 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3391 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3392 ohci_soft_ed_t *sed;
3395 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3398 return (USBD_IOERROR);
3401 if (xfer->status != USBD_IN_PROGRESS)
3402 printf("ohci_device_isoc_start: not in progress %p\n", xfer);
3405 /* XXX anything to do? */
3408 sed = opipe->sed; /* Turn off ED skip-bit to start processing */
3409 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* ED's ITD list.*/
3412 return (USBD_IN_PROGRESS);
3416 ohci_device_isoc_abort(usbd_xfer_handle xfer)
3418 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3419 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3420 ohci_soft_ed_t *sed;
3421 ohci_soft_itd_t *sitd, *tmp_sitd;
3422 int s,undone,num_sitds;
3425 opipe->aborting = 1;
3427 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer));
3429 /* Transfer is already done. */
3430 if (xfer->status != USBD_NOT_STARTED &&
3431 xfer->status != USBD_IN_PROGRESS) {
3433 printf("ohci_device_isoc_abort: early return\n");
3437 /* Give xfer the requested abort code. */
3438 xfer->status = USBD_CANCELLED;
3441 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
3444 sitd = xfer->hcpriv;
3448 printf("ohci_device_isoc_abort: hcpriv==0\n");
3452 for (; sitd != NULL && sitd->xfer == xfer; sitd = sitd->nextitd) {
3455 DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3463 * Each sitd has up to OHCI_ITD_NOFFSET transfers, each can
3464 * take a usb 1ms cycle. Conservatively wait for it to drain.
3465 * Even with DMA done, it can take awhile for the "batch"
3466 * delivery of completion interrupts to occur thru the controller.
3470 usb_delay_ms(&sc->sc_bus, 2*(num_sitds*OHCI_ITD_NOFFSET));
3473 tmp_sitd = xfer->hcpriv;
3474 for (; tmp_sitd != NULL && tmp_sitd->xfer == xfer;
3475 tmp_sitd = tmp_sitd->nextitd) {
3476 if (OHCI_CC_NO_ERROR ==
3477 OHCI_ITD_GET_CC(le32toh(tmp_sitd->itd.itd_flags)) &&
3478 tmp_sitd->flags & OHCI_ITD_ACTIVE &&
3479 (tmp_sitd->flags & OHCI_ITD_INTFIN) == 0)
3482 } while( undone != 0 );
3488 usb_transfer_complete(xfer);
3492 * Only if there is a `next' sitd in next xfer...
3493 * unlink this xfer's sitds.
3495 sed->ed.ed_headp = htole32(sitd->physaddr);
3497 sed->ed.ed_headp = 0;
3499 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
3505 ohci_device_isoc_done(usbd_xfer_handle xfer)
3507 /* This null routine corresponds to non-isoc "done()" routines
3508 * that free the stds associated with an xfer after a completed
3509 * xfer interrupt. However, in the case of isoc transfers, the
3510 * sitds associated with the transfer have already been processed
3511 * and reallocated for the next iteration by
3512 * "ohci_device_isoc_transfer()".
3514 * Routine "usb_transfer_complete()" is called at the end of every
3515 * relevant usb interrupt. "usb_transfer_complete()" indirectly
3516 * calls 1) "ohci_device_isoc_transfer()" (which keeps pumping the
3517 * pipeline by setting up the next transfer iteration) and 2) then
3518 * calls "ohci_device_isoc_done()". Isoc transfers have not been
3519 * working for the ohci usb because this routine was trashing the
3520 * xfer set up for the next iteration (thus, only the first
3521 * UGEN_NISOREQS xfers outstanding on an open would work). Perhaps
3522 * this could all be re-factored, but that's another pass...
3527 ohci_setup_isoc(usbd_pipe_handle pipe)
3529 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3530 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3531 struct iso *iso = &opipe->u.iso;
3538 ohci_add_ed(opipe->sed, sc->sc_isoc_head);
3541 return (USBD_NORMAL_COMPLETION);
3545 ohci_device_isoc_close(usbd_pipe_handle pipe)
3547 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3548 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3549 ohci_soft_ed_t *sed;
3551 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3554 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* Stop device. */
3556 ohci_close_pipe(pipe, sc->sc_isoc_head); /* Stop isoc list, free ED.*/
3558 /* up to NISOREQs xfers still outstanding. */
3561 opipe->tail.itd->isdone = 1;
3563 ohci_free_sitd(sc, opipe->tail.itd); /* Next `avail free' sitd.*/