1 /* $NetBSD: nvmm_ioctl.h,v 1.12 2020/09/08 16:58:38 maxv Exp $ */
4 * Copyright (c) 2018-2020 Maxime Villard, m00nbsd.net
7 * This code is part of the NVMM hypervisor.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
23 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
24 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
25 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #ifndef _NVMM_IOCTL_H_
32 #define _NVMM_IOCTL_H_
34 #include <sys/ioccom.h>
35 #include <dev/virtual/nvmm/nvmm.h>
37 struct nvmm_ioc_capability {
38 struct nvmm_capability cap;
41 struct nvmm_ioc_machine_create {
45 struct nvmm_ioc_machine_destroy {
49 struct nvmm_ioc_machine_configure {
55 struct nvmm_ioc_vcpu_create {
60 struct nvmm_ioc_vcpu_destroy {
65 struct nvmm_ioc_vcpu_configure {
72 struct nvmm_ioc_vcpu_setstate {
77 struct nvmm_ioc_vcpu_getstate {
82 struct nvmm_ioc_vcpu_inject {
87 struct nvmm_ioc_vcpu_run {
92 struct nvmm_vcpu_exit exit;
95 struct nvmm_ioc_hva_map {
102 struct nvmm_ioc_hva_unmap {
103 nvmm_machid_t machid;
109 struct nvmm_ioc_gpa_map {
110 nvmm_machid_t machid;
117 struct nvmm_ioc_gpa_unmap {
118 nvmm_machid_t machid;
123 struct nvmm_ctl_mach_info {
125 nvmm_machid_t machid;
133 struct nvmm_ioc_ctl {
135 #define NVMM_CTL_MACH_INFO 0
141 #define NVMM_IOC_CAPABILITY _IOR ('N', 0, struct nvmm_ioc_capability)
142 #define NVMM_IOC_MACHINE_CREATE _IOWR('N', 1, struct nvmm_ioc_machine_create)
143 #define NVMM_IOC_MACHINE_DESTROY _IOW ('N', 2, struct nvmm_ioc_machine_destroy)
144 #define NVMM_IOC_MACHINE_CONFIGURE _IOW ('N', 3, struct nvmm_ioc_machine_configure)
145 #define NVMM_IOC_VCPU_CREATE _IOW ('N', 4, struct nvmm_ioc_vcpu_create)
146 #define NVMM_IOC_VCPU_DESTROY _IOW ('N', 5, struct nvmm_ioc_vcpu_destroy)
147 #define NVMM_IOC_VCPU_CONFIGURE _IOW ('N', 6, struct nvmm_ioc_vcpu_configure)
148 #define NVMM_IOC_VCPU_SETSTATE _IOW ('N', 7, struct nvmm_ioc_vcpu_setstate)
149 #define NVMM_IOC_VCPU_GETSTATE _IOW ('N', 8, struct nvmm_ioc_vcpu_getstate)
150 #define NVMM_IOC_VCPU_INJECT _IOW ('N', 9, struct nvmm_ioc_vcpu_inject)
151 #define NVMM_IOC_VCPU_RUN _IOWR('N', 10, struct nvmm_ioc_vcpu_run)
152 #define NVMM_IOC_GPA_MAP _IOW ('N', 11, struct nvmm_ioc_gpa_map)
153 #define NVMM_IOC_GPA_UNMAP _IOW ('N', 12, struct nvmm_ioc_gpa_unmap)
154 #define NVMM_IOC_HVA_MAP _IOW ('N', 13, struct nvmm_ioc_hva_map)
155 #define NVMM_IOC_HVA_UNMAP _IOW ('N', 14, struct nvmm_ioc_hva_unmap)
156 #define NVMM_IOC_CTL _IOW ('N', 20, struct nvmm_ioc_ctl)
158 #endif /* _NVMM_IOCTL_H_ */