2 * Copyright (c) 2002 M. Warner Losh.
3 * Copyright (c) 2000,2001 Jonathan Chen.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions, and the following disclaimer,
11 * without modification, immediately at the beginning of the file.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * $FreeBSD: src/sys/dev/pccbb/pccbb.c,v 1.64 2002/11/23 23:09:45 imp Exp $
30 * $DragonFly: src/sys/dev/pccard/pccbb/pccbb.c,v 1.17 2006/09/05 00:55:41 dillon Exp $
34 * Copyright (c) 1998, 1999 and 2000
35 * HAYAKAWA Koichi. All rights reserved.
37 * Redistribution and use in source and binary forms, with or without
38 * modification, are permitted provided that the following conditions
40 * 1. Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * 2. Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in the
44 * documentation and/or other materials provided with the distribution.
45 * 3. All advertising materials mentioning features or use of this software
46 * must display the following acknowledgement:
47 * This product includes software developed by HAYAKAWA Koichi.
48 * 4. The name of the author may not be used to endorse or promote products
49 * derived from this software without specific prior written permission.
51 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
52 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
53 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
54 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
55 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
56 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
60 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
64 * Driver for PCI to CardBus Bridge chips
68 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS
70 * Written by Jonathan Chen <jon@freebsd.org>
71 * The author would like to acknowledge:
72 * * HAYAKAWA Koichi: Author of the NetBSD code for the same thing
73 * * Warner Losh: Newbus/newcard guru and author of the pccard side of things
74 * * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver
75 * * David Cross: Author of the initial ugly hack for a specific cardbus card
78 #include <sys/param.h>
79 #include <sys/systm.h>
81 #include <sys/errno.h>
82 #include <sys/interrupt.h>
83 #include <sys/kernel.h>
85 #include <sys/malloc.h>
86 #include <sys/sysctl.h>
87 #include <sys/kthread.h>
89 #include <machine/bus.h>
91 #include <machine/resource.h>
93 #include <bus/pci/pcireg.h>
94 #include <bus/pci/pcivar.h>
95 #include <machine/clock.h>
97 #include <bus/pccard/pccardreg.h>
98 #include <bus/pccard/pccardvar.h>
100 #include <dev/pccard/exca/excareg.h>
101 #include <dev/pccard/exca/excavar.h>
103 #include <dev/pccard/pccbb/pccbbreg.h>
104 #include <dev/pccard/pccbb/pccbbvar.h>
106 #include "power_if.h"
110 #define DPRINTF(x) do { if (cbb_debug) printf x; } while (0)
111 #define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0)
113 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \
114 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE)
115 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \
116 pci_write_config(DEV, REG, ( \
117 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE)
119 #define CBB_START_MEM 0x88000000
120 #define CBB_START_32_IO 0x1000
121 #define CBB_START_16_IO 0x100
123 struct yenta_chipinfo {
128 /* Texas Instruments chips */
129 {PCIC_ID_TI1031, "TI1031 PCI-PC Card Bridge", CB_TI113X},
130 {PCIC_ID_TI1130, "TI1130 PCI-CardBus Bridge", CB_TI113X},
131 {PCIC_ID_TI1131, "TI1131 PCI-CardBus Bridge", CB_TI113X},
133 {PCIC_ID_TI1210, "TI1210 PCI-CardBus Bridge", CB_TI12XX},
134 {PCIC_ID_TI1211, "TI1211 PCI-CardBus Bridge", CB_TI12XX},
135 {PCIC_ID_TI1220, "TI1220 PCI-CardBus Bridge", CB_TI12XX},
136 {PCIC_ID_TI1221, "TI1221 PCI-CardBus Bridge", CB_TI12XX},
137 {PCIC_ID_TI1225, "TI1225 PCI-CardBus Bridge", CB_TI12XX},
138 {PCIC_ID_TI1250, "TI1250 PCI-CardBus Bridge", CB_TI125X},
139 {PCIC_ID_TI1251, "TI1251 PCI-CardBus Bridge", CB_TI125X},
140 {PCIC_ID_TI1251B,"TI1251B PCI-CardBus Bridge",CB_TI125X},
141 {PCIC_ID_TI1260, "TI1260 PCI-CardBus Bridge", CB_TI12XX},
142 {PCIC_ID_TI1260B,"TI1260B PCI-CardBus Bridge",CB_TI12XX},
143 {PCIC_ID_TI1410, "TI1410 PCI-CardBus Bridge", CB_TI12XX},
144 {PCIC_ID_TI1420, "TI1420 PCI-CardBus Bridge", CB_TI12XX},
145 {PCIC_ID_TI1421, "TI1421 PCI-CardBus Bridge", CB_TI12XX},
146 {PCIC_ID_TI1450, "TI1450 PCI-CardBus Bridge", CB_TI125X}, /*SIC!*/
147 {PCIC_ID_TI1451, "TI1451 PCI-CardBus Bridge", CB_TI12XX},
148 {PCIC_ID_TI1510, "TI1510 PCI-CardBus Bridge", CB_TI12XX},
149 {PCIC_ID_TI1520, "TI1520 PCI-CardBus Bridge", CB_TI12XX},
150 {PCIC_ID_TI4410, "TI4410 PCI-CardBus Bridge", CB_TI12XX},
151 {PCIC_ID_TI4450, "TI4450 PCI-CardBus Bridge", CB_TI12XX},
152 {PCIC_ID_TI4451, "TI4451 PCI-CardBus Bridge", CB_TI12XX},
153 {PCIC_ID_TI4510, "TI4510 PCI-CardBus Bridge", CB_TI12XX},
156 {PCIC_ID_RICOH_RL5C465, "RF5C465 PCI-CardBus Bridge", CB_RF5C46X},
157 {PCIC_ID_RICOH_RL5C466, "RF5C466 PCI-CardBus Bridge", CB_RF5C46X},
158 {PCIC_ID_RICOH_RL5C475, "RF5C475 PCI-CardBus Bridge", CB_RF5C47X},
159 {PCIC_ID_RICOH_RL5C476, "RF5C476 PCI-CardBus Bridge", CB_RF5C47X},
160 {PCIC_ID_RICOH_RL5C477, "RF5C477 PCI-CardBus Bridge", CB_RF5C47X},
161 {PCIC_ID_RICOH_RL5C478, "RF5C478 PCI-CardBus Bridge", CB_RF5C47X},
163 /* Toshiba products */
164 {PCIC_ID_TOPIC95, "ToPIC95 PCI-CardBus Bridge", CB_TOPIC95},
165 {PCIC_ID_TOPIC95B, "ToPIC95B PCI-CardBus Bridge", CB_TOPIC95},
166 {PCIC_ID_TOPIC97, "ToPIC97 PCI-CardBus Bridge", CB_TOPIC97},
167 {PCIC_ID_TOPIC100, "ToPIC100 PCI-CardBus Bridge", CB_TOPIC97},
170 {PCIC_ID_CLPD6832, "CLPD6832 PCI-CardBus Bridge", CB_CIRRUS},
171 {PCIC_ID_CLPD6833, "CLPD6833 PCI-CardBus Bridge", CB_CIRRUS},
172 {PCIC_ID_CLPD6834, "CLPD6834 PCI-CardBus Bridge", CB_CIRRUS},
175 {PCIC_ID_OZ6832, "O2Micro OZ6832/6833 PCI-CardBus Bridge", CB_CIRRUS},
176 {PCIC_ID_OZ6860, "O2Micro OZ6836/6860 PCI-CardBus Bridge", CB_CIRRUS},
177 {PCIC_ID_OZ6872, "O2Micro OZ6812/6872 PCI-CardBus Bridge", CB_CIRRUS},
178 {PCIC_ID_OZ6912, "O2Micro OZ6912/6972 PCI-CardBus Bridge", CB_CIRRUS},
179 {PCIC_ID_OZ6922, "O2Micro OZ6922 PCI-CardBus Bridge", CB_CIRRUS},
180 {PCIC_ID_OZ6933, "O2Micro OZ6933 PCI-CardBus Bridge", CB_CIRRUS},
183 {0 /* null id */, "unknown", CB_UNKNOWN},
187 SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters");
189 /* There's no way to say TUNEABLE_LONG to get the right types */
190 u_long cbb_start_mem = CBB_START_MEM;
191 TUNABLE_INT("hw.cbb.start_memory", (int *)&cbb_start_mem);
192 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RW,
193 &cbb_start_mem, CBB_START_MEM,
194 "Starting address for memory allocations");
196 u_long cbb_start_16_io = CBB_START_16_IO;
197 TUNABLE_INT("hw.cbb.start_16_io", (int *)&cbb_start_16_io);
198 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RW,
199 &cbb_start_16_io, CBB_START_16_IO,
200 "Starting ioport for 16-bit cards");
202 u_long cbb_start_32_io = CBB_START_32_IO;
203 TUNABLE_INT("hw.cbb.start_32_io", (int *)&cbb_start_32_io);
204 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RW,
205 &cbb_start_32_io, CBB_START_32_IO,
206 "Starting ioport for 32-bit cards");
209 TUNABLE_INT("hw.cbb.debug", &cbb_debug);
210 SYSCTL_ULONG(_hw_cbb, OID_AUTO, debug, CTLFLAG_RW, &cbb_debug, 0,
211 "Verbose cardbus bridge debugging");
213 static int cbb_chipset(uint32_t pci_id, const char **namep);
214 static int cbb_probe(device_t brdev);
215 static void cbb_chipinit(struct cbb_softc *sc);
216 static int cbb_attach(device_t brdev);
217 static void cbb_release_helper(device_t brdev);
218 static int cbb_detach(device_t brdev);
219 static int cbb_shutdown(device_t brdev);
220 static void cbb_driver_added(device_t brdev, driver_t *driver);
221 static void cbb_child_detached(device_t brdev, device_t child);
222 static void cbb_event_thread(void *arg);
223 static void cbb_insert(struct cbb_softc *sc);
224 static void cbb_removal(struct cbb_softc *sc);
225 static void cbb_intr(void *arg);
226 static int cbb_detect_voltage(device_t brdev);
227 static int cbb_power(device_t brdev, int volts);
228 static void cbb_cardbus_reset(device_t brdev);
229 static int cbb_cardbus_power_enable_socket(device_t brdev,
231 static void cbb_cardbus_power_disable_socket(device_t brdev,
233 static int cbb_cardbus_io_open(device_t brdev, int win, uint32_t start,
235 static int cbb_cardbus_mem_open(device_t brdev, int win,
236 uint32_t start, uint32_t end);
237 static void cbb_cardbus_auto_open(struct cbb_softc *sc, int type);
238 static int cbb_cardbus_activate_resource(device_t brdev, device_t child,
239 int type, int rid, struct resource *res);
240 static int cbb_cardbus_deactivate_resource(device_t brdev,
241 device_t child, int type, int rid, struct resource *res);
242 static struct resource *cbb_cardbus_alloc_resource(device_t brdev,
243 device_t child, int type, int *rid, u_long start,
244 u_long end, u_long count, uint flags);
245 static int cbb_cardbus_release_resource(device_t brdev, device_t child,
246 int type, int rid, struct resource *res);
247 static int cbb_power_enable_socket(device_t brdev, device_t child);
248 static void cbb_power_disable_socket(device_t brdev, device_t child);
249 static int cbb_activate_resource(device_t brdev, device_t child,
250 int type, int rid, struct resource *r);
251 static int cbb_deactivate_resource(device_t brdev, device_t child,
252 int type, int rid, struct resource *r);
253 static struct resource *cbb_alloc_resource(device_t brdev, device_t child,
254 int type, int *rid, u_long start, u_long end, u_long count,
256 static int cbb_release_resource(device_t brdev, device_t child,
257 int type, int rid, struct resource *r);
258 static int cbb_read_ivar(device_t brdev, device_t child, int which,
260 static int cbb_write_ivar(device_t brdev, device_t child, int which,
262 static int cbb_maxslots(device_t brdev);
263 static uint32_t cbb_read_config(device_t brdev, int b, int s, int f,
265 static void cbb_write_config(device_t brdev, int b, int s, int f,
266 int reg, uint32_t val, int width);
271 cbb_set(struct cbb_softc *sc, uint32_t reg, uint32_t val)
273 bus_space_write_4(sc->bst, sc->bsh, reg, val);
276 static __inline uint32_t
277 cbb_get(struct cbb_softc *sc, uint32_t reg)
279 return (bus_space_read_4(sc->bst, sc->bsh, reg));
283 cbb_setb(struct cbb_softc *sc, uint32_t reg, uint32_t bits)
285 cbb_set(sc, reg, cbb_get(sc, reg) | bits);
289 cbb_clrb(struct cbb_softc *sc, uint32_t reg, uint32_t bits)
291 cbb_set(sc, reg, cbb_get(sc, reg) & ~bits);
295 cbb_remove_res(struct cbb_softc *sc, struct resource *res)
297 struct cbb_reslist *rle;
299 SLIST_FOREACH(rle, &sc->rl, link) {
300 if (rle->res == res) {
301 SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link);
302 kfree(rle, M_DEVBUF);
308 static struct resource *
309 cbb_find_res(struct cbb_softc *sc, int type, int rid)
311 struct cbb_reslist *rle;
313 SLIST_FOREACH(rle, &sc->rl, link)
314 if (SYS_RES_MEMORY == rle->type && rid == rle->rid)
320 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type,
323 struct cbb_reslist *rle;
326 * Need to record allocated resource so we can iterate through
329 rle = kmalloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT);
335 SLIST_INSERT_HEAD(&sc->rl, rle, link);
340 cbb_destroy_res(struct cbb_softc *sc)
342 struct cbb_reslist *rle;
344 while ((rle = SLIST_FIRST(&sc->rl)) != NULL) {
345 device_printf(sc->dev, "Danger Will Robinson: Resource "
346 "left allocated! This is a bug... "
347 "(rid=%x, type=%d, addr=%lx)\n", rle->rid, rle->type,
348 rman_get_start(rle->res));
349 SLIST_REMOVE_HEAD(&sc->rl, link);
350 kfree(rle, M_DEVBUF);
354 /************************************************************************/
356 /************************************************************************/
359 cbb_chipset(uint32_t pci_id, const char **namep)
361 struct yenta_chipinfo *ycp;
363 for (ycp = yc_chipsets; ycp->yc_id != 0 && pci_id != ycp->yc_id; ++ycp)
366 *namep = ycp->yc_name;
367 return (ycp->yc_chiptype);
371 cbb_probe(device_t brdev)
379 * Do we know that we support the chipset? If so, then we
382 if (cbb_chipset(pci_get_devid(brdev), &name) != CB_UNKNOWN) {
383 device_set_desc(brdev, name);
388 * We do support generic CardBus bridges. All that we've seen
389 * to date have progif 0 (the Yenta spec, and successors mandate
390 * this). We do not support PCI PCMCIA bridges (with one exception)
391 * with this driver since they generally are I/O mapped. Those
392 * are supported by the pcic driver. This should help us be more
395 class = pci_get_class(brdev);
396 subclass = pci_get_subclass(brdev);
397 progif = pci_get_progif(brdev);
398 if (class == PCIC_BRIDGE && subclass == PCIS_BRIDGE_CARDBUS && progif == 0) {
399 device_set_desc(brdev, "PCI-CardBus Bridge");
407 cbb_chipinit(struct cbb_softc *sc)
409 uint32_t mux, sysctrl;
411 /* Set CardBus latency timer */
412 if (pci_read_config(sc->dev, PCIR_SECLAT_1, 1) < 0x20)
413 pci_write_config(sc->dev, PCIR_SECLAT_1, 0x20, 1);
415 /* Set PCI latency timer */
416 if (pci_read_config(sc->dev, PCIR_LATTIMER, 1) < 0x20)
417 pci_write_config(sc->dev, PCIR_LATTIMER, 0x20, 1);
419 /* Enable memory access */
420 PCI_MASK_CONFIG(sc->dev, PCIR_COMMAND,
423 | PCIM_CMD_BUSMASTEREN, 2);
425 /* disable Legacy IO */
426 switch (sc->chipset) {
428 PCI_MASK_CONFIG(sc->dev, CBBR_BRIDGECTRL,
429 & ~(CBBM_BRIDGECTRL_RL_3E0_EN |
430 CBBM_BRIDGECTRL_RL_3E2_EN), 2);
433 pci_write_config(sc->dev, CBBR_LEGACY, 0x0, 4);
437 /* Use PCI interrupt for interrupt routing */
438 PCI_MASK2_CONFIG(sc->dev, CBBR_BRIDGECTRL,
439 & ~(CBBM_BRIDGECTRL_MASTER_ABORT |
440 CBBM_BRIDGECTRL_INTR_IREQ_EN),
441 | CBBM_BRIDGECTRL_WRITE_POST_EN,
445 * XXX this should be a function table, ala OLDCARD. This means
446 * that we could more easily support ISA interrupts for pccard
447 * cards if we had to.
449 switch (sc->chipset) {
452 * The TI 1031, TI 1130 and TI 1131 all require another bit
453 * be set to enable PCI routing of interrupts, and then
454 * a bit for each of the CSC and Function interrupts we
457 PCI_MASK_CONFIG(sc->dev, CBBR_CBCTRL,
458 | CBBM_CBCTRL_113X_PCI_INTR |
459 CBBM_CBCTRL_113X_PCI_CSC | CBBM_CBCTRL_113X_PCI_IRQ_EN,
461 PCI_MASK_CONFIG(sc->dev, CBBR_DEVCTRL,
462 & ~(CBBM_DEVCTRL_INT_SERIAL |
463 CBBM_DEVCTRL_INT_PCI), 1);
467 * Some TI 12xx (and [14][45]xx) based pci cards
468 * sometimes have issues with the MFUNC register not
469 * being initialized due to a bad EEPROM on board.
470 * Laptops that this matters on have this register
471 * properly initialized.
473 * The TI125X parts have a different register.
475 mux = pci_read_config(sc->dev, CBBR_MFUNC, 4);
476 sysctrl = pci_read_config(sc->dev, CBBR_SYSCTRL, 4);
478 mux = (mux & ~CBBM_MFUNC_PIN0) |
479 CBBM_MFUNC_PIN0_INTA;
480 if ((sysctrl & CBBM_SYSCTRL_INTRTIE) == 0)
481 mux = (mux & ~CBBM_MFUNC_PIN1) |
482 CBBM_MFUNC_PIN1_INTB;
483 pci_write_config(sc->dev, CBBR_MFUNC, mux, 4);
488 * Disable zoom video. Some machines initialize this
489 * improperly and exerpience has shown that this helps
492 pci_write_config(sc->dev, CBBR_MMCTRL, 0, 4);
496 * Disable Zoom Video, ToPIC 97, 100.
498 pci_write_config(sc->dev, CBBR_TOPIC_ZV_CONTROL, 0, 1);
501 * At offset 0xa1: INTERRUPT CONTROL register
502 * 0x1: Turn on INT interrupts.
504 PCI_MASK_CONFIG(sc->dev, CBBR_TOPIC_INTCTRL,
505 | CBBM_TOPIC_INTCTRL_INTIRQSEL, 1);
509 * SOCKETCTRL appears to be TOPIC 95/B specific
511 PCI_MASK_CONFIG(sc->dev, CBBR_TOPIC_SOCKETCTRL,
512 | CBBM_TOPIC_SOCKETCTRL_SCR_IRQSEL, 4);
516 * At offset 0xa0: SLOT CONTROL
517 * 0x80 Enable CardBus Functionality
518 * 0x40 Enable CardBus and PC Card registers
519 * 0x20 Lock ID in exca regs
520 * 0x10 Write protect ID in config regs
521 * Clear the rest of the bits, which defaults the slot
522 * in legacy mode to 0x3e0 and offset 0. (legacy
523 * mode is determined elsewhere)
525 pci_write_config(sc->dev, CBBR_TOPIC_SLOTCTRL,
526 CBBM_TOPIC_SLOTCTRL_SLOTON |
527 CBBM_TOPIC_SLOTCTRL_SLOTEN |
528 CBBM_TOPIC_SLOTCTRL_ID_LOCK |
529 CBBM_TOPIC_SLOTCTRL_ID_WP, 1);
532 * At offset 0xa3 Card Detect Control Register
533 * 0x80 CARDBUS enbale
534 * 0x01 Cleared for hardware change detect
536 PCI_MASK2_CONFIG(sc->dev, CBBR_TOPIC_CDC,
537 | CBBM_TOPIC_CDC_CARDBUS,
538 & ~CBBM_TOPIC_CDC_SWDETECT, 4);
543 * Need to tell ExCA registers to route via PCI interrupts. There
544 * are two ways to do this. Once is to set INTR_ENABLE and the
545 * other is to set CSC to 0. Since both methods are mutually
546 * compatible, we do both.
548 exca_write(&sc->exca, EXCA_INTR, EXCA_INTR_ENABLE);
549 exca_write(&sc->exca, EXCA_CSC_INTR, 0);
551 /* close all memory and io windows */
552 pci_write_config(sc->dev, CBBR_MEMBASE0, 0xffffffff, 4);
553 pci_write_config(sc->dev, CBBR_MEMLIMIT0, 0, 4);
554 pci_write_config(sc->dev, CBBR_MEMBASE1, 0xffffffff, 4);
555 pci_write_config(sc->dev, CBBR_MEMLIMIT1, 0, 4);
556 pci_write_config(sc->dev, CBBR_IOBASE0, 0xffffffff, 4);
557 pci_write_config(sc->dev, CBBR_IOLIMIT0, 0, 4);
558 pci_write_config(sc->dev, CBBR_IOBASE1, 0xffffffff, 4);
559 pci_write_config(sc->dev, CBBR_IOLIMIT1, 0, 4);
563 cbb_attach(device_t brdev)
565 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(brdev);
568 lockinit(&sc->lock, "cbb", 0, 0);
569 sc->chipset = cbb_chipset(pci_get_devid(brdev), NULL);
572 sc->pccarddev = NULL;
573 sc->secbus = pci_read_config(brdev, PCIR_SECBUS_2, 1);
574 sc->subbus = pci_read_config(brdev, PCIR_SUBBUS_2, 1);
576 STAILQ_INIT(&sc->intr_handlers);
578 #ifndef BURN_THE_BOATS
580 * The PCI bus code should assign us memory in the absense
581 * of the BIOS doing so. However, 'should' isn't 'is,' so we kludge
582 * up something here until the PCI/acpi code properly assigns the
587 sc->base_res = bus_alloc_resource(brdev, SYS_RES_MEMORY, &rid,
588 0, ~0, 1, RF_ACTIVE);
590 #ifdef BURN_THE_BOATS
591 device_printf(brdev, "Could not map register memory\n");
597 * Generally, the BIOS will assign this memory for us.
598 * However, newer BIOSes do not because the MS design
599 * documents have mandated that this is for the OS
600 * to assign rather than the BIOS. This driver shouldn't
601 * be doing this, but until the pci bus code (or acpi)
602 * does this, we allow CardBus bridges to work on more
605 pci_write_config(brdev, rid, 0xffffffff, 4);
606 sockbase = pci_read_config(brdev, rid, 4);
607 sockbase = (sockbase & 0xfffffff0) & -(sockbase & 0xfffffff0);
608 sc->base_res = bus_generic_alloc_resource(
609 device_get_parent(brdev), brdev, SYS_RES_MEMORY,
610 &rid, cbb_start_mem, ~0, sockbase,
611 RF_ACTIVE|rman_make_alignment_flags(sockbase));
614 "Could not grab register memory\n");
617 sc->flags |= CBB_KLUDGE_ALLOC;
618 pci_write_config(brdev, CBBR_SOCKBASE,
619 rman_get_start(sc->base_res), 4);
622 DEVPRINTF((brdev, "PCI Memory allocated: %08lx\n",
623 rman_get_start(sc->base_res)));
625 sc->bst = rman_get_bustag(sc->base_res);
626 sc->bsh = rman_get_bushandle(sc->base_res);
627 exca_init(&sc->exca, brdev, sc->bst, sc->bsh, CBB_EXCA_OFFSET);
628 sc->exca.flags |= EXCA_HAS_MEMREG_WIN;
631 /* attach children */
632 sc->cbdev = device_add_child(brdev, "cardbus", -1);
633 if (sc->cbdev == NULL)
634 DEVPRINTF((brdev, "WARNING: cannot add cardbus bus.\n"));
635 else if (device_probe_and_attach(sc->cbdev) != 0) {
636 DEVPRINTF((brdev, "WARNING: cannot attach cardbus bus!\n"));
640 sc->pccarddev = device_add_child(brdev, "pccard", -1);
641 if (sc->pccarddev == NULL)
642 DEVPRINTF((brdev, "WARNING: cannot add pccard bus.\n"));
643 else if (device_probe_and_attach(sc->pccarddev) != 0) {
644 DEVPRINTF((brdev, "WARNING: cannot attach pccard bus.\n"));
645 sc->pccarddev = NULL;
648 /* Map and establish the interrupt. */
650 sc->irq_res = bus_alloc_resource(brdev, SYS_RES_IRQ, &rid, 0, ~0, 1,
651 RF_SHAREABLE | RF_ACTIVE);
652 if (sc->irq_res == NULL) {
653 printf("cbb: Unable to map IRQ...\n");
657 if (bus_setup_intr(brdev, sc->irq_res, 0, cbb_intr, sc,
658 &sc->intrhand, NULL)) {
659 device_printf(brdev, "couldn't establish interrupt");
663 /* reset 16-bit pcmcia bus */
664 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET);
667 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
669 /* CSC Interrupt: Card detect interrupt on */
670 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD);
672 /* reset interrupt */
673 cbb_set(sc, CBB_SOCKET_EVENT, cbb_get(sc, CBB_SOCKET_EVENT));
675 /* Start the thread */
676 if (kthread_create(cbb_event_thread, sc, &sc->event_thread,
677 "%s%d", device_get_name(sc->dev), device_get_unit(sc->dev))) {
678 device_printf (sc->dev, "unable to create event thread.\n");
679 panic ("cbb_create_event_thread");
685 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res);
687 if (sc->flags & CBB_KLUDGE_ALLOC)
688 bus_generic_release_resource(device_get_parent(brdev),
689 brdev, SYS_RES_MEMORY, CBBR_SOCKBASE,
692 bus_release_resource(brdev, SYS_RES_MEMORY,
693 CBBR_SOCKBASE, sc->base_res);
699 * shutdown and detach both call the release helper to disable the interrupt
700 * and cleanup the resources.
704 cbb_release_helper(device_t brdev)
706 struct cbb_softc *sc = device_get_softc(brdev);
708 lockmgr(&sc->lock, LK_EXCLUSIVE);
709 sc->flags |= CBB_KTHREAD_DONE;
710 lockmgr(&sc->lock, LK_RELEASE);
711 if (sc->flags & CBB_KTHREAD_RUNNING) {
713 tsleep(cbb_detach, 0, "pccbb", 2);
717 * Reset the bridge controller and reset the interrupt, then tear
718 * it down (which disables the interrupt) and de-power.
720 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2);
721 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET);
723 bus_teardown_intr(brdev, sc->irq_res, sc->intrhand);
724 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
727 * Release interrupt and memory-mapped resources. Device memory
728 * cannot be safely accessed after we do this.
730 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res);
731 if (sc->flags & CBB_KLUDGE_ALLOC) {
732 bus_generic_release_resource(device_get_parent(brdev),
733 brdev, SYS_RES_MEMORY, CBBR_SOCKBASE,
736 bus_release_resource(brdev, SYS_RES_MEMORY,
737 CBBR_SOCKBASE, sc->base_res);
742 cbb_detach(device_t brdev)
749 device_get_children(brdev, &devlist, &numdevs);
752 for (i = 0; i < numdevs; i++) {
753 if (device_detach(devlist[i]) == 0)
754 device_delete_child(brdev, devlist[i]);
758 kfree (devlist, M_TEMP);
760 cbb_release_helper(brdev);
767 cbb_shutdown(device_t brdev)
773 device_get_children(brdev, &devlist, &numdevs);
775 for (i = 0; i < numdevs; i++) {
776 if (device_shutdown(devlist[i]) == 0)
777 ; /* XXX delete the child without detach? */
779 kfree (devlist, M_TEMP);
780 cbb_release_helper(brdev);
783 * This may prevent bios confusion on reboot for some bioses
785 pci_write_config(brdev, PCIR_COMMAND, 0, 2);
790 cbb_setup_intr(device_t dev, device_t child, struct resource *irq,
791 int flags, driver_intr_t *intr, void *arg,
792 void **cookiep, lwkt_serialize_t serializer)
794 struct cbb_intrhand *ih;
795 struct cbb_softc *sc = device_get_softc(dev);
798 * You aren't allowed to have fast interrupts for pccard/cardbus
799 * things since those interrupts are PCI and shared. Since we use
800 * the PCI interrupt for the status change interrupts, it can't be
801 * free for use by the driver. Fast interrupts must not be shared.
803 ih = kmalloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_WAITOK|M_ZERO);
809 ih->serializer = serializer;
810 STAILQ_INSERT_TAIL(&sc->intr_handlers, ih, entries);
812 * XXX we should do what old card does to ensure that we don't
813 * XXX call the function's interrupt routine(s).
816 * XXX need to turn on ISA interrupts, if we ever support them, but
817 * XXX for now that's all we need to do.
823 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq,
826 struct cbb_intrhand *ih;
827 struct cbb_softc *sc = device_get_softc(dev);
829 cbb_setb(sc, CBB_SOCKET_MASK, 0); /* Quiet hardware */
830 /* XXX Need to do different things for ISA interrupts. */
831 ih = (struct cbb_intrhand *) cookie;
832 STAILQ_REMOVE(&sc->intr_handlers, ih, cbb_intrhand, entries);
839 cbb_driver_added(device_t brdev, driver_t *driver)
841 struct cbb_softc *sc = device_get_softc(brdev);
848 DEVICE_IDENTIFY(driver, brdev);
849 device_get_children(brdev, &devlist, &numdevs);
851 sockstate = cbb_get(sc, CBB_SOCKET_STATE);
852 for (tmp = 0; tmp < numdevs; tmp++) {
853 if (device_get_state(devlist[tmp]) == DS_NOTPRESENT &&
854 device_probe_and_attach(devlist[tmp]) == 0) {
855 if (devlist[tmp] == NULL)
857 else if (strcmp(driver->name, "cardbus") == 0) {
858 sc->cbdev = devlist[tmp];
859 if (((sockstate & CBB_SOCKET_STAT_CD) == 0) &&
860 (sockstate & CBB_SOCKET_STAT_CB))
862 } else if (strcmp(driver->name, "pccard") == 0) {
863 sc->pccarddev = devlist[tmp];
864 if (((sockstate & CBB_SOCKET_STAT_CD) == 0) &&
865 (sockstate & CBB_SOCKET_STAT_16BIT))
869 "Unsupported child bus: %s\n",
873 kfree(devlist, M_TEMP);
876 if ((cbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD)
884 cbb_child_detached(device_t brdev, device_t child)
886 struct cbb_softc *sc = device_get_softc(brdev);
888 if (child == sc->cbdev)
890 else if (child == sc->pccarddev)
891 sc->pccarddev = NULL;
893 device_printf(brdev, "Unknown child detached: %s %p/%p\n",
894 device_get_nameunit(child), sc->cbdev, sc->pccarddev);
897 /************************************************************************/
899 /************************************************************************/
902 cbb_event_thread(void *arg)
904 struct cbb_softc *sc = arg;
909 * We take out Giant here because we need it deep, down in
910 * the bowels of the vm system for mapping the memory we need
911 * to read the CIS. We also need it for kthread_exit, which
914 sc->flags |= CBB_KTHREAD_RUNNING;
917 * Check to see if we have anything first so that
918 * if there's a card already inserted, we do the
921 lockmgr(&sc->lock, LK_EXCLUSIVE);
922 if (sc->flags & CBB_KTHREAD_DONE)
925 status = cbb_get(sc, CBB_SOCKET_STATE);
926 /* mtx_lock(&Giant); */
927 if ((status & CBB_SOCKET_STAT_CD) == 0)
931 lockmgr(&sc->lock, LK_RELEASE);
932 /* mtx_unlock(&Giant); */
935 * Wait until it has been 1s since the last time we
936 * get an interrupt. We handle the rest of the interrupt
937 * at the top of the loop.
939 err = tsleep(sc, 0, "pccbb", 0);
940 while (err != EWOULDBLOCK &&
941 (sc->flags & CBB_KTHREAD_DONE) == 0)
942 err = tsleep(sc, 0, "pccbb", 1 * hz);
944 sc->flags &= ~CBB_KTHREAD_RUNNING;
945 lockmgr(&sc->lock, LK_RELEASE);
946 /* mtx_lock(&Giant); */
950 /************************************************************************/
952 /************************************************************************/
955 cbb_insert(struct cbb_softc *sc)
957 uint32_t sockevent, sockstate;
959 sockevent = cbb_get(sc, CBB_SOCKET_EVENT);
960 sockstate = cbb_get(sc, CBB_SOCKET_STATE);
962 DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n",
963 sockevent, sockstate));
965 if (sockstate & CBB_SOCKET_STAT_16BIT) {
966 if (sc->pccarddev != NULL) {
967 sc->flags |= CBB_16BIT_CARD;
968 sc->flags |= CBB_CARD_OK;
969 if (CARD_ATTACH_CARD(sc->pccarddev) != 0) {
970 device_printf(sc->dev,
971 "PC Card card activation failed\n");
972 sc->flags &= ~CBB_CARD_OK;
975 device_printf(sc->dev,
976 "PC Card inserted, but no pccard bus.\n");
978 } else if (sockstate & CBB_SOCKET_STAT_CB) {
979 if (sc->cbdev != NULL) {
980 sc->flags &= ~CBB_16BIT_CARD;
981 sc->flags |= CBB_CARD_OK;
982 if (CARD_ATTACH_CARD(sc->cbdev) != 0) {
983 device_printf(sc->dev,
984 "CardBus card activation failed\n");
985 sc->flags &= ~CBB_CARD_OK;
988 device_printf(sc->dev,
989 "CardBus card inserted, but no cardbus bus.\n");
993 * We should power the card down, and try again a couple of
994 * times if this happens. XXX
996 device_printf (sc->dev, "Unsupported card type detected\n");
1001 cbb_removal(struct cbb_softc *sc)
1003 if (sc->flags & CBB_16BIT_CARD) {
1004 if (sc->pccarddev != NULL)
1005 CARD_DETACH_CARD(sc->pccarddev);
1007 if (sc->cbdev != NULL)
1008 CARD_DETACH_CARD(sc->cbdev);
1010 cbb_destroy_res(sc);
1013 /************************************************************************/
1014 /* Interrupt Handler */
1015 /************************************************************************/
1020 struct cbb_softc *sc = arg;
1022 struct cbb_intrhand *ih;
1025 * This ISR needs work XXX
1027 sockevent = cbb_get(sc, CBB_SOCKET_EVENT);
1029 /* ack the interrupt */
1030 cbb_setb(sc, CBB_SOCKET_EVENT, sockevent);
1033 * If anything has happened to the socket, we assume that
1034 * the card is no longer OK, and we shouldn't call its
1035 * ISR. We set CARD_OK as soon as we've attached the
1036 * card. This helps in a noisy eject, which happens
1037 * all too often when users are ejecting their PC Cards.
1039 * We use this method in preference to checking to see if
1040 * the card is still there because the check suffers from
1041 * a race condition in the bouncing case. Prior versions
1042 * of the pccard software used a similar trick and achieved
1043 * excellent results.
1045 if (sockevent & CBB_SOCKET_EVENT_CD) {
1046 lockmgr(&sc->lock, LK_EXCLUSIVE);
1047 sc->flags &= ~CBB_CARD_OK;
1048 lockmgr(&sc->lock, LK_RELEASE);
1051 if (sockevent & CBB_SOCKET_EVENT_CSTS) {
1052 DPRINTF((" cstsevent occured: 0x%08x\n",
1053 cbb_get(sc, CBB_SOCKET_STATE)));
1055 if (sockevent & CBB_SOCKET_EVENT_POWER) {
1056 DPRINTF((" pwrevent occured: 0x%08x\n",
1057 cbb_get(sc, CBB_SOCKET_STATE)));
1061 if (sc->flags & CBB_CARD_OK) {
1062 STAILQ_FOREACH(ih, &sc->intr_handlers, entries) {
1063 if (ih->serializer) {
1064 lwkt_serialize_handler_call(ih->serializer,
1065 (inthand2_t *)ih->intr,
1068 (*ih->intr)(ih->arg);
1075 /************************************************************************/
1076 /* Generic Power functions */
1077 /************************************************************************/
1080 cbb_detect_voltage(device_t brdev)
1082 struct cbb_softc *sc = device_get_softc(brdev);
1084 int vol = CARD_UKN_CARD;
1086 psr = cbb_get(sc, CBB_SOCKET_STATE);
1088 if (psr & CBB_SOCKET_STAT_5VCARD)
1089 vol |= CARD_5V_CARD;
1090 if (psr & CBB_SOCKET_STAT_3VCARD)
1091 vol |= CARD_3V_CARD;
1092 if (psr & CBB_SOCKET_STAT_XVCARD)
1093 vol |= CARD_XV_CARD;
1094 if (psr & CBB_SOCKET_STAT_YVCARD)
1095 vol |= CARD_YV_CARD;
1101 cbb_power(device_t brdev, int volts)
1103 uint32_t status, sock_ctrl;
1104 struct cbb_softc *sc = device_get_softc(brdev);
1108 DEVPRINTF((sc->dev, "cbb_power: %s and %s [%x]\n",
1109 (volts & CARD_VCCMASK) == CARD_VCC_UC ? "CARD_VCC_UC" :
1110 (volts & CARD_VCCMASK) == CARD_VCC_5V ? "CARD_VCC_5V" :
1111 (volts & CARD_VCCMASK) == CARD_VCC_3V ? "CARD_VCC_3V" :
1112 (volts & CARD_VCCMASK) == CARD_VCC_XV ? "CARD_VCC_XV" :
1113 (volts & CARD_VCCMASK) == CARD_VCC_YV ? "CARD_VCC_YV" :
1114 (volts & CARD_VCCMASK) == CARD_VCC_0V ? "CARD_VCC_0V" :
1116 (volts & CARD_VPPMASK) == CARD_VPP_UC ? "CARD_VPP_UC" :
1117 (volts & CARD_VPPMASK) == CARD_VPP_12V ? "CARD_VPP_12V" :
1118 (volts & CARD_VPPMASK) == CARD_VPP_VCC ? "CARD_VPP_VCC" :
1119 (volts & CARD_VPPMASK) == CARD_VPP_0V ? "CARD_VPP_0V" :
1123 status = cbb_get(sc, CBB_SOCKET_STATE);
1124 sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL);
1126 switch (volts & CARD_VCCMASK) {
1130 if (CBB_SOCKET_STAT_5VCARD & status) { /* check 5 V card */
1131 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK;
1132 sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V;
1134 device_printf(sc->dev,
1135 "BAD voltage request: no 5 V card\n");
1139 if (CBB_SOCKET_STAT_3VCARD & status) {
1140 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK;
1141 sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V;
1143 device_printf(sc->dev,
1144 "BAD voltage request: no 3.3 V card\n");
1148 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK;
1151 return (0); /* power NEVER changed */
1155 switch (volts & CARD_VPPMASK) {
1159 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK;
1162 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK;
1163 sock_ctrl |= ((sock_ctrl >> 4) & 0x07);
1166 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK;
1167 sock_ctrl |= CBB_SOCKET_CTRL_VPP_12V;
1171 if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl)
1172 return (1); /* no change necessary */
1174 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl);
1175 status = cbb_get(sc, CBB_SOCKET_STATE);
1178 * XXX This busy wait is bogus. We should wait for a power
1179 * interrupt and then whine if the status is bad. If we're
1180 * worried about the card not coming up, then we should also
1181 * schedule a timeout which we can cacel in the power interrupt.
1186 sockevent = cbb_get(sc, CBB_SOCKET_EVENT);
1187 } while (!(sockevent & CBB_SOCKET_EVENT_POWER) && --timeout > 0);
1188 /* reset event status */
1189 /* XXX should only reset EVENT_POWER */
1190 cbb_set(sc, CBB_SOCKET_EVENT, sockevent);
1192 printf ("VCC supply failed.\n");
1197 * delay 400 ms: thgough the standard defines that the Vcc set-up time
1198 * is 20 ms, some PC-Card bridge requires longer duration.
1199 * XXX Note: We should check the stutus AFTER the delay to give time
1200 * for things to stabilize.
1204 if (status & CBB_SOCKET_STAT_BADVCC) {
1205 device_printf(sc->dev,
1206 "bad Vcc request. ctrl=0x%x, status=0x%x\n",
1208 printf("cbb_power: %s and %s [%x]\n",
1209 (volts & CARD_VCCMASK) == CARD_VCC_UC ? "CARD_VCC_UC" :
1210 (volts & CARD_VCCMASK) == CARD_VCC_5V ? "CARD_VCC_5V" :
1211 (volts & CARD_VCCMASK) == CARD_VCC_3V ? "CARD_VCC_3V" :
1212 (volts & CARD_VCCMASK) == CARD_VCC_XV ? "CARD_VCC_XV" :
1213 (volts & CARD_VCCMASK) == CARD_VCC_YV ? "CARD_VCC_YV" :
1214 (volts & CARD_VCCMASK) == CARD_VCC_0V ? "CARD_VCC_0V" :
1216 (volts & CARD_VPPMASK) == CARD_VPP_UC ? "CARD_VPP_UC" :
1217 (volts & CARD_VPPMASK) == CARD_VPP_12V ? "CARD_VPP_12V":
1218 (volts & CARD_VPPMASK) == CARD_VPP_VCC ? "CARD_VPP_VCC":
1219 (volts & CARD_VPPMASK) == CARD_VPP_0V ? "CARD_VPP_0V" :
1224 return (1); /* power changed correctly */
1228 * detect the voltage for the card, and set it. Since the power
1229 * used is the square of the voltage, lower voltages is a big win
1230 * and what Windows does (and what Microsoft prefers). The MS paper
1231 * also talks about preferring the CIS entry as well.
1234 cbb_do_power(device_t brdev)
1238 /* Prefer lowest voltage supported */
1239 voltage = cbb_detect_voltage(brdev);
1240 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
1241 if (voltage & CARD_YV_CARD)
1242 cbb_power(brdev, CARD_VCC_YV | CARD_VPP_VCC);
1243 else if (voltage & CARD_XV_CARD)
1244 cbb_power(brdev, CARD_VCC_XV | CARD_VPP_VCC);
1245 else if (voltage & CARD_3V_CARD)
1246 cbb_power(brdev, CARD_VCC_3V | CARD_VPP_VCC);
1247 else if (voltage & CARD_5V_CARD)
1248 cbb_power(brdev, CARD_VCC_5V | CARD_VPP_VCC);
1250 device_printf(brdev, "Unknown card voltage\n");
1256 /************************************************************************/
1257 /* CardBus power functions */
1258 /************************************************************************/
1261 cbb_cardbus_reset(device_t brdev)
1263 struct cbb_softc *sc = device_get_softc(brdev);
1266 delay_us = sc->chipset == CB_RF5C47X ? 400*1000 : 20*1000;
1268 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2);
1272 /* If a card exists, unreset it! */
1273 if ((cbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD) == 0) {
1274 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL,
1275 &~CBBM_BRIDGECTRL_RESET, 2);
1281 cbb_cardbus_power_enable_socket(device_t brdev, device_t child)
1283 struct cbb_softc *sc = device_get_softc(brdev);
1286 if ((cbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD) ==
1290 err = cbb_do_power(brdev);
1293 cbb_cardbus_reset(brdev);
1298 cbb_cardbus_power_disable_socket(device_t brdev, device_t child)
1300 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
1301 cbb_cardbus_reset(brdev);
1304 /************************************************************************/
1305 /* CardBus Resource */
1306 /************************************************************************/
1309 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end)
1314 if ((win < 0) || (win > 1)) {
1316 "cbb_cardbus_io_open: window out of range %d\n", win));
1320 basereg = win * 8 + CBBR_IOBASE0;
1321 limitreg = win * 8 + CBBR_IOLIMIT0;
1323 pci_write_config(brdev, basereg, start, 4);
1324 pci_write_config(brdev, limitreg, end, 4);
1329 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end)
1334 if ((win < 0) || (win > 1)) {
1336 "cbb_cardbus_mem_open: window out of range %d\n", win));
1340 basereg = win*8 + CBBR_MEMBASE0;
1341 limitreg = win*8 + CBBR_MEMLIMIT0;
1343 pci_write_config(brdev, basereg, start, 4);
1344 pci_write_config(brdev, limitreg, end, 4);
1349 * XXX The following function belongs in the pci bus layer.
1352 cbb_cardbus_auto_open(struct cbb_softc *sc, int type)
1356 struct cbb_reslist *rle;
1358 int prefetchable[2];
1361 starts[0] = starts[1] = 0xffffffff;
1362 ends[0] = ends[1] = 0;
1364 if (type == SYS_RES_MEMORY)
1365 align = CBB_MEMALIGN;
1366 else if (type == SYS_RES_IOPORT)
1367 align = CBB_IOALIGN;
1371 SLIST_FOREACH(rle, &sc->rl, link) {
1372 if (rle->type != type)
1374 else if (rle->res == NULL) {
1375 device_printf(sc->dev, "WARNING: Resource not reserved? "
1376 "(type=%d, addr=%lx)\n",
1377 rle->type, rman_get_start(rle->res));
1378 } else if (!(rman_get_flags(rle->res) & RF_ACTIVE)) {
1380 } else if (starts[0] == 0xffffffff) {
1381 starts[0] = rman_get_start(rle->res);
1382 ends[0] = rman_get_end(rle->res);
1384 rman_get_flags(rle->res) & RF_PREFETCHABLE;
1385 } else if (rman_get_end(rle->res) > ends[0] &&
1386 rman_get_start(rle->res) - ends[0] <
1387 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[0] ==
1388 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) {
1389 ends[0] = rman_get_end(rle->res);
1390 } else if (rman_get_start(rle->res) < starts[0] &&
1391 starts[0] - rman_get_end(rle->res) <
1392 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[0] ==
1393 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) {
1394 starts[0] = rman_get_start(rle->res);
1395 } else if (starts[1] == 0xffffffff) {
1396 starts[1] = rman_get_start(rle->res);
1397 ends[1] = rman_get_end(rle->res);
1399 rman_get_flags(rle->res) & RF_PREFETCHABLE;
1400 } else if (rman_get_end(rle->res) > ends[1] &&
1401 rman_get_start(rle->res) - ends[1] <
1402 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[1] ==
1403 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) {
1404 ends[1] = rman_get_end(rle->res);
1405 } else if (rman_get_start(rle->res) < starts[1] &&
1406 starts[1] - rman_get_end(rle->res) <
1407 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[1] ==
1408 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) {
1409 starts[1] = rman_get_start(rle->res);
1414 diffs[0] = diffs[1] = 0xffffffff;
1415 if (rman_get_start(rle->res) > ends[0])
1416 diffs[0] = rman_get_start(rle->res) - ends[0];
1417 else if (rman_get_end(rle->res) < starts[0])
1418 diffs[0] = starts[0] - rman_get_end(rle->res);
1419 if (rman_get_start(rle->res) > ends[1])
1420 diffs[1] = rman_get_start(rle->res) - ends[1];
1421 else if (rman_get_end(rle->res) < starts[1])
1422 diffs[1] = starts[1] - rman_get_end(rle->res);
1424 win = (diffs[0] <= diffs[1])?0:1;
1425 if (rman_get_start(rle->res) > ends[win])
1426 ends[win] = rman_get_end(rle->res);
1427 else if (rman_get_end(rle->res) < starts[win])
1428 starts[win] = rman_get_start(rle->res);
1429 if (!(rman_get_flags(rle->res) & RF_PREFETCHABLE))
1430 prefetchable[win] = 0;
1433 if (starts[0] != 0xffffffff)
1434 starts[0] -= starts[0] % align;
1435 if (starts[1] != 0xffffffff)
1436 starts[1] -= starts[1] % align;
1437 if (ends[0] % align != 0)
1438 ends[0] += align - ends[0]%align - 1;
1439 if (ends[1] % align != 0)
1440 ends[1] += align - ends[1]%align - 1;
1443 if (type == SYS_RES_MEMORY) {
1444 cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]);
1445 cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]);
1446 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2);
1447 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0|
1448 CBBM_BRIDGECTRL_PREFETCH_1);
1449 reg |= (prefetchable[0]?CBBM_BRIDGECTRL_PREFETCH_0:0)|
1450 (prefetchable[1]?CBBM_BRIDGECTRL_PREFETCH_1:0);
1451 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2);
1452 } else if (type == SYS_RES_IOPORT) {
1453 cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]);
1454 cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]);
1459 cbb_cardbus_activate_resource(device_t brdev, device_t child, int type,
1460 int rid, struct resource *res)
1464 ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child,
1468 cbb_cardbus_auto_open(device_get_softc(brdev), type);
1473 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type,
1474 int rid, struct resource *res)
1478 ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child,
1482 cbb_cardbus_auto_open(device_get_softc(brdev), type);
1486 static struct resource *
1487 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type,
1488 int *rid, u_long start, u_long end, u_long count, uint flags)
1490 struct cbb_softc *sc = device_get_softc(brdev);
1492 struct resource *res;
1496 tmp = rman_get_start(sc->irq_res);
1497 if (start > tmp || end < tmp || count != 1) {
1498 device_printf(child, "requested interrupt %ld-%ld,"
1499 "count = %ld not supported by cbb\n",
1505 case SYS_RES_IOPORT:
1506 if (start <= cbb_start_32_io)
1507 start = cbb_start_32_io;
1511 case SYS_RES_MEMORY:
1512 if (start <= cbb_start_mem)
1513 start = cbb_start_mem;
1519 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid,
1520 start, end, count, flags & ~RF_ACTIVE);
1522 printf("cbb alloc res fail\n");
1525 if (cbb_insert_res(sc, res, type, *rid)) {
1526 BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, type,
1530 if (flags & RF_ACTIVE)
1531 if (bus_activate_resource(child, type, *rid, res) != 0) {
1532 bus_release_resource(child, type, *rid, res);
1540 cbb_cardbus_release_resource(device_t brdev, device_t child, int type,
1541 int rid, struct resource *res)
1543 struct cbb_softc *sc = device_get_softc(brdev);
1546 if (rman_get_flags(res) & RF_ACTIVE) {
1547 error = bus_deactivate_resource(child, type, rid, res);
1551 cbb_remove_res(sc, res);
1552 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child,
1556 /************************************************************************/
1557 /* PC Card Power Functions */
1558 /************************************************************************/
1561 cbb_pcic_power_enable_socket(device_t brdev, device_t child)
1563 struct cbb_softc *sc = device_get_softc(brdev);
1566 DPRINTF(("cbb_pcic_socket_enable:\n"));
1568 /* power down/up the socket to reset */
1569 err = cbb_do_power(brdev);
1572 exca_reset(&sc->exca, child);
1578 cbb_pcic_power_disable_socket(device_t brdev, device_t child)
1580 struct cbb_softc *sc = device_get_softc(brdev);
1582 DPRINTF(("cbb_pcic_socket_disable\n"));
1584 /* reset signal asserting... */
1585 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET);
1588 /* power down the socket */
1589 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
1590 exca_clrb(&sc->exca, EXCA_PWRCTL, EXCA_PWRCTL_OE);
1592 /* wait 300ms until power fails (Tpf). */
1596 /************************************************************************/
1598 /************************************************************************/
1601 cbb_power_enable_socket(device_t brdev, device_t child)
1603 struct cbb_softc *sc = device_get_softc(brdev);
1605 if (sc->flags & CBB_16BIT_CARD)
1606 return (cbb_pcic_power_enable_socket(brdev, child));
1608 return (cbb_cardbus_power_enable_socket(brdev, child));
1612 cbb_power_disable_socket(device_t brdev, device_t child)
1614 struct cbb_softc *sc = device_get_softc(brdev);
1615 if (sc->flags & CBB_16BIT_CARD)
1616 cbb_pcic_power_disable_socket(brdev, child);
1618 cbb_cardbus_power_disable_socket(brdev, child);
1621 cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid,
1622 struct resource *res)
1625 struct cbb_softc *sc = device_get_softc(brdev);
1626 if (!(rman_get_flags(res) & RF_ACTIVE)) { /* not already activated */
1628 case SYS_RES_IOPORT:
1629 err = exca_io_map(&sc->exca, 0, res);
1631 case SYS_RES_MEMORY:
1632 err = exca_mem_map(&sc->exca, 0, res);
1642 return (BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child,
1647 cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type,
1648 int rid, struct resource *res)
1650 struct cbb_softc *sc = device_get_softc(brdev);
1652 if (rman_get_flags(res) & RF_ACTIVE) { /* if activated */
1654 case SYS_RES_IOPORT:
1655 if (exca_io_unmap_res(&sc->exca, res))
1658 case SYS_RES_MEMORY:
1659 if (exca_mem_unmap_res(&sc->exca, res))
1664 return (BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child,
1668 static struct resource *
1669 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid,
1670 u_long start, u_long end, u_long count, uint flags)
1672 struct resource *res = NULL;
1673 struct cbb_softc *sc = device_get_softc(brdev);
1677 case SYS_RES_MEMORY:
1678 if (start < cbb_start_mem)
1679 start = cbb_start_mem;
1682 flags = (flags & ~RF_ALIGNMENT_MASK) |
1683 rman_make_alignment_flags(CBB_MEMALIGN);
1685 case SYS_RES_IOPORT:
1686 if (start < cbb_start_16_io)
1687 start = cbb_start_16_io;
1692 tmp = rman_get_start(sc->irq_res);
1693 if (start > tmp || end < tmp || count != 1) {
1694 device_printf(child, "requested interrupt %ld-%ld,"
1695 "count = %ld not supported by cbb\n",
1699 flags |= RF_SHAREABLE;
1700 start = end = rman_get_start(sc->irq_res);
1703 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid,
1704 start, end, count, flags & ~RF_ACTIVE);
1707 if (cbb_insert_res(sc, res, type, *rid)) {
1708 BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, type,
1712 if (flags & RF_ACTIVE) {
1713 if (bus_activate_resource(child, type, *rid, res) != 0) {
1714 bus_release_resource(child, type, *rid, res);
1723 cbb_pcic_release_resource(device_t brdev, device_t child, int type,
1724 int rid, struct resource *res)
1726 struct cbb_softc *sc = device_get_softc(brdev);
1729 if (rman_get_flags(res) & RF_ACTIVE) {
1730 error = bus_deactivate_resource(child, type, rid, res);
1734 cbb_remove_res(sc, res);
1735 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child,
1739 /************************************************************************/
1740 /* PC Card methods */
1741 /************************************************************************/
1744 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid,
1747 struct cbb_softc *sc = device_get_softc(brdev);
1748 struct resource *res;
1750 if (type != SYS_RES_MEMORY)
1752 res = cbb_find_res(sc, type, rid);
1754 device_printf(brdev,
1755 "set_res_flags: specified rid not found\n");
1758 return (exca_mem_set_flags(&sc->exca, res, flags));
1762 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid,
1763 uint32_t cardaddr, uint32_t *deltap)
1765 struct cbb_softc *sc = device_get_softc(brdev);
1766 struct resource *res;
1768 res = cbb_find_res(sc, SYS_RES_MEMORY, rid);
1770 device_printf(brdev,
1771 "set_memory_offset: specified rid not found\n");
1774 return (exca_mem_set_offset(&sc->exca, res, cardaddr, deltap));
1777 /************************************************************************/
1779 /************************************************************************/
1783 cbb_activate_resource(device_t brdev, device_t child, int type, int rid,
1786 struct cbb_softc *sc = device_get_softc(brdev);
1788 if (sc->flags & CBB_16BIT_CARD)
1789 return (cbb_pcic_activate_resource(brdev, child, type, rid, r));
1791 return (cbb_cardbus_activate_resource(brdev, child, type, rid,
1796 cbb_deactivate_resource(device_t brdev, device_t child, int type,
1797 int rid, struct resource *r)
1799 struct cbb_softc *sc = device_get_softc(brdev);
1801 if (sc->flags & CBB_16BIT_CARD)
1802 return (cbb_pcic_deactivate_resource(brdev, child, type,
1805 return (cbb_cardbus_deactivate_resource(brdev, child, type,
1809 static struct resource *
1810 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid,
1811 u_long start, u_long end, u_long count, uint flags)
1813 struct cbb_softc *sc = device_get_softc(brdev);
1815 if (sc->flags & CBB_16BIT_CARD)
1816 return (cbb_pcic_alloc_resource(brdev, child, type, rid,
1817 start, end, count, flags));
1819 return (cbb_cardbus_alloc_resource(brdev, child, type, rid,
1820 start, end, count, flags));
1824 cbb_release_resource(device_t brdev, device_t child, int type, int rid,
1827 struct cbb_softc *sc = device_get_softc(brdev);
1829 if (sc->flags & CBB_16BIT_CARD)
1830 return (cbb_pcic_release_resource(brdev, child, type,
1833 return (cbb_cardbus_release_resource(brdev, child, type,
1838 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result)
1840 struct cbb_softc *sc = device_get_softc(brdev);
1844 *result = sc->secbus;
1851 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value)
1853 struct cbb_softc *sc = device_get_softc(brdev);
1863 /************************************************************************/
1864 /* PCI compat methods */
1865 /************************************************************************/
1868 cbb_maxslots(device_t brdev)
1874 cbb_read_config(device_t brdev, int b, int s, int f, int reg, int width)
1877 * Pass through to the next ppb up the chain (i.e. our grandparent).
1879 return (PCIB_READ_CONFIG(device_get_parent(device_get_parent(brdev)),
1880 b, s, f, reg, width));
1884 cbb_write_config(device_t brdev, int b, int s, int f, int reg, uint32_t val,
1888 * Pass through to the next ppb up the chain (i.e. our grandparent).
1890 PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(brdev)),
1891 b, s, f, reg, val, width);
1895 cbb_suspend(device_t self)
1898 struct cbb_softc *sc = device_get_softc(self);
1900 bus_teardown_intr(self, sc->irq_res, sc->intrhand);
1901 sc->flags &= ~CBB_CARD_OK; /* Card is bogus now */
1902 error = bus_generic_suspend(self);
1907 cbb_resume(device_t self)
1910 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self);
1914 * Some BIOSes will not save the BARs for the pci chips, so we
1915 * must do it ourselves. If the BAR is reset to 0 for an I/O
1916 * device, it will read back as 0x1, so no explicit test for
1917 * memory devices are needed.
1919 * Note: The PCI bus code should do this automatically for us on
1920 * suspend/resume, but until it does, we have to cope.
1922 pci_write_config(self, CBBR_SOCKBASE, rman_get_start(sc->base_res), 4);
1923 DEVPRINTF((self, "PCI Memory allocated: %08lx\n",
1924 rman_get_start(sc->base_res)));
1928 /* reset interrupt -- Do we really need to do this? */
1929 tmp = cbb_get(sc, CBB_SOCKET_EVENT);
1930 cbb_set(sc, CBB_SOCKET_EVENT, tmp);
1932 /* re-establish the interrupt. */
1933 if (bus_setup_intr(self, sc->irq_res, 0, cbb_intr, sc,
1934 &sc->intrhand, NULL)) {
1935 device_printf(self, "couldn't re-establish interrupt");
1936 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res);
1937 bus_release_resource(self, SYS_RES_MEMORY, CBBR_SOCKBASE,
1940 sc->base_res = NULL;
1944 /* CSC Interrupt: Card detect interrupt on */
1945 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD);
1947 /* Signal the thread to wakeup. */
1950 error = bus_generic_resume(self);
1956 cbb_child_present(device_t self)
1958 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self);
1961 sockstate = cbb_get(sc, CBB_SOCKET_STATE);
1962 return ((sockstate & CBB_SOCKET_STAT_CD) != 0 &&
1963 (sc->flags & CBB_CARD_OK) != 0);
1966 static device_method_t cbb_methods[] = {
1967 /* Device interface */
1968 DEVMETHOD(device_probe, cbb_probe),
1969 DEVMETHOD(device_attach, cbb_attach),
1970 DEVMETHOD(device_detach, cbb_detach),
1971 DEVMETHOD(device_shutdown, cbb_shutdown),
1972 DEVMETHOD(device_suspend, cbb_suspend),
1973 DEVMETHOD(device_resume, cbb_resume),
1976 DEVMETHOD(bus_print_child, bus_generic_print_child),
1977 DEVMETHOD(bus_read_ivar, cbb_read_ivar),
1978 DEVMETHOD(bus_write_ivar, cbb_write_ivar),
1979 DEVMETHOD(bus_alloc_resource, cbb_alloc_resource),
1980 DEVMETHOD(bus_release_resource, cbb_release_resource),
1981 DEVMETHOD(bus_activate_resource, cbb_activate_resource),
1982 DEVMETHOD(bus_deactivate_resource, cbb_deactivate_resource),
1983 DEVMETHOD(bus_driver_added, cbb_driver_added),
1984 DEVMETHOD(bus_child_detached, cbb_child_detached),
1985 DEVMETHOD(bus_setup_intr, cbb_setup_intr),
1986 DEVMETHOD(bus_teardown_intr, cbb_teardown_intr),
1987 DEVMETHOD(bus_child_present, cbb_child_present),
1989 /* 16-bit card interface */
1990 DEVMETHOD(card_set_res_flags, cbb_pcic_set_res_flags),
1991 DEVMETHOD(card_set_memory_offset, cbb_pcic_set_memory_offset),
1993 /* power interface */
1994 DEVMETHOD(power_enable_socket, cbb_power_enable_socket),
1995 DEVMETHOD(power_disable_socket, cbb_power_disable_socket),
1997 /* pcib compatibility interface */
1998 DEVMETHOD(pcib_maxslots, cbb_maxslots),
1999 DEVMETHOD(pcib_read_config, cbb_read_config),
2000 DEVMETHOD(pcib_write_config, cbb_write_config),
2004 static driver_t cbb_driver = {
2007 sizeof(struct cbb_softc)
2010 static devclass_t cbb_devclass;
2012 DRIVER_MODULE(cbb, pci, cbb_driver, cbb_devclass, 0, 0);
2013 MODULE_VERSION(cbb, 1);
2014 MODULE_DEPEND(cbb, exca, 1, 1, 1);