2 * PCI specific probe and attach routines for LSI Fusion Adapters
5 * Copyright (c) 2000, 2001 by Greg Ansley
6 * Partially derived from Matt Jacob's ISP driver.
7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice immediately at the beginning of the file, without modification,
16 * this list of conditions, and the following disclaimer.
17 * 2. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * Copyright (c) 2002, 2006 by Matthew Jacob
34 * All rights reserved.
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions are
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
42 * substantially similar to the "NO WARRANTY" disclaimer below
43 * ("Disclaimer") and any redistribution must be conditioned upon including
44 * a substantially similar Disclaimer requirement for further binary
46 * 3. Neither the names of the above listed copyright holders nor the names
47 * of any contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62 * Support from Chris Ellsworth in order to make SAS adapters work
63 * is gratefully acknowledged.
65 * Support from LSI-Logic has also gone a great deal toward making this a
66 * workable subsystem and is gratefully acknowledged.
69 * Copyright (c) 2004, Avid Technology, Inc. and its contributors.
70 * Copyright (c) 2005, WHEEL Sp. z o.o.
71 * Copyright (c) 2004, 2005 Justin T. Gibbs
72 * All rights reserved.
74 * Redistribution and use in source and binary forms, with or without
75 * modification, are permitted provided that the following conditions are
77 * 1. Redistributions of source code must retain the above copyright
78 * notice, this list of conditions and the following disclaimer.
79 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
80 * substantially similar to the "NO WARRANTY" disclaimer below
81 * ("Disclaimer") and any redistribution must be conditioned upon including
82 * a substantially similar Disclaimer requirement for further binary
84 * 3. Neither the names of the above listed copyright holders nor the names
85 * of any contributors may be used to endorse or promote products derived
86 * from this software without specific prior written permission.
88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
91 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
92 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
93 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
94 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
95 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
96 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
97 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
98 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
100 * $FreeBSD: src/sys/dev/mpt/mpt_pci.c,v 1.61 2011/04/22 09:59:16 marius Exp $
103 #include <dev/disk/mpt/mpt.h>
104 #include <dev/disk/mpt/mpt_cam.h>
105 #include <dev/disk/mpt/mpt_raid.h>
107 #ifndef PCI_VENDOR_LSI
108 #define PCI_VENDOR_LSI 0x1000
111 #ifndef PCI_PRODUCT_LSI_FC909
112 #define PCI_PRODUCT_LSI_FC909 0x0620
115 #ifndef PCI_PRODUCT_LSI_FC909A
116 #define PCI_PRODUCT_LSI_FC909A 0x0621
119 #ifndef PCI_PRODUCT_LSI_FC919
120 #define PCI_PRODUCT_LSI_FC919 0x0624
123 #ifndef PCI_PRODUCT_LSI_FC929
124 #define PCI_PRODUCT_LSI_FC929 0x0622
127 #ifndef PCI_PRODUCT_LSI_FC929X
128 #define PCI_PRODUCT_LSI_FC929X 0x0626
131 #ifndef PCI_PRODUCT_LSI_FC919X
132 #define PCI_PRODUCT_LSI_FC919X 0x0628
135 #ifndef PCI_PRODUCT_LSI_FC7X04X
136 #define PCI_PRODUCT_LSI_FC7X04X 0x0640
139 #ifndef PCI_PRODUCT_LSI_FC646
140 #define PCI_PRODUCT_LSI_FC646 0x0646
143 #ifndef PCI_PRODUCT_LSI_1030
144 #define PCI_PRODUCT_LSI_1030 0x0030
147 #ifndef PCI_PRODUCT_LSI_SAS1064
148 #define PCI_PRODUCT_LSI_SAS1064 0x0050
151 #ifndef PCI_PRODUCT_LSI_SAS1064A
152 #define PCI_PRODUCT_LSI_SAS1064A 0x005C
155 #ifndef PCI_PRODUCT_LSI_SAS1064E
156 #define PCI_PRODUCT_LSI_SAS1064E 0x0056
159 #ifndef PCI_PRODUCT_LSI_SAS1066
160 #define PCI_PRODUCT_LSI_SAS1066 0x005E
163 #ifndef PCI_PRODUCT_LSI_SAS1066E
164 #define PCI_PRODUCT_LSI_SAS1066E 0x005A
167 #ifndef PCI_PRODUCT_LSI_SAS1068
168 #define PCI_PRODUCT_LSI_SAS1068 0x0054
171 #ifndef PCI_PRODUCT_LSI_SAS1068E
172 #define PCI_PRODUCT_LSI_SAS1068E 0x0058
175 #ifndef PCI_PRODUCT_LSI_SAS1078
176 #define PCI_PRODUCT_LSI_SAS1078 0x0062
179 #ifndef PCI_PRODUCT_LSI_SAS1078DE
180 #define PCI_PRODUCT_LSI_SAS1078DE 0x007C
183 #ifndef PCIM_CMD_SERRESPEN
184 #define PCIM_CMD_SERRESPEN 0x0100
189 static int mpt_pci_probe(device_t);
190 static int mpt_pci_attach(device_t);
191 static void mpt_free_bus_resources(struct mpt_softc *mpt);
192 static int mpt_pci_detach(device_t);
193 static int mpt_pci_shutdown(device_t);
194 static int mpt_dma_mem_alloc(struct mpt_softc *mpt);
195 static void mpt_dma_mem_free(struct mpt_softc *mpt);
196 static void mpt_read_config_regs(struct mpt_softc *mpt);
197 static void mpt_pci_intr(void *);
199 static device_method_t mpt_methods[] = {
200 /* Device interface */
201 DEVMETHOD(device_probe, mpt_pci_probe),
202 DEVMETHOD(device_attach, mpt_pci_attach),
203 DEVMETHOD(device_detach, mpt_pci_detach),
204 DEVMETHOD(device_shutdown, mpt_pci_shutdown),
208 static driver_t mpt_driver = {
209 "mpt", mpt_methods, sizeof(struct mpt_softc)
211 static devclass_t mpt_devclass;
212 DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0);
213 MODULE_DEPEND(mpt, pci, 1, 1, 1);
214 MODULE_VERSION(mpt, 1);
217 mpt_pci_probe(device_t dev)
221 if (pci_get_vendor(dev) != PCI_VENDOR_LSI) {
225 switch ((pci_get_device(dev) & ~1)) {
226 case PCI_PRODUCT_LSI_FC909:
227 desc = "LSILogic FC909 FC Adapter";
229 case PCI_PRODUCT_LSI_FC909A:
230 desc = "LSILogic FC909A FC Adapter";
232 case PCI_PRODUCT_LSI_FC919:
233 desc = "LSILogic FC919 FC Adapter";
235 case PCI_PRODUCT_LSI_FC929:
236 desc = "Dual LSILogic FC929 FC Adapter";
238 case PCI_PRODUCT_LSI_FC919X:
239 desc = "LSILogic FC919 FC PCI-X Adapter";
241 case PCI_PRODUCT_LSI_FC929X:
242 desc = "Dual LSILogic FC929X 2Gb/s FC PCI-X Adapter";
244 case PCI_PRODUCT_LSI_FC646:
245 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-Express Adapter";
247 case PCI_PRODUCT_LSI_FC7X04X:
248 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-X Adapter";
250 case PCI_PRODUCT_LSI_1030:
251 desc = "LSILogic 1030 Ultra4 Adapter";
253 case PCI_PRODUCT_LSI_SAS1064:
254 case PCI_PRODUCT_LSI_SAS1064A:
255 case PCI_PRODUCT_LSI_SAS1064E:
256 case PCI_PRODUCT_LSI_SAS1066:
257 case PCI_PRODUCT_LSI_SAS1066E:
258 case PCI_PRODUCT_LSI_SAS1068:
259 case PCI_PRODUCT_LSI_SAS1068E:
260 case PCI_PRODUCT_LSI_SAS1078:
261 case PCI_PRODUCT_LSI_SAS1078DE:
262 desc = "LSILogic SAS/SATA Adapter";
268 device_set_desc(dev, desc);
273 mpt_set_options(struct mpt_softc *mpt)
278 if (kgetenv_int("mpt_disable", &bitmap)) {
279 if (bitmap & (1 << mpt->unit)) {
284 if (kgetenv_int("mpt_debug", &bitmap)) {
285 if (bitmap & (1 << mpt->unit)) {
286 mpt->verbose = MPT_PRT_DEBUG;
290 if (kgetenv_int("mpt_debug1", &bitmap)) {
291 if (bitmap & (1 << mpt->unit)) {
292 mpt->verbose = MPT_PRT_DEBUG1;
296 if (kgetenv_int("mpt_debug2", &bitmap)) {
297 if (bitmap & (1 << mpt->unit)) {
298 mpt->verbose = MPT_PRT_DEBUG2;
302 if (kgetenv_int("mpt_debug3", &bitmap)) {
303 if (bitmap & (1 << mpt->unit)) {
304 mpt->verbose = MPT_PRT_DEBUG3;
308 mpt->cfg_role = MPT_ROLE_DEFAULT;
310 if (kgetenv_int("mpt_nil_role", &bitmap)) {
311 if (bitmap & (1 << mpt->unit)) {
314 mpt->do_cfg_role = 1;
317 if (kgetenv_int("mpt_tgt_role", &bitmap)) {
318 if (bitmap & (1 << mpt->unit)) {
319 mpt->cfg_role |= MPT_ROLE_TARGET;
321 mpt->do_cfg_role = 1;
324 if (kgetenv_int("mpt_ini_role", &bitmap)) {
325 if (bitmap & (1 << mpt->unit)) {
326 mpt->cfg_role |= MPT_ROLE_INITIATOR;
328 mpt->do_cfg_role = 1;
335 mpt_link_peer(struct mpt_softc *mpt)
337 struct mpt_softc *mpt2;
339 if (mpt->unit == 0) {
343 * XXX: depends on probe order
345 mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1);
350 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
353 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
358 if (mpt->verbose >= MPT_PRT_DEBUG) {
359 mpt_prt(mpt, "linking with peer (mpt%d)\n",
360 device_get_unit(mpt2->dev));
365 mpt_unlink_peer(struct mpt_softc *mpt)
368 mpt->mpt2->mpt2 = NULL;
374 mpt_pci_attach(device_t dev)
376 struct mpt_softc *mpt;
379 int mpt_io_bar, mpt_mem_bar;
381 /* Allocate the softc structure */
382 mpt = (struct mpt_softc*)device_get_softc(dev);
384 device_printf(dev, "cannot allocate softc\n");
387 memset(mpt, 0, sizeof(struct mpt_softc));
388 switch ((pci_get_device(dev) & ~1)) {
389 case PCI_PRODUCT_LSI_FC909:
390 case PCI_PRODUCT_LSI_FC909A:
391 case PCI_PRODUCT_LSI_FC919:
392 case PCI_PRODUCT_LSI_FC929:
393 case PCI_PRODUCT_LSI_FC919X:
394 case PCI_PRODUCT_LSI_FC646:
395 case PCI_PRODUCT_LSI_FC7X04X:
398 case PCI_PRODUCT_LSI_SAS1064:
399 case PCI_PRODUCT_LSI_SAS1064A:
400 case PCI_PRODUCT_LSI_SAS1064E:
401 case PCI_PRODUCT_LSI_SAS1066:
402 case PCI_PRODUCT_LSI_SAS1066E:
403 case PCI_PRODUCT_LSI_SAS1068:
404 case PCI_PRODUCT_LSI_SAS1068E:
405 case PCI_PRODUCT_LSI_SAS1078:
406 case PCI_PRODUCT_LSI_SAS1078DE:
414 mpt->unit = device_get_unit(dev);
415 mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT;
416 mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT;
417 mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT;
418 mpt->verbose = MPT_PRT_NONE;
419 mpt->role = MPT_ROLE_NONE;
420 mpt->mpt_ini_id = MPT_INI_ID_NONE;
421 mpt_set_options(mpt);
422 if (mpt->verbose == MPT_PRT_NONE) {
423 mpt->verbose = MPT_PRT_WARN;
424 /* Print INFO level (if any) if bootverbose is set */
425 mpt->verbose += (bootverbose != 0)? 1 : 0;
427 /* Make sure memory access decoders are enabled */
428 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
429 if ((cmd & PCIM_CMD_MEMEN) == 0) {
430 device_printf(dev, "Memory accesses disabled");
435 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
438 PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
439 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
440 pci_write_config(dev, PCIR_COMMAND, cmd, 2);
443 * Make sure we've disabled the ROM.
445 data = pci_read_config(dev, PCIR_BIOS, 4);
446 data &= ~PCIM_BIOS_ENABLE;
447 pci_write_config(dev, PCIR_BIOS, data, 4);
450 * Is this part a dual?
451 * If so, link with our partner (around yet)
453 if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 ||
454 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC646 ||
455 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC7X04X ||
456 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) {
461 * Figure out which are the I/O and MEM Bars
463 data = pci_read_config(dev, PCIR_BAR(0), 4);
464 if (PCI_BAR_IO(data)) {
465 /* BAR0 is IO, BAR1 is memory */
469 /* BAR0 is memory, BAR1 is IO */
475 * Set up register access. PIO mode is required for
476 * certain reset operations (but must be disabled for
477 * some cards otherwise).
479 mpt->pci_pio_rid = PCIR_BAR(mpt_io_bar);
480 mpt->pci_pio_reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
481 &mpt->pci_pio_rid, RF_ACTIVE);
482 if (mpt->pci_pio_reg == NULL) {
483 device_printf(dev, "unable to map registers in PIO mode\n");
486 mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg);
487 mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
489 /* Allocate kernel virtual memory for the 9x9's Mem0 region */
490 mpt->pci_mem_rid = PCIR_BAR(mpt_mem_bar);
491 mpt->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
492 &mpt->pci_mem_rid, RF_ACTIVE);
493 if (mpt->pci_reg == NULL) {
494 device_printf(dev, "Unable to memory map registers.\n");
496 device_printf(dev, "Giving Up.\n");
499 device_printf(dev, "Falling back to PIO mode.\n");
500 mpt->pci_st = mpt->pci_pio_st;
501 mpt->pci_sh = mpt->pci_pio_sh;
503 mpt->pci_st = rman_get_bustag(mpt->pci_reg);
504 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
507 /* Get a handle to the interrupt */
509 if (mpt->msi_enable) {
511 * First try to alloc an MSI-X message. If that
512 * fails, then try to alloc an MSI message instead.
514 if (pci_msix_count(dev) == 1) {
515 mpt->pci_msi_count = 1;
516 if (pci_alloc_msix(dev, &mpt->pci_msi_count) == 0) {
519 mpt->pci_msi_count = 0;
522 if (iqd == 0 && pci_msi_count(dev) == 1) {
523 mpt->pci_msi_count = 1;
524 if (pci_alloc_msi(dev, &mpt->pci_msi_count) == 0) {
527 mpt->pci_msi_count = 0;
531 mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd,
532 RF_ACTIVE | RF_SHAREABLE);
533 if (mpt->pci_irq == NULL) {
534 device_printf(dev, "could not allocate interrupt\n");
540 /* Disable interrupts at the part */
541 mpt_disable_ints(mpt);
543 /* Register the interrupt handler */
544 if (mpt_setup_intr(dev, mpt->pci_irq, 0, NULL, mpt_pci_intr,
546 device_printf(dev, "could not setup interrupt\n");
550 /* Allocate dma memory */
551 /* XXX JGibbs -Should really be done based on IOCFacts. */
552 if (mpt_dma_mem_alloc(mpt)) {
553 mpt_prt(mpt, "Could not allocate DMA memory\n");
558 * Save the PCI config register values
560 * Hard resets are known to screw up the BAR for diagnostic
561 * memory accesses (Mem1).
563 * Using Mem1 is known to make the chip stop responding to
564 * configuration space transfers, so we need to save it now
567 mpt_read_config_regs(mpt);
570 * Disable PIO until we need it
573 pci_disable_io(dev, SYS_RES_IOPORT);
576 /* Initialize the hardware */
577 if (mpt->disabled == 0) {
578 if (mpt_attach(mpt) != 0) {
582 mpt_prt(mpt, "device disabled at user request\n");
586 mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown,
587 dev, SHUTDOWN_PRI_DEFAULT);
589 if (mpt->eh == NULL) {
590 mpt_prt(mpt, "shutdown event registration failed\n");
591 (void) mpt_detach(mpt);
597 mpt_dma_mem_free(mpt);
598 mpt_free_bus_resources(mpt);
599 mpt_unlink_peer(mpt);
601 MPT_LOCK_DESTROY(mpt);
604 * but return zero to preserve unit numbering
613 mpt_free_bus_resources(struct mpt_softc *mpt)
616 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
621 bus_release_resource(mpt->dev, SYS_RES_IRQ,
622 mpt->pci_msi_count ? 1 : 0, mpt->pci_irq);
626 if (mpt->pci_msi_count) {
627 pci_release_msi(mpt->dev);
628 mpt->pci_msi_count = 0;
631 if (mpt->pci_pio_reg) {
632 bus_release_resource(mpt->dev, SYS_RES_IOPORT, mpt->pci_pio_rid,
634 mpt->pci_pio_reg = 0;
637 bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_mem_rid,
641 MPT_LOCK_DESTROY(mpt);
646 * Disconnect ourselves from the system.
649 mpt_pci_detach(device_t dev)
651 struct mpt_softc *mpt;
653 mpt = (struct mpt_softc*)device_get_softc(dev);
656 mpt_disable_ints(mpt);
658 mpt_reset(mpt, /*reinit*/FALSE);
659 mpt_dma_mem_free(mpt);
660 mpt_free_bus_resources(mpt);
661 mpt_raid_free_mem(mpt);
662 if (mpt->eh != NULL) {
663 EVENTHANDLER_DEREGISTER(shutdown_post_sync, mpt->eh);
671 * Disable the hardware
674 mpt_pci_shutdown(device_t dev)
676 struct mpt_softc *mpt;
678 mpt = (struct mpt_softc *)device_get_softc(dev);
681 r = mpt_shutdown(mpt);
688 mpt_dma_mem_alloc(struct mpt_softc *mpt)
691 struct mpt_map_info mi;
693 /* Check if we alreay have allocated the reply memory */
694 if (mpt->reply_phys != 0) {
698 len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt);
699 mpt->request_pool = (request_t *)kmalloc(len, M_DEVBUF, M_WAITOK|M_ZERO);
700 if (mpt->request_pool == NULL) {
701 mpt_prt(mpt, "cannot allocate request pool\n");
706 * Create a parent dma tag for this device.
708 * Align at byte boundaries,
709 * Limit to 32-bit addressing for request/reply queues.
711 if (mpt_dma_tag_create(mpt, /*parent*/NULL,
712 /*alignment*/1, /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR,
713 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL,
714 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
715 /*nsegments*/BUS_SPACE_UNRESTRICTED,
716 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/0,
717 &mpt->parent_dmat) != 0) {
718 mpt_prt(mpt, "cannot create parent dma tag\n");
722 /* Create a child tag for reply buffers */
723 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0,
724 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
725 NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
726 &mpt->reply_dmat) != 0) {
727 mpt_prt(mpt, "cannot create a dma tag for replies\n");
731 /* Allocate some DMA accessible memory for replies */
732 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
733 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
734 mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n",
735 (u_long) (2 * PAGE_SIZE));
742 /* Load and lock it into "bus space" */
743 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
744 2 * PAGE_SIZE, mpt_map_rquest, &mi, 0);
747 mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n",
751 mpt->reply_phys = mi.phys;
758 /* Deallocate memory that was allocated by mpt_dma_mem_alloc
761 mpt_dma_mem_free(struct mpt_softc *mpt)
764 /* Make sure we aren't double destroying */
765 if (mpt->reply_dmat == 0) {
766 mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n");
770 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
771 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
772 bus_dma_tag_destroy(mpt->reply_dmat);
773 bus_dma_tag_destroy(mpt->parent_dmat);
775 kfree(mpt->request_pool, M_DEVBUF);
776 mpt->request_pool = 0;
782 /* Reads modifiable (via PCI transactions) config registers */
784 mpt_read_config_regs(struct mpt_softc *mpt)
786 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
787 mpt->pci_cfg.LatencyTimer_LineSize =
788 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
789 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4);
790 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4);
791 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4);
792 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4);
793 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4);
794 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
795 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
796 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
799 /* Sets modifiable config registers */
801 mpt_set_config_regs(struct mpt_softc *mpt)
805 #define MPT_CHECK(reg, offset, size) \
806 val = pci_read_config(mpt->dev, offset, size); \
807 if (mpt->pci_cfg.reg != val) { \
809 "Restoring " #reg " to 0x%X from 0x%X\n", \
810 mpt->pci_cfg.reg, val); \
813 if (mpt->verbose >= MPT_PRT_DEBUG) {
814 MPT_CHECK(Command, PCIR_COMMAND, 2);
815 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
816 MPT_CHECK(IO_BAR, PCIR_BAR(0), 4);
817 MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4);
818 MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4);
819 MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4);
820 MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4);
821 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
822 MPT_CHECK(IntLine, PCIR_INTLINE, 1);
823 MPT_CHECK(PMCSR, 0x44, 4);
827 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
828 pci_write_config(mpt->dev, PCIR_CACHELNSZ,
829 mpt->pci_cfg.LatencyTimer_LineSize, 2);
830 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4);
831 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4);
832 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4);
833 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4);
834 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4);
835 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
836 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
837 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
841 mpt_pci_intr(void *arg)
843 struct mpt_softc *mpt;
845 mpt = (struct mpt_softc *)arg;