2 * Copyright (c) 1998 Doug Rabson
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * $FreeBSD: src/sys/i386/include/atomic.h,v 1.9.2.1 2000/07/07 00:38:47 obrien Exp $
27 * $DragonFly: src/sys/cpu/i386/include/atomic.h,v 1.25 2008/06/26 23:06:50 dillon Exp $
29 #ifndef _CPU_ATOMIC_H_
30 #define _CPU_ATOMIC_H_
33 #include <sys/types.h>
37 * Various simple arithmetic on memory which is atomic in the presence
38 * of interrupts and multiple processors.
40 * atomic_set_char(P, V) (*(u_char*)(P) |= (V))
41 * atomic_clear_char(P, V) (*(u_char*)(P) &= ~(V))
42 * atomic_add_char(P, V) (*(u_char*)(P) += (V))
43 * atomic_subtract_char(P, V) (*(u_char*)(P) -= (V))
45 * atomic_set_short(P, V) (*(u_short*)(P) |= (V))
46 * atomic_clear_short(P, V) (*(u_short*)(P) &= ~(V))
47 * atomic_add_short(P, V) (*(u_short*)(P) += (V))
48 * atomic_subtract_short(P, V) (*(u_short*)(P) -= (V))
50 * atomic_set_int(P, V) (*(u_int*)(P) |= (V))
51 * atomic_clear_int(P, V) (*(u_int*)(P) &= ~(V))
52 * atomic_add_int(P, V) (*(u_int*)(P) += (V))
53 * atomic_subtract_int(P, V) (*(u_int*)(P) -= (V))
55 * atomic_set_long(P, V) (*(u_long*)(P) |= (V))
56 * atomic_clear_long(P, V) (*(u_long*)(P) &= ~(V))
57 * atomic_add_long(P, V) (*(u_long*)(P) += (V))
58 * atomic_subtract_long(P, V) (*(u_long*)(P) -= (V))
59 * atomic_readandclear_long(P) (return (*(u_long*)(P)); *(u_long*)(P) = 0;)
60 * atomic_readandclear_int(P) (return (*(u_int*)(P)); *(u_int*)(P) = 0;)
64 * The above functions are expanded inline in the statically-linked
65 * kernel. Lock prefixes are generated if an SMP kernel is being
66 * built, or if user code is using these functions.
68 * Kernel modules call real functions which are built into the kernel.
69 * This allows kernel modules to be portable between UP and SMP systems.
71 #if defined(KLD_MODULE)
72 #define ATOMIC_ASM(NAME, TYPE, OP, V) \
73 extern void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v); \
74 extern void atomic_##NAME##_##TYPE##_nonlocked(volatile u_##TYPE *p, u_##TYPE v);
75 #else /* !KLD_MODULE */
76 #if defined(SMP) || !defined(_KERNEL)
77 #define MPLOCKED "lock ; "
83 * The assembly is volatilized to demark potential before-and-after side
84 * effects if an interrupt or SMP collision were to occur. The primary
85 * atomic instructions are MP safe, the nonlocked instructions are
86 * local-interrupt-safe (so we don't depend on C 'X |= Y' generating an
87 * atomic instruction).
89 * +m - memory is read and written (=m - memory is only written)
90 * iq - integer constant or %ax/%bx/%cx/%dx (ir = int constant or any reg)
91 * (Note: byte instructions only work on %ax,%bx,%cx, or %dx). iq
92 * is good enough for our needs so don't get fancy.
95 /* egcs 1.1.2+ version */
96 #define ATOMIC_ASM(NAME, TYPE, OP, V) \
97 static __inline void \
98 atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
100 __asm __volatile(MPLOCKED OP \
104 static __inline void \
105 atomic_##NAME##_##TYPE##_nonlocked(volatile u_##TYPE *p, u_##TYPE v)\
107 __asm __volatile(OP \
112 #endif /* KLD_MODULE */
114 /* egcs 1.1.2+ version */
115 ATOMIC_ASM(set, char, "orb %b1,%0", v)
116 ATOMIC_ASM(clear, char, "andb %b1,%0", ~v)
117 ATOMIC_ASM(add, char, "addb %b1,%0", v)
118 ATOMIC_ASM(subtract, char, "subb %b1,%0", v)
120 ATOMIC_ASM(set, short, "orw %w1,%0", v)
121 ATOMIC_ASM(clear, short, "andw %w1,%0", ~v)
122 ATOMIC_ASM(add, short, "addw %w1,%0", v)
123 ATOMIC_ASM(subtract, short, "subw %w1,%0", v)
125 ATOMIC_ASM(set, int, "orl %1,%0", v)
126 ATOMIC_ASM(clear, int, "andl %1,%0", ~v)
127 ATOMIC_ASM(add, int, "addl %1,%0", v)
128 ATOMIC_ASM(subtract, int, "subl %1,%0", v)
130 ATOMIC_ASM(set, long, "orq %1,%0", v)
131 ATOMIC_ASM(clear, long, "andq %1,%0", ~v)
132 ATOMIC_ASM(add, long, "addq %1,%0", v)
133 ATOMIC_ASM(subtract, long, "subq %1,%0", v)
135 #if defined(KLD_MODULE)
137 u_long atomic_readandclear_long(volatile u_long *addr);
138 u_int atomic_readandclear_int(volatile u_int *addr);
140 #else /* !KLD_MODULE */
142 static __inline u_long
143 atomic_readandclear_long(volatile u_long *addr)
150 "# atomic_readandclear_long"
151 : "+r" (res), /* 0 */
158 static __inline u_int
159 atomic_readandclear_int(volatile u_int *addr)
166 "# atomic_readandclear_int"
167 : "+r" (res), /* 0 */
174 #endif /* KLD_MODULE */
177 * atomic_poll_acquire_int(P) Returns non-zero on success, 0 if the lock
178 * has already been acquired.
179 * atomic_poll_release_int(P)
181 * These support the NDIS driver and are also used for IPIQ interlocks
182 * between cpus. Both the acquisition and release must be
183 * cache-synchronizing instructions.
186 #if defined(KLD_MODULE)
188 extern int atomic_swap_int(volatile int *addr, int value);
189 extern int atomic_poll_acquire_int(volatile u_int *p);
190 extern void atomic_poll_release_int(volatile u_int *p);
195 atomic_swap_int(volatile int *addr, int value)
197 __asm __volatile("xchgl %0, %1" :
198 "=r" (value), "=m" (*addr) : "0" (value) : "memory");
204 atomic_poll_acquire_int(volatile u_int *p)
208 __asm __volatile(MPLOCKED "btsl $0,%0; setnc %%al; andl $255,%%eax" : "+m" (*p), "=a" (data));
214 atomic_poll_release_int(volatile u_int *p)
216 __asm __volatile(MPLOCKED "btrl $0,%0" : "+m" (*p));
222 * These functions operate on a 32 bit interrupt interlock which is defined
225 * bit 0-30 interrupt handler disabled bits (counter)
226 * bit 31 interrupt handler currently running bit (1 = run)
228 * atomic_intr_cond_test(P) Determine if the interlock is in an
229 * acquired state. Returns 0 if it not
230 * acquired, non-zero if it is.
232 * atomic_intr_cond_try(P)
233 * Increment the request counter and attempt to
234 * set bit 31 to acquire the interlock. If
235 * we are unable to set bit 31 the request
236 * counter is decremented and we return -1,
237 * otherwise we return 0.
239 * atomic_intr_cond_enter(P, func, arg)
240 * Increment the request counter and attempt to
241 * set bit 31 to acquire the interlock. If
242 * we are unable to set bit 31 func(arg) is
243 * called in a loop until we are able to set
246 * atomic_intr_cond_exit(P, func, arg)
247 * Decrement the request counter and clear bit
248 * 31. If the request counter is still non-zero
249 * call func(arg) once.
251 * atomic_intr_handler_disable(P)
252 * Set bit 30, indicating that the interrupt
253 * handler has been disabled. Must be called
254 * after the hardware is disabled.
256 * Returns bit 31 indicating whether a serialized
257 * accessor is active (typically the interrupt
258 * handler is running). 0 == not active,
259 * non-zero == active.
261 * atomic_intr_handler_enable(P)
262 * Clear bit 30, indicating that the interrupt
263 * handler has been enabled. Must be called
264 * before the hardware is actually enabled.
266 * atomic_intr_handler_is_enabled(P)
267 * Returns bit 30, 0 indicates that the handler
268 * is enabled, non-zero indicates that it is
269 * disabled. The request counter portion of
270 * the field is ignored.
273 #if defined(KLD_MODULE)
275 void atomic_intr_init(__atomic_intr_t *p);
276 int atomic_intr_handler_disable(__atomic_intr_t *p);
277 void atomic_intr_handler_enable(__atomic_intr_t *p);
278 int atomic_intr_handler_is_enabled(__atomic_intr_t *p);
279 int atomic_intr_cond_test(__atomic_intr_t *p);
280 int atomic_intr_cond_try(__atomic_intr_t *p);
281 void atomic_intr_cond_enter(__atomic_intr_t *p, void (*func)(void *), void *arg);
282 void atomic_intr_cond_exit(__atomic_intr_t *p, void (*func)(void *), void *arg);
288 atomic_intr_init(__atomic_intr_t *p)
295 atomic_intr_handler_disable(__atomic_intr_t *p)
299 __asm __volatile(MPLOCKED "orl $0x40000000,%1; movl %1,%%eax; " \
300 "andl $0x80000000,%%eax" \
301 : "=a"(data) , "+m"(*p));
307 atomic_intr_handler_enable(__atomic_intr_t *p)
309 __asm __volatile(MPLOCKED "andl $0xBFFFFFFF,%0" : "+m" (*p));
314 atomic_intr_handler_is_enabled(__atomic_intr_t *p)
318 __asm __volatile("movl %1,%%eax; andl $0x40000000,%%eax" \
319 : "=a"(data) : "m"(*p));
325 atomic_intr_cond_enter(__atomic_intr_t *p, void (*func)(void *), void *arg)
327 __asm __volatile(MPLOCKED "incl %0; " \
329 MPLOCKED "btsl $31,%0; jnc 2f; " \
330 "movq %2,%%rdi; call *%1; " \
334 : "r"(func), "m"(arg) \
335 : "ax", "cx", "dx", "rsi", "rdi", "r8", "r9", "r10", "r11");
336 /* YYY the function call may clobber even more registers? */
340 * Attempt to enter the interrupt condition variable. Returns zero on
341 * success, 1 on failure.
345 atomic_intr_cond_try(__atomic_intr_t *p)
349 __asm __volatile(MPLOCKED "incl %0; " \
351 "subl %%eax,%%eax; " \
352 MPLOCKED "btsl $31,%0; jnc 2f; " \
353 MPLOCKED "decl %0; " \
356 : "+m" (*p), "=&a"(ret)
364 atomic_intr_cond_test(__atomic_intr_t *p)
366 return((int)(*p & 0x80000000));
371 atomic_intr_cond_exit(__atomic_intr_t *p, void (*func)(void *), void *arg)
373 __asm __volatile(MPLOCKED "decl %0; " \
374 MPLOCKED "btrl $31,%0; " \
375 "testl $0x3FFFFFFF,%0; jz 1f; " \
376 "movq %2,%%rdi; call *%1; " \
379 : "r"(func), "m"(arg) \
380 : "ax", "cx", "dx", "rsi", "rdi", "r8", "r9", "r10", "r11");
381 /* YYY the function call may clobber even more registers? */
387 * Atomic compare and set
389 * if (*_dst == _old) *_dst = _new (all 32 bit words)
391 * Returns 0 on failure, non-zero on success. The inline is designed to
392 * allow the compiler to optimize the common case where the caller calls
393 * these functions from inside a conditional.
395 #if defined(KLD_MODULE)
397 extern int atomic_cmpset_int(volatile u_int *_dst, u_int _old, u_int _new);
398 extern long atomic_cmpset_long(volatile u_long *_dst, u_long _exp, u_long _src);
399 extern u_int atomic_fetchadd_int(volatile u_int *_p, u_int _v);
404 atomic_cmpset_int(volatile u_int *_dst, u_int _old, u_int _new)
408 __asm __volatile(MPLOCKED "cmpxchgl %2,%1; " \
409 : "+a" (res), "=m" (*_dst) \
410 : "r" (_new), "m" (*_dst) \
412 return (res == _old);
416 atomic_cmpset_long(volatile u_long *_dst, u_long _old, u_long _new)
420 __asm __volatile(MPLOCKED "cmpxchgq %2,%1; " \
421 : "+a" (res), "=m" (*_dst) \
422 : "r" (_new), "m" (*_dst) \
424 return (res == _old);
428 * Atomically add the value of v to the integer pointed to by p and return
429 * the previous value of *p.
431 static __inline u_int
432 atomic_fetchadd_int(volatile u_int *_p, u_int _v)
434 __asm __volatile(MPLOCKED "xaddl %0,%1; " \
435 : "+r" (_v), "=m" (*_p) \
441 #endif /* KLD_MODULE */
443 #if defined(KLD_MODULE)
445 #define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \
446 extern u_##TYPE atomic_load_acq_##TYPE(volatile u_##TYPE *p); \
447 extern void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v);
449 #else /* !KLD_MODULE */
451 #if defined(_KERNEL) && !defined(SMP)
453 * We assume that a = b will do atomic loads and stores. However, on a
454 * PentiumPro or higher, reads may pass writes, so for that case we have
455 * to use a serializing instruction (i.e. with LOCK) to do the load in
456 * SMP kernels. For UP kernels, however, the cache of the single processor
457 * is always consistent, so we don't need any memory barriers.
459 #define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \
460 static __inline u_##TYPE \
461 atomic_load_acq_##TYPE(volatile u_##TYPE *p) \
466 static __inline void \
467 atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
473 #else /* !(_KERNEL && !SMP) */
475 #define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \
476 static __inline u_##TYPE \
477 atomic_load_acq_##TYPE(volatile u_##TYPE *p) \
481 __asm __volatile(MPLOCKED LOP \
482 : "=a" (res), /* 0 */ \
491 * The XCHG instruction asserts LOCK automagically. \
493 static __inline void \
494 atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
496 __asm __volatile(SOP \
497 : "=m" (*p), /* 0 */ \
499 : "m" (*p)); /* 2 */ \
503 #endif /* _KERNEL && !SMP */
505 #endif /* !KLD_MODULE */
507 ATOMIC_STORE_LOAD(char, "cmpxchgb %b0,%1", "xchgb %b1,%0");
508 ATOMIC_STORE_LOAD(short,"cmpxchgw %w0,%1", "xchgw %w1,%0");
509 ATOMIC_STORE_LOAD(int, "cmpxchgl %0,%1", "xchgl %1,%0");
510 ATOMIC_STORE_LOAD(long, "cmpxchgq %0,%1", "xchgq %1,%0");
513 #undef ATOMIC_STORE_LOAD
515 /* Acquire and release variants are identical to the normal ones. */
516 #define atomic_set_acq_char atomic_set_char
517 #define atomic_set_rel_char atomic_set_char
518 #define atomic_clear_acq_char atomic_clear_char
519 #define atomic_clear_rel_char atomic_clear_char
520 #define atomic_add_acq_char atomic_add_char
521 #define atomic_add_rel_char atomic_add_char
522 #define atomic_subtract_acq_char atomic_subtract_char
523 #define atomic_subtract_rel_char atomic_subtract_char
525 #define atomic_set_acq_short atomic_set_short
526 #define atomic_set_rel_short atomic_set_short
527 #define atomic_clear_acq_short atomic_clear_short
528 #define atomic_clear_rel_short atomic_clear_short
529 #define atomic_add_acq_short atomic_add_short
530 #define atomic_add_rel_short atomic_add_short
531 #define atomic_subtract_acq_short atomic_subtract_short
532 #define atomic_subtract_rel_short atomic_subtract_short
534 #define atomic_set_acq_int atomic_set_int
535 #define atomic_set_rel_int atomic_set_int
536 #define atomic_clear_acq_int atomic_clear_int
537 #define atomic_clear_rel_int atomic_clear_int
538 #define atomic_add_acq_int atomic_add_int
539 #define atomic_add_rel_int atomic_add_int
540 #define atomic_subtract_acq_int atomic_subtract_int
541 #define atomic_subtract_rel_int atomic_subtract_int
542 #define atomic_cmpset_acq_int atomic_cmpset_int
543 #define atomic_cmpset_rel_int atomic_cmpset_int
545 #define atomic_set_acq_long atomic_set_long
546 #define atomic_set_rel_long atomic_set_long
547 #define atomic_clear_acq_long atomic_clear_long
548 #define atomic_clear_rel_long atomic_clear_long
549 #define atomic_add_acq_long atomic_add_long
550 #define atomic_add_rel_long atomic_add_long
551 #define atomic_subtract_acq_long atomic_subtract_long
552 #define atomic_subtract_rel_long atomic_subtract_long
553 #define atomic_cmpset_acq_long atomic_cmpset_long
554 #define atomic_cmpset_rel_long atomic_cmpset_long
556 /* Operations on 8-bit bytes. */
557 #define atomic_set_8 atomic_set_char
558 #define atomic_set_acq_8 atomic_set_acq_char
559 #define atomic_set_rel_8 atomic_set_rel_char
560 #define atomic_clear_8 atomic_clear_char
561 #define atomic_clear_acq_8 atomic_clear_acq_char
562 #define atomic_clear_rel_8 atomic_clear_rel_char
563 #define atomic_add_8 atomic_add_char
564 #define atomic_add_acq_8 atomic_add_acq_char
565 #define atomic_add_rel_8 atomic_add_rel_char
566 #define atomic_subtract_8 atomic_subtract_char
567 #define atomic_subtract_acq_8 atomic_subtract_acq_char
568 #define atomic_subtract_rel_8 atomic_subtract_rel_char
569 #define atomic_load_acq_8 atomic_load_acq_char
570 #define atomic_store_rel_8 atomic_store_rel_char
572 /* Operations on 16-bit words. */
573 #define atomic_set_16 atomic_set_short
574 #define atomic_set_acq_16 atomic_set_acq_short
575 #define atomic_set_rel_16 atomic_set_rel_short
576 #define atomic_clear_16 atomic_clear_short
577 #define atomic_clear_acq_16 atomic_clear_acq_short
578 #define atomic_clear_rel_16 atomic_clear_rel_short
579 #define atomic_add_16 atomic_add_short
580 #define atomic_add_acq_16 atomic_add_acq_short
581 #define atomic_add_rel_16 atomic_add_rel_short
582 #define atomic_subtract_16 atomic_subtract_short
583 #define atomic_subtract_acq_16 atomic_subtract_acq_short
584 #define atomic_subtract_rel_16 atomic_subtract_rel_short
585 #define atomic_load_acq_16 atomic_load_acq_short
586 #define atomic_store_rel_16 atomic_store_rel_short
588 /* Operations on 32-bit double words. */
589 #define atomic_set_32 atomic_set_int
590 #define atomic_set_acq_32 atomic_set_acq_int
591 #define atomic_set_rel_32 atomic_set_rel_int
592 #define atomic_clear_32 atomic_clear_int
593 #define atomic_clear_acq_32 atomic_clear_acq_int
594 #define atomic_clear_rel_32 atomic_clear_rel_int
595 #define atomic_add_32 atomic_add_int
596 #define atomic_add_acq_32 atomic_add_acq_int
597 #define atomic_add_rel_32 atomic_add_rel_int
598 #define atomic_subtract_32 atomic_subtract_int
599 #define atomic_subtract_acq_32 atomic_subtract_acq_int
600 #define atomic_subtract_rel_32 atomic_subtract_rel_int
601 #define atomic_load_acq_32 atomic_load_acq_int
602 #define atomic_store_rel_32 atomic_store_rel_int
603 #define atomic_cmpset_32 atomic_cmpset_int
604 #define atomic_cmpset_acq_32 atomic_cmpset_acq_int
605 #define atomic_cmpset_rel_32 atomic_cmpset_rel_int
606 #define atomic_readandclear_32 atomic_readandclear_int
607 #define atomic_fetchadd_32 atomic_fetchadd_int
609 /* Operations on pointers. */
610 #define atomic_set_ptr(p, v) \
611 atomic_set_long((volatile u_long *)(p), (u_long)(v))
612 #define atomic_set_acq_ptr(p, v) \
613 atomic_set_acq_long((volatile u_long *)(p), (u_long)(v))
614 #define atomic_set_rel_ptr(p, v) \
615 atomic_set_rel_long((volatile u_long *)(p), (u_long)(v))
616 #define atomic_clear_ptr(p, v) \
617 atomic_clear_long((volatile u_long *)(p), (u_long)(v))
618 #define atomic_clear_acq_ptr(p, v) \
619 atomic_clear_acq_long((volatile u_long *)(p), (u_long)(v))
620 #define atomic_clear_rel_ptr(p, v) \
621 atomic_clear_rel_long((volatile u_long *)(p), (u_long)(v))
622 #define atomic_add_ptr(p, v) \
623 atomic_add_long((volatile u_long *)(p), (u_long)(v))
624 #define atomic_add_acq_ptr(p, v) \
625 atomic_add_acq_long((volatile u_long *)(p), (u_long)(v))
626 #define atomic_add_rel_ptr(p, v) \
627 atomic_add_rel_long((volatile u_long *)(p), (u_long)(v))
628 #define atomic_subtract_ptr(p, v) \
629 atomic_subtract_long((volatile u_long *)(p), (u_long)(v))
630 #define atomic_subtract_acq_ptr(p, v) \
631 atomic_subtract_acq_long((volatile u_long *)(p), (u_long)(v))
632 #define atomic_subtract_rel_ptr(p, v) \
633 atomic_subtract_rel_long((volatile u_long *)(p), (u_long)(v))
634 #define atomic_load_acq_ptr(p) \
635 atomic_load_acq_long((volatile u_long *)(p))
636 #define atomic_store_rel_ptr(p, v) \
637 atomic_store_rel_long((volatile u_long *)(p), (v))
638 #define atomic_cmpset_ptr(dst, old, new) \
639 atomic_cmpset_long((volatile u_long *)(dst), (u_long)(old), \
641 #define atomic_cmpset_acq_ptr(dst, old, new) \
642 atomic_cmpset_acq_long((volatile u_long *)(dst), (u_long)(old), \
644 #define atomic_cmpset_rel_ptr(dst, old, new) \
645 atomic_cmpset_rel_long((volatile u_long *)(dst), (u_long)(old), \
647 #define atomic_readandclear_ptr(p) \
648 atomic_readandclear_long((volatile u_long *)(p))
650 #endif /* ! _CPU_ATOMIC_H_ */