2 * Copyright (c) 2007 The DragonFly Project. All rights reserved.
4 * This code is derived from software contributed to The DragonFly Project
5 * by Sepherosa Ziehau <sepherosa@gmail.com>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 #include <sys/param.h>
36 #include <sys/bitops.h>
37 #include <sys/endian.h>
38 #include <sys/kernel.h>
40 #include <sys/firmware.h>
41 #include <sys/malloc.h>
44 #include <sys/serialize.h>
45 #include <sys/socket.h>
46 #include <sys/sockio.h>
47 #include <sys/sysctl.h>
49 #include <net/ethernet.h>
52 #include <net/if_arp.h>
53 #include <net/if_dl.h>
54 #include <net/if_media.h>
55 #include <net/ifq_var.h>
57 #include <netproto/802_11/ieee80211_radiotap.h>
58 #include <netproto/802_11/ieee80211_var.h>
59 #include <netproto/802_11/wlan_ratectl/onoe/ieee80211_onoe_param.h>
61 #include <bus/pci/pcireg.h>
62 #include <bus/pci/pcivar.h>
63 #include <bus/pci/pcidevs.h>
65 #include <dev/netif/bwi/if_bwireg.h>
66 #include <dev/netif/bwi/if_bwivar.h>
67 #include <dev/netif/bwi/bwiphy.h>
68 #include <dev/netif/bwi/bwirf.h>
69 #include <dev/netif/bwi/bwimac.h>
71 struct bwi_retry_lim {
78 static int bwi_mac_test(struct bwi_mac *);
79 static int bwi_mac_get_property(struct bwi_mac *);
81 static void bwi_mac_set_retry_lim(struct bwi_mac *,
82 const struct bwi_retry_lim *);
83 static void bwi_mac_set_ackrates(struct bwi_mac *,
84 const struct ieee80211_rateset *);
86 static int bwi_mac_gpio_init(struct bwi_mac *);
87 static int bwi_mac_gpio_fini(struct bwi_mac *);
88 static void bwi_mac_opmode_init(struct bwi_mac *);
89 static void bwi_mac_hostflags_init(struct bwi_mac *);
90 static void bwi_mac_bss_param_init(struct bwi_mac *);
92 static int bwi_mac_fw_alloc(struct bwi_mac *);
93 static void bwi_mac_fw_free(struct bwi_mac *);
94 static int bwi_mac_fw_load(struct bwi_mac *);
95 static int bwi_mac_fw_init(struct bwi_mac *);
96 static int bwi_mac_fw_load_iv(struct bwi_mac *, const struct fw_image *);
98 static void bwi_mac_setup_tpctl(struct bwi_mac *);
99 static void bwi_mac_adjust_tpctl(struct bwi_mac *, int, int);
101 static void bwi_mac_lock(struct bwi_mac *);
102 static void bwi_mac_unlock(struct bwi_mac *);
104 static const uint8_t bwi_sup_macrev[] = { 2, 4, 5, 6, 7, 9, 10 };
107 bwi_tmplt_write_4(struct bwi_mac *mac, uint32_t ofs, uint32_t val)
109 struct bwi_softc *sc = mac->mac_sc;
111 if (mac->mac_flags & BWI_MAC_F_BSWAP)
114 CSR_WRITE_4(sc, BWI_MAC_TMPLT_CTRL, ofs);
115 CSR_WRITE_4(sc, BWI_MAC_TMPLT_DATA, val);
119 bwi_hostflags_write(struct bwi_mac *mac, uint64_t flags)
123 val = flags & 0xffff;
124 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_HFLAGS_LO, val);
126 val = (flags >> 16) & 0xffff;
127 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_HFLAGS_MI, val);
129 /* HI has unclear meaning, so leave it as it is */
133 bwi_hostflags_read(struct bwi_mac *mac)
137 /* HI has unclear meaning, so don't touch it */
140 val = MOBJ_READ_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_HFLAGS_MI);
143 val = MOBJ_READ_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_HFLAGS_LO);
150 bwi_memobj_read_2(struct bwi_mac *mac, uint16_t obj_id, uint16_t ofs0)
152 struct bwi_softc *sc = mac->mac_sc;
156 data_reg = BWI_MOBJ_DATA;
160 data_reg = BWI_MOBJ_DATA_UNALIGN;
162 CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
163 return CSR_READ_2(sc, data_reg);
167 bwi_memobj_read_4(struct bwi_mac *mac, uint16_t obj_id, uint16_t ofs0)
169 struct bwi_softc *sc = mac->mac_sc;
176 CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
177 ret = CSR_READ_2(sc, BWI_MOBJ_DATA_UNALIGN);
180 CSR_WRITE_4(sc, BWI_MOBJ_CTRL,
181 BWI_MOBJ_CTRL_VAL(obj_id, ofs + 1));
182 ret |= CSR_READ_2(sc, BWI_MOBJ_DATA);
186 CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
187 return CSR_READ_4(sc, BWI_MOBJ_DATA);
192 bwi_memobj_write_2(struct bwi_mac *mac, uint16_t obj_id, uint16_t ofs0,
195 struct bwi_softc *sc = mac->mac_sc;
199 data_reg = BWI_MOBJ_DATA;
203 data_reg = BWI_MOBJ_DATA_UNALIGN;
205 CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
206 CSR_WRITE_2(sc, data_reg, v);
210 bwi_memobj_write_4(struct bwi_mac *mac, uint16_t obj_id, uint16_t ofs0,
213 struct bwi_softc *sc = mac->mac_sc;
218 CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
219 CSR_WRITE_2(sc, BWI_MOBJ_DATA_UNALIGN, v >> 16);
221 CSR_WRITE_4(sc, BWI_MOBJ_CTRL,
222 BWI_MOBJ_CTRL_VAL(obj_id, ofs + 1));
223 CSR_WRITE_2(sc, BWI_MOBJ_DATA, v & 0xffff);
225 CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
226 CSR_WRITE_4(sc, BWI_MOBJ_DATA, v);
231 bwi_mac_lateattach(struct bwi_mac *mac)
235 if (mac->mac_rev >= 5)
236 CSR_READ_4(mac->mac_sc, BWI_STATE_HI); /* dummy read */
238 bwi_mac_reset(mac, 1);
240 error = bwi_phy_attach(mac);
244 error = bwi_rf_attach(mac);
248 /* Link 11B/G PHY, unlink 11A PHY */
249 if (mac->mac_phy.phy_mode == IEEE80211_MODE_11A)
250 bwi_mac_reset(mac, 0);
252 bwi_mac_reset(mac, 1);
254 error = bwi_mac_test(mac);
258 error = bwi_mac_get_property(mac);
262 error = bwi_rf_map_txpower(mac);
267 CSR_WRITE_2(mac->mac_sc, BWI_BBP_ATTEN, BWI_BBP_ATTEN_MAGIC);
268 bwi_regwin_disable(mac->mac_sc, &mac->mac_regwin, 0);
274 bwi_mac_init(struct bwi_mac *mac)
276 struct bwi_softc *sc = mac->mac_sc;
279 /* Clear MAC/PHY/RF states */
280 bwi_mac_setup_tpctl(mac);
281 bwi_rf_clear_state(&mac->mac_rf);
282 bwi_phy_clear_state(&mac->mac_phy);
284 /* Enable MAC and linked it to PHY */
285 if (!bwi_regwin_is_enabled(sc, &mac->mac_regwin))
286 bwi_mac_reset(mac, 1);
288 /* Initialize backplane */
289 error = bwi_bus_init(sc, mac);
293 /* XXX work around for hardware bugs? */
294 if (sc->sc_bus_regwin.rw_rev <= 5 &&
295 sc->sc_bus_regwin.rw_type != BWI_REGWIN_T_BUSPCIE) {
296 CSR_SETBITS_4(sc, BWI_CONF_LO,
297 __SHIFTIN(BWI_CONF_LO_SERVTO, BWI_CONF_LO_SERVTO_MASK) |
298 __SHIFTIN(BWI_CONF_LO_REQTO, BWI_CONF_LO_REQTO_MASK));
302 error = bwi_phy_calibrate(mac);
304 if_printf(&sc->sc_ic.ic_if, "PHY calibrate failed\n");
308 /* Prepare to initialize firmware */
309 CSR_WRITE_4(sc, BWI_MAC_STATUS,
310 BWI_MAC_STATUS_UCODE_JUMP0 |
311 BWI_MAC_STATUS_IHREN);
314 * Load and initialize firmwares
316 error = bwi_mac_fw_alloc(mac);
320 error = bwi_mac_fw_load(mac);
324 error = bwi_mac_gpio_init(mac);
328 error = bwi_mac_fw_init(mac);
337 /* TODO: LED, hardware rf enabled is only related to LED setting */
342 CSR_WRITE_2(sc, BWI_BBP_ATTEN, 0);
345 /* TODO: interference mitigation */
350 bwi_rf_set_ant_mode(mac, mac->mac_rf.rf_ant_mode);
353 * Initialize operation mode (RX configuration)
355 bwi_mac_opmode_init(mac);
357 /* XXX what's these */
358 if (mac->mac_rev < 3) {
359 CSR_WRITE_2(sc, 0x60e, 0);
360 CSR_WRITE_2(sc, 0x610, 0x8000);
361 CSR_WRITE_2(sc, 0x604, 0);
362 CSR_WRITE_2(sc, 0x606, 0x200);
364 CSR_WRITE_4(sc, 0x188, 0x80000000);
365 CSR_WRITE_4(sc, 0x18c, 0x2000000);
369 * Initialize TX/RX interrupts' mask
371 CSR_WRITE_4(sc, BWI_MAC_INTR_STATUS, BWI_INTR_TIMER1);
372 for (i = 0; i < BWI_TXRX_NRING; ++i) {
375 if (BWI_TXRX_IS_RX(i))
376 intrs = BWI_TXRX_RX_INTRS;
378 intrs = BWI_TXRX_TX_INTRS;
379 CSR_WRITE_4(sc, BWI_TXRX_INTR_MASK(i), intrs);
382 /* XXX what's this */
383 CSR_SETBITS_4(sc, BWI_STATE_LO, 0x100000);
385 /* Setup MAC power up delay */
386 CSR_WRITE_2(sc, BWI_MAC_POWERUP_DELAY, sc->sc_pwron_delay);
388 /* Set MAC regwin revision */
389 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_MACREV, mac->mac_rev);
392 * Initialize host flags
394 bwi_mac_hostflags_init(mac);
397 * Initialize BSS parameters
399 bwi_mac_bss_param_init(mac);
402 * Initialize TX rings
404 for (i = 0; i < BWI_TX_NRING; ++i) {
405 error = sc->sc_init_tx_ring(sc, i);
407 if_printf(&sc->sc_ic.ic_if,
408 "can't initialize %dth TX ring\n", i);
416 error = sc->sc_init_rx_ring(sc);
418 if_printf(&sc->sc_ic.ic_if, "can't initialize RX ring\n");
423 * Initialize TX stats if the current MAC uses that
425 if (mac->mac_flags & BWI_MAC_F_HAS_TXSTATS) {
426 error = sc->sc_init_txstats(sc);
428 if_printf(&sc->sc_ic.ic_if,
429 "can't initialize TX stats ring\n");
434 /* XXX what's these */
435 CSR_WRITE_2(sc, 0x612, 0x50); /* Force Pre-TBTT to 80? */
436 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, 0x416, 0x50);
437 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, 0x414, 0x1f4);
439 mac->mac_flags |= BWI_MAC_F_INITED;
444 bwi_mac_reset(struct bwi_mac *mac, int link_phy)
446 struct bwi_softc *sc = mac->mac_sc;
447 uint32_t flags, state_lo, status;
449 flags = BWI_STATE_LO_FLAG_PHYRST | BWI_STATE_LO_FLAG_PHYCLKEN;
451 flags |= BWI_STATE_LO_FLAG_PHYLNK;
452 bwi_regwin_enable(sc, &mac->mac_regwin, flags);
455 state_lo = CSR_READ_4(sc, BWI_STATE_LO);
456 state_lo |= BWI_STATE_LO_GATED_CLOCK;
457 state_lo &= ~__SHIFTIN(BWI_STATE_LO_FLAG_PHYRST,
458 BWI_STATE_LO_FLAGS_MASK);
459 CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
460 /* Flush pending bus write */
461 CSR_READ_4(sc, BWI_STATE_LO);
464 state_lo &= ~BWI_STATE_LO_GATED_CLOCK;
465 CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
466 /* Flush pending bus write */
467 CSR_READ_4(sc, BWI_STATE_LO);
470 CSR_WRITE_2(sc, BWI_BBP_ATTEN, 0);
472 status = CSR_READ_4(sc, BWI_MAC_STATUS);
473 status |= BWI_MAC_STATUS_IHREN;
475 status |= BWI_MAC_STATUS_PHYLNK;
477 status &= ~BWI_MAC_STATUS_PHYLNK;
478 CSR_WRITE_4(sc, BWI_MAC_STATUS, status);
481 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_ATTACH | BWI_DBG_INIT,
482 "%s\n", "PHY is linked");
483 mac->mac_phy.phy_flags |= BWI_PHY_F_LINKED;
485 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_ATTACH | BWI_DBG_INIT,
486 "%s\n", "PHY is unlinked");
487 mac->mac_phy.phy_flags &= ~BWI_PHY_F_LINKED;
492 bwi_mac_set_tpctl_11bg(struct bwi_mac *mac, const struct bwi_tpctl *new_tpctl)
494 struct bwi_rf *rf = &mac->mac_rf;
495 struct bwi_tpctl *tpctl = &mac->mac_tpctl;
497 if (new_tpctl != NULL) {
498 KKASSERT(new_tpctl->bbp_atten <= BWI_BBP_ATTEN_MAX);
499 KKASSERT(new_tpctl->rf_atten <=
500 (rf->rf_rev < 6 ? BWI_RF_ATTEN_MAX0
501 : BWI_RF_ATTEN_MAX1));
502 KKASSERT(new_tpctl->tp_ctrl1 <= BWI_TPCTL1_MAX);
504 tpctl->bbp_atten = new_tpctl->bbp_atten;
505 tpctl->rf_atten = new_tpctl->rf_atten;
506 tpctl->tp_ctrl1 = new_tpctl->tp_ctrl1;
509 /* Set BBP attenuation */
510 bwi_phy_set_bbp_atten(mac, tpctl->bbp_atten);
512 /* Set RF attenuation */
513 RF_WRITE(mac, BWI_RFR_ATTEN, tpctl->rf_atten);
514 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_RF_ATTEN,
518 if (rf->rf_type == BWI_RF_T_BCM2050) {
519 RF_FILT_SETBITS(mac, BWI_RFR_TXPWR, ~BWI_RFR_TXPWR1_MASK,
520 __SHIFTIN(tpctl->tp_ctrl1, BWI_RFR_TXPWR1_MASK));
523 /* Adjust RF Local Oscillator */
524 if (mac->mac_phy.phy_mode == IEEE80211_MODE_11G)
525 bwi_rf_lo_adjust(mac, tpctl);
529 bwi_mac_test(struct bwi_mac *mac)
531 struct bwi_softc *sc = mac->mac_sc;
532 uint32_t orig_val, val;
534 #define TEST_VAL1 0xaa5555aa
535 #define TEST_VAL2 0x55aaaa55
537 /* Save it for later restoring */
538 orig_val = MOBJ_READ_4(mac, BWI_COMM_MOBJ, 0);
541 MOBJ_WRITE_4(mac, BWI_COMM_MOBJ, 0, TEST_VAL1);
542 val = MOBJ_READ_4(mac, BWI_COMM_MOBJ, 0);
543 if (val != TEST_VAL1) {
544 device_printf(sc->sc_dev, "TEST1 failed\n");
549 MOBJ_WRITE_4(mac, BWI_COMM_MOBJ, 0, TEST_VAL2);
550 val = MOBJ_READ_4(mac, BWI_COMM_MOBJ, 0);
551 if (val != TEST_VAL2) {
552 device_printf(sc->sc_dev, "TEST2 failed\n");
556 /* Restore to the original value */
557 MOBJ_WRITE_4(mac, BWI_COMM_MOBJ, 0, orig_val);
559 val = CSR_READ_4(sc, BWI_MAC_STATUS);
560 if ((val & ~BWI_MAC_STATUS_PHYLNK) != BWI_MAC_STATUS_IHREN) {
561 device_printf(sc->sc_dev, "%s failed, MAC status 0x%08x\n",
566 val = CSR_READ_4(sc, BWI_MAC_INTR_STATUS);
568 device_printf(sc->sc_dev, "%s failed, intr status %08x\n",
580 bwi_mac_setup_tpctl(struct bwi_mac *mac)
582 struct bwi_softc *sc = mac->mac_sc;
583 struct bwi_rf *rf = &mac->mac_rf;
584 struct bwi_phy *phy = &mac->mac_phy;
585 struct bwi_tpctl *tpctl = &mac->mac_tpctl;
587 /* Calc BBP attenuation */
588 if (rf->rf_type == BWI_RF_T_BCM2050 && rf->rf_rev < 6)
589 tpctl->bbp_atten = 0;
591 tpctl->bbp_atten = 2;
593 /* Calc TX power CTRL1?? */
595 if (rf->rf_type == BWI_RF_T_BCM2050) {
598 else if (rf->rf_rev < 6)
600 else if (rf->rf_rev == 8)
604 /* Empty TX power CTRL2?? */
605 tpctl->tp_ctrl2 = 0xffff;
608 * Calc RF attenuation
610 if (phy->phy_mode == IEEE80211_MODE_11A) {
611 tpctl->rf_atten = 0x60;
615 if (BWI_IS_BRCM_BCM4309G(sc) && sc->sc_pci_revid < 0x51) {
616 tpctl->rf_atten = sc->sc_pci_revid < 0x43 ? 2 : 3;
622 if (rf->rf_type != BWI_RF_T_BCM2050) {
623 if (rf->rf_type == BWI_RF_T_BCM2053 && rf->rf_rev == 1)
629 * NB: If we reaches here and the card is BRCM_BCM4309G,
630 * then the card's PCI revision must >= 0x51
634 switch (rf->rf_rev) {
636 if (phy->phy_mode == IEEE80211_MODE_11G) {
637 if (BWI_IS_BRCM_BCM4309G(sc) || BWI_IS_BRCM_BU4306(sc))
642 if (BWI_IS_BRCM_BCM4309G(sc))
649 if (phy->phy_mode == IEEE80211_MODE_11G) {
651 * NOTE: Order of following conditions is critical
653 if (BWI_IS_BRCM_BCM4309G(sc))
655 else if (BWI_IS_BRCM_BU4306(sc))
657 else if (sc->sc_bbp_id == BWI_BBPID_BCM4320)
670 tpctl->rf_atten = 0x1a;
674 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_INIT | BWI_DBG_TXPOWER,
675 "bbp atten: %u, rf atten: %u, ctrl1: %u, ctrl2: %u\n",
676 tpctl->bbp_atten, tpctl->rf_atten,
677 tpctl->tp_ctrl1, tpctl->tp_ctrl2);
681 bwi_mac_dummy_xmit(struct bwi_mac *mac)
684 static const uint32_t packet_11a[PACKET_LEN] =
685 { 0x000201cc, 0x00d40000, 0x00000000, 0x01000000, 0x00000000 };
686 static const uint32_t packet_11bg[PACKET_LEN] =
687 { 0x000b846e, 0x00d40000, 0x00000000, 0x01000000, 0x00000000 };
689 struct bwi_softc *sc = mac->mac_sc;
690 struct bwi_rf *rf = &mac->mac_rf;
691 const uint32_t *packet;
695 if (mac->mac_phy.phy_mode == IEEE80211_MODE_11A) {
701 packet = packet_11bg;
705 for (i = 0; i < PACKET_LEN; ++i)
706 TMPLT_WRITE_4(mac, i * 4, packet[i]);
708 CSR_READ_4(sc, BWI_MAC_STATUS); /* dummy read */
710 CSR_WRITE_2(sc, 0x568, 0);
711 CSR_WRITE_2(sc, 0x7c0, 0);
712 CSR_WRITE_2(sc, 0x50c, val_50c);
713 CSR_WRITE_2(sc, 0x508, 0);
714 CSR_WRITE_2(sc, 0x50a, 0);
715 CSR_WRITE_2(sc, 0x54c, 0);
716 CSR_WRITE_2(sc, 0x56a, 0x14);
717 CSR_WRITE_2(sc, 0x568, 0x826);
718 CSR_WRITE_2(sc, 0x500, 0);
719 CSR_WRITE_2(sc, 0x502, 0x30);
721 if (rf->rf_type == BWI_RF_T_BCM2050 && rf->rf_rev <= 5)
722 RF_WRITE(mac, 0x51, 0x17);
724 for (i = 0; i < wait_max; ++i) {
725 if (CSR_READ_2(sc, 0x50e) & 0x80)
729 for (i = 0; i < 10; ++i) {
730 if (CSR_READ_2(sc, 0x50e) & 0x400)
734 for (i = 0; i < 10; ++i) {
735 if ((CSR_READ_2(sc, 0x690) & 0x100) == 0)
740 if (rf->rf_type == BWI_RF_T_BCM2050 && rf->rf_rev <= 5)
741 RF_WRITE(mac, 0x51, 0x37);
746 bwi_mac_init_tpctl_11bg(struct bwi_mac *mac)
748 struct bwi_softc *sc = mac->mac_sc;
749 struct bwi_phy *phy = &mac->mac_phy;
750 struct bwi_rf *rf = &mac->mac_rf;
751 struct bwi_tpctl tpctl_orig;
752 int restore_tpctl = 0;
754 KKASSERT(phy->phy_mode != IEEE80211_MODE_11A);
756 if (BWI_IS_BRCM_BU4306(sc))
759 PHY_WRITE(mac, 0x28, 0x8018);
760 CSR_CLRBITS_2(sc, BWI_BBP_ATTEN, 0x20);
762 if (phy->phy_mode == IEEE80211_MODE_11G) {
763 if ((phy->phy_flags & BWI_PHY_F_LINKED) == 0)
765 PHY_WRITE(mac, 0x47a, 0xc111);
767 if (mac->mac_flags & BWI_MAC_F_TPCTL_INITED)
770 if (phy->phy_mode == IEEE80211_MODE_11B && phy->phy_rev >= 2 &&
771 rf->rf_type == BWI_RF_T_BCM2050) {
772 RF_SETBITS(mac, 0x76, 0x84);
774 struct bwi_tpctl tpctl;
776 /* Backup original TX power control variables */
777 bcopy(&mac->mac_tpctl, &tpctl_orig, sizeof(tpctl_orig));
780 bcopy(&mac->mac_tpctl, &tpctl, sizeof(tpctl));
781 tpctl.bbp_atten = 11;
784 if (rf->rf_rev >= 6 && rf->rf_rev <= 8)
790 bwi_mac_set_tpctl_11bg(mac, &tpctl);
793 bwi_mac_dummy_xmit(mac);
795 mac->mac_flags |= BWI_MAC_F_TPCTL_INITED;
796 rf->rf_base_tssi = PHY_READ(mac, 0x29);
797 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_INIT | BWI_DBG_TXPOWER,
798 "base tssi %d\n", rf->rf_base_tssi);
800 if (abs(rf->rf_base_tssi - rf->rf_idle_tssi) >= 20) {
801 if_printf(&sc->sc_ic.ic_if, "base tssi measure failed\n");
802 mac->mac_flags |= BWI_MAC_F_TPCTL_ERROR;
806 bwi_mac_set_tpctl_11bg(mac, &tpctl_orig);
808 RF_CLRBITS(mac, 0x76, 0x84);
810 bwi_rf_clear_tssi(mac);
814 bwi_mac_detach(struct bwi_mac *mac)
816 bwi_mac_fw_free(mac);
820 bwi_fwimage_is_valid(struct bwi_softc *sc, const struct fw_image *fw,
823 const struct bwi_fwhdr *hdr;
824 struct ifnet *ifp = &sc->sc_ic.ic_if;
826 if (fw->fw_imglen < sizeof(*hdr)) {
827 if_printf(ifp, "invalid firmware (%s): invalid size %zu\n",
828 fw->fw_name, fw->fw_imglen);
832 hdr = (const struct bwi_fwhdr *)fw->fw_image;
834 if (fw_type != BWI_FW_T_IV) {
836 * Don't verify IV's size, it has different meaning
838 if (be32toh(hdr->fw_size) != fw->fw_imglen - sizeof(*hdr)) {
840 "invalid firmware (%s): size mismatch, "
842 fw->fw_name, be32toh(hdr->fw_size),
843 fw->fw_imglen - sizeof(*hdr));
848 if (hdr->fw_type != fw_type) {
849 if_printf(ifp, "invalid firmware (%s): type mismatch, "
850 "fw \'%c\', target \'%c\'\n", fw->fw_name,
851 hdr->fw_type, fw_type);
855 if (hdr->fw_gen != BWI_FW_GEN_1) {
856 if_printf(ifp, "invalid firmware (%s): wrong generation, "
857 "fw %d, target %d\n", fw->fw_name,
858 hdr->fw_gen, BWI_FW_GEN_1);
868 bwi_mac_fw_alloc(struct bwi_mac *mac)
870 struct bwi_softc *sc = mac->mac_sc;
871 struct ifnet *ifp = &sc->sc_ic.ic_if;
872 struct fw_image *img;
877 * NB: serializer need to be released before loading firmware
878 * image to avoid possible dead lock
880 ASSERT_SERIALIZED(ifp->if_serializer);
882 if (mac->mac_ucode == NULL) {
883 ksnprintf(fwname, sizeof(fwname), BWI_FW_UCODE_PATH,
885 mac->mac_rev >= 5 ? 5 : mac->mac_rev);
887 lwkt_serialize_exit(ifp->if_serializer);
888 img = firmware_image_load(fwname, NULL);
889 lwkt_serialize_enter(ifp->if_serializer);
891 mac->mac_ucode = img;
892 if (mac->mac_ucode == NULL) {
893 if_printf(ifp, "request firmware %s failed\n", fwname);
897 if (!bwi_fwimage_is_valid(sc, mac->mac_ucode, BWI_FW_T_UCODE))
901 if (mac->mac_pcm == NULL) {
902 ksnprintf(fwname, sizeof(fwname), BWI_FW_PCM_PATH,
904 mac->mac_rev < 5 ? 4 : 5);
906 lwkt_serialize_exit(ifp->if_serializer);
907 img = firmware_image_load(fwname, NULL);
908 lwkt_serialize_enter(ifp->if_serializer);
911 if (mac->mac_pcm == NULL) {
912 if_printf(ifp, "request firmware %s failed\n", fwname);
916 if (!bwi_fwimage_is_valid(sc, mac->mac_pcm, BWI_FW_T_PCM))
920 if (mac->mac_iv == NULL) {
922 if (mac->mac_rev == 2 || mac->mac_rev == 4) {
924 } else if (mac->mac_rev >= 5 && mac->mac_rev <= 10) {
927 if_printf(ifp, "no suitable IV for MAC rev %d\n",
932 ksnprintf(fwname, sizeof(fwname), BWI_FW_IV_PATH,
933 sc->sc_fw_version, idx);
935 lwkt_serialize_exit(ifp->if_serializer);
936 img = firmware_image_load(fwname, NULL);
937 lwkt_serialize_enter(ifp->if_serializer);
940 if (mac->mac_iv == NULL) {
941 if_printf(ifp, "request firmware %s failed\n", fwname);
944 if (!bwi_fwimage_is_valid(sc, mac->mac_iv, BWI_FW_T_IV))
948 if (mac->mac_iv_ext == NULL) {
950 if (mac->mac_rev == 2 || mac->mac_rev == 4 ||
951 mac->mac_rev >= 11) {
954 } else if (mac->mac_rev >= 5 && mac->mac_rev <= 10) {
957 if_printf(ifp, "no suitible ExtIV for MAC rev %d\n",
962 ksnprintf(fwname, sizeof(fwname), BWI_FW_IV_EXT_PATH,
963 sc->sc_fw_version, idx);
965 lwkt_serialize_exit(ifp->if_serializer);
966 img = firmware_image_load(fwname, NULL);
967 lwkt_serialize_enter(ifp->if_serializer);
969 mac->mac_iv_ext = img;
970 if (mac->mac_iv_ext == NULL) {
971 if_printf(ifp, "request firmware %s failed\n", fwname);
974 if (!bwi_fwimage_is_valid(sc, mac->mac_iv_ext, BWI_FW_T_IV))
982 bwi_mac_fw_free(struct bwi_mac *mac)
984 if (mac->mac_ucode != NULL) {
985 firmware_image_unload(mac->mac_ucode);
986 mac->mac_ucode = NULL;
989 if (mac->mac_pcm != NULL) {
990 firmware_image_unload(mac->mac_pcm);
994 if (mac->mac_iv != NULL) {
995 firmware_image_unload(mac->mac_iv);
999 if (mac->mac_iv_ext != NULL) {
1000 firmware_image_unload(mac->mac_iv_ext);
1001 mac->mac_iv_ext = NULL;
1006 bwi_mac_fw_load(struct bwi_mac *mac)
1008 struct bwi_softc *sc = mac->mac_sc;
1009 struct ifnet *ifp = &sc->sc_ic.ic_if;
1017 fw = (const uint32_t *)
1018 ((const uint8_t *)mac->mac_ucode->fw_image + BWI_FWHDR_SZ);
1019 fw_len = (mac->mac_ucode->fw_imglen - BWI_FWHDR_SZ) / sizeof(uint32_t);
1021 CSR_WRITE_4(sc, BWI_MOBJ_CTRL,
1023 BWI_FW_UCODE_MOBJ | BWI_WR_MOBJ_AUTOINC, 0));
1024 for (i = 0; i < fw_len; ++i) {
1025 CSR_WRITE_4(sc, BWI_MOBJ_DATA, be32toh(fw[i]));
1032 fw = (const uint32_t *)
1033 ((const uint8_t *)mac->mac_pcm->fw_image + BWI_FWHDR_SZ);
1034 fw_len = (mac->mac_pcm->fw_imglen - BWI_FWHDR_SZ) / sizeof(uint32_t);
1036 CSR_WRITE_4(sc, BWI_MOBJ_CTRL,
1037 BWI_MOBJ_CTRL_VAL(BWI_FW_PCM_MOBJ, 0x01ea));
1038 CSR_WRITE_4(sc, BWI_MOBJ_DATA, 0x4000);
1040 CSR_WRITE_4(sc, BWI_MOBJ_CTRL,
1041 BWI_MOBJ_CTRL_VAL(BWI_FW_PCM_MOBJ, 0x01eb));
1042 for (i = 0; i < fw_len; ++i) {
1043 CSR_WRITE_4(sc, BWI_MOBJ_DATA, be32toh(fw[i]));
1047 CSR_WRITE_4(sc, BWI_MAC_INTR_STATUS, BWI_ALL_INTRS);
1048 CSR_WRITE_4(sc, BWI_MAC_STATUS,
1049 BWI_MAC_STATUS_UCODE_START |
1050 BWI_MAC_STATUS_IHREN |
1051 BWI_MAC_STATUS_INFRA);
1055 for (i = 0; i < NRETRY; ++i) {
1056 uint32_t intr_status;
1058 intr_status = CSR_READ_4(sc, BWI_MAC_INTR_STATUS);
1059 if (intr_status == BWI_INTR_READY)
1064 if_printf(ifp, "firmware (ucode&pcm) loading timed out\n");
1070 CSR_READ_4(sc, BWI_MAC_INTR_STATUS); /* dummy read */
1072 fw_rev = MOBJ_READ_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_FWREV);
1073 if (fw_rev > BWI_FW_VERSION3_REVMAX) {
1074 if_printf(ifp, "firmware version 4 is not supported yet\n");
1078 if_printf(ifp, "firmware rev 0x%04x, patch level 0x%04x\n", fw_rev,
1079 MOBJ_READ_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_FWPATCHLV));
1084 bwi_mac_gpio_init(struct bwi_mac *mac)
1086 struct bwi_softc *sc = mac->mac_sc;
1087 struct bwi_regwin *old, *gpio_rw;
1088 uint32_t filt, bits;
1091 CSR_CLRBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_GPOSEL_MASK);
1094 CSR_SETBITS_2(sc, BWI_MAC_GPIO_MASK, 0xf);
1098 if (sc->sc_bbp_id == BWI_BBPID_BCM4301) {
1102 if (sc->sc_card_flags & BWI_CARD_F_PA_GPIO9) {
1103 CSR_SETBITS_2(sc, BWI_MAC_GPIO_MASK, 0x200);
1108 gpio_rw = BWI_GPIO_REGWIN(sc);
1109 error = bwi_regwin_switch(sc, gpio_rw, &old);
1113 CSR_FILT_SETBITS_4(sc, BWI_GPIO_CTRL, filt, bits);
1115 return bwi_regwin_switch(sc, old, NULL);
1119 bwi_mac_gpio_fini(struct bwi_mac *mac)
1121 struct bwi_softc *sc = mac->mac_sc;
1122 struct bwi_regwin *old, *gpio_rw;
1125 gpio_rw = BWI_GPIO_REGWIN(sc);
1126 error = bwi_regwin_switch(sc, gpio_rw, &old);
1130 CSR_WRITE_4(sc, BWI_GPIO_CTRL, 0);
1132 return bwi_regwin_switch(sc, old, NULL);
1136 bwi_mac_fw_load_iv(struct bwi_mac *mac, const struct fw_image *fw)
1138 struct bwi_softc *sc = mac->mac_sc;
1139 struct ifnet *ifp = &sc->sc_ic.ic_if;
1140 const struct bwi_fwhdr *hdr;
1141 const struct bwi_fw_iv *iv;
1142 int n, i, iv_img_size;
1144 /* Get the number of IVs in the IV image */
1145 hdr = (const struct bwi_fwhdr *)fw->fw_image;
1146 n = be32toh(hdr->fw_iv_cnt);
1147 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_INIT | BWI_DBG_FIRMWARE,
1148 "IV count %d\n", n);
1150 /* Calculate the IV image size, for later sanity check */
1151 iv_img_size = fw->fw_imglen - sizeof(*hdr);
1153 /* Locate the first IV */
1154 iv = (const struct bwi_fw_iv *)
1155 ((const uint8_t *)fw->fw_image + sizeof(*hdr));
1157 for (i = 0; i < n; ++i) {
1158 uint16_t iv_ofs, ofs;
1161 if (iv_img_size < sizeof(iv->iv_ofs)) {
1162 if_printf(ifp, "invalid IV image, ofs\n");
1165 iv_img_size -= sizeof(iv->iv_ofs);
1166 sz += sizeof(iv->iv_ofs);
1168 iv_ofs = be16toh(iv->iv_ofs);
1170 ofs = __SHIFTOUT(iv_ofs, BWI_FW_IV_OFS_MASK);
1171 if (ofs >= 0x1000) {
1172 if_printf(ifp, "invalid ofs (0x%04x) "
1173 "for %dth iv\n", ofs, i);
1177 if (iv_ofs & BWI_FW_IV_IS_32BIT) {
1180 if (iv_img_size < sizeof(iv->iv_val.val32)) {
1181 if_printf(ifp, "invalid IV image, val32\n");
1184 iv_img_size -= sizeof(iv->iv_val.val32);
1185 sz += sizeof(iv->iv_val.val32);
1187 val32 = be32toh(iv->iv_val.val32);
1188 CSR_WRITE_4(sc, ofs, val32);
1192 if (iv_img_size < sizeof(iv->iv_val.val16)) {
1193 if_printf(ifp, "invalid IV image, val16\n");
1196 iv_img_size -= sizeof(iv->iv_val.val16);
1197 sz += sizeof(iv->iv_val.val16);
1199 val16 = be16toh(iv->iv_val.val16);
1200 CSR_WRITE_2(sc, ofs, val16);
1203 iv = (const struct bwi_fw_iv *)((const uint8_t *)iv + sz);
1206 if (iv_img_size != 0) {
1207 if_printf(ifp, "invalid IV image, size left %d\n", iv_img_size);
1214 bwi_mac_fw_init(struct bwi_mac *mac)
1216 struct ifnet *ifp = &mac->mac_sc->sc_ic.ic_if;
1219 error = bwi_mac_fw_load_iv(mac, mac->mac_iv);
1221 if_printf(ifp, "load IV failed\n");
1225 if (mac->mac_iv_ext != NULL) {
1226 error = bwi_mac_fw_load_iv(mac, mac->mac_iv_ext);
1228 if_printf(ifp, "load ExtIV failed\n");
1234 bwi_mac_opmode_init(struct bwi_mac *mac)
1236 struct bwi_softc *sc = mac->mac_sc;
1237 struct ieee80211com *ic = &sc->sc_ic;
1238 uint32_t mac_status;
1241 CSR_CLRBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_INFRA);
1242 CSR_SETBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_INFRA);
1243 CSR_SETBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_PASS_BCN);
1245 /* Set probe resp timeout to infinite */
1246 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_PROBE_RESP_TO, 0);
1249 * TODO: factor out following part
1252 mac_status = CSR_READ_4(sc, BWI_MAC_STATUS);
1253 mac_status &= ~(BWI_MAC_STATUS_OPMODE_HOSTAP |
1254 BWI_MAC_STATUS_PASS_CTL |
1255 BWI_MAC_STATUS_PASS_BADPLCP |
1256 BWI_MAC_STATUS_PASS_BADFCS |
1257 BWI_MAC_STATUS_PROMISC);
1258 mac_status |= BWI_MAC_STATUS_INFRA;
1260 /* Always turn on PROMISC on old hardware */
1261 if (mac->mac_rev < 5)
1262 mac_status |= BWI_MAC_STATUS_PROMISC;
1264 switch (ic->ic_opmode) {
1265 case IEEE80211_M_IBSS:
1266 mac_status &= ~BWI_MAC_STATUS_INFRA;
1268 case IEEE80211_M_HOSTAP:
1269 mac_status |= BWI_MAC_STATUS_OPMODE_HOSTAP;
1271 case IEEE80211_M_MONITOR:
1273 /* Do you want data from your microwave oven? */
1274 mac_status |= BWI_MAC_STATUS_PASS_CTL |
1275 BWI_MAC_STATUS_PASS_BADPLCP |
1276 BWI_MAC_STATUS_PASS_BADFCS;
1278 mac_status |= BWI_MAC_STATUS_PASS_CTL;
1286 if (ic->ic_if.if_flags & IFF_PROMISC)
1287 mac_status |= BWI_MAC_STATUS_PROMISC;
1289 CSR_WRITE_4(sc, BWI_MAC_STATUS, mac_status);
1291 if (ic->ic_opmode != IEEE80211_M_IBSS &&
1292 ic->ic_opmode != IEEE80211_M_HOSTAP) {
1293 if (sc->sc_bbp_id == BWI_BBPID_BCM4306 && sc->sc_bbp_rev == 3)
1300 CSR_WRITE_2(sc, BWI_MAC_PRE_TBTT, pre_tbtt);
1304 bwi_mac_hostflags_init(struct bwi_mac *mac)
1306 struct bwi_softc *sc = mac->mac_sc;
1307 struct bwi_phy *phy = &mac->mac_phy;
1308 struct bwi_rf *rf = &mac->mac_rf;
1309 uint64_t host_flags;
1311 if (phy->phy_mode == IEEE80211_MODE_11A)
1314 host_flags = HFLAGS_READ(mac);
1315 host_flags |= BWI_HFLAG_SYM_WA;
1317 if (phy->phy_mode == IEEE80211_MODE_11G) {
1318 if (phy->phy_rev == 1)
1319 host_flags |= BWI_HFLAG_GDC_WA;
1320 if (sc->sc_card_flags & BWI_CARD_F_PA_GPIO9)
1321 host_flags |= BWI_HFLAG_OFDM_PA;
1322 } else if (phy->phy_mode == IEEE80211_MODE_11B) {
1323 if (phy->phy_rev >= 2 && rf->rf_type == BWI_RF_T_BCM2050)
1324 host_flags &= ~BWI_HFLAG_GDC_WA;
1326 panic("unknown PHY mode %u", phy->phy_mode);
1329 HFLAGS_WRITE(mac, host_flags);
1333 bwi_mac_bss_param_init(struct bwi_mac *mac)
1335 struct bwi_softc *sc = mac->mac_sc;
1336 struct bwi_phy *phy = &mac->mac_phy;
1337 struct bwi_retry_lim lim;
1341 * Set short/long retry limits
1343 bzero(&lim, sizeof(lim));
1344 lim.shretry = BWI_SHRETRY;
1345 lim.shretry_fb = BWI_SHRETRY_FB;
1346 lim.lgretry = BWI_LGRETRY;
1347 lim.lgretry_fb = BWI_LGRETRY_FB;
1348 bwi_mac_set_retry_lim(mac, &lim);
1351 * Implicitly prevent firmware from sending probe response
1352 * by setting its "probe response timeout" to 1us.
1354 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_PROBE_RESP_TO, 1);
1357 * XXX MAC level acknowledge and CW min/max should depend
1358 * on the char rateset of the IBSS/BSS to join.
1362 * Set MAC level acknowledge rates
1364 bwi_mac_set_ackrates(mac, &sc->sc_ic.ic_sup_rates[phy->phy_mode]);
1369 if (phy->phy_mode == IEEE80211_MODE_11B)
1370 cw_min = IEEE80211_CW_MIN_0;
1372 cw_min = IEEE80211_CW_MIN_1;
1373 MOBJ_WRITE_2(mac, BWI_80211_MOBJ, BWI_80211_MOBJ_CWMIN, cw_min);
1378 MOBJ_WRITE_2(mac, BWI_80211_MOBJ, BWI_80211_MOBJ_CWMAX,
1383 bwi_mac_set_retry_lim(struct bwi_mac *mac, const struct bwi_retry_lim *lim)
1385 /* Short/Long retry limit */
1386 MOBJ_WRITE_2(mac, BWI_80211_MOBJ, BWI_80211_MOBJ_SHRETRY,
1388 MOBJ_WRITE_2(mac, BWI_80211_MOBJ, BWI_80211_MOBJ_LGRETRY,
1391 /* Short/Long retry fallback limit */
1392 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_SHRETRY_FB,
1394 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_LGRETEY_FB,
1399 bwi_mac_set_ackrates(struct bwi_mac *mac, const struct ieee80211_rateset *rs)
1403 /* XXX not standard conforming */
1404 for (i = 0; i < rs->rs_nrates; ++i) {
1405 enum ieee80211_modtype modtype;
1408 modtype = ieee80211_rate2modtype(rs->rs_rates[i]);
1410 case IEEE80211_MODTYPE_DS:
1413 case IEEE80211_MODTYPE_OFDM:
1417 panic("unsupported modtype %u", modtype);
1419 ofs += (bwi_rate2plcp(rs->rs_rates[i]) & 0xf) * 2;
1421 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, ofs + 0x20,
1422 MOBJ_READ_2(mac, BWI_COMM_MOBJ, ofs));
1427 bwi_mac_start(struct bwi_mac *mac)
1429 struct bwi_softc *sc = mac->mac_sc;
1431 CSR_SETBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_ENABLE);
1432 CSR_WRITE_4(sc, BWI_MAC_INTR_STATUS, BWI_INTR_READY);
1434 /* Flush pending bus writes */
1435 CSR_READ_4(sc, BWI_MAC_STATUS);
1436 CSR_READ_4(sc, BWI_MAC_INTR_STATUS);
1438 return bwi_mac_config_ps(mac);
1442 bwi_mac_stop(struct bwi_mac *mac)
1444 struct bwi_softc *sc = mac->mac_sc;
1447 error = bwi_mac_config_ps(mac);
1451 CSR_CLRBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_ENABLE);
1453 /* Flush pending bus write */
1454 CSR_READ_4(sc, BWI_MAC_STATUS);
1456 #define NRETRY 10000
1457 for (i = 0; i < NRETRY; ++i) {
1458 if (CSR_READ_4(sc, BWI_MAC_INTR_STATUS) & BWI_INTR_READY)
1463 if_printf(&sc->sc_ic.ic_if, "can't stop MAC\n");
1472 bwi_mac_config_ps(struct bwi_mac *mac)
1474 struct bwi_softc *sc = mac->mac_sc;
1477 status = CSR_READ_4(sc, BWI_MAC_STATUS);
1479 status &= ~BWI_MAC_STATUS_HW_PS;
1480 status |= BWI_MAC_STATUS_WAKEUP;
1481 CSR_WRITE_4(sc, BWI_MAC_STATUS, status);
1483 /* Flush pending bus write */
1484 CSR_READ_4(sc, BWI_MAC_STATUS);
1486 if (mac->mac_rev >= 5) {
1490 for (i = 0; i < NRETRY; ++i) {
1491 if (MOBJ_READ_2(mac, BWI_COMM_MOBJ,
1492 BWI_COMM_MOBJ_UCODE_STATE) != BWI_UCODE_STATE_PS)
1497 if_printf(&sc->sc_ic.ic_if, "config PS failed\n");
1506 bwi_mac_reset_hwkeys(struct bwi_mac *mac)
1508 /* TODO: firmware crypto */
1509 MOBJ_READ_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_KEYTABLE_OFS);
1513 bwi_mac_shutdown(struct bwi_mac *mac)
1515 struct bwi_softc *sc = mac->mac_sc;
1518 if (mac->mac_flags & BWI_MAC_F_HAS_TXSTATS)
1519 sc->sc_free_txstats(sc);
1521 sc->sc_free_rx_ring(sc);
1523 for (i = 0; i < BWI_TX_NRING; ++i)
1524 sc->sc_free_tx_ring(sc, i);
1530 bwi_mac_gpio_fini(mac);
1532 bwi_rf_off(mac); /* XXX again */
1533 CSR_WRITE_2(sc, BWI_BBP_ATTEN, BWI_BBP_ATTEN_MAGIC);
1534 bwi_regwin_disable(sc, &mac->mac_regwin, 0);
1536 mac->mac_flags &= ~BWI_MAC_F_INITED;
1540 bwi_mac_get_property(struct bwi_mac *mac)
1542 struct bwi_softc *sc = mac->mac_sc;
1543 enum bwi_bus_space old_bus_space;
1549 val = CSR_READ_4(sc, BWI_MAC_STATUS);
1550 if (val & BWI_MAC_STATUS_BSWAP) {
1551 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_ATTACH, "%s\n",
1553 mac->mac_flags |= BWI_MAC_F_BSWAP;
1559 old_bus_space = sc->sc_bus_space;
1561 val = CSR_READ_4(sc, BWI_STATE_HI);
1562 if (__SHIFTOUT(val, BWI_STATE_HI_FLAGS_MASK) &
1563 BWI_STATE_HI_FLAG_64BIT) {
1565 sc->sc_bus_space = BWI_BUS_SPACE_64BIT;
1566 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_ATTACH, "%s\n",
1569 uint32_t txrx_reg = BWI_TXRX_CTRL_BASE + BWI_TX32_CTRL;
1571 CSR_WRITE_4(sc, txrx_reg, BWI_TXRX32_CTRL_ADDRHI_MASK);
1572 if (CSR_READ_4(sc, txrx_reg) & BWI_TXRX32_CTRL_ADDRHI_MASK) {
1574 sc->sc_bus_space = BWI_BUS_SPACE_32BIT;
1575 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_ATTACH, "%s\n",
1579 sc->sc_bus_space = BWI_BUS_SPACE_30BIT;
1580 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_ATTACH, "%s\n",
1585 if (old_bus_space != 0 && old_bus_space != sc->sc_bus_space) {
1586 device_printf(sc->sc_dev, "MACs bus space mismatch!\n");
1593 bwi_mac_updateslot(struct bwi_mac *mac, int shslot)
1597 if (mac->mac_phy.phy_mode == IEEE80211_MODE_11B)
1601 slot_time = IEEE80211_DUR_SHSLOT;
1603 slot_time = IEEE80211_DUR_SLOT;
1605 CSR_WRITE_2(mac->mac_sc, BWI_MAC_SLOTTIME,
1606 slot_time + BWI_MAC_SLOTTIME_ADJUST);
1607 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_SLOTTIME, slot_time);
1611 bwi_mac_attach(struct bwi_softc *sc, int id, uint8_t rev)
1613 struct bwi_mac *mac;
1616 KKASSERT(sc->sc_nmac <= BWI_MAC_MAX && sc->sc_nmac >= 0);
1618 if (sc->sc_nmac == BWI_MAC_MAX) {
1619 device_printf(sc->sc_dev, "too many MACs\n");
1624 * More than one MAC is only supported by BCM4309
1626 if (sc->sc_nmac != 0 &&
1627 pci_get_device(sc->sc_dev) != PCI_PRODUCT_BROADCOM_BCM4309) {
1628 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_ATTACH, "%s\n",
1629 "ignore second MAC");
1633 mac = &sc->sc_mac[sc->sc_nmac];
1635 /* XXX will this happen? */
1636 if (BWI_REGWIN_EXIST(&mac->mac_regwin)) {
1637 device_printf(sc->sc_dev, "%dth MAC already attached\n",
1643 * Test whether the revision of this MAC is supported
1645 for (i = 0; i < NELEM(bwi_sup_macrev); ++i) {
1646 if (bwi_sup_macrev[i] == rev)
1649 if (i == NELEM(bwi_sup_macrev)) {
1650 device_printf(sc->sc_dev, "MAC rev %u is "
1651 "not supported\n", rev);
1655 BWI_CREATE_MAC(mac, sc, id, rev);
1658 if (mac->mac_rev < 5) {
1659 mac->mac_flags |= BWI_MAC_F_HAS_TXSTATS;
1660 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_ATTACH, "%s\n",
1663 mac->mac_flags |= BWI_MAC_F_PHYE_RESET;
1666 device_printf(sc->sc_dev, "MAC: rev %u\n", rev);
1670 static __inline void
1671 bwi_mac_balance_atten(int *bbp_atten0, int *rf_atten0)
1673 int bbp_atten, rf_atten, rf_atten_lim = -1;
1675 bbp_atten = *bbp_atten0;
1676 rf_atten = *rf_atten0;
1679 * RF attenuation affects TX power BWI_RF_ATTEN_FACTOR times
1680 * as much as BBP attenuation, so we try our best to keep RF
1681 * attenuation within range. BBP attenuation will be clamped
1682 * later if it is out of range during balancing.
1684 * BWI_RF_ATTEN_MAX0 is used as RF attenuation upper limit.
1688 * Use BBP attenuation to balance RF attenuation
1692 else if (rf_atten > BWI_RF_ATTEN_MAX0)
1693 rf_atten_lim = BWI_RF_ATTEN_MAX0;
1695 if (rf_atten_lim >= 0) {
1696 bbp_atten += (BWI_RF_ATTEN_FACTOR * (rf_atten - rf_atten_lim));
1697 rf_atten = rf_atten_lim;
1701 * If possible, use RF attenuation to balance BBP attenuation
1702 * NOTE: RF attenuation is still kept within range.
1704 while (rf_atten < BWI_RF_ATTEN_MAX0 && bbp_atten > BWI_BBP_ATTEN_MAX) {
1705 bbp_atten -= BWI_RF_ATTEN_FACTOR;
1708 while (rf_atten > 0 && bbp_atten < 0) {
1709 bbp_atten += BWI_RF_ATTEN_FACTOR;
1713 /* RF attenuation MUST be within range */
1714 KKASSERT(rf_atten >= 0 && rf_atten <= BWI_RF_ATTEN_MAX0);
1717 * Clamp BBP attenuation
1721 else if (bbp_atten > BWI_BBP_ATTEN_MAX)
1722 bbp_atten = BWI_BBP_ATTEN_MAX;
1724 *rf_atten0 = rf_atten;
1725 *bbp_atten0 = bbp_atten;
1729 bwi_mac_adjust_tpctl(struct bwi_mac *mac, int rf_atten_adj, int bbp_atten_adj)
1731 struct bwi_softc *sc = mac->mac_sc;
1732 struct bwi_rf *rf = &mac->mac_rf;
1733 struct bwi_tpctl tpctl;
1734 int bbp_atten, rf_atten, tp_ctrl1;
1736 bcopy(&mac->mac_tpctl, &tpctl, sizeof(tpctl));
1738 /* NOTE: Use signed value to do calulation */
1739 bbp_atten = tpctl.bbp_atten;
1740 rf_atten = tpctl.rf_atten;
1741 tp_ctrl1 = tpctl.tp_ctrl1;
1743 bbp_atten += bbp_atten_adj;
1744 rf_atten += rf_atten_adj;
1746 bwi_mac_balance_atten(&bbp_atten, &rf_atten);
1748 if (rf->rf_type == BWI_RF_T_BCM2050 && rf->rf_rev == 2) {
1749 if (rf_atten <= 1) {
1750 if (tp_ctrl1 == 0) {
1754 } else if (sc->sc_card_flags & BWI_CARD_F_PA_GPIO9) {
1756 (BWI_RF_ATTEN_FACTOR * (rf_atten - 2));
1759 } else if (rf_atten > 4 && tp_ctrl1 != 0) {
1761 if (bbp_atten < 3) {
1769 bwi_mac_balance_atten(&bbp_atten, &rf_atten);
1772 tpctl.bbp_atten = bbp_atten;
1773 tpctl.rf_atten = rf_atten;
1774 tpctl.tp_ctrl1 = tp_ctrl1;
1777 bwi_mac_set_tpctl_11bg(mac, &tpctl);
1778 bwi_mac_unlock(mac);
1782 * http://bcm-specs.sipsolutions.net/RecalculateTransmissionPower
1785 bwi_mac_calibrate_txpower(struct bwi_mac *mac, enum bwi_txpwrcb_type type)
1787 struct bwi_softc *sc = mac->mac_sc;
1788 struct bwi_rf *rf = &mac->mac_rf;
1789 int8_t tssi[4], tssi_avg, cur_txpwr;
1790 int error, i, ofdm_tssi;
1791 int txpwr_diff, rf_atten_adj, bbp_atten_adj;
1793 if (!sc->sc_txpwr_calib)
1796 if (mac->mac_flags & BWI_MAC_F_TPCTL_ERROR) {
1797 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER, "%s\n",
1798 "tpctl error happened, can't set txpower");
1802 if (BWI_IS_BRCM_BU4306(sc)) {
1803 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER, "%s\n",
1804 "BU4306, can't set txpower");
1809 * Save latest TSSI and reset the related memory objects
1812 error = bwi_rf_get_latest_tssi(mac, tssi, BWI_COMM_MOBJ_TSSI_DS);
1814 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER, "%s\n",
1817 if (mac->mac_phy.phy_mode == IEEE80211_MODE_11B) {
1818 if (type == BWI_TXPWR_FORCE) {
1827 error = bwi_rf_get_latest_tssi(mac, tssi,
1828 BWI_COMM_MOBJ_TSSI_OFDM);
1830 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER, "%s\n",
1832 if (type == BWI_TXPWR_FORCE) {
1841 for (i = 0; i < 4; ++i) {
1847 bwi_rf_clear_tssi(mac);
1849 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER,
1850 "tssi0 %d, tssi1 %d, tssi2 %d, tssi3 %d\n",
1851 tssi[0], tssi[1], tssi[2], tssi[3]);
1854 * Calculate RF/BBP attenuation adjustment based on
1855 * the difference between desired TX power and sampled
1858 /* +8 == "each incremented by 1/2" */
1859 tssi_avg = (tssi[0] + tssi[1] + tssi[2] + tssi[3] + 8) / 4;
1860 if (ofdm_tssi && (HFLAGS_READ(mac) & BWI_HFLAG_PWR_BOOST_DS))
1863 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER, "tssi avg %d\n", tssi_avg);
1865 error = bwi_rf_tssi2dbm(mac, tssi_avg, &cur_txpwr);
1868 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER, "current txpower %d\n",
1871 txpwr_diff = rf->rf_txpower_max - cur_txpwr; /* XXX ni_txpower */
1873 rf_atten_adj = -howmany(txpwr_diff, 8);
1874 if (type == BWI_TXPWR_INIT) {
1876 * Move toward EEPROM max TX power as fast as we can
1878 bbp_atten_adj = -txpwr_diff;
1880 bbp_atten_adj = -(txpwr_diff / 2);
1882 bbp_atten_adj -= (BWI_RF_ATTEN_FACTOR * rf_atten_adj);
1884 if (rf_atten_adj == 0 && bbp_atten_adj == 0) {
1885 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER, "%s\n",
1886 "no need to adjust RF/BBP attenuation");
1892 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER,
1893 "rf atten adjust %d, bbp atten adjust %d\n",
1894 rf_atten_adj, bbp_atten_adj);
1895 bwi_mac_adjust_tpctl(mac, rf_atten_adj, bbp_atten_adj);
1900 bwi_mac_lock(struct bwi_mac *mac)
1902 struct bwi_softc *sc = mac->mac_sc;
1903 struct ieee80211com *ic = &sc->sc_ic;
1905 KKASSERT((mac->mac_flags & BWI_MAC_F_LOCKED) == 0);
1907 if (mac->mac_rev < 3)
1909 else if (ic->ic_opmode != IEEE80211_M_HOSTAP)
1910 bwi_mac_config_ps(mac);
1912 CSR_SETBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_RFLOCK);
1914 /* Flush pending bus write */
1915 CSR_READ_4(sc, BWI_MAC_STATUS);
1918 mac->mac_flags |= BWI_MAC_F_LOCKED;
1922 bwi_mac_unlock(struct bwi_mac *mac)
1924 struct bwi_softc *sc = mac->mac_sc;
1925 struct ieee80211com *ic = &sc->sc_ic;
1927 KKASSERT(mac->mac_flags & BWI_MAC_F_LOCKED);
1929 CSR_READ_2(sc, BWI_PHYINFO); /* dummy read */
1931 CSR_CLRBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_RFLOCK);
1933 if (mac->mac_rev < 3)
1935 else if (ic->ic_opmode != IEEE80211_M_HOSTAP)
1936 bwi_mac_config_ps(mac);
1938 mac->mac_flags &= ~BWI_MAC_F_LOCKED;
1942 bwi_mac_set_promisc(struct bwi_mac *mac, int promisc)
1944 struct bwi_softc *sc = mac->mac_sc;
1946 if (mac->mac_rev < 5) /* Promisc is always on */
1950 CSR_SETBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_PROMISC);
1952 CSR_CLRBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_PROMISC);