sys/bus/usb/ehci.c

   1 /*      $NetBSD: ehci.c,v 1.91 2005/02/27 00:27:51 perry Exp $ */
   2 /*      $FreeBSD: src/sys/dev/usb/ehci.c,v 1.36.2.3 2006/09/24 13:39:04 iedowse Exp $   */
   3 /*      $DragonFly: src/sys/bus/usb/ehci.c,v 1.32 2007/06/29 22:56:31 hasso Exp $       */
   4
   5 /*
   6  * Copyright (c) 2004 The NetBSD Foundation, Inc.
   7  * All rights reserved.
   8  *
   9  * This code is derived from software contributed to The NetBSD Foundation
  10  * by Lennart Augustsson (lennart@augustsson.net) and by Charles M. Hannum.
  11  *
  12  * Redistribution and use in source and binary forms, with or without
  13  * modification, are permitted provided that the following conditions
  14  * are met:
  15  * 1. Redistributions of source code must retain the above copyright
  16  *    notice, this list of conditions and the following disclaimer.
  17  * 2. Redistributions in binary form must reproduce the above copyright
  18  *    notice, this list of conditions and the following disclaimer in the
  19  *    documentation and/or other materials provided with the distribution.
  20  * 3. All advertising materials mentioning features or use of this software
  21  *    must display the following acknowledgement:
  22  *        This product includes software developed by the NetBSD
  23  *        Foundation, Inc. and its contributors.
  24  * 4. Neither the name of The NetBSD Foundation nor the names of its
  25  *    contributors may be used to endorse or promote products derived
  26  *    from this software without specific prior written permission.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  29  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  30  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  31  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  32  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  33  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  34  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  35  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  36  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  37  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38  * POSSIBILITY OF SUCH DAMAGE.
  39  */
  40
  41 /*
  42  * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
  43  *
  44  * The EHCI 1.0 spec can be found at
  45  * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
  46  * and the USB 2.0 spec at
  47  * http://www.usb.org/developers/docs/usb_20.zip
  48  *
  49  */
  50
  51 /*
  52  * TODO:
  53  * 1) The EHCI driver lacks support for isochronous transfers, so
  54  *    devices using them don't work.
  55  *
  56  * 2) Interrupt transfer scheduling does not manage the time available
  57  *    in each frame, so it is possible for the transfers to overrun
  58  *    the end of the frame.
  59  *
  60  * 3) Command failures are not recovered correctly.
  61  */
  62
  63 #include <sys/param.h>
  64 #include <sys/systm.h>
  65 #include <sys/malloc.h>
  66 #include <sys/kernel.h>
  67 #include <sys/endian.h>
  68 #include <sys/module.h>
  69 #include <sys/bus.h>
  70 #include <sys/lock.h>
  71 #include <sys/proc.h>
  72 #include <sys/queue.h>
  73 #include <sys/sysctl.h>
  74 #include <sys/thread2.h>
  75
  76 #include <machine/cpu.h>
  77 #include <machine/endian.h>
  78
  79 #include <bus/usb/usb.h>
  80 #include <bus/usb/usbdi.h>
  81 #include <bus/usb/usbdivar.h>
  82 #include <bus/usb/usb_mem.h>
  83 #include <bus/usb/usb_quirks.h>
  84
  85 #include <bus/usb/ehcireg.h>
  86 #include <bus/usb/ehcivar.h>
  87
  88 #define delay(d)                DELAY(d)
  89
  90 #ifdef USB_DEBUG
  91 #define EHCI_DEBUG USB_DEBUG
  92 #define DPRINTF(x)      do { if (ehcidebug) kprintf x; } while (0)
  93 #define DPRINTFN(n,x)   do { if (ehcidebug>(n)) kprintf x; } while (0)
  94 int ehcidebug = 0;
  95 SYSCTL_NODE(_hw_usb, OID_AUTO, ehci, CTLFLAG_RW, 0, "USB ehci");
  96 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, debug, CTLFLAG_RW,
  97            &ehcidebug, 0, "ehci debug level");
  98 #define bitmask_snprintf(q,f,b,l) ksnprintf((b), (l), "%b", (q), (f))
  99 #else
 100 #define DPRINTF(x)
 101 #define DPRINTFN(n,x)
 102 #endif
 103
 104 struct ehci_pipe {
 105         struct usbd_pipe pipe;
 106
 107         ehci_soft_qh_t *sqh;
 108         union {
 109                 ehci_soft_qtd_t *qtd;
 110                 /* ehci_soft_itd_t *itd; */
 111         } tail;
 112         union {
 113                 /* Control pipe */
 114                 struct {
 115                         usb_dma_t reqdma;
 116                         u_int length;
 117                         /*ehci_soft_qtd_t *setup, *data, *stat;*/
 118                 } ctl;
 119                 /* Interrupt pipe */
 120                 struct {
 121                         u_int length;
 122                 } intr;
 123                 /* Bulk pipe */
 124                 struct {
 125                         u_int length;
 126                 } bulk;
 127                 /* Iso pipe */
 128                 /* XXX */
 129         } u;
 130 };
 131
 132 static usbd_status      ehci_open(usbd_pipe_handle);
 133 static void             ehci_poll(struct usbd_bus *);
 134 static void             ehci_softintr(void *);
 135 static int              ehci_intr1(ehci_softc_t *);
 136 static void             ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
 137 static void             ehci_check_intr(ehci_softc_t *, struct ehci_xfer *);
 138 static void             ehci_idone(struct ehci_xfer *);
 139 static void             ehci_timeout(void *);
 140 static void             ehci_timeout_task(void *);
 141 static void             ehci_intrlist_timeout(void *);
 142
 143 static usbd_status      ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
 144 static void             ehci_freem(struct usbd_bus *, usb_dma_t *);
 145
 146 static usbd_xfer_handle ehci_allocx(struct usbd_bus *);
 147 static void             ehci_freex(struct usbd_bus *, usbd_xfer_handle);
 148
 149 static usbd_status      ehci_root_ctrl_transfer(usbd_xfer_handle);
 150 static usbd_status      ehci_root_ctrl_start(usbd_xfer_handle);
 151 static void             ehci_root_ctrl_abort(usbd_xfer_handle);
 152 static void             ehci_root_ctrl_close(usbd_pipe_handle);
 153 static void             ehci_root_ctrl_done(usbd_xfer_handle);
 154
 155 static usbd_status      ehci_root_intr_transfer(usbd_xfer_handle);
 156 static usbd_status      ehci_root_intr_start(usbd_xfer_handle);
 157 static void             ehci_root_intr_abort(usbd_xfer_handle);
 158 static void             ehci_root_intr_close(usbd_pipe_handle);
 159 static void             ehci_root_intr_done(usbd_xfer_handle);
 160
 161 static usbd_status      ehci_device_ctrl_transfer(usbd_xfer_handle);
 162 static usbd_status      ehci_device_ctrl_start(usbd_xfer_handle);
 163 static void             ehci_device_ctrl_abort(usbd_xfer_handle);
 164 static void             ehci_device_ctrl_close(usbd_pipe_handle);
 165 static void             ehci_device_ctrl_done(usbd_xfer_handle);
 166
 167 static usbd_status      ehci_device_bulk_transfer(usbd_xfer_handle);
 168 static usbd_status      ehci_device_bulk_start(usbd_xfer_handle);
 169 static void             ehci_device_bulk_abort(usbd_xfer_handle);
 170 static void             ehci_device_bulk_close(usbd_pipe_handle);
 171 static void             ehci_device_bulk_done(usbd_xfer_handle);
 172
 173 static usbd_status      ehci_device_intr_transfer(usbd_xfer_handle);
 174 static usbd_status      ehci_device_intr_start(usbd_xfer_handle);
 175 static void             ehci_device_intr_abort(usbd_xfer_handle);
 176 static void             ehci_device_intr_close(usbd_pipe_handle);
 177 static void             ehci_device_intr_done(usbd_xfer_handle);
 178
 179 static usbd_status      ehci_device_isoc_transfer(usbd_xfer_handle);
 180 static usbd_status      ehci_device_isoc_start(usbd_xfer_handle);
 181 static void             ehci_device_isoc_abort(usbd_xfer_handle);
 182 static void             ehci_device_isoc_close(usbd_pipe_handle);
 183 static void             ehci_device_isoc_done(usbd_xfer_handle);
 184
 185 static void             ehci_device_clear_toggle(usbd_pipe_handle pipe);
 186 static void             ehci_noop(usbd_pipe_handle pipe);
 187
 188 static int              ehci_str(usb_string_descriptor_t *, int, char *);
 189 static void             ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
 190 static void             ehci_pcd_able(ehci_softc_t *, int);
 191 static void             ehci_pcd_enable(void *);
 192 static void             ehci_disown(ehci_softc_t *, int, int);
 193
 194 static ehci_soft_qh_t  *ehci_alloc_sqh(ehci_softc_t *);
 195 static void             ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
 196
 197 static ehci_soft_qtd_t  *ehci_alloc_sqtd(ehci_softc_t *);
 198 static void             ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
 199 static usbd_status      ehci_alloc_sqtd_chain(struct ehci_pipe *,
 200                             ehci_softc_t *, int, int, usbd_xfer_handle,
 201                             ehci_soft_qtd_t **, ehci_soft_qtd_t **);
 202 static void             ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *,
 203                                             ehci_soft_qtd_t *);
 204
 205 static usbd_status      ehci_device_request(usbd_xfer_handle xfer);
 206
 207 static usbd_status      ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *,
 208                             int ival);
 209
 210 static void             ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
 211 static void             ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
 212                                     ehci_soft_qh_t *);
 213 static void             ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *);
 214 static void             ehci_sync_hc(ehci_softc_t *);
 215
 216 static void             ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
 217 static void             ehci_abort_xfer(usbd_xfer_handle, usbd_status);
 218
 219 #ifdef EHCI_DEBUG
 220 static void             ehci_dump_regs(ehci_softc_t *);
 221 void                    ehci_dump(void);
 222 static ehci_softc_t     *theehci;
 223 static void             ehci_dump_link(ehci_link_t, int);
 224 static void             ehci_dump_sqtds(ehci_soft_qtd_t *);
 225 static void             ehci_dump_sqtd(ehci_soft_qtd_t *);
 226 static void             ehci_dump_qtd(ehci_qtd_t *);
 227 static void             ehci_dump_sqh(ehci_soft_qh_t *);
 228 #ifdef DIAGNOSTIC
 229 static void             ehci_dump_exfer(struct ehci_xfer *);
 230 #endif
 231 #endif
 232
 233 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
 234
 235 #define EHCI_INTR_ENDPT 1
 236
 237 #define ehci_add_intr_list(sc, ex) \
 238         LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext);
 239 #define ehci_del_intr_list(ex) \
 240         do { \
 241                 LIST_REMOVE((ex), inext); \
 242                 (ex)->inext.le_prev = NULL; \
 243         } while (0)
 244 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL)
 245
 246 static struct usbd_bus_methods ehci_bus_methods = {
 247         ehci_open,
 248         ehci_softintr,
 249         ehci_poll,
 250         ehci_allocm,
 251         ehci_freem,
 252         ehci_allocx,
 253         ehci_freex,
 254 };
 255
 256 static struct usbd_pipe_methods ehci_root_ctrl_methods = {
 257         ehci_root_ctrl_transfer,
 258         ehci_root_ctrl_start,
 259         ehci_root_ctrl_abort,
 260         ehci_root_ctrl_close,
 261         ehci_noop,
 262         ehci_root_ctrl_done,
 263 };
 264
 265 static struct usbd_pipe_methods ehci_root_intr_methods = {
 266         ehci_root_intr_transfer,
 267         ehci_root_intr_start,
 268         ehci_root_intr_abort,
 269         ehci_root_intr_close,
 270         ehci_noop,
 271         ehci_root_intr_done,
 272 };
 273
 274 static struct usbd_pipe_methods ehci_device_ctrl_methods = {
 275         ehci_device_ctrl_transfer,
 276         ehci_device_ctrl_start,
 277         ehci_device_ctrl_abort,
 278         ehci_device_ctrl_close,
 279         ehci_noop,
 280         ehci_device_ctrl_done,
 281 };
 282
 283 static struct usbd_pipe_methods ehci_device_intr_methods = {
 284         ehci_device_intr_transfer,
 285         ehci_device_intr_start,
 286         ehci_device_intr_abort,
 287         ehci_device_intr_close,
 288         ehci_device_clear_toggle,
 289         ehci_device_intr_done,
 290 };
 291
 292 static struct usbd_pipe_methods ehci_device_bulk_methods = {
 293         ehci_device_bulk_transfer,
 294         ehci_device_bulk_start,
 295         ehci_device_bulk_abort,
 296         ehci_device_bulk_close,
 297         ehci_device_clear_toggle,
 298         ehci_device_bulk_done,
 299 };
 300
 301 static struct usbd_pipe_methods ehci_device_isoc_methods = {
 302         ehci_device_isoc_transfer,
 303         ehci_device_isoc_start,
 304         ehci_device_isoc_abort,
 305         ehci_device_isoc_close,
 306         ehci_noop,
 307         ehci_device_isoc_done,
 308 };
 309
 310 usbd_status
 311 ehci_init(ehci_softc_t *sc)
 312 {
 313         u_int32_t vers, sparams, cparams, hcr;
 314         u_int i;
 315         usbd_status err;
 316         ehci_soft_qh_t *sqh;
 317         u_int ncomp;
 318         int lev;
 319
 320         DPRINTF(("ehci_init: start\n"));
 321 #ifdef EHCI_DEBUG
 322         theehci = sc;
 323 #endif
 324
 325         sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
 326
 327         vers = EREAD2(sc, EHCI_HCIVERSION);
 328         kprintf("%s: EHCI version %x.%x\n", device_get_nameunit(sc->sc_bus.bdev),
 329                vers >> 8, vers & 0xff);
 330
 331         sparams = EREAD4(sc, EHCI_HCSPARAMS);
 332         DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
 333         sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
 334         ncomp = EHCI_HCS_N_CC(sparams);
 335         if (ncomp != sc->sc_ncomp) {
 336                 kprintf("%s: wrong number of companions (%d != %d)\n",
 337                        device_get_nameunit(sc->sc_bus.bdev),
 338                        ncomp, sc->sc_ncomp);
 339                 if (ncomp < sc->sc_ncomp)
 340                         sc->sc_ncomp = ncomp;
 341         }
 342         if (sc->sc_ncomp > 0) {
 343                 kprintf("%s: companion controller%s, %d port%s each:",
 344                     device_get_nameunit(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "",
 345                     EHCI_HCS_N_PCC(sparams),
 346                     EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
 347                 for (i = 0; i < sc->sc_ncomp; i++)
 348                         kprintf(" %s", device_get_nameunit(sc->sc_comps[i]->bdev));
 349                 kprintf("\n");
 350         }
 351         sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
 352         cparams = EREAD4(sc, EHCI_HCCPARAMS);
 353         DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
 354
 355         if (EHCI_HCC_64BIT(cparams)) {
 356                 /* MUST clear segment register if 64 bit capable. */
 357                 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
 358         }
 359
 360         sc->sc_bus.usbrev = USBREV_2_0;
 361
 362         /* Reset the controller */
 363         DPRINTF(("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev)));
 364         EOWRITE4(sc, EHCI_USBCMD, 0);   /* Halt controller */
 365         usb_delay_ms(&sc->sc_bus, 1);
 366         EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
 367         for (i = 0; i < 100; i++) {
 368                 usb_delay_ms(&sc->sc_bus, 1);
 369                 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
 370                 if (!hcr)
 371                         break;
 372         }
 373         if (hcr) {
 374                 kprintf("%s: reset timeout\n",
 375                     device_get_nameunit(sc->sc_bus.bdev));
 376                 return (USBD_IOERROR);
 377         }
 378
 379         /* frame list size at default, read back what we got and use that */
 380         switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
 381         case 0: sc->sc_flsize = 1024; break;
 382         case 1: sc->sc_flsize = 512; break;
 383         case 2: sc->sc_flsize = 256; break;
 384         case 3: return (USBD_IOERROR);
 385         }
 386         err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t),
 387                            EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
 388         if (err)
 389                 return (err);
 390         DPRINTF(("%s: flsize=%d\n", device_get_nameunit(sc->sc_bus.bdev),sc->sc_flsize));
 391         sc->sc_flist = KERNADDR(&sc->sc_fldma, 0);
 392         EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
 393
 394         /* Set up the bus struct. */
 395         sc->sc_bus.methods = &ehci_bus_methods;
 396         sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
 397
 398         sc->sc_eintrs = EHCI_NORMAL_INTRS;
 399
 400         /*
 401          * Allocate the interrupt dummy QHs. These are arranged to give
 402          * poll intervals that are powers of 2 times 1ms.
 403          */
 404         for (i = 0; i < EHCI_INTRQHS; i++) {
 405                 sqh = ehci_alloc_sqh(sc);
 406                 if (sqh == NULL) {
 407                         err = USBD_NOMEM;
 408                         goto bad1;
 409                 }
 410                 sc->sc_islots[i].sqh = sqh;
 411         }
 412         lev = 0;
 413         for (i = 0; i < EHCI_INTRQHS; i++) {
 414                 if (i == EHCI_IQHIDX(lev + 1, 0))
 415                         lev++;
 416                 sqh = sc->sc_islots[i].sqh;
 417                 if (i == 0) {
 418                         /* The last (1ms) QH terminates. */
 419                         sqh->qh.qh_link = EHCI_NULL;
 420                         sqh->next = NULL;
 421                 } else {
 422                         /* Otherwise the next QH has half the poll interval */
 423                         sqh->next =
 424                             sc->sc_islots[EHCI_IQHIDX(lev - 1, i + 1)].sqh;
 425                         sqh->qh.qh_link = htole32(sqh->next->physaddr |
 426                             EHCI_LINK_QH);
 427                 }
 428                 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
 429                 sqh->qh.qh_endphub = htole32(EHCI_QH_SET_MULT(1));
 430                 sqh->qh.qh_curqtd = EHCI_NULL;
 431                 sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
 432                 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
 433                 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
 434                 sqh->sqtd = NULL;
 435         }
 436         /* Point the frame list at the last level (128ms). */
 437         for (i = 0; i < sc->sc_flsize; i++) {
 438                 sc->sc_flist[i] = htole32(EHCI_LINK_QH |
 439                     sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1,
 440                     i)].sqh->physaddr);
 441         }
 442
 443         /* Allocate dummy QH that starts the async list. */
 444         sqh = ehci_alloc_sqh(sc);
 445         if (sqh == NULL) {
 446                 err = USBD_NOMEM;
 447                 goto bad1;
 448         }
 449         /* Fill the QH */
 450         sqh->qh.qh_endp =
 451             htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
 452         sqh->qh.qh_link =
 453             htole32(sqh->physaddr | EHCI_LINK_QH);
 454         sqh->qh.qh_curqtd = EHCI_NULL;
 455         sqh->prev = sqh; /*It's a circular list.. */
 456         sqh->next = sqh;
 457         /* Fill the overlay qTD */
 458         sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
 459         sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
 460         sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
 461         sqh->sqtd = NULL;
 462 #ifdef EHCI_DEBUG
 463         if (ehcidebug) {
 464                 ehci_dump_sqh(sqh);
 465         }
 466 #endif
 467
 468         /* Point to async list */
 469         sc->sc_async_head = sqh;
 470         EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
 471
 472         callout_init(&sc->sc_tmo_pcd);
 473         callout_init(&sc->sc_tmo_intrlist);
 474
 475         lockinit(&sc->sc_doorbell_lock, "ehcidb", 0, 0);
 476
 477         /* Enable interrupts */
 478         EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
 479
 480         /* Turn on controller */
 481         EOWRITE4(sc, EHCI_USBCMD,
 482                  EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */
 483                  (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
 484                  EHCI_CMD_ASE |
 485                  EHCI_CMD_PSE |
 486                  EHCI_CMD_RS);
 487
 488         /* Take over port ownership */
 489         EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
 490
 491         for (i = 0; i < 100; i++) {
 492                 usb_delay_ms(&sc->sc_bus, 1);
 493                 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
 494                 if (!hcr)
 495                         break;
 496         }
 497         if (hcr) {
 498                 kprintf("%s: run timeout\n", device_get_nameunit(sc->sc_bus.bdev));
 499                 return (USBD_IOERROR);
 500         }
 501
 502         return (USBD_NORMAL_COMPLETION);
 503
 504 #if 0
 505  bad2:
 506         ehci_free_sqh(sc, sc->sc_async_head);
 507 #endif
 508  bad1:
 509         usb_freemem(&sc->sc_bus, &sc->sc_fldma);
 510         return (err);
 511 }
 512
 513 int
 514 ehci_intr(void *v)
 515 {
 516         ehci_softc_t *sc = v;
 517
 518         if (sc->sc_dying || (sc->sc_flags & EHCI_SCFLG_DONEINIT) == 0)
 519                 return (0);
 520
 521         /* If we get an interrupt while polling, then just ignore it. */
 522         if (sc->sc_bus.use_polling) {
 523                 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
 524
 525                 if (intrs)
 526                         EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
 527 #ifdef DIAGNOSTIC
 528                 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n"));
 529 #endif
 530                 return (0);
 531         }
 532
 533         return (ehci_intr1(sc));
 534 }
 535
 536 static int
 537 ehci_intr1(ehci_softc_t *sc)
 538 {
 539         u_int32_t intrs, eintrs;
 540
 541         DPRINTFN(20,("ehci_intr1: enter\n"));
 542
 543         intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
 544         if (!intrs)
 545                 return (0);
 546
 547         eintrs = intrs & sc->sc_eintrs;
 548         DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
 549                      sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
 550                      (u_int)eintrs));
 551         if (!eintrs)
 552                 return (0);
 553
 554         EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
 555         sc->sc_bus.intr_context++;
 556         sc->sc_bus.no_intrs++;
 557         if (eintrs & EHCI_STS_IAA) {
 558                 DPRINTF(("ehci_intr1: door bell\n"));
 559                 wakeup(&sc->sc_async_head);
 560                 eintrs &= ~EHCI_STS_IAA;
 561         }
 562         if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) {
 563                 DPRINTFN(5,("ehci_intr1: %s %s\n",
 564                             eintrs & EHCI_STS_INT ? "INT" : "",
 565                             eintrs & EHCI_STS_ERRINT ? "ERRINT" : ""));
 566                 usb_schedsoftintr(&sc->sc_bus);
 567                 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT);
 568         }
 569         if (eintrs & EHCI_STS_HSE) {
 570                 kprintf("%s: unrecoverable error, controller halted\n",
 571                        device_get_nameunit(sc->sc_bus.bdev));
 572                 /* XXX what else */
 573         }
 574         if (eintrs & EHCI_STS_PCD) {
 575                 ehci_pcd(sc, sc->sc_intrxfer);
 576                 /*
 577                  * Disable PCD interrupt for now, because it will be
 578                  * on until the port has been reset.
 579                  */
 580                 ehci_pcd_able(sc, 0);
 581                 /* Do not allow RHSC interrupts > 1 per second */
 582                 callout_reset(&sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc);
 583                 eintrs &= ~EHCI_STS_PCD;
 584         }
 585
 586         sc->sc_bus.intr_context--;
 587
 588         if (eintrs != 0) {
 589                 /* Block unprocessed interrupts. */
 590                 sc->sc_eintrs &= ~eintrs;
 591                 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
 592                 kprintf("%s: blocking intrs 0x%x\n",
 593                        device_get_nameunit(sc->sc_bus.bdev), eintrs);
 594         }
 595
 596         return (1);
 597 }
 598
 599 void
 600 ehci_pcd_able(ehci_softc_t *sc, int on)
 601 {
 602         DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on));
 603         if (on)
 604                 sc->sc_eintrs |= EHCI_STS_PCD;
 605         else
 606                 sc->sc_eintrs &= ~EHCI_STS_PCD;
 607         EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
 608 }
 609
 610 void
 611 ehci_pcd_enable(void *v_sc)
 612 {
 613         ehci_softc_t *sc = v_sc;
 614
 615         ehci_pcd_able(sc, 1);
 616 }
 617
 618 void
 619 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
 620 {
 621         usbd_pipe_handle pipe;
 622         u_char *p;
 623         int i, m;
 624
 625         if (xfer == NULL) {
 626                 /* Just ignore the change. */
 627                 return;
 628         }
 629
 630         pipe = xfer->pipe;
 631
 632         p = KERNADDR(&xfer->dmabuf, 0);
 633         m = min(sc->sc_noport, xfer->length * 8 - 1);
 634         memset(p, 0, xfer->length);
 635         for (i = 1; i <= m; i++) {
 636                 /* Pick out CHANGE bits from the status reg. */
 637                 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
 638                         p[i/8] |= 1 << (i%8);
 639         }
 640         DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
 641         xfer->actlen = xfer->length;
 642         xfer->status = USBD_NORMAL_COMPLETION;
 643
 644         usb_transfer_complete(xfer);
 645 }
 646
 647 void
 648 ehci_softintr(void *v)
 649 {
 650         ehci_softc_t *sc = v;
 651         struct ehci_xfer *ex, *nextex;
 652
 653         DPRINTFN(10,("%s: ehci_softintr (%d)\n", device_get_nameunit(sc->sc_bus.bdev),
 654                      sc->sc_bus.intr_context));
 655
 656         sc->sc_bus.intr_context++;
 657
 658         /*
 659          * The only explanation I can think of for why EHCI is as brain dead
 660          * as UHCI interrupt-wise is that Intel was involved in both.
 661          * An interrupt just tells us that something is done, we have no
 662          * clue what, so we need to scan through all active transfers. :-(
 663          */
 664         for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) {
 665                 nextex = LIST_NEXT(ex, inext);
 666                 ehci_check_intr(sc, ex);
 667         }
 668
 669         /* Schedule a callout to catch any dropped transactions. */
 670         if ((sc->sc_flags & EHCI_SCFLG_LOSTINTRBUG) &&
 671             !LIST_EMPTY(&sc->sc_intrhead))
 672                 callout_reset(&sc->sc_tmo_intrlist, hz / 5, ehci_intrlist_timeout,
 673                    sc);
 674
 675 #ifdef USB_USE_SOFTINTR
 676         if (sc->sc_softwake) {
 677                 sc->sc_softwake = 0;
 678                 wakeup(&sc->sc_softwake);
 679         }
 680 #endif /* USB_USE_SOFTINTR */
 681
 682         sc->sc_bus.intr_context--;
 683 }
 684
 685 /* Check for an interrupt. */
 686 void
 687 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
 688 {
 689         ehci_soft_qtd_t *sqtd, *lsqtd;
 690         u_int32_t status;
 691
 692         DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex));
 693
 694         if (ex->sqtdstart == NULL) {
 695                 kprintf("ehci_check_intr: sqtdstart=NULL\n");
 696                 return;
 697         }
 698         lsqtd = ex->sqtdend;
 699 #ifdef DIAGNOSTIC
 700         if (lsqtd == NULL) {
 701                 kprintf("ehci_check_intr: lsqtd==0\n");
 702                 return;
 703         }
 704 #endif
 705         /*
 706          * If the last TD is still active we need to check whether there
 707          * is a an error somewhere in the middle, or whether there was a
 708          * short packet (SPD and not ACTIVE).
 709          */
 710         if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) {
 711                 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex));
 712                 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) {
 713                         status = le32toh(sqtd->qtd.qtd_status);
 714                         /* If there's an active QTD the xfer isn't done. */
 715                         if (status & EHCI_QTD_ACTIVE)
 716                                 break;
 717                         /* Any kind of error makes the xfer done. */
 718                         if (status & EHCI_QTD_HALTED)
 719                                 goto done;
 720                         /* We want short packets, and it is short: it's done */
 721                         if (EHCI_QTD_GET_BYTES(status) != 0)
 722                                 goto done;
 723                 }
 724                 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n",
 725                               ex, ex->sqtdstart));
 726                 return;
 727         }
 728  done:
 729         DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex));
 730         callout_stop(&ex->xfer.timeout_handle);
 731         usb_rem_task(ex->xfer.pipe->device, &ex->abort_task);
 732         ehci_idone(ex);
 733 }
 734
 735 void
 736 ehci_idone(struct ehci_xfer *ex)
 737 {
 738         usbd_xfer_handle xfer = &ex->xfer;
 739 #ifdef USB_DEBUG
 740         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
 741 #endif
 742         ehci_soft_qtd_t *sqtd, *lsqtd;
 743         u_int32_t status = 0, nstatus = 0;
 744         int actlen, cerr;
 745
 746         DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex));
 747 #ifdef DIAGNOSTIC
 748         {
 749                 crit_enter();
 750                 if (ex->isdone) {
 751                         crit_exit();
 752 #ifdef EHCI_DEBUG
 753                         kprintf("ehci_idone: ex is done!\n   ");
 754                         ehci_dump_exfer(ex);
 755 #else
 756                         kprintf("ehci_idone: ex=%p is done!\n", ex);
 757 #endif
 758                         return;
 759                 }
 760                 ex->isdone = 1;
 761                 crit_exit();
 762         }
 763 #endif
 764
 765         if (xfer->status == USBD_CANCELLED ||
 766             xfer->status == USBD_TIMEOUT) {
 767                 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer));
 768                 return;
 769         }
 770
 771 #ifdef EHCI_DEBUG
 772         DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe));
 773         if (ehcidebug > 10)
 774                 ehci_dump_sqtds(ex->sqtdstart);
 775 #endif
 776
 777         /* The transfer is done, compute actual length and status. */
 778         lsqtd = ex->sqtdend;
 779         actlen = 0;
 780         for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) {
 781                 nstatus = le32toh(sqtd->qtd.qtd_status);
 782                 if (nstatus & EHCI_QTD_ACTIVE)
 783                         break;
 784
 785                 status = nstatus;
 786                 /* halt is ok if descriptor is last, and complete */
 787                 if (sqtd->qtd.qtd_next == EHCI_NULL &&
 788                     EHCI_QTD_GET_BYTES(status) == 0)
 789                         status &= ~EHCI_QTD_HALTED;
 790                 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP)
 791                         actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
 792         }
 793
 794         cerr = EHCI_QTD_GET_CERR(status);
 795         DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, cerr=%d, "
 796             "status=0x%x\n", xfer->length, actlen, cerr, status));
 797         xfer->actlen = actlen;
 798         if ((status & EHCI_QTD_HALTED) != 0) {
 799 #ifdef EHCI_DEBUG
 800                 char sbuf[128];
 801
 802                 bitmask_snprintf((u_int32_t)status,
 803                     "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR"
 804                     "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
 805
 806                 DPRINTFN(2,
 807                          ("ehci_idone: error, addr=%d, endpt=0x%02x, "
 808                           "status 0x%s\n",
 809                           xfer->pipe->device->address,
 810                           xfer->pipe->endpoint->edesc->bEndpointAddress,
 811                           sbuf));
 812                 if (ehcidebug > 2) {
 813                         ehci_dump_sqh(epipe->sqh);
 814                         ehci_dump_sqtds(ex->sqtdstart);
 815                 }
 816 #endif
 817                 if ((status & EHCI_QTD_BABBLE) == 0 && cerr > 0)
 818                         xfer->status = USBD_STALLED;
 819                 else
 820                         xfer->status = USBD_IOERROR; /* more info XXX */
 821         } else {
 822                 xfer->status = USBD_NORMAL_COMPLETION;
 823         }
 824
 825         usb_transfer_complete(xfer);
 826         DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex));
 827 }
 828
 829 /*
 830  * Wait here until controller claims to have an interrupt.
 831  * Then call ehci_intr and return.  Use timeout to avoid waiting
 832  * too long.
 833  */
 834 void
 835 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
 836 {
 837         int timo = xfer->timeout;
 838         int usecs;
 839         u_int32_t intrs;
 840
 841         xfer->status = USBD_IN_PROGRESS;
 842         for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
 843                 usb_delay_ms(&sc->sc_bus, 1);
 844                 if (sc->sc_dying)
 845                         break;
 846                 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
 847                         sc->sc_eintrs;
 848                 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs));
 849 #ifdef EHCI_DEBUG
 850                 if (ehcidebug > 15)
 851                         ehci_dump_regs(sc);
 852 #endif
 853                 if (intrs) {
 854                         ehci_intr1(sc);
 855                         if (xfer->status != USBD_IN_PROGRESS)
 856                                 return;
 857                 }
 858         }
 859
 860         /* Timeout */
 861         DPRINTF(("ehci_waitintr: timeout\n"));
 862         xfer->status = USBD_TIMEOUT;
 863         usb_transfer_complete(xfer);
 864         /* XXX should free TD */
 865 }
 866
 867 void
 868 ehci_poll(struct usbd_bus *bus)
 869 {
 870         ehci_softc_t *sc = (ehci_softc_t *)bus;
 871 #ifdef EHCI_DEBUG
 872         static int last;
 873         int new;
 874         new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
 875         if (new != last) {
 876                 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
 877                 last = new;
 878         }
 879 #endif
 880
 881         if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
 882                 ehci_intr1(sc);
 883 }
 884
 885 int
 886 ehci_detach(struct ehci_softc *sc, int flags)
 887 {
 888         int rv = 0;
 889
 890         sc->sc_dying = 1;
 891
 892         EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
 893         EOWRITE4(sc, EHCI_USBCMD, 0);
 894         EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
 895         callout_stop(&sc->sc_tmo_intrlist);
 896         callout_stop(&sc->sc_tmo_pcd);
 897
 898         usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
 899
 900         usb_freemem(&sc->sc_bus, &sc->sc_fldma);
 901         /* XXX free other data structures XXX */
 902
 903         return (rv);
 904 }
 905
 906 /*
 907  * Handle suspend/resume.
 908  *
 909  * We need to switch to polling mode here, because this routine is
 910  * called from an interrupt context.  This is all right since we
 911  * are almost suspended anyway.
 912  */
 913 void
 914 ehci_power(int why, void *v)
 915 {
 916         ehci_softc_t *sc = v;
 917         u_int32_t cmd, hcr;
 918         int i;
 919
 920 #ifdef EHCI_DEBUG
 921         DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
 922         if (ehcidebug > 0)
 923                 ehci_dump_regs(sc);
 924 #endif
 925
 926         crit_enter();
 927
 928         switch (why) {
 929         case PWR_SUSPEND:
 930                 sc->sc_bus.use_polling++;
 931
 932                 for (i = 1; i <= sc->sc_noport; i++) {
 933                         cmd = EOREAD4(sc, EHCI_PORTSC(i));
 934                         if ((cmd & EHCI_PS_PO) == 0 &&
 935                             (cmd & EHCI_PS_PE) == EHCI_PS_PE)
 936                                 EOWRITE4(sc, EHCI_PORTSC(i),
 937                                     cmd | EHCI_PS_SUSP);
 938                 }
 939
 940                 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD);
 941
 942                 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
 943                 EOWRITE4(sc, EHCI_USBCMD, cmd);
 944
 945                 for (i = 0; i < 100; i++) {
 946                         hcr = EOREAD4(sc, EHCI_USBSTS) &
 947                             (EHCI_STS_ASS | EHCI_STS_PSS);
 948                         if (hcr == 0)
 949                                 break;
 950
 951                         usb_delay_ms(&sc->sc_bus, 1);
 952                 }
 953                 if (hcr != 0) {
 954                         kprintf("%s: reset timeout\n",
 955                             device_get_nameunit(sc->sc_bus.bdev));
 956                 }
 957
 958                 cmd &= ~EHCI_CMD_RS;
 959                 EOWRITE4(sc, EHCI_USBCMD, cmd);
 960
 961                 for (i = 0; i < 100; i++) {
 962                         hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
 963                         if (hcr == EHCI_STS_HCH)
 964                                 break;
 965
 966                         usb_delay_ms(&sc->sc_bus, 1);
 967                 }
 968                 if (hcr != EHCI_STS_HCH) {
 969                         kprintf("%s: config timeout\n",
 970                             device_get_nameunit(sc->sc_bus.bdev));
 971                 }
 972
 973                 sc->sc_bus.use_polling--;
 974                 break;
 975
 976         case PWR_RESUME:
 977                 sc->sc_bus.use_polling++;
 978
 979                 /* restore things in case the bios sucks */
 980                 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
 981                 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
 982                 EOWRITE4(sc, EHCI_ASYNCLISTADDR,
 983                     sc->sc_async_head->physaddr | EHCI_LINK_QH);
 984                 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
 985
 986                 hcr = 0;
 987                 for (i = 1; i <= sc->sc_noport; i++) {
 988                         cmd = EOREAD4(sc, EHCI_PORTSC(i));
 989                         if ((cmd & EHCI_PS_PO) == 0 &&
 990                             (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) {
 991                                 EOWRITE4(sc, EHCI_PORTSC(i),
 992                                     cmd | EHCI_PS_FPR);
 993                                 hcr = 1;
 994                         }
 995                 }
 996
 997                 if (hcr) {
 998                         usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
 999
1000                         for (i = 1; i <= sc->sc_noport; i++) {
1001                                 cmd = EOREAD4(sc, EHCI_PORTSC(i));
1002                                 if ((cmd & EHCI_PS_PO) == 0 &&
1003                                     (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP)
1004                                         EOWRITE4(sc, EHCI_PORTSC(i),
1005                                             cmd & ~EHCI_PS_FPR);
1006                         }
1007                 }
1008
1009                 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd);
1010
1011                 for (i = 0; i < 100; i++) {
1012                         hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
1013                         if (hcr != EHCI_STS_HCH)
1014                                 break;
1015
1016                         usb_delay_ms(&sc->sc_bus, 1);
1017                 }
1018                 if (hcr == EHCI_STS_HCH) {
1019                         kprintf("%s: config timeout\n",
1020                             device_get_nameunit(sc->sc_bus.bdev));
1021                 }
1022
1023                 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1024
1025                 sc->sc_bus.use_polling--;
1026                 break;
1027         }
1028         crit_exit();
1029
1030 #ifdef EHCI_DEBUG
1031         DPRINTF(("ehci_power: sc=%p\n", sc));
1032         if (ehcidebug > 0)
1033                 ehci_dump_regs(sc);
1034 #endif
1035 }
1036
1037 /*
1038  * Shut down the controller when the system is going down.
1039  */
1040 void
1041 ehci_shutdown(void *v)
1042 {
1043         ehci_softc_t *sc = v;
1044
1045         DPRINTF(("ehci_shutdown: stopping the HC\n"));
1046         EOWRITE4(sc, EHCI_USBCMD, 0);   /* Halt controller */
1047         EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
1048 }
1049
1050 usbd_status
1051 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
1052 {
1053         usbd_status err;
1054
1055         err = usb_allocmem(bus, size, 0, dma);
1056 #ifdef EHCI_DEBUG
1057         if (err)
1058                 kprintf("ehci_allocm: usb_allocmem()=%d\n", err);
1059 #endif
1060         return (err);
1061 }
1062
1063 void
1064 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
1065 {
1066         usb_freemem(bus, dma);
1067 }
1068
1069 usbd_xfer_handle
1070 ehci_allocx(struct usbd_bus *bus)
1071 {
1072         struct ehci_softc *sc = (struct ehci_softc *)bus;
1073         usbd_xfer_handle xfer;
1074
1075         xfer = STAILQ_FIRST(&sc->sc_free_xfers);
1076         if (xfer != NULL) {
1077                 STAILQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
1078 #ifdef DIAGNOSTIC
1079                 if (xfer->busy_free != XFER_FREE) {
1080                         kprintf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer,
1081                                xfer->busy_free);
1082                 }
1083 #endif
1084         } else {
1085                 xfer = kmalloc(sizeof(struct ehci_xfer), M_USB, M_INTWAIT);
1086         }
1087         if (xfer != NULL) {
1088                 memset(xfer, 0, sizeof(struct ehci_xfer));
1089                 usb_init_task(&EXFER(xfer)->abort_task, ehci_timeout_task,
1090                     xfer);
1091                 EXFER(xfer)->ehci_xfer_flags = 0;
1092 #ifdef DIAGNOSTIC
1093                 EXFER(xfer)->isdone = 1;
1094                 xfer->busy_free = XFER_BUSY;
1095 #endif
1096         }
1097         return (xfer);
1098 }
1099
1100 void
1101 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
1102 {
1103         struct ehci_softc *sc = (struct ehci_softc *)bus;
1104
1105 #ifdef DIAGNOSTIC
1106         if (xfer->busy_free != XFER_BUSY) {
1107                 kprintf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer,
1108                        xfer->busy_free);
1109                 return;
1110         }
1111         xfer->busy_free = XFER_FREE;
1112         if (!EXFER(xfer)->isdone) {
1113                 kprintf("ehci_freex: !isdone\n");
1114                 return;
1115         }
1116 #endif
1117         STAILQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1118 }
1119
1120 static void
1121 ehci_device_clear_toggle(usbd_pipe_handle pipe)
1122 {
1123         struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1124
1125         DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n",
1126                  epipe, epipe->sqh->qh.qh_qtd.qtd_status));
1127 #ifdef USB_DEBUG
1128         if (ehcidebug)
1129                 usbd_dump_pipe(pipe);
1130 #endif
1131         KASSERT((epipe->sqh->qh.qh_qtd.qtd_status &
1132             htole32(EHCI_QTD_ACTIVE)) == 0,
1133             ("ehci_device_clear_toggle: queue active"));
1134         epipe->sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE_MASK);
1135 }
1136
1137 static void
1138 ehci_noop(usbd_pipe_handle pipe)
1139 {
1140 }
1141
1142 #ifdef EHCI_DEBUG
1143 void
1144 ehci_dump_regs(ehci_softc_t *sc)
1145 {
1146         int i;
1147         kprintf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
1148                EOREAD4(sc, EHCI_USBCMD),
1149                EOREAD4(sc, EHCI_USBSTS),
1150                EOREAD4(sc, EHCI_USBINTR));
1151         kprintf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
1152                EOREAD4(sc, EHCI_FRINDEX),
1153                EOREAD4(sc, EHCI_CTRLDSSEGMENT),
1154                EOREAD4(sc, EHCI_PERIODICLISTBASE),
1155                EOREAD4(sc, EHCI_ASYNCLISTADDR));
1156         for (i = 1; i <= sc->sc_noport; i++)
1157                 kprintf("port %d status=0x%08x\n", i,
1158                        EOREAD4(sc, EHCI_PORTSC(i)));
1159 }
1160
1161 /*
1162  * Unused function - this is meant to be called from a kernel
1163  * debugger.
1164  */
1165 void
1166 ehci_dump(void)
1167 {
1168         ehci_dump_regs(theehci);
1169 }
1170
1171 void
1172 ehci_dump_link(ehci_link_t link, int type)
1173 {
1174         link = le32toh(link);
1175         kprintf("0x%08x", link);
1176         if (link & EHCI_LINK_TERMINATE)
1177                 kprintf("<T>");
1178         else {
1179                 kprintf("<");
1180                 if (type) {
1181                         switch (EHCI_LINK_TYPE(link)) {
1182                         case EHCI_LINK_ITD: kprintf("ITD"); break;
1183                         case EHCI_LINK_QH: kprintf("QH"); break;
1184                         case EHCI_LINK_SITD: kprintf("SITD"); break;
1185                         case EHCI_LINK_FSTN: kprintf("FSTN"); break;
1186                         }
1187                 }
1188                 kprintf(">");
1189         }
1190 }
1191
1192 void
1193 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
1194 {
1195         int i;
1196         u_int32_t stop;
1197
1198         stop = 0;
1199         for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) {
1200                 ehci_dump_sqtd(sqtd);
1201                 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE);
1202         }
1203         if (sqtd)
1204                 kprintf("dump aborted, too many TDs\n");
1205 }
1206
1207 void
1208 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
1209 {
1210         kprintf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
1211         ehci_dump_qtd(&sqtd->qtd);
1212 }
1213
1214 void
1215 ehci_dump_qtd(ehci_qtd_t *qtd)
1216 {
1217         u_int32_t s;
1218         char sbuf[128];
1219
1220         kprintf("  next="); ehci_dump_link(qtd->qtd_next, 0);
1221         kprintf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
1222         kprintf("\n");
1223         s = le32toh(qtd->qtd_status);
1224         bitmask_snprintf(EHCI_QTD_GET_STATUS(s),
1225                          "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR"
1226                          "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
1227         kprintf("  status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
1228                s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
1229                EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
1230         kprintf("    cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
1231                EHCI_QTD_GET_PID(s), sbuf);
1232         for (s = 0; s < 5; s++)
1233                 kprintf("  buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s]));
1234 }
1235
1236 void
1237 ehci_dump_sqh(ehci_soft_qh_t *sqh)
1238 {
1239         ehci_qh_t *qh = &sqh->qh;
1240         u_int32_t endp, endphub;
1241
1242         kprintf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
1243         kprintf("  link="); ehci_dump_link(qh->qh_link, 1); kprintf("\n");
1244         endp = le32toh(qh->qh_endp);
1245         kprintf("  endp=0x%08x\n", endp);
1246         kprintf("    addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
1247                EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
1248                EHCI_QH_GET_ENDPT(endp),  EHCI_QH_GET_EPS(endp),
1249                EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
1250         kprintf("    mpl=0x%x ctl=%d nrl=%d\n",
1251                EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
1252                EHCI_QH_GET_NRL(endp));
1253         endphub = le32toh(qh->qh_endphub);
1254         kprintf("  endphub=0x%08x\n", endphub);
1255         kprintf("    smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
1256                EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
1257                EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
1258                EHCI_QH_GET_MULT(endphub));
1259         kprintf("  curqtd="); ehci_dump_link(qh->qh_curqtd, 0); kprintf("\n");
1260         kprintf("Overlay qTD:\n");
1261         ehci_dump_qtd(&qh->qh_qtd);
1262 }
1263
1264 #ifdef DIAGNOSTIC
1265 static void
1266 ehci_dump_exfer(struct ehci_xfer *ex)
1267 {
1268         kprintf("ehci_dump_exfer: ex=%p\n", ex);
1269 }
1270 #endif
1271 #endif
1272
1273 usbd_status
1274 ehci_open(usbd_pipe_handle pipe)
1275 {
1276         usbd_device_handle dev = pipe->device;
1277         ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
1278         usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1279         u_int8_t addr = dev->address;
1280         u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
1281         struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1282         ehci_soft_qh_t *sqh;
1283         usbd_status err;
1284         int ival, speed, naks;
1285         int hshubaddr, hshubport;
1286
1287         DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1288                      pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1289
1290         if (dev->myhsport) {
1291                 hshubaddr = dev->myhsport->parent->address;
1292                 hshubport = dev->myhsport->portno;
1293         } else {
1294                 hshubaddr = 0;
1295                 hshubport = 0;
1296         }
1297
1298         if (sc->sc_dying)
1299                 return (USBD_IOERROR);
1300
1301         if (addr == sc->sc_addr) {
1302                 switch (ed->bEndpointAddress) {
1303                 case USB_CONTROL_ENDPOINT:
1304                         pipe->methods = &ehci_root_ctrl_methods;
1305                         break;
1306                 case UE_DIR_IN | EHCI_INTR_ENDPT:
1307                         pipe->methods = &ehci_root_intr_methods;
1308                         break;
1309                 default:
1310                         return (USBD_INVAL);
1311                 }
1312                 return (USBD_NORMAL_COMPLETION);
1313         }
1314
1315         /* XXX All this stuff is only valid for async. */
1316         switch (dev->speed) {
1317         case USB_SPEED_LOW:  speed = EHCI_QH_SPEED_LOW;  break;
1318         case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
1319         case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
1320         default: panic("ehci_open: bad device speed %d", dev->speed);
1321         }
1322         if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) {
1323                 kprintf("%s: *** WARNING: opening low/full speed device, this "
1324                        "does not work yet.\n",
1325                        device_get_nameunit(sc->sc_bus.bdev));
1326                 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n",
1327                             hshubaddr, hshubport));
1328                 return USBD_INVAL;
1329         }
1330
1331         naks = 8;               /* XXX */
1332         sqh = ehci_alloc_sqh(sc);
1333         if (sqh == NULL)
1334                 goto bad0;
1335         /* qh_link filled when the QH is added */
1336         sqh->qh.qh_endp = htole32(
1337                 EHCI_QH_SET_ADDR(addr) |
1338                 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) |
1339                 EHCI_QH_SET_EPS(speed) |
1340                 (xfertype == UE_CONTROL ? EHCI_QH_DTC : 0) |
1341                 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
1342                 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
1343                  EHCI_QH_CTL : 0) |
1344                 EHCI_QH_SET_NRL(naks)
1345                 );
1346         sqh->qh.qh_endphub = htole32(
1347                 EHCI_QH_SET_MULT(1) |
1348                 EHCI_QH_SET_HUBA(hshubaddr) |
1349                 EHCI_QH_SET_PORT(hshubport) |
1350                 EHCI_QH_SET_CMASK(0x1c) |
1351                 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x01 : 0)
1352                 );
1353         sqh->qh.qh_curqtd = EHCI_NULL;
1354         /* Fill the overlay qTD */
1355         sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
1356         sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
1357         sqh->qh.qh_qtd.qtd_status =
1358             htole32(EHCI_QTD_SET_TOGGLE(pipe->endpoint->savedtoggle));
1359
1360         epipe->sqh = sqh;
1361
1362         switch (xfertype) {
1363         case UE_CONTROL:
1364                 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
1365                                    0, &epipe->u.ctl.reqdma);
1366 #ifdef EHCI_DEBUG
1367                 if (err)
1368                         kprintf("ehci_open: usb_allocmem()=%d\n", err);
1369 #endif
1370                 if (err)
1371                         goto bad1;
1372                 pipe->methods = &ehci_device_ctrl_methods;
1373                 crit_enter();
1374                 ehci_add_qh(sqh, sc->sc_async_head);
1375                 crit_exit();
1376                 break;
1377         case UE_BULK:
1378                 pipe->methods = &ehci_device_bulk_methods;
1379                 crit_enter();
1380                 ehci_add_qh(sqh, sc->sc_async_head);
1381                 crit_exit();
1382                 break;
1383         case UE_INTERRUPT:
1384                 pipe->methods = &ehci_device_intr_methods;
1385                 ival = pipe->interval;
1386                 if (ival == USBD_DEFAULT_INTERVAL)
1387                         ival = ed->bInterval;
1388                 return (ehci_device_setintr(sc, sqh, ival));
1389         case UE_ISOCHRONOUS:
1390                 pipe->methods = &ehci_device_isoc_methods;
1391                 return (USBD_INVAL);
1392         default:
1393                 return (USBD_INVAL);
1394         }
1395         return (USBD_NORMAL_COMPLETION);
1396
1397  bad1:
1398         ehci_free_sqh(sc, sqh);
1399  bad0:
1400         return (USBD_NOMEM);
1401 }
1402
1403 /*
1404  * Add an ED to the schedule.  Called while in a critical section.
1405  * If in the async schedule, it will always have a next.
1406  * If in the intr schedule it may not.
1407  */
1408 void
1409 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1410 {
1411         sqh->next = head->next;
1412         sqh->prev = head;
1413         sqh->qh.qh_link = head->qh.qh_link;
1414         head->next = sqh;
1415         if (sqh->next)
1416                 sqh->next->prev = sqh;
1417         head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH);
1418
1419 #ifdef EHCI_DEBUG
1420         if (ehcidebug > 5) {
1421                 kprintf("ehci_add_qh:\n");
1422                 ehci_dump_sqh(sqh);
1423         }
1424 #endif
1425 }
1426
1427 /*
1428  * Remove an ED from the schedule.  Called while in a critical section.
1429  * Will always have a 'next' if it's in the async list as it's circular.
1430  */
1431 void
1432 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1433 {
1434         /* XXX */
1435         sqh->prev->qh.qh_link = sqh->qh.qh_link;
1436         sqh->prev->next = sqh->next;
1437         if (sqh->next)
1438                 sqh->next->prev = sqh->prev;
1439         ehci_sync_hc(sc);
1440 }
1441
1442 void
1443 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd)
1444 {
1445         int i;
1446         u_int32_t status;
1447
1448         /* Save toggle bit and ping status. */
1449         status = sqh->qh.qh_qtd.qtd_status &
1450             htole32(EHCI_QTD_TOGGLE_MASK |
1451                     EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE));
1452         /* Set HALTED to make hw leave it alone. */
1453         sqh->qh.qh_qtd.qtd_status =
1454             htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
1455         sqh->qh.qh_curqtd = 0;
1456         sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr);
1457         sqh->qh.qh_qtd.qtd_altnext = 0;
1458         for (i = 0; i < EHCI_QTD_NBUFFERS; i++)
1459                 sqh->qh.qh_qtd.qtd_buffer[i] = 0;
1460         sqh->sqtd = sqtd;
1461         /* Set !HALTED && !ACTIVE to start execution, preserve some fields */
1462         sqh->qh.qh_qtd.qtd_status = status;
1463 }
1464
1465 /*
1466  * Ensure that the HC has released all references to the QH.  We do this
1467  * by asking for a Async Advance Doorbell interrupt and then we wait for
1468  * the interrupt.
1469  * To make this easier we first obtain exclusive use of the doorbell.
1470  */
1471 void
1472 ehci_sync_hc(ehci_softc_t *sc)
1473 {
1474         int error;
1475
1476         if (sc->sc_dying) {
1477                 DPRINTFN(2,("ehci_sync_hc: dying\n"));
1478                 return;
1479         }
1480         DPRINTFN(2,("ehci_sync_hc: enter\n"));
1481         /* get doorbell */
1482         lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE);
1483         crit_enter();
1484         /* ask for doorbell */
1485         EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
1486         DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1487                     EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1488         error = tsleep(&sc->sc_async_head, 0, "ehcidi", hz); /* bell wait */
1489         DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1490                     EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1491         crit_exit();
1492         /* release doorbell */
1493         lockmgr(&sc->sc_doorbell_lock, LK_RELEASE);
1494 #ifdef DIAGNOSTIC
1495         if (error)
1496                 kprintf("ehci_sync_hc: tsleep() = %d\n", error);
1497 #endif
1498         DPRINTFN(2,("ehci_sync_hc: exit\n"));
1499 }
1500
1501 /***********/
1502
1503 /*
1504  * Data structures and routines to emulate the root hub.
1505  */
1506 static usb_device_descriptor_t ehci_devd = {
1507         USB_DEVICE_DESCRIPTOR_SIZE,
1508         UDESC_DEVICE,           /* type */
1509         {0x00, 0x02},           /* USB version */
1510         UDCLASS_HUB,            /* class */
1511         UDSUBCLASS_HUB,         /* subclass */
1512         UDPROTO_HSHUBSTT,       /* protocol */
1513         64,                     /* max packet */
1514         {0},{0},{0x00,0x01},    /* device id */
1515         1,2,0,                  /* string indicies */
1516         1                       /* # of configurations */
1517 };
1518
1519 static usb_device_qualifier_t ehci_odevd = {
1520         USB_DEVICE_DESCRIPTOR_SIZE,
1521         UDESC_DEVICE_QUALIFIER, /* type */
1522         {0x00, 0x02},           /* USB version */
1523         UDCLASS_HUB,            /* class */
1524         UDSUBCLASS_HUB,         /* subclass */
1525         UDPROTO_FSHUB,          /* protocol */
1526         64,                     /* max packet */
1527         1,                      /* # of configurations */
1528         0
1529 };
1530
1531 static usb_config_descriptor_t ehci_confd = {
1532         USB_CONFIG_DESCRIPTOR_SIZE,
1533         UDESC_CONFIG,
1534         {USB_CONFIG_DESCRIPTOR_SIZE +
1535          USB_INTERFACE_DESCRIPTOR_SIZE +
1536          USB_ENDPOINT_DESCRIPTOR_SIZE},
1537         1,
1538         1,
1539         0,
1540         UC_SELF_POWERED,
1541         0                       /* max power */
1542 };
1543
1544 static usb_interface_descriptor_t ehci_ifcd = {
1545         USB_INTERFACE_DESCRIPTOR_SIZE,
1546         UDESC_INTERFACE,
1547         0,
1548         0,
1549         1,
1550         UICLASS_HUB,
1551         UISUBCLASS_HUB,
1552         UIPROTO_HSHUBSTT,
1553         0
1554 };
1555
1556 static usb_endpoint_descriptor_t ehci_endpd = {
1557         USB_ENDPOINT_DESCRIPTOR_SIZE,
1558         UDESC_ENDPOINT,
1559         UE_DIR_IN | EHCI_INTR_ENDPT,
1560         UE_INTERRUPT,
1561         {8, 0},                 /* max packet */
1562         255
1563 };
1564
1565 static usb_hub_descriptor_t ehci_hubd = {
1566         USB_HUB_DESCRIPTOR_SIZE,
1567         UDESC_HUB,
1568         0,
1569         {0,0},
1570         0,
1571         0,
1572         {0},
1573 };
1574
1575 static int
1576 ehci_str(usb_string_descriptor_t *p, int l, char *s)
1577 {
1578         int i;
1579
1580         if (l == 0)
1581                 return (0);
1582         p->bLength = 2 * strlen(s) + 2;
1583         if (l == 1)
1584                 return (1);
1585         p->bDescriptorType = UDESC_STRING;
1586         l -= 2;
1587         for (i = 0; s[i] && l > 1; i++, l -= 2)
1588                 USETW2(p->bString[i], 0, s[i]);
1589         return (2*i+2);
1590 }
1591
1592 /*
1593  * Simulate a hardware hub by handling all the necessary requests.
1594  */
1595 static usbd_status
1596 ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
1597 {
1598         usbd_status err;
1599
1600         /* Insert last in queue. */
1601         err = usb_insert_transfer(xfer);
1602         if (err)
1603                 return (err);
1604
1605         /* Pipe isn't running, start first */
1606         return (ehci_root_ctrl_start(STAILQ_FIRST(&xfer->pipe->queue)));
1607 }
1608
1609 static usbd_status
1610 ehci_root_ctrl_start(usbd_xfer_handle xfer)
1611 {
1612         ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
1613         usb_device_request_t *req;
1614         void *buf = NULL;
1615         int port, i;
1616         int len, value, index, l, totlen = 0;
1617         usb_port_status_t ps;
1618         usb_hub_descriptor_t hubd;
1619         usbd_status err;
1620         u_int32_t v;
1621
1622         if (sc->sc_dying)
1623                 return (USBD_IOERROR);
1624
1625 #ifdef DIAGNOSTIC
1626         if (!(xfer->rqflags & URQ_REQUEST))
1627                 /* XXX panic */
1628                 return (USBD_INVAL);
1629 #endif
1630         req = &xfer->request;
1631
1632         DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n",
1633                     req->bmRequestType, req->bRequest));
1634
1635         len = UGETW(req->wLength);
1636         value = UGETW(req->wValue);
1637         index = UGETW(req->wIndex);
1638
1639         if (len != 0)
1640                 buf = KERNADDR(&xfer->dmabuf, 0);
1641
1642 #define C(x,y) ((x) | ((y) << 8))
1643         switch(C(req->bRequest, req->bmRequestType)) {
1644         case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1645         case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1646         case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1647                 /*
1648                  * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1649                  * for the integrated root hub.
1650                  */
1651                 break;
1652         case C(UR_GET_CONFIG, UT_READ_DEVICE):
1653                 if (len > 0) {
1654                         *(u_int8_t *)buf = sc->sc_conf;
1655                         totlen = 1;
1656                 }
1657                 break;
1658         case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1659                 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value));
1660                 switch(value >> 8) {
1661                 case UDESC_DEVICE:
1662                         if ((value & 0xff) != 0) {
1663                                 err = USBD_IOERROR;
1664                                 goto ret;
1665                         }
1666                         totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1667                         USETW(ehci_devd.idVendor, sc->sc_id_vendor);
1668                         memcpy(buf, &ehci_devd, l);
1669                         break;
1670                 /*
1671                  * We can't really operate at another speed, but the spec says
1672                  * we need this descriptor.
1673                  */
1674                 case UDESC_DEVICE_QUALIFIER:
1675                         if ((value & 0xff) != 0) {
1676                                 err = USBD_IOERROR;
1677                                 goto ret;
1678                         }
1679                         totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1680                         memcpy(buf, &ehci_odevd, l);
1681                         break;
1682                 /*
1683                  * We can't really operate at another speed, but the spec says
1684                  * we need this descriptor.
1685                  */
1686                 case UDESC_OTHER_SPEED_CONFIGURATION:
1687                 case UDESC_CONFIG:
1688                         if ((value & 0xff) != 0) {
1689                                 err = USBD_IOERROR;
1690                                 goto ret;
1691                         }
1692                         totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1693                         memcpy(buf, &ehci_confd, l);
1694                         ((usb_config_descriptor_t *)buf)->bDescriptorType =
1695                                 value >> 8;
1696                         buf = (char *)buf + l;
1697                         len -= l;
1698                         l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1699                         totlen += l;
1700                         memcpy(buf, &ehci_ifcd, l);
1701                         buf = (char *)buf + l;
1702                         len -= l;
1703                         l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1704                         totlen += l;
1705                         memcpy(buf, &ehci_endpd, l);
1706                         break;
1707                 case UDESC_STRING:
1708                         if (len == 0)
1709                                 break;
1710                         *(u_int8_t *)buf = 0;
1711                         totlen = 1;
1712                         switch (value & 0xff) {
1713                         case 0: /* Language table */
1714                                 totlen = ehci_str(buf, len, "\001");
1715                                 break;
1716                         case 1: /* Vendor */
1717                                 totlen = ehci_str(buf, len, sc->sc_vendor);
1718                                 break;
1719                         case 2: /* Product */
1720                                 totlen = ehci_str(buf, len, "EHCI root hub");
1721                                 break;
1722                         }
1723                         break;
1724                 default:
1725                         err = USBD_IOERROR;
1726                         goto ret;
1727                 }
1728                 break;
1729         case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1730                 if (len > 0) {
1731                         *(u_int8_t *)buf = 0;
1732                         totlen = 1;
1733                 }
1734                 break;
1735         case C(UR_GET_STATUS, UT_READ_DEVICE):
1736                 if (len > 1) {
1737                         USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1738                         totlen = 2;
1739                 }
1740                 break;
1741         case C(UR_GET_STATUS, UT_READ_INTERFACE):
1742         case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1743                 if (len > 1) {
1744                         USETW(((usb_status_t *)buf)->wStatus, 0);
1745                         totlen = 2;
1746                 }
1747                 break;
1748         case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1749                 if (value >= USB_MAX_DEVICES) {
1750                         err = USBD_IOERROR;
1751                         goto ret;
1752                 }
1753                 sc->sc_addr = value;
1754                 break;
1755         case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1756                 if (value != 0 && value != 1) {
1757                         err = USBD_IOERROR;
1758                         goto ret;
1759                 }
1760                 sc->sc_conf = value;
1761                 break;
1762         case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1763                 break;
1764         case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1765         case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1766         case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1767                 err = USBD_IOERROR;
1768                 goto ret;
1769         case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1770                 break;
1771         case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1772                 break;
1773         /* Hub requests */
1774         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1775                 break;
1776         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1777                 DPRINTFN(8, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE "
1778                              "port=%d feature=%d\n",
1779                              index, value));
1780                 if (index < 1 || index > sc->sc_noport) {
1781                         err = USBD_IOERROR;
1782                         goto ret;
1783                 }
1784                 port = EHCI_PORTSC(index);
1785                 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1786                 switch(value) {
1787                 case UHF_PORT_ENABLE:
1788                         EOWRITE4(sc, port, v &~ EHCI_PS_PE);
1789                         break;
1790                 case UHF_PORT_SUSPEND:
1791                         EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
1792                         break;
1793                 case UHF_PORT_POWER:
1794                         EOWRITE4(sc, port, v &~ EHCI_PS_PP);
1795                         break;
1796                 case UHF_PORT_TEST:
1797                         DPRINTFN(2,("ehci_root_ctrl_start: clear port test "
1798                                     "%d\n", index));
1799                         break;
1800                 case UHF_PORT_INDICATOR:
1801                         DPRINTFN(2,("ehci_root_ctrl_start: clear port ind "
1802                                     "%d\n", index));
1803                         EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
1804                         break;
1805                 case UHF_C_PORT_CONNECTION:
1806                         EOWRITE4(sc, port, v | EHCI_PS_CSC);
1807                         break;
1808                 case UHF_C_PORT_ENABLE:
1809                         EOWRITE4(sc, port, v | EHCI_PS_PEC);
1810                         break;
1811                 case UHF_C_PORT_SUSPEND:
1812                         /* how? */
1813                         break;
1814                 case UHF_C_PORT_OVER_CURRENT:
1815                         EOWRITE4(sc, port, v | EHCI_PS_OCC);
1816                         break;
1817                 case UHF_C_PORT_RESET:
1818                         sc->sc_isreset = 0;
1819                         break;
1820                 default:
1821                         err = USBD_IOERROR;
1822                         goto ret;
1823                 }
1824 #if 0
1825                 switch(value) {
1826                 case UHF_C_PORT_CONNECTION:
1827                 case UHF_C_PORT_ENABLE:
1828                 case UHF_C_PORT_SUSPEND:
1829                 case UHF_C_PORT_OVER_CURRENT:
1830                 case UHF_C_PORT_RESET:
1831                         /* Enable RHSC interrupt if condition is cleared. */
1832                         if ((OREAD4(sc, port) >> 16) == 0)
1833                                 ehci_pcd_able(sc, 1);
1834                         break;
1835                 default:
1836                         break;
1837                 }
1838 #endif
1839                 break;
1840         case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1841                 if ((value & 0xff) != 0) {
1842                         err = USBD_IOERROR;
1843                         goto ret;
1844                 }
1845                 hubd = ehci_hubd;
1846                 hubd.bNbrPorts = sc->sc_noport;
1847                 v = EOREAD4(sc, EHCI_HCSPARAMS);
1848                 USETW(hubd.wHubCharacteristics,
1849                     EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
1850                     EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS))
1851                         ? UHD_PORT_IND : 0);
1852                 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
1853                 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1854                         hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
1855                 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1856                 l = min(len, hubd.bDescLength);
1857                 totlen = l;
1858                 memcpy(buf, &hubd, l);
1859                 break;
1860         case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1861                 if (len != 4) {
1862                         err = USBD_IOERROR;
1863                         goto ret;
1864                 }
1865                 memset(buf, 0, len); /* ? XXX */
1866                 totlen = len;
1867                 break;
1868         case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1869                 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n",
1870                             index));
1871                 if (index < 1 || index > sc->sc_noport) {
1872                         err = USBD_IOERROR;
1873                         goto ret;
1874                 }
1875                 if (len != 4) {
1876                         err = USBD_IOERROR;
1877                         goto ret;
1878                 }
1879                 v = EOREAD4(sc, EHCI_PORTSC(index));
1880                 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", v));
1881                 i = UPS_HIGH_SPEED;
1882                 if (v & EHCI_PS_CS)     i |= UPS_CURRENT_CONNECT_STATUS;
1883                 if (v & EHCI_PS_PE)     i |= UPS_PORT_ENABLED;
1884                 if (v & EHCI_PS_SUSP)   i |= UPS_SUSPEND;
1885                 if (v & EHCI_PS_OCA)    i |= UPS_OVERCURRENT_INDICATOR;
1886                 if (v & EHCI_PS_PR)     i |= UPS_RESET;
1887                 if (v & EHCI_PS_PP)     i |= UPS_PORT_POWER;
1888                 USETW(ps.wPortStatus, i);
1889                 i = 0;
1890                 if (v & EHCI_PS_CSC)    i |= UPS_C_CONNECT_STATUS;
1891                 if (v & EHCI_PS_PEC)    i |= UPS_C_PORT_ENABLED;
1892                 if (v & EHCI_PS_OCC)    i |= UPS_C_OVERCURRENT_INDICATOR;
1893                 if (sc->sc_isreset)     i |= UPS_C_PORT_RESET;
1894                 USETW(ps.wPortChange, i);
1895                 l = min(len, sizeof ps);
1896                 memcpy(buf, &ps, l);
1897                 totlen = l;
1898                 break;
1899         case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1900                 err = USBD_IOERROR;
1901                 goto ret;
1902         case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1903                 break;
1904         case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1905                 if (index < 1 || index > sc->sc_noport) {
1906                         err = USBD_IOERROR;
1907                         goto ret;
1908                 }
1909                 port = EHCI_PORTSC(index);
1910                 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1911                 switch(value) {
1912                 case UHF_PORT_ENABLE:
1913                         EOWRITE4(sc, port, v | EHCI_PS_PE);
1914                         break;
1915                 case UHF_PORT_SUSPEND:
1916                         EOWRITE4(sc, port, v | EHCI_PS_SUSP);
1917                         break;
1918                 case UHF_PORT_RESET:
1919                         DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n",
1920                                     index));
1921                         if (EHCI_PS_IS_LOWSPEED(v)) {
1922                                 /* Low speed device, give up ownership. */
1923                                 ehci_disown(sc, index, 1);
1924                                 break;
1925                         }
1926                         /* Start reset sequence. */
1927                         v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
1928                         EOWRITE4(sc, port, v | EHCI_PS_PR);
1929                         /* Wait for reset to complete. */
1930                         usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
1931                         if (sc->sc_dying) {
1932                                 err = USBD_IOERROR;
1933                                 goto ret;
1934                         }
1935                         /* Terminate reset sequence. */
1936                         EOWRITE4(sc, port, v);
1937                         /* Wait for HC to complete reset. */
1938                         usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
1939                         if (sc->sc_dying) {
1940                                 err = USBD_IOERROR;
1941                                 goto ret;
1942                         }
1943                         v = EOREAD4(sc, port);
1944                         DPRINTF(("ehci after reset, status=0x%08x\n", v));
1945                         if (v & EHCI_PS_PR) {
1946                                 kprintf("%s: port reset timeout\n",
1947                                        device_get_nameunit(sc->sc_bus.bdev));
1948                                 return (USBD_TIMEOUT);
1949                         }
1950                         if (!(v & EHCI_PS_PE)) {
1951                                 /* Not a high speed device, give up ownership.*/
1952                                 ehci_disown(sc, index, 0);
1953                                 break;
1954                         }
1955                         sc->sc_isreset = 1;
1956                         DPRINTF(("ehci port %d reset, status = 0x%08x\n",
1957                                  index, v));
1958                         break;
1959                 case UHF_PORT_POWER:
1960                         DPRINTFN(2,("ehci_root_ctrl_start: set port power "
1961                                     "%d\n", index));
1962                         EOWRITE4(sc, port, v | EHCI_PS_PP);
1963                         break;
1964                 case UHF_PORT_TEST:
1965                         DPRINTFN(2,("ehci_root_ctrl_start: set port test "
1966                                     "%d\n", index));
1967                         break;
1968                 case UHF_PORT_INDICATOR:
1969                         DPRINTFN(2,("ehci_root_ctrl_start: set port ind "
1970                                     "%d\n", index));
1971                         EOWRITE4(sc, port, v | EHCI_PS_PIC);
1972                         break;
1973                 default:
1974                         err = USBD_IOERROR;
1975                         goto ret;
1976                 }
1977                 break;
1978         case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
1979         case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
1980         case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
1981         case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
1982                 break;
1983         default:
1984                 err = USBD_IOERROR;
1985                 goto ret;
1986         }
1987         xfer->actlen = totlen;
1988         err = USBD_NORMAL_COMPLETION;
1989  ret:
1990         xfer->status = err;
1991         crit_enter();
1992         usb_transfer_complete(xfer);
1993         crit_exit();
1994         return (USBD_IN_PROGRESS);
1995 }
1996
1997 void
1998 ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
1999 {
2000         int port;
2001         u_int32_t v;
2002
2003         DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
2004 #ifdef DIAGNOSTIC
2005         if (sc->sc_npcomp != 0) {
2006                 int i = (index-1) / sc->sc_npcomp;
2007                 if (i >= sc->sc_ncomp)
2008                         kprintf("%s: strange port\n",
2009                                device_get_nameunit(sc->sc_bus.bdev));
2010                 else
2011                         kprintf("%s: handing over %s speed device on "
2012                                "port %d to %s\n",
2013                                device_get_nameunit(sc->sc_bus.bdev),
2014                                lowspeed ? "low" : "full",
2015                                index, device_get_nameunit(sc->sc_comps[i]->bdev));
2016         } else {
2017                 kprintf("%s: npcomp == 0\n", device_get_nameunit(sc->sc_bus.bdev));
2018         }
2019 #endif
2020         port = EHCI_PORTSC(index);
2021         v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
2022         EOWRITE4(sc, port, v | EHCI_PS_PO);
2023 }
2024
2025 /* Abort a root control request. */
2026 static void
2027 ehci_root_ctrl_abort(usbd_xfer_handle xfer)
2028 {
2029         /* Nothing to do, all transfers are synchronous. */
2030 }
2031
2032 /* Close the root pipe. */
2033 static void
2034 ehci_root_ctrl_close(usbd_pipe_handle pipe)
2035 {
2036         DPRINTF(("ehci_root_ctrl_close\n"));
2037         /* Nothing to do. */
2038 }
2039
2040 void
2041 ehci_root_intr_done(usbd_xfer_handle xfer)
2042 {
2043 }
2044
2045 static usbd_status
2046 ehci_root_intr_transfer(usbd_xfer_handle xfer)
2047 {
2048         usbd_status err;
2049
2050         /* Insert last in queue. */
2051         err = usb_insert_transfer(xfer);
2052         if (err)
2053                 return (err);
2054
2055         /* Pipe isn't running, start first */
2056         return (ehci_root_intr_start(STAILQ_FIRST(&xfer->pipe->queue)));
2057 }
2058
2059 static usbd_status
2060 ehci_root_intr_start(usbd_xfer_handle xfer)
2061 {
2062         usbd_pipe_handle pipe = xfer->pipe;
2063         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2064
2065         if (sc->sc_dying)
2066                 return (USBD_IOERROR);
2067
2068         sc->sc_intrxfer = xfer;
2069
2070         return (USBD_IN_PROGRESS);
2071 }
2072
2073 /* Abort a root interrupt request. */
2074 static void
2075 ehci_root_intr_abort(usbd_xfer_handle xfer)
2076 {
2077         if (xfer->pipe->intrxfer == xfer) {
2078                 DPRINTF(("ehci_root_intr_abort: remove\n"));
2079                 xfer->pipe->intrxfer = NULL;
2080         }
2081         xfer->status = USBD_CANCELLED;
2082         crit_enter();
2083         usb_transfer_complete(xfer);
2084         crit_exit();
2085 }
2086
2087 /* Close the root pipe. */
2088 static void
2089 ehci_root_intr_close(usbd_pipe_handle pipe)
2090 {
2091         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2092
2093         DPRINTF(("ehci_root_intr_close\n"));
2094
2095         sc->sc_intrxfer = NULL;
2096 }
2097
2098 void
2099 ehci_root_ctrl_done(usbd_xfer_handle xfer)
2100 {
2101 }
2102
2103 /************************/
2104
2105 ehci_soft_qh_t *
2106 ehci_alloc_sqh(ehci_softc_t *sc)
2107 {
2108         ehci_soft_qh_t *sqh;
2109         usbd_status err;
2110         int i, offs;
2111         usb_dma_t dma;
2112
2113         if (sc->sc_freeqhs == NULL) {
2114                 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
2115                 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
2116                           EHCI_PAGE_SIZE, &dma);
2117 #ifdef EHCI_DEBUG
2118                 if (err)
2119                         kprintf("ehci_alloc_sqh: usb_allocmem()=%d\n", err);
2120 #endif
2121                 if (err)
2122                         return (NULL);
2123                 for(i = 0; i < EHCI_SQH_CHUNK; i++) {
2124                         offs = i * EHCI_SQH_SIZE;
2125                         sqh = KERNADDR(&dma, offs);
2126                         sqh->physaddr = DMAADDR(&dma, offs);
2127                         sqh->next = sc->sc_freeqhs;
2128                         sc->sc_freeqhs = sqh;
2129                 }
2130         }
2131         sqh = sc->sc_freeqhs;
2132         sc->sc_freeqhs = sqh->next;
2133         memset(&sqh->qh, 0, sizeof(ehci_qh_t));
2134         sqh->next = NULL;
2135         sqh->prev = NULL;
2136         return (sqh);
2137 }
2138
2139 void
2140 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
2141 {
2142         sqh->next = sc->sc_freeqhs;
2143         sc->sc_freeqhs = sqh;
2144 }
2145
2146 ehci_soft_qtd_t *
2147 ehci_alloc_sqtd(ehci_softc_t *sc)
2148 {
2149         ehci_soft_qtd_t *sqtd;
2150         usbd_status err;
2151         int i, offs;
2152         usb_dma_t dma;
2153
2154         if (sc->sc_freeqtds == NULL) {
2155                 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
2156                 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
2157                           EHCI_PAGE_SIZE, &dma);
2158 #ifdef EHCI_DEBUG
2159                 if (err)
2160                         kprintf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err);
2161 #endif
2162                 if (err)
2163                         return (NULL);
2164                 crit_enter();
2165                 for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
2166                         offs = i * EHCI_SQTD_SIZE;
2167                         sqtd = KERNADDR(&dma, offs);
2168                         sqtd->physaddr = DMAADDR(&dma, offs);
2169                         sqtd->nextqtd = sc->sc_freeqtds;
2170                         sc->sc_freeqtds = sqtd;
2171                 }
2172                 crit_exit();
2173         }
2174
2175         crit_enter();
2176         sqtd = sc->sc_freeqtds;
2177         sc->sc_freeqtds = sqtd->nextqtd;
2178         memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
2179         sqtd->nextqtd = NULL;
2180         sqtd->xfer = NULL;
2181         crit_exit();
2182
2183         return (sqtd);
2184 }
2185
2186 void
2187 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
2188 {
2189         crit_enter();
2190         sqtd->nextqtd = sc->sc_freeqtds;
2191         sc->sc_freeqtds = sqtd;
2192         crit_exit();
2193 }
2194
2195 usbd_status
2196 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc,
2197                      int alen, int rd, usbd_xfer_handle xfer,
2198                      ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
2199 {
2200         ehci_soft_qtd_t *next, *cur;
2201         ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys;
2202         u_int32_t qtdstatus;
2203         int len, curlen, mps, offset;
2204         int i, iscontrol;
2205         usb_dma_t *dma = &xfer->dmabuf;
2206
2207         DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen));
2208
2209         offset = 0;
2210         len = alen;
2211         iscontrol = (epipe->pipe.endpoint->edesc->bmAttributes & UE_XFERTYPE) ==
2212             UE_CONTROL;
2213         dataphys = DMAADDR(dma, 0);
2214         dataphyslastpage = EHCI_PAGE(DMAADDR(dma, len - 1));
2215         qtdstatus = EHCI_QTD_ACTIVE |
2216             EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
2217             EHCI_QTD_SET_CERR(3)
2218             /* IOC set below */
2219             /* BYTES set below */
2220             ;
2221         mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize);
2222         /*
2223          * The control transfer data stage always starts with a toggle of 1.
2224          * For other transfers we let the hardware track the toggle state.
2225          */
2226         if (iscontrol)
2227                 qtdstatus |= EHCI_QTD_SET_TOGGLE(1);
2228
2229         cur = ehci_alloc_sqtd(sc);
2230         *sp = cur;
2231         if (cur == NULL)
2232                 goto nomem;
2233         for (;;) {
2234                 dataphyspage = EHCI_PAGE(dataphys);
2235                 /* XXX This is pretty broken: Because we do not allocate
2236                  * a contiguous buffer (contiguous in physical pages) we
2237                  * can only transfer one page in one go.
2238                  * So check whether the start and end of the buffer are on
2239                  * the same page.
2240                  */
2241                 if (dataphyspage == dataphyslastpage) {
2242                         curlen = len;
2243                 }
2244                 else {
2245                         /* See comment above (XXX) */
2246                         curlen = EHCI_PAGE_SIZE -
2247                                  EHCI_PAGE_MASK(dataphys);
2248                         /* the length must be a multiple of the max size */
2249                         curlen -= curlen % mps;
2250                         DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, "
2251                                     "curlen=%d\n", curlen));
2252                         KASSERT(curlen != 0, ("ehci_alloc_std: curlen == 0"));
2253                 }
2254                 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x "
2255                             "dataphyslastpage=0x%08x len=%d curlen=%d\n",
2256                             dataphys, dataphyslastpage,
2257                             len, curlen));
2258                 len -= curlen;
2259
2260                 if (len != 0) {
2261                         next = ehci_alloc_sqtd(sc);
2262                         if (next == NULL)
2263                                 goto nomem;
2264                         nextphys = htole32(next->physaddr);
2265                 } else {
2266                         next = NULL;
2267                         nextphys = EHCI_NULL;
2268                 }
2269
2270                 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) {
2271                         ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE;
2272                         if (i != 0) /* use offset only in first buffer */
2273                                 a = EHCI_PAGE(a);
2274                         cur->qtd.qtd_buffer[i] = htole32(a);
2275                         cur->qtd.qtd_buffer_hi[i] = 0;
2276 #ifdef DIAGNOSTIC
2277                         if (i >= EHCI_QTD_NBUFFERS) {
2278                                 kprintf("ehci_alloc_sqtd_chain: i=%d\n", i);
2279                                 goto nomem;
2280                         }
2281 #endif
2282                 }
2283                 cur->nextqtd = next;
2284                 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys;
2285                 cur->qtd.qtd_status =
2286                     htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen));
2287                 cur->xfer = xfer;
2288                 cur->len = curlen;
2289                 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n",
2290                             dataphys, dataphys + curlen));
2291                 if (iscontrol) {
2292                         /*
2293                          * adjust the toggle based on the number of packets
2294                          * in this qtd
2295                          */
2296                         if (((curlen + mps - 1) / mps) & 1)
2297                                 qtdstatus ^= EHCI_QTD_TOGGLE_MASK;
2298                 }
2299                 if (len == 0)
2300                         break;
2301                 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n"));
2302                 offset += curlen;
2303                 dataphys = DMAADDR(dma, offset);
2304                 cur = next;
2305         }
2306         cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
2307         *ep = cur;
2308
2309         DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n",
2310                      *sp, *ep));
2311
2312         return (USBD_NORMAL_COMPLETION);
2313
2314  nomem:
2315         /* XXX free chain */
2316         DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n"));
2317         return (USBD_NOMEM);
2318 }
2319
2320 static void
2321 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd,
2322                     ehci_soft_qtd_t *sqtdend)
2323 {
2324         ehci_soft_qtd_t *p;
2325         int i;
2326
2327         DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n",
2328                      sqtd, sqtdend));
2329
2330         for (i = 0; sqtd != sqtdend; sqtd = p, i++) {
2331                 p = sqtd->nextqtd;
2332                 ehci_free_sqtd(sc, sqtd);
2333         }
2334 }
2335
2336 /****************/
2337
2338 /*
2339  * Close a reqular pipe.
2340  * Assumes that there are no pending transactions.
2341  */
2342 void
2343 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
2344 {
2345         struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
2346         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2347         ehci_soft_qh_t *sqh = epipe->sqh;
2348
2349         crit_enter();
2350         ehci_rem_qh(sc, sqh, head);
2351         crit_exit();
2352         pipe->endpoint->savedtoggle =
2353             EHCI_QTD_GET_TOGGLE(le32toh(sqh->qh.qh_qtd.qtd_status));
2354         ehci_free_sqh(sc, epipe->sqh);
2355 }
2356
2357 /*
2358  * Abort a device request.
2359  * If this routine is called from a critical section it guarantees that the
2360  * request will be removed from the hardware scheduling and that the callback
2361  * for it will be called with USBD_CANCELLED status.
2362  * It's impossible to guarantee that the requested transfer will not
2363  * have happened since the hardware runs concurrently.
2364  * If the transaction has already happened we rely on the ordinary
2365  * interrupt processing to process it.
2366  * XXX This is most probably wrong.
2367  */
2368 void
2369 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2370 {
2371 #define exfer EXFER(xfer)
2372         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2373         ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2374         ehci_soft_qh_t *sqh = epipe->sqh;
2375         ehci_soft_qtd_t *sqtd, *snext, **psqtd;
2376         ehci_physaddr_t cur, us, next;
2377         int hit;
2378         /* int count = 0; */
2379         ehci_soft_qh_t *psqh;
2380
2381         DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe));
2382
2383         if (sc->sc_dying) {
2384                 /* If we're dying, just do the software part. */
2385                 crit_enter();
2386                 xfer->status = status;  /* make software ignore it */
2387                 callout_stop(&xfer->timeout_handle);
2388                 usb_rem_task(epipe->pipe.device, &exfer->abort_task);
2389                 usb_transfer_complete(xfer);
2390                 crit_exit();
2391                 return;
2392         }
2393
2394         if (xfer->device->bus->intr_context /* || !curproc REMOVED DFly */)
2395                 panic("ehci_abort_xfer: not in process context");
2396
2397         /*
2398          * If an abort is already in progress then just wait for it to
2399          * complete and return.
2400          */
2401         if (exfer->ehci_xfer_flags & EHCI_XFER_ABORTING) {
2402                 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n"));
2403                 /* No need to wait if we're aborting from a timeout. */
2404                 if (status == USBD_TIMEOUT)
2405                         return;
2406                 /* Override the status which might be USBD_TIMEOUT. */
2407                 xfer->status = status;
2408                 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n"));
2409                 exfer->ehci_xfer_flags |= EHCI_XFER_ABORTWAIT;
2410                 while (exfer->ehci_xfer_flags & EHCI_XFER_ABORTING)
2411                         tsleep(&exfer->ehci_xfer_flags, 0, "ehciaw", 0);
2412                 return;
2413         }
2414
2415         /*
2416          * Step 1: Make interrupt routine and timeouts ignore xfer.
2417          */
2418         crit_enter();
2419         exfer->ehci_xfer_flags |= EHCI_XFER_ABORTING;
2420         xfer->status = status;  /* make software ignore it */
2421         callout_stop(&xfer->timeout_handle);
2422         usb_rem_task(epipe->pipe.device, &exfer->abort_task);
2423         crit_exit();
2424
2425         /*
2426          * Step 2: Wait until we know hardware has finished any possible
2427          * use of the xfer. We do this by removing the entire
2428          * queue from the async schedule and waiting for the doorbell.
2429          * Nothing else should be touching the queue now.
2430          */
2431         psqh = sqh->prev;
2432         ehci_rem_qh(sc, sqh, psqh);
2433
2434         /*
2435          * Step 3:  make sure the soft interrupt routine
2436          * has run. This should remove any completed items off the queue.
2437          * The hardware has no reference to completed items (TDs).
2438          * It's safe to remove them at any time.
2439          */
2440         crit_enter();
2441 #ifdef USB_USE_SOFTINTR
2442         sc->sc_softwake = 1;
2443 #endif /* USB_USE_SOFTINTR */
2444         usb_schedsoftintr(&sc->sc_bus);
2445 #ifdef USB_USE_SOFTINTR
2446         tsleep(&sc->sc_softwake, 0, "ehciab", 0);
2447 #endif /* USB_USE_SOFTINTR */
2448
2449         /*
2450          * Step 4: Remove any vestiges of the xfer from the hardware.
2451          * The complication here is that the hardware may have executed
2452          * into or even beyond the xfer we're trying to abort.
2453          * So as we're scanning the TDs of this xfer we check if
2454          * the hardware points to any of them.
2455          *
2456          * first we need to see if there are any transfers
2457          * on this queue before the xfer we are aborting.. we need
2458          * to update any pointers that point to us to point past
2459          * the aborting xfer.  (If there is something past us).
2460          * Hardware and software.
2461          */
2462         cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd));
2463         hit = 0;
2464
2465         /* If they initially point here. */
2466         us = exfer->sqtdstart->physaddr;
2467
2468         /* We will change them to point here */
2469         snext = exfer->sqtdend->nextqtd;
2470         next = snext ? htole32(snext->physaddr) : EHCI_NULL;
2471
2472         /*
2473          * Now loop through any qTDs before us and keep track of the pointer
2474          * that points to us for the end.
2475          */
2476         psqtd = &sqh->sqtd;
2477         sqtd = sqh->sqtd;
2478         while (sqtd && sqtd != exfer->sqtdstart) {
2479                 hit |= (cur == sqtd->physaddr);
2480                 if (EHCI_LINK_ADDR(le32toh(sqtd->qtd.qtd_next)) == us)
2481                         sqtd->qtd.qtd_next = next;
2482                 if (EHCI_LINK_ADDR(le32toh(sqtd->qtd.qtd_altnext)) == us)
2483                         sqtd->qtd.qtd_altnext = next;
2484                 psqtd = &sqtd->nextqtd;
2485                 sqtd = sqtd->nextqtd;
2486         }
2487                 /* make the software pointer bypass us too */
2488         *psqtd = exfer->sqtdend->nextqtd;
2489
2490         /*
2491          * If we already saw the active one then we are pretty much done.
2492          * We've done all the relinking we need to do.
2493          */
2494         if (!hit) {
2495
2496                 /*
2497                  * Now reinitialise the QH to point to the next qTD
2498                  * (if there is one). We only need to do this if
2499                  * it was previously pointing to us.
2500                  */
2501                 sqtd = exfer->sqtdstart;
2502                 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
2503                         if (cur == sqtd->physaddr) {
2504                                 hit++;
2505                         }
2506                         if (sqtd == exfer->sqtdend)
2507                                 break;
2508                 }
2509                 sqtd = sqtd->nextqtd;
2510                 /*
2511                  * Only need to alter the QH if it was pointing at a qTD
2512                  * that we are removing.
2513                  */
2514                 if (hit) {
2515                         if (snext) {
2516                                 ehci_set_qh_qtd(sqh, snext);
2517                         } else {
2518
2519                                 sqh->qh.qh_curqtd = 0; /* unlink qTDs */
2520                                 sqh->qh.qh_qtd.qtd_status &=
2521                                     htole32(EHCI_QTD_TOGGLE_MASK);
2522                                 sqh->qh.qh_qtd.qtd_next =
2523                                     sqh->qh.qh_qtd.qtd_altnext
2524                                         = EHCI_NULL;
2525                                 DPRINTFN(1,("ehci_abort_xfer: no hit\n"));
2526                         }
2527                 }
2528         }
2529         ehci_add_qh(sqh, psqh);
2530         /*
2531          * Step 5: Execute callback.
2532          */
2533 #ifdef DIAGNOSTIC
2534         exfer->isdone = 1;
2535 #endif
2536         /* Do the wakeup first to avoid touching the xfer after the callback. */
2537         exfer->ehci_xfer_flags &= ~EHCI_XFER_ABORTING;
2538         if (exfer->ehci_xfer_flags & EHCI_XFER_ABORTWAIT) {
2539                 exfer->ehci_xfer_flags &= ~EHCI_XFER_ABORTWAIT;
2540                 wakeup(&exfer->ehci_xfer_flags);
2541         }
2542         usb_transfer_complete(xfer);
2543
2544         /* kprintf("%s: %d TDs aborted\n", __func__, count); */
2545         crit_exit();
2546 #undef exfer
2547 }
2548
2549 void
2550 ehci_timeout(void *addr)
2551 {
2552         struct ehci_xfer *exfer = addr;
2553         struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe;
2554         ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2555
2556         DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
2557 #ifdef USB_DEBUG
2558         if (ehcidebug > 1)
2559                 usbd_dump_pipe(exfer->xfer.pipe);
2560 #endif
2561
2562         if (sc->sc_dying) {
2563                 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT);
2564                 return;
2565         }
2566
2567         /* Execute the abort in a process context. */
2568         usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task,
2569                      USB_TASKQ_HC);
2570 }
2571
2572 void
2573 ehci_timeout_task(void *addr)
2574 {
2575         usbd_xfer_handle xfer = addr;
2576
2577         DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
2578         crit_enter();
2579         ehci_abort_xfer(xfer, USBD_TIMEOUT);
2580         crit_exit();
2581 }
2582
2583 /*
2584  * Some EHCI chips from VIA / ATI seem to trigger interrupts before writing
2585  * back the qTD status, or miss signalling occasionally under heavy load.
2586  * If the host machine is too fast, we can miss transaction completion - when
2587  * we scan the active list the transaction still seems to be active. This
2588  * generally exhibits itself as a umass stall that never recovers.
2589  *
2590  * We work around this behaviour by setting up this callback after any softintr
2591  * that completes with transactions still pending, giving us another chance to
2592  * check for completion after the writeback has taken place.
2593  */
2594 void
2595 ehci_intrlist_timeout(void *arg)
2596 {
2597         ehci_softc_t *sc = arg;
2598
2599         DPRINTFN(3, ("ehci_intrlist_timeout\n"));
2600         usb_schedsoftintr(&sc->sc_bus);
2601 }
2602
2603 /************************/
2604
2605 static usbd_status
2606 ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
2607 {
2608         usbd_status err;
2609
2610         /* Insert last in queue. */
2611         err = usb_insert_transfer(xfer);
2612         if (err)
2613                 return (err);
2614
2615         /* Pipe isn't running, start first */
2616         return (ehci_device_ctrl_start(STAILQ_FIRST(&xfer->pipe->queue)));
2617 }
2618
2619 static usbd_status
2620 ehci_device_ctrl_start(usbd_xfer_handle xfer)
2621 {
2622         ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2623         usbd_status err;
2624
2625         if (sc->sc_dying)
2626                 return (USBD_IOERROR);
2627
2628 #ifdef DIAGNOSTIC
2629         if (!(xfer->rqflags & URQ_REQUEST)) {
2630                 /* XXX panic */
2631                 kprintf("ehci_device_ctrl_transfer: not a request\n");
2632                 return (USBD_INVAL);
2633         }
2634 #endif
2635
2636         err = ehci_device_request(xfer);
2637         if (err)
2638                 return (err);
2639
2640         if (sc->sc_bus.use_polling)
2641                 ehci_waitintr(sc, xfer);
2642         return (USBD_IN_PROGRESS);
2643 }
2644
2645 void
2646 ehci_device_ctrl_done(usbd_xfer_handle xfer)
2647 {
2648         struct ehci_xfer *ex = EXFER(xfer);
2649         ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2650         /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
2651
2652         DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
2653
2654 #ifdef DIAGNOSTIC
2655         if (!(xfer->rqflags & URQ_REQUEST)) {
2656                 panic("ehci_ctrl_done: not a request");
2657         }
2658 #endif
2659
2660         if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
2661                 ehci_del_intr_list(ex); /* remove from active list */
2662                 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
2663         }
2664
2665         DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen));
2666 }
2667
2668 /* Abort a device control request. */
2669 static void
2670 ehci_device_ctrl_abort(usbd_xfer_handle xfer)
2671 {
2672         DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
2673         ehci_abort_xfer(xfer, USBD_CANCELLED);
2674 }
2675
2676 /* Close a device control pipe. */
2677 static void
2678 ehci_device_ctrl_close(usbd_pipe_handle pipe)
2679 {
2680         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2681         /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
2682
2683         DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
2684         ehci_close_pipe(pipe, sc->sc_async_head);
2685 }
2686
2687 usbd_status
2688 ehci_device_request(usbd_xfer_handle xfer)
2689 {
2690 #define exfer EXFER(xfer)
2691         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2692         usb_device_request_t *req = &xfer->request;
2693         usbd_device_handle dev = epipe->pipe.device;
2694         ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2695         int addr = dev->address;
2696         ehci_soft_qtd_t *setup, *stat, *next;
2697         ehci_soft_qh_t *sqh;
2698         int isread;
2699         int len;
2700         usbd_status err;
2701
2702         isread = req->bmRequestType & UT_READ;
2703         len = UGETW(req->wLength);
2704
2705         DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, "
2706                     "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2707                     req->bmRequestType, req->bRequest, UGETW(req->wValue),
2708                     UGETW(req->wIndex), len, addr,
2709                     epipe->pipe.endpoint->edesc->bEndpointAddress));
2710
2711         setup = ehci_alloc_sqtd(sc);
2712         if (setup == NULL) {
2713                 err = USBD_NOMEM;
2714                 goto bad1;
2715         }
2716         stat = ehci_alloc_sqtd(sc);
2717         if (stat == NULL) {
2718                 err = USBD_NOMEM;
2719                 goto bad2;
2720         }
2721
2722         sqh = epipe->sqh;
2723         epipe->u.ctl.length = len;
2724
2725         /* Update device address and length since they may have changed
2726            during the setup of the control pipe in usbd_new_device(). */
2727         /* XXX This only needs to be done once, but it's too early in open. */
2728         /* XXXX Should not touch ED here! */
2729         sqh->qh.qh_endp =
2730             (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) |
2731             htole32(
2732              EHCI_QH_SET_ADDR(addr) |
2733              EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize))
2734             );
2735
2736         /* Set up data transaction */
2737         if (len != 0) {
2738                 ehci_soft_qtd_t *end;
2739
2740                 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
2741                           &next, &end);
2742                 if (err)
2743                         goto bad3;
2744                 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC);
2745                 end->nextqtd = stat;
2746                 end->qtd.qtd_next =
2747                 end->qtd.qtd_altnext = htole32(stat->physaddr);
2748         } else {
2749                 next = stat;
2750         }
2751
2752         memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req);
2753
2754         /* Clear toggle */
2755         setup->qtd.qtd_status = htole32(
2756             EHCI_QTD_ACTIVE |
2757             EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
2758             EHCI_QTD_SET_CERR(3) |
2759             EHCI_QTD_SET_TOGGLE(0) |
2760             EHCI_QTD_SET_BYTES(sizeof *req)
2761             );
2762         setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0));
2763         setup->qtd.qtd_buffer_hi[0] = 0;
2764         setup->nextqtd = next;
2765         setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr);
2766         setup->xfer = xfer;
2767         setup->len = sizeof *req;
2768
2769         stat->qtd.qtd_status = htole32(
2770             EHCI_QTD_ACTIVE |
2771             EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
2772             EHCI_QTD_SET_CERR(3) |
2773             EHCI_QTD_SET_TOGGLE(1) |
2774             EHCI_QTD_IOC
2775             );
2776         stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
2777         stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */
2778         stat->nextqtd = NULL;
2779         stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL;
2780         stat->xfer = xfer;
2781         stat->len = 0;
2782
2783 #ifdef EHCI_DEBUG
2784         if (ehcidebug > 5) {
2785                 DPRINTF(("ehci_device_request:\n"));
2786                 ehci_dump_sqh(sqh);
2787                 ehci_dump_sqtds(setup);
2788         }
2789 #endif
2790
2791         exfer->sqtdstart = setup;
2792         exfer->sqtdend = stat;
2793 #ifdef DIAGNOSTIC
2794         if (!exfer->isdone) {
2795                 kprintf("ehci_device_request: not done, exfer=%p\n", exfer);
2796         }
2797         exfer->isdone = 0;
2798 #endif
2799
2800         /* Insert qTD in QH list. */
2801         crit_enter();
2802         ehci_set_qh_qtd(sqh, setup);
2803         if (xfer->timeout && !sc->sc_bus.use_polling) {
2804                 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2805                             ehci_timeout, xfer);
2806         }
2807         ehci_add_intr_list(sc, exfer);
2808         xfer->status = USBD_IN_PROGRESS;
2809         crit_exit();
2810
2811 #ifdef EHCI_DEBUG
2812         if (ehcidebug > 10) {
2813                 DPRINTF(("ehci_device_request: status=%x\n",
2814                          EOREAD4(sc, EHCI_USBSTS)));
2815                 delay(10000);
2816                 ehci_dump_regs(sc);
2817                 ehci_dump_sqh(sc->sc_async_head);
2818                 ehci_dump_sqh(sqh);
2819                 ehci_dump_sqtds(setup);
2820         }
2821 #endif
2822
2823         return (USBD_NORMAL_COMPLETION);
2824
2825  bad3:
2826         ehci_free_sqtd(sc, stat);
2827  bad2:
2828         ehci_free_sqtd(sc, setup);
2829  bad1:
2830         DPRINTFN(-1,("ehci_device_request: no memory\n"));
2831         xfer->status = err;
2832         usb_transfer_complete(xfer);
2833         return (err);
2834 #undef exfer
2835 }
2836
2837 /************************/
2838
2839 static usbd_status
2840 ehci_device_bulk_transfer(usbd_xfer_handle xfer)
2841 {
2842         usbd_status err;
2843
2844         /* Insert last in queue. */
2845         err = usb_insert_transfer(xfer);
2846         if (err)
2847                 return (err);
2848
2849         /* Pipe isn't running, start first */
2850         return (ehci_device_bulk_start(STAILQ_FIRST(&xfer->pipe->queue)));
2851 }
2852
2853 usbd_status
2854 ehci_device_bulk_start(usbd_xfer_handle xfer)
2855 {
2856 #define exfer EXFER(xfer)
2857         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2858         usbd_device_handle dev = epipe->pipe.device;
2859         ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2860         ehci_soft_qtd_t *data, *dataend;
2861         ehci_soft_qh_t *sqh;
2862         usbd_status err;
2863         int len, isread, endpt;
2864
2865         DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n",
2866                      xfer, xfer->length, xfer->flags));
2867
2868         if (sc->sc_dying)
2869                 return (USBD_IOERROR);
2870
2871 #ifdef DIAGNOSTIC
2872         if (xfer->rqflags & URQ_REQUEST)
2873                 panic("ehci_device_bulk_start: a request");
2874 #endif
2875
2876         len = xfer->length;
2877         endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
2878         isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2879         sqh = epipe->sqh;
2880
2881         epipe->u.bulk.length = len;
2882
2883         err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
2884                                    &dataend);
2885         if (err) {
2886                 DPRINTFN(-1,("ehci_device_bulk_start: no memory\n"));
2887                 xfer->status = err;
2888                 usb_transfer_complete(xfer);
2889                 return (err);
2890         }
2891
2892 #ifdef EHCI_DEBUG
2893         if (ehcidebug > 5) {
2894                 DPRINTF(("ehci_device_bulk_start: data(1)\n"));
2895                 ehci_dump_sqh(sqh);
2896                 ehci_dump_sqtds(data);
2897         }
2898 #endif
2899
2900         /* Set up interrupt info. */
2901         exfer->sqtdstart = data;
2902         exfer->sqtdend = dataend;
2903 #ifdef DIAGNOSTIC
2904         if (!exfer->isdone) {
2905                 kprintf("ehci_device_bulk_start: not done, ex=%p\n", exfer);
2906         }
2907         exfer->isdone = 0;
2908 #endif
2909
2910         crit_enter();
2911         ehci_set_qh_qtd(sqh, data);
2912         if (xfer->timeout && !sc->sc_bus.use_polling) {
2913                 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2914                             ehci_timeout, xfer);
2915         }
2916         ehci_add_intr_list(sc, exfer);
2917         xfer->status = USBD_IN_PROGRESS;
2918         crit_exit();
2919
2920 #ifdef EHCI_DEBUG
2921         if (ehcidebug > 10) {
2922                 DPRINTF(("ehci_device_bulk_start: data(2)\n"));
2923                 delay(10000);
2924                 DPRINTF(("ehci_device_bulk_start: data(3)\n"));
2925                 ehci_dump_regs(sc);
2926 #if 0
2927                 kprintf("async_head:\n");
2928                 ehci_dump_sqh(sc->sc_async_head);
2929 #endif
2930                 kprintf("sqh:\n");
2931                 ehci_dump_sqh(sqh);
2932                 ehci_dump_sqtds(data);
2933         }
2934 #endif
2935
2936         if (sc->sc_bus.use_polling)
2937                 ehci_waitintr(sc, xfer);
2938
2939         return (USBD_IN_PROGRESS);
2940 #undef exfer
2941 }
2942
2943 static void
2944 ehci_device_bulk_abort(usbd_xfer_handle xfer)
2945 {
2946         DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer));
2947         ehci_abort_xfer(xfer, USBD_CANCELLED);
2948 }
2949
2950 /*
2951  * Close a device bulk pipe.
2952  */
2953 static void
2954 ehci_device_bulk_close(usbd_pipe_handle pipe)
2955 {
2956         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2957
2958         DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe));
2959         ehci_close_pipe(pipe, sc->sc_async_head);
2960 }
2961
2962 void
2963 ehci_device_bulk_done(usbd_xfer_handle xfer)
2964 {
2965         struct ehci_xfer *ex = EXFER(xfer);
2966         ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2967         /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
2968
2969         DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n",
2970                      xfer, xfer->actlen));
2971
2972         if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
2973                 ehci_del_intr_list(ex); /* remove from active list */
2974                 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
2975         }
2976
2977         DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen));
2978 }
2979
2980 /************************/
2981
2982 static usbd_status
2983 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival)
2984 {
2985         struct ehci_soft_islot *isp;
2986         int islot, lev;
2987
2988         /* Find a poll rate that is large enough. */
2989         for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--)
2990                 if (EHCI_ILEV_IVAL(lev) <= ival)
2991                         break;
2992
2993         /* Pick an interrupt slot at the right level. */
2994         /* XXX could do better than picking at random. */
2995         islot = EHCI_IQHIDX(lev, karc4random());
2996
2997         sqh->islot = islot;
2998         isp = &sc->sc_islots[islot];
2999         ehci_add_qh(sqh, isp->sqh);
3000
3001         return (USBD_NORMAL_COMPLETION);
3002 }
3003
3004 static usbd_status
3005 ehci_device_intr_transfer(usbd_xfer_handle xfer)
3006 {
3007         usbd_status err;
3008
3009         /* Insert last in queue. */
3010         err = usb_insert_transfer(xfer);
3011         if (err)
3012                 return (err);
3013
3014         /*
3015          * Pipe isn't running (otherwise err would be USBD_INPROG),
3016          * so start it first.
3017          */
3018         return (ehci_device_intr_start(STAILQ_FIRST(&xfer->pipe->queue)));
3019 }
3020
3021 static usbd_status
3022 ehci_device_intr_start(usbd_xfer_handle xfer)
3023 {
3024 #define exfer EXFER(xfer)
3025         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
3026         usbd_device_handle dev = xfer->pipe->device;
3027         ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
3028         ehci_soft_qtd_t *data, *dataend;
3029         ehci_soft_qh_t *sqh;
3030         usbd_status err;
3031         int len, isread, endpt;
3032
3033         DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n",
3034             xfer, xfer->length, xfer->flags));
3035
3036         if (sc->sc_dying)
3037                 return (USBD_IOERROR);
3038
3039 #ifdef DIAGNOSTIC
3040         if (xfer->rqflags & URQ_REQUEST)
3041                 panic("ehci_device_intr_start: a request");
3042 #endif
3043
3044         len = xfer->length;
3045         endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
3046         isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3047         sqh = epipe->sqh;
3048
3049         epipe->u.intr.length = len;
3050
3051         err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
3052             &dataend);
3053         if (err) {
3054                 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n"));
3055                 xfer->status = err;
3056                 usb_transfer_complete(xfer);
3057                 return (err);
3058         }
3059
3060 #ifdef EHCI_DEBUG
3061         if (ehcidebug > 5) {
3062                 DPRINTF(("ehci_device_intr_start: data(1)\n"));
3063                 ehci_dump_sqh(sqh);
3064                 ehci_dump_sqtds(data);
3065         }
3066 #endif
3067
3068         /* Set up interrupt info. */
3069         exfer->sqtdstart = data;
3070         exfer->sqtdend = dataend;
3071 #ifdef DIAGNOSTIC
3072         if (!exfer->isdone) {
3073                 kprintf("ehci_device_intr_start: not done, ex=%p\n", exfer);
3074         }
3075         exfer->isdone = 0;
3076 #endif
3077
3078         crit_enter();
3079         ehci_set_qh_qtd(sqh, data);
3080         if (xfer->timeout && !sc->sc_bus.use_polling) {
3081                 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
3082                     ehci_timeout, xfer);
3083         }
3084         ehci_add_intr_list(sc, exfer);
3085         xfer->status = USBD_IN_PROGRESS;
3086         crit_exit();
3087
3088 #ifdef EHCI_DEBUG
3089         if (ehcidebug > 10) {
3090                 DPRINTF(("ehci_device_intr_start: data(2)\n"));
3091                 delay(10000);
3092                 DPRINTF(("ehci_device_intr_start: data(3)\n"));
3093                 ehci_dump_regs(sc);
3094                 kprintf("sqh:\n");
3095                 ehci_dump_sqh(sqh);
3096                 ehci_dump_sqtds(data);
3097         }
3098 #endif
3099
3100         if (sc->sc_bus.use_polling)
3101                 ehci_waitintr(sc, xfer);
3102
3103         return (USBD_IN_PROGRESS);
3104 #undef exfer
3105 }
3106
3107 static void
3108 ehci_device_intr_abort(usbd_xfer_handle xfer)
3109 {
3110         DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer));
3111         if (xfer->pipe->intrxfer == xfer) {
3112                 DPRINTFN(1, ("ehci_device_intr_abort: remove\n"));
3113                 xfer->pipe->intrxfer = NULL;
3114         }
3115         ehci_abort_xfer(xfer, USBD_CANCELLED);
3116 }
3117
3118 static void
3119 ehci_device_intr_close(usbd_pipe_handle pipe)
3120 {
3121         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
3122         struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
3123         struct ehci_soft_islot *isp;
3124
3125         isp = &sc->sc_islots[epipe->sqh->islot];
3126         ehci_close_pipe(pipe, isp->sqh);
3127 }
3128
3129 static void
3130 ehci_device_intr_done(usbd_xfer_handle xfer)
3131 {
3132 #define exfer EXFER(xfer)
3133         struct ehci_xfer *ex = EXFER(xfer);
3134         ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
3135         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
3136         ehci_soft_qtd_t *data, *dataend;
3137         ehci_soft_qh_t *sqh;
3138         usbd_status err;
3139         int len, isread, endpt;
3140
3141         DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n",
3142             xfer, xfer->actlen));
3143
3144         if (xfer->pipe->repeat) {
3145                 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
3146
3147                 len = epipe->u.intr.length;
3148                 xfer->length = len;
3149                 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
3150                 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3151                 sqh = epipe->sqh;
3152
3153                 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
3154                     &data, &dataend);
3155                 if (err) {
3156                         DPRINTFN(-1, ("ehci_device_intr_done: no memory\n"));
3157                         xfer->status = err;
3158                         return;
3159                 }
3160
3161                 /* Set up interrupt info. */
3162                 exfer->sqtdstart = data;
3163                 exfer->sqtdend = dataend;
3164 #ifdef DIAGNOSTIC
3165                 if (!exfer->isdone) {
3166                         kprintf("ehci_device_intr_done: not done, ex=%p\n",
3167                             exfer);
3168                 }
3169                 exfer->isdone = 0;
3170 #endif
3171
3172                 crit_enter();
3173                 ehci_set_qh_qtd(sqh, data);
3174                 if (xfer->timeout && !sc->sc_bus.use_polling) {
3175                         callout_reset(&xfer->timeout_handle,
3176                             MS_TO_TICKS(xfer->timeout), ehci_timeout, xfer);
3177                 }
3178                 crit_exit();
3179
3180                 xfer->status = USBD_IN_PROGRESS;
3181         } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
3182                 ehci_del_intr_list(ex); /* remove from active list */
3183                 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
3184         }
3185 #undef exfer
3186 }
3187
3188 /************************/
3189
3190 static usbd_status
3191 ehci_device_isoc_transfer(usbd_xfer_handle xfer)
3192 {
3193         return USBD_IOERROR;
3194 }
3195
3196 static usbd_status
3197 ehci_device_isoc_start(usbd_xfer_handle xfer)
3198 {
3199         return USBD_IOERROR;
3200 }
3201
3202 static void
3203 ehci_device_isoc_abort(usbd_xfer_handle xfer)
3204 {
3205 }
3206
3207 static void
3208 ehci_device_isoc_close(usbd_pipe_handle pipe)
3209 {
3210 }
3211
3212 static void
3213 ehci_device_isoc_done(usbd_xfer_handle xfer)
3214 {
3215 }