4 * PC9801 original PCMCIA controller code for NS/A,Ne,NX/C,NR/L.
5 * by Noriyuki Hosobuchi <hoso@ce.mbn.or.jp>
7 * $FreeBSD: src/sys/pccard/meciareg.h,v 1.2.2.1 2001/07/06 22:58:49 imp Exp $
8 * $DragonFly: src/sys/bus/pccard/Attic/meciareg.h,v 1.2 2003/06/17 04:28:55 dillon Exp $
11 /*--- I/O port definition */
12 #define MECIA_REG0 0x0a8e /* byte */
13 #define MECIA_REG1 0x1a8e /* byte */
14 #define MECIA_REG2 0x2a8e /* byte */
15 #define MECIA_REG3 0x3a8e /* byte : Interrupt */
16 #define MECIA_REG4 0x4a8e /* word : PC98 side I/O base */
17 #define MECIA_REG5 0x5a8e /* word : Card side I/O base */
18 #define MECIA_REG7 0x7a8e /* byte */
20 #define MECIA_REG_WINSEL 0x1e8e /* byte : win bank select register */
21 #define MECIA_REG_PAGOFS 0x0e8e /* word */
24 #define MECIA_MAPWIN 0x84 /* map Card on 0xda0000 - 0xdbffff */
25 #define MECIA_UNMAPWIN 0x00
28 #define MECIA_CARDEXIST 0x08 /* 1:exist 0:not exist */
31 #define MECIA_MAPIO 0x80 /* 1:I/O 0:Memory */
32 #define MECIA_IOTHROUGH 0x40 /* 0:I/O map 1:I/O addr-through */
33 #define MECIA_8BIT 0x20 /* bit width 1:8bit 0:16bit */
34 #define MECIA_MAP128 0x10 /* I/O map size 1:128byte 0:16byte */
35 #define MECIA_VCC3P3V 0x02 /* Vcc 1:3.3V 0:5.0V */
38 #define MECIA_INT0 (0xf8 + 0x0) /* INT0(IRQ3) */
39 #define MECIA_INT1 (0xf8 + 0x1) /* INT1(IRQ5) */
40 #define MECIA_INT2 (0xf8 + 0x2) /* INT2(IRQ6) */
41 #define MECIA_INT4 (0xf8 + 0x4) /* INT4(IRQ10) */
42 #define MECIA_INT5 (0xf8 + 0x5) /* INT5(IRQ12) */
43 #define MECIA_INTDISABLE (0xf8 + 0x7) /* disable interrupt */
46 #define MECIA_ATTRMEM 0x20 /* 1:attr mem 0:common mem */
47 #define MECIA_VPP12V 0x10 /* Vpp 0:5V 1:12V */
51 extern int mecia_mode; /* in 'pccard/pcic.c' */
52 #define mecia_8bit_on() \
53 if (mecia_mode & MECIA_8BIT) \
54 outb(MECIA_REG2, inb(MECIA_REG2) | MECIA_8BIT)
55 #define mecia_8bit_off() \
56 if (mecia_mode & MECIA_8BIT) \
57 outb(MECIA_REG2, inb(MECIA_REG2) & ~MECIA_8BIT)
58 #define mecia_map128() (mecia_mode & MECIA_MAP128)
61 #define MECIA_INT_MASK_ALLOWED 0x3E68 /* PC98 */