sys/dev/drm/i915/intel_dvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  */
  27 #include <linux/i2c.h>
  28 #include <drm/drmP.h>
  29 #include <drm/drm_atomic_helper.h>
  30 #include <drm/drm_crtc.h>
  31 #include "intel_drv.h"
  32 #include <drm/i915_drm.h>
  33 #include "i915_drv.h"
  34 #include "dvo.h"
  35
  36 #define SIL164_ADDR     0x38
  37 #define CH7xxx_ADDR     0x76
  38 #define TFP410_ADDR     0x38
  39 #define NS2501_ADDR     0x38
  40
  41 static const struct intel_dvo_device intel_dvo_devices[] = {
  42         {
  43                 .type = INTEL_DVO_CHIP_TMDS,
  44                 .name = "sil164",
  45                 .dvo_reg = DVOC,
  46                 .dvo_srcdim_reg = DVOC_SRCDIM,
  47                 .slave_addr = SIL164_ADDR,
  48                 .dev_ops = &sil164_ops,
  49         },
  50         {
  51                 .type = INTEL_DVO_CHIP_TMDS,
  52                 .name = "ch7xxx",
  53                 .dvo_reg = DVOC,
  54                 .dvo_srcdim_reg = DVOC_SRCDIM,
  55                 .slave_addr = CH7xxx_ADDR,
  56                 .dev_ops = &ch7xxx_ops,
  57         },
  58         {
  59                 .type = INTEL_DVO_CHIP_TMDS,
  60                 .name = "ch7xxx",
  61                 .dvo_reg = DVOC,
  62                 .dvo_srcdim_reg = DVOC_SRCDIM,
  63                 .slave_addr = 0x75, /* For some ch7010 */
  64                 .dev_ops = &ch7xxx_ops,
  65         },
  66         {
  67                 .type = INTEL_DVO_CHIP_LVDS,
  68                 .name = "ivch",
  69                 .dvo_reg = DVOA,
  70                 .dvo_srcdim_reg = DVOA_SRCDIM,
  71                 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
  72                 .dev_ops = &ivch_ops,
  73         },
  74         {
  75                 .type = INTEL_DVO_CHIP_TMDS,
  76                 .name = "tfp410",
  77                 .dvo_reg = DVOC,
  78                 .dvo_srcdim_reg = DVOC_SRCDIM,
  79                 .slave_addr = TFP410_ADDR,
  80                 .dev_ops = &tfp410_ops,
  81         },
  82         {
  83                 .type = INTEL_DVO_CHIP_LVDS,
  84                 .name = "ch7017",
  85                 .dvo_reg = DVOC,
  86                 .dvo_srcdim_reg = DVOC_SRCDIM,
  87                 .slave_addr = 0x75,
  88                 .gpio = GMBUS_PIN_DPB,
  89                 .dev_ops = &ch7017_ops,
  90         },
  91         {
  92                 .type = INTEL_DVO_CHIP_TMDS,
  93                 .name = "ns2501",
  94                 .dvo_reg = DVOB,
  95                 .dvo_srcdim_reg = DVOB_SRCDIM,
  96                 .slave_addr = NS2501_ADDR,
  97                 .dev_ops = &ns2501_ops,
  98        }
  99 };
 100
 101 struct intel_dvo {
 102         struct intel_encoder base;
 103
 104         struct intel_dvo_device dev;
 105
 106         struct intel_connector *attached_connector;
 107
 108         bool panel_wants_dither;
 109 };
 110
 111 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
 112 {
 113         return container_of(encoder, struct intel_dvo, base);
 114 }
 115
 116 static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
 117 {
 118         return enc_to_dvo(intel_attached_encoder(connector));
 119 }
 120
 121 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
 122 {
 123         struct drm_device *dev = connector->base.dev;
 124         struct drm_i915_private *dev_priv = dev->dev_private;
 125         struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
 126         u32 tmp;
 127
 128         tmp = I915_READ(intel_dvo->dev.dvo_reg);
 129
 130         if (!(tmp & DVO_ENABLE))
 131                 return false;
 132
 133         return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
 134 }
 135
 136 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
 137                                    enum i915_pipe *pipe)
 138 {
 139         struct drm_device *dev = encoder->base.dev;
 140         struct drm_i915_private *dev_priv = dev->dev_private;
 141         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 142         u32 tmp;
 143
 144         tmp = I915_READ(intel_dvo->dev.dvo_reg);
 145
 146         if (!(tmp & DVO_ENABLE))
 147                 return false;
 148
 149         *pipe = PORT_TO_PIPE(tmp);
 150
 151         return true;
 152 }
 153
 154 static void intel_dvo_get_config(struct intel_encoder *encoder,
 155                                  struct intel_crtc_state *pipe_config)
 156 {
 157         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
 158         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 159         u32 tmp, flags = 0;
 160
 161         tmp = I915_READ(intel_dvo->dev.dvo_reg);
 162         if (tmp & DVO_HSYNC_ACTIVE_HIGH)
 163                 flags |= DRM_MODE_FLAG_PHSYNC;
 164         else
 165                 flags |= DRM_MODE_FLAG_NHSYNC;
 166         if (tmp & DVO_VSYNC_ACTIVE_HIGH)
 167                 flags |= DRM_MODE_FLAG_PVSYNC;
 168         else
 169                 flags |= DRM_MODE_FLAG_NVSYNC;
 170
 171         pipe_config->base.adjusted_mode.flags |= flags;
 172
 173         pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
 174 }
 175
 176 static void intel_disable_dvo(struct intel_encoder *encoder)
 177 {
 178         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
 179         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 180         i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
 181         u32 temp = I915_READ(dvo_reg);
 182
 183         intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
 184         I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
 185         I915_READ(dvo_reg);
 186 }
 187
 188 static void intel_enable_dvo(struct intel_encoder *encoder)
 189 {
 190         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
 191         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 192         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
 193         i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
 194         u32 temp = I915_READ(dvo_reg);
 195
 196         intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
 197                                          &crtc->config->base.mode,
 198                                          &crtc->config->base.adjusted_mode);
 199
 200         I915_WRITE(dvo_reg, temp | DVO_ENABLE);
 201         I915_READ(dvo_reg);
 202
 203         intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
 204 }
 205
 206 static enum drm_mode_status
 207 intel_dvo_mode_valid(struct drm_connector *connector,
 208                      struct drm_display_mode *mode)
 209 {
 210         struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
 211         const struct drm_display_mode *fixed_mode =
 212                 to_intel_connector(connector)->panel.fixed_mode;
 213         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
 214         int target_clock = mode->clock;
 215
 216         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 217                 return MODE_NO_DBLESCAN;
 218
 219         /* XXX: Validate clock range */
 220
 221         if (fixed_mode) {
 222                 if (mode->hdisplay > fixed_mode->hdisplay)
 223                         return MODE_PANEL;
 224                 if (mode->vdisplay > fixed_mode->vdisplay)
 225                         return MODE_PANEL;
 226
 227                 target_clock = fixed_mode->clock;
 228         }
 229
 230         if (target_clock > max_dotclk)
 231                 return MODE_CLOCK_HIGH;
 232
 233         return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
 234 }
 235
 236 static bool intel_dvo_compute_config(struct intel_encoder *encoder,
 237                                      struct intel_crtc_state *pipe_config)
 238 {
 239         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 240         const struct drm_display_mode *fixed_mode =
 241                 intel_dvo->attached_connector->panel.fixed_mode;
 242         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
 243
 244         /* If we have timings from the BIOS for the panel, put them in
 245          * to the adjusted mode.  The CRTC will be set up for this mode,
 246          * with the panel scaling set up to source from the H/VDisplay
 247          * of the original mode.
 248          */
 249         if (fixed_mode)
 250                 intel_fixed_panel_mode(fixed_mode, adjusted_mode);
 251
 252         return true;
 253 }
 254
 255 static void intel_dvo_pre_enable(struct intel_encoder *encoder)
 256 {
 257         struct drm_device *dev = encoder->base.dev;
 258         struct drm_i915_private *dev_priv = dev->dev_private;
 259         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
 260         const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
 261         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 262         int pipe = crtc->pipe;
 263         u32 dvo_val;
 264         i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
 265         i915_reg_t dvo_srcdim_reg = intel_dvo->dev.dvo_srcdim_reg;
 266
 267         /* Save the data order, since I don't know what it should be set to. */
 268         dvo_val = I915_READ(dvo_reg) &
 269                   (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
 270         dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
 271                    DVO_BLANK_ACTIVE_HIGH;
 272
 273         if (pipe == 1)
 274                 dvo_val |= DVO_PIPE_B_SELECT;
 275         dvo_val |= DVO_PIPE_STALL;
 276         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 277                 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
 278         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 279                 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
 280
 281         /*I915_WRITE(DVOB_SRCDIM,
 282           (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
 283           (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
 284         I915_WRITE(dvo_srcdim_reg,
 285                    (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
 286                    (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
 287         /*I915_WRITE(DVOB, dvo_val);*/
 288         I915_WRITE(dvo_reg, dvo_val);
 289 }
 290
 291 /**
 292  * Detect the output connection on our DVO device.
 293  *
 294  * Unimplemented.
 295  */
 296 static enum drm_connector_status
 297 intel_dvo_detect(struct drm_connector *connector, bool force)
 298 {
 299         struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
 300         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
 301                       connector->base.id, connector->name);
 302         return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
 303 }
 304
 305 static int intel_dvo_get_modes(struct drm_connector *connector)
 306 {
 307         struct drm_i915_private *dev_priv = connector->dev->dev_private;
 308         const struct drm_display_mode *fixed_mode =
 309                 to_intel_connector(connector)->panel.fixed_mode;
 310
 311         /* We should probably have an i2c driver get_modes function for those
 312          * devices which will have a fixed set of modes determined by the chip
 313          * (TV-out, for example), but for now with just TMDS and LVDS,
 314          * that's not the case.
 315          */
 316         intel_ddc_get_modes(connector,
 317                             intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
 318         if (!list_empty(&connector->probed_modes))
 319                 return 1;
 320
 321         if (fixed_mode) {
 322                 struct drm_display_mode *mode;
 323                 mode = drm_mode_duplicate(connector->dev, fixed_mode);
 324                 if (mode) {
 325                         drm_mode_probed_add(connector, mode);
 326                         return 1;
 327                 }
 328         }
 329
 330         return 0;
 331 }
 332
 333 static void intel_dvo_destroy(struct drm_connector *connector)
 334 {
 335         drm_connector_cleanup(connector);
 336         intel_panel_fini(&to_intel_connector(connector)->panel);
 337         kfree(connector);
 338 }
 339
 340 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
 341         .dpms = drm_atomic_helper_connector_dpms,
 342         .detect = intel_dvo_detect,
 343         .destroy = intel_dvo_destroy,
 344         .fill_modes = drm_helper_probe_single_connector_modes,
 345         .atomic_get_property = intel_connector_atomic_get_property,
 346         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 347         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 348 };
 349
 350 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
 351         .mode_valid = intel_dvo_mode_valid,
 352         .get_modes = intel_dvo_get_modes,
 353         .best_encoder = intel_best_encoder,
 354 };
 355
 356 static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
 357 {
 358         struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
 359
 360         if (intel_dvo->dev.dev_ops->destroy)
 361                 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
 362
 363         intel_encoder_destroy(encoder);
 364 }
 365
 366 static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
 367         .destroy = intel_dvo_enc_destroy,
 368 };
 369
 370 /**
 371  * Attempts to get a fixed panel timing for LVDS (currently only the i830).
 372  *
 373  * Other chips with DVO LVDS will need to extend this to deal with the LVDS
 374  * chip being on DVOB/C and having multiple pipes.
 375  */
 376 static struct drm_display_mode *
 377 intel_dvo_get_current_mode(struct drm_connector *connector)
 378 {
 379         struct drm_device *dev = connector->dev;
 380         struct drm_i915_private *dev_priv = dev->dev_private;
 381         struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
 382         uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
 383         struct drm_display_mode *mode = NULL;
 384
 385         /* If the DVO port is active, that'll be the LVDS, so we can pull out
 386          * its timings to get how the BIOS set up the panel.
 387          */
 388         if (dvo_val & DVO_ENABLE) {
 389                 struct drm_crtc *crtc;
 390                 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
 391
 392                 crtc = intel_get_crtc_for_pipe(dev, pipe);
 393                 if (crtc) {
 394                         mode = intel_crtc_mode_get(dev, crtc);
 395                         if (mode) {
 396                                 mode->type |= DRM_MODE_TYPE_PREFERRED;
 397                                 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
 398                                         mode->flags |= DRM_MODE_FLAG_PHSYNC;
 399                                 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
 400                                         mode->flags |= DRM_MODE_FLAG_PVSYNC;
 401                         }
 402                 }
 403         }
 404
 405         return mode;
 406 }
 407
 408 void intel_dvo_init(struct drm_device *dev)
 409 {
 410         struct drm_i915_private *dev_priv = dev->dev_private;
 411         struct intel_encoder *intel_encoder;
 412         struct intel_dvo *intel_dvo;
 413         struct intel_connector *intel_connector;
 414         int i;
 415         int encoder_type = DRM_MODE_ENCODER_NONE;
 416
 417         intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
 418         if (!intel_dvo)
 419                 return;
 420
 421         intel_connector = intel_connector_alloc();
 422         if (!intel_connector) {
 423                 kfree(intel_dvo);
 424                 return;
 425         }
 426
 427         intel_dvo->attached_connector = intel_connector;
 428
 429         intel_encoder = &intel_dvo->base;
 430         drm_encoder_init(dev, &intel_encoder->base,
 431                          &intel_dvo_enc_funcs, encoder_type, NULL);
 432
 433         intel_encoder->disable = intel_disable_dvo;
 434         intel_encoder->enable = intel_enable_dvo;
 435         intel_encoder->get_hw_state = intel_dvo_get_hw_state;
 436         intel_encoder->get_config = intel_dvo_get_config;
 437         intel_encoder->compute_config = intel_dvo_compute_config;
 438         intel_encoder->pre_enable = intel_dvo_pre_enable;
 439         intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
 440         intel_connector->unregister = intel_connector_unregister;
 441
 442         /* Now, try to find a controller */
 443         for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
 444                 struct drm_connector *connector = &intel_connector->base;
 445                 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
 446                 struct i2c_adapter *i2c;
 447                 int gpio;
 448                 bool dvoinit;
 449                 enum i915_pipe pipe;
 450                 uint32_t dpll[I915_MAX_PIPES];
 451
 452                 /* Allow the I2C driver info to specify the GPIO to be used in
 453                  * special cases, but otherwise default to what's defined
 454                  * in the spec.
 455                  */
 456                 if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
 457                         gpio = dvo->gpio;
 458                 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
 459                         gpio = GMBUS_PIN_SSC;
 460                 else
 461                         gpio = GMBUS_PIN_DPB;
 462
 463                 /* Set up the I2C bus necessary for the chip we're probing.
 464                  * It appears that everything is on GPIOE except for panels
 465                  * on i830 laptops, which are on GPIOB (DVOA).
 466                  */
 467                 i2c = intel_gmbus_get_adapter(dev_priv, gpio);
 468
 469                 intel_dvo->dev = *dvo;
 470
 471                 /* GMBUS NAK handling seems to be unstable, hence let the
 472                  * transmitter detection run in bit banging mode for now.
 473                  */
 474                 intel_gmbus_force_bit(i2c, true);
 475
 476                 /* ns2501 requires the DVO 2x clock before it will
 477                  * respond to i2c accesses, so make sure we have
 478                  * have the clock enabled before we attempt to
 479                  * initialize the device.
 480                  */
 481                 for_each_pipe(dev_priv, pipe) {
 482                         dpll[pipe] = I915_READ(DPLL(pipe));
 483                         I915_WRITE(DPLL(pipe), dpll[pipe] | DPLL_DVO_2X_MODE);
 484                 }
 485
 486                 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
 487
 488                 /* restore the DVO 2x clock state to original */
 489                 for_each_pipe(dev_priv, pipe) {
 490                         I915_WRITE(DPLL(pipe), dpll[pipe]);
 491                 }
 492
 493                 intel_gmbus_force_bit(i2c, false);
 494
 495                 if (!dvoinit)
 496                         continue;
 497
 498                 intel_encoder->type = INTEL_OUTPUT_DVO;
 499                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
 500                 switch (dvo->type) {
 501                 case INTEL_DVO_CHIP_TMDS:
 502                         intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
 503                                 (1 << INTEL_OUTPUT_DVO);
 504                         drm_connector_init(dev, connector,
 505                                            &intel_dvo_connector_funcs,
 506                                            DRM_MODE_CONNECTOR_DVII);
 507                         encoder_type = DRM_MODE_ENCODER_TMDS;
 508                         break;
 509                 case INTEL_DVO_CHIP_LVDS:
 510                         intel_encoder->cloneable = 0;
 511                         drm_connector_init(dev, connector,
 512                                            &intel_dvo_connector_funcs,
 513                                            DRM_MODE_CONNECTOR_LVDS);
 514                         encoder_type = DRM_MODE_ENCODER_LVDS;
 515                         break;
 516                 }
 517
 518                 drm_connector_helper_add(connector,
 519                                          &intel_dvo_connector_helper_funcs);
 520                 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 521                 connector->interlace_allowed = false;
 522                 connector->doublescan_allowed = false;
 523
 524                 intel_connector_attach_encoder(intel_connector, intel_encoder);
 525                 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
 526                         /* For our LVDS chipsets, we should hopefully be able
 527                          * to dig the fixed panel mode out of the BIOS data.
 528                          * However, it's in a different format from the BIOS
 529                          * data on chipsets with integrated LVDS (stored in AIM
 530                          * headers, likely), so for now, just get the current
 531                          * mode being output through DVO.
 532                          */
 533                         intel_panel_init(&intel_connector->panel,
 534                                          intel_dvo_get_current_mode(connector),
 535                                          NULL);
 536                         intel_dvo->panel_wants_dither = true;
 537                 }
 538
 539                 drm_connector_register(connector);
 540                 return;
 541         }
 542
 543         drm_encoder_cleanup(&intel_encoder->base);
 544         kfree(intel_dvo);
 545         kfree(intel_connector);
 546 }