2 * Copyright (c) 1999 Michael Smith <msmith@freebsd.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * $FreeBSD: src/sys/i386/i386/i686_mem.c,v 1.31 2009/03/17 00:48:11 jkim
29 #include <sys/param.h>
30 #include <sys/kernel.h>
31 #include <sys/systm.h>
33 #include <sys/malloc.h>
34 #include <sys/memrange.h>
35 #include <sys/sysctl.h>
36 #include <sys/thread2.h>
38 #include <machine/cputypes.h>
39 #include <machine/md_var.h>
40 #include <machine/specialreg.h>
43 * i686 memory range operations
45 * This code will probably be impenetrable without reference to the
46 * Intel Pentium Pro documentation.
49 static char *mem_owner_bios = "BIOS";
51 #define MR686_FIXMTRR (1<<0)
53 #define mrwithin(mr, a) \
54 (((a) >= (mr)->mr_base) && ((a) < ((mr)->mr_base + (mr)->mr_len)))
55 #define mroverlap(mra, mrb) \
56 (mrwithin(mra, mrb->mr_base) || mrwithin(mrb, mra->mr_base))
58 #define mrvalid(base, len) \
59 ((!(base & ((1 << 12) - 1))) && /* base is multiple of 4k */ \
60 ((len) >= (1 << 12)) && /* length is >= 4k */ \
61 powerof2((len)) && /* ... and power of two */ \
62 !((base) & ((len) - 1))) /* range is not discontiuous */
64 #define mrcopyflags(curr, new) \
65 (((curr) & ~MDF_ATTRMASK) | ((new) & MDF_ATTRMASK))
67 static int mtrrs_disabled;
68 TUNABLE_INT("machdep.disable_mtrrs", &mtrrs_disabled);
69 SYSCTL_INT(_machdep, OID_AUTO, disable_mtrrs, CTLFLAG_RD,
70 &mtrrs_disabled, 0, "Disable i686 MTRRs.");
72 static void i686_mrinit(struct mem_range_softc *sc);
73 static int i686_mrset(struct mem_range_softc *sc,
74 struct mem_range_desc *mrd, int *arg);
75 static void i686_mrAPinit(struct mem_range_softc *sc);
76 static void i686_mrreinit(struct mem_range_softc *sc);
78 static struct mem_range_ops i686_mrops = {
85 /* XXX for AP startup hook */
86 static u_int64_t mtrrcap, mtrrdef;
88 /* The bitmask for the PhysBase and PhysMask fields of the variable MTRRs. */
89 static u_int64_t mtrr_physmask;
91 static struct mem_range_desc *mem_range_match(struct mem_range_softc *sc,
92 struct mem_range_desc *mrd);
93 static void i686_mrfetch(struct mem_range_softc *sc);
94 static int i686_mtrrtype(int flags);
95 static int i686_mrt2mtrr(int flags, int oldval);
96 static int i686_mtrrconflict(int flag1, int flag2);
97 static void i686_mrstore(struct mem_range_softc *sc);
98 static void i686_mrstoreone(void *arg);
100 static void i686_mrstoreone_cpusync(void *arg);
101 static void i686_mrAPinit_cpusync(void *arg);
103 static struct mem_range_desc *i686_mtrrfixsearch(struct mem_range_softc *sc,
105 static int i686_mrsetlow(struct mem_range_softc *sc,
106 struct mem_range_desc *mrd, int *arg);
107 static int i686_mrsetvariable(struct mem_range_softc *sc,
108 struct mem_range_desc *mrd, int *arg);
110 /* i686 MTRR type to memory range type conversion */
111 static int i686_mtrrtomrt[] = {
121 #define MTRRTOMRTLEN NELEM(i686_mtrrtomrt)
124 i686_mtrr2mrt(int val)
127 if (val < 0 || val >= MTRRTOMRTLEN)
128 return (MDF_UNKNOWN);
129 return (i686_mtrrtomrt[val]);
133 * i686 MTRR conflicts. Writeback and uncachable may overlap.
136 i686_mtrrconflict(int flag1, int flag2)
139 flag1 &= MDF_ATTRMASK;
140 flag2 &= MDF_ATTRMASK;
141 if (flag1 == flag2 ||
142 (flag1 == MDF_WRITEBACK && flag2 == MDF_UNCACHEABLE) ||
143 (flag2 == MDF_WRITEBACK && flag1 == MDF_UNCACHEABLE))
149 * Look for an exactly-matching range.
151 static struct mem_range_desc *
152 mem_range_match(struct mem_range_softc *sc, struct mem_range_desc *mrd)
154 struct mem_range_desc *cand;
157 for (i = 0, cand = sc->mr_desc; i < sc->mr_ndesc; i++, cand++)
158 if ((cand->mr_base == mrd->mr_base) &&
159 (cand->mr_len == mrd->mr_len))
165 * Fetch the current mtrr settings from the current CPU (assumed to
166 * all be in sync in the SMP case). Note that if we are here, we
167 * assume that MTRRs are enabled, and we may or may not have fixed
171 i686_mrfetch(struct mem_range_softc *sc)
173 struct mem_range_desc *mrd;
179 /* Get fixed-range MTRRs. */
180 if (sc->mr_cap & MR686_FIXMTRR) {
181 msr = MSR_MTRR64kBase;
182 for (i = 0; i < (MTRR_N64K / 8); i++, msr++) {
184 for (j = 0; j < 8; j++, mrd++) {
186 (mrd->mr_flags & ~MDF_ATTRMASK) |
187 i686_mtrr2mrt(msrv & 0xff) | MDF_ACTIVE;
188 if (mrd->mr_owner[0] == 0)
189 strcpy(mrd->mr_owner, mem_owner_bios);
193 msr = MSR_MTRR16kBase;
194 for (i = 0; i < (MTRR_N16K / 8); i++, msr++) {
196 for (j = 0; j < 8; j++, mrd++) {
198 (mrd->mr_flags & ~MDF_ATTRMASK) |
199 i686_mtrr2mrt(msrv & 0xff) | MDF_ACTIVE;
200 if (mrd->mr_owner[0] == 0)
201 strcpy(mrd->mr_owner, mem_owner_bios);
205 msr = MSR_MTRR4kBase;
206 for (i = 0; i < (MTRR_N4K / 8); i++, msr++) {
208 for (j = 0; j < 8; j++, mrd++) {
210 (mrd->mr_flags & ~MDF_ATTRMASK) |
211 i686_mtrr2mrt(msrv & 0xff) | MDF_ACTIVE;
212 if (mrd->mr_owner[0] == 0)
213 strcpy(mrd->mr_owner, mem_owner_bios);
219 /* Get remainder which must be variable MTRRs. */
220 msr = MSR_MTRRVarBase;
221 for (; (mrd - sc->mr_desc) < sc->mr_ndesc; msr += 2, mrd++) {
223 mrd->mr_flags = (mrd->mr_flags & ~MDF_ATTRMASK) |
224 i686_mtrr2mrt(msrv & MTRR_PHYSBASE_TYPE);
225 mrd->mr_base = msrv & mtrr_physmask;
226 msrv = rdmsr(msr + 1);
227 mrd->mr_flags = (msrv & MTRR_PHYSMASK_VALID) ?
228 (mrd->mr_flags | MDF_ACTIVE) :
229 (mrd->mr_flags & ~MDF_ACTIVE);
231 /* Compute the range from the mask. Ick. */
232 mrd->mr_len = (~(msrv & mtrr_physmask) &
233 (mtrr_physmask | 0xfffLL)) + 1;
234 if (!mrvalid(mrd->mr_base, mrd->mr_len))
235 mrd->mr_flags |= MDF_BOGUS;
237 /* If unclaimed and active, must be the BIOS. */
238 if ((mrd->mr_flags & MDF_ACTIVE) && (mrd->mr_owner[0] == 0))
239 strcpy(mrd->mr_owner, mem_owner_bios);
244 * Return the MTRR memory type matching a region's flags
247 i686_mtrrtype(int flags)
251 flags &= MDF_ATTRMASK;
253 for (i = 0; i < MTRRTOMRTLEN; i++) {
254 if (i686_mtrrtomrt[i] == MDF_UNKNOWN)
256 if (flags == i686_mtrrtomrt[i])
263 i686_mrt2mtrr(int flags, int oldval)
267 if ((val = i686_mtrrtype(flags)) == -1)
268 return (oldval & 0xff);
273 * Update running CPU(s) MTRRs to match the ranges in the descriptor
276 * XXX Must be called with interrupts enabled.
279 i686_mrstore(struct mem_range_softc *sc)
283 * We should use ipi_all_but_self() to call other CPUs into a
284 * locking gate, then call a target function to do this work.
285 * The "proper" solution involves a generalised locking gate
286 * implementation, not ready yet.
288 lwkt_cpusync_simple(-1, i686_mrstoreone_cpusync, sc);
299 i686_mrstoreone_cpusync(void *arg)
301 i686_mrstoreone(arg);
307 * Update the current CPU's MTRRs with those represented in the
308 * descriptor list. Note that we do this wholesale rather than just
309 * stuffing one entry; this is simpler (but slower, of course).
312 i686_mrstoreone(void *arg)
314 struct mem_range_softc *sc = arg;
315 struct mem_range_desc *mrd;
316 u_int64_t omsrv, msrv;
324 if (cr4save & CR4_PGE)
325 load_cr4(cr4save & ~CR4_PGE);
327 /* Disable caches (CD = 1, NW = 0). */
328 load_cr0((rcr0() & ~CR0_NW) | CR0_CD);
330 /* Flushes caches and TLBs. */
333 /* Disable MTRRs (E = 0). */
334 wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) & ~MTRR_DEF_ENABLE);
336 /* Set fixed-range MTRRs. */
337 if (sc->mr_cap & MR686_FIXMTRR) {
338 msr = MSR_MTRR64kBase;
339 for (i = 0; i < (MTRR_N64K / 8); i++, msr++) {
342 for (j = 7; j >= 0; j--) {
344 msrv |= i686_mrt2mtrr((mrd + j)->mr_flags,
350 msr = MSR_MTRR16kBase;
351 for (i = 0; i < (MTRR_N16K / 8); i++, msr++) {
354 for (j = 7; j >= 0; j--) {
356 msrv |= i686_mrt2mtrr((mrd + j)->mr_flags,
362 msr = MSR_MTRR4kBase;
363 for (i = 0; i < (MTRR_N4K / 8); i++, msr++) {
366 for (j = 7; j >= 0; j--) {
368 msrv |= i686_mrt2mtrr((mrd + j)->mr_flags,
376 /* Set remainder which must be variable MTRRs. */
377 msr = MSR_MTRRVarBase;
378 for (; (mrd - sc->mr_desc) < sc->mr_ndesc; msr += 2, mrd++) {
379 /* base/type register */
381 if (mrd->mr_flags & MDF_ACTIVE) {
382 msrv = mrd->mr_base & mtrr_physmask;
383 msrv |= i686_mrt2mtrr(mrd->mr_flags, omsrv);
389 /* mask/active register */
390 if (mrd->mr_flags & MDF_ACTIVE) {
391 msrv = MTRR_PHYSMASK_VALID |
392 (~(mrd->mr_len - 1) & mtrr_physmask);
396 wrmsr(msr + 1, msrv);
399 /* Flush caches, TLBs. */
403 wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) | MTRR_DEF_ENABLE);
405 /* Enable caches (CD = 0, NW = 0). */
406 load_cr0(rcr0() & ~(CR0_CD | CR0_NW));
413 * Hunt for the fixed MTRR referencing (addr)
415 static struct mem_range_desc *
416 i686_mtrrfixsearch(struct mem_range_softc *sc, u_int64_t addr)
418 struct mem_range_desc *mrd;
421 for (i = 0, mrd = sc->mr_desc; i < (MTRR_N64K + MTRR_N16K + MTRR_N4K);
423 if ((addr >= mrd->mr_base) &&
424 (addr < (mrd->mr_base + mrd->mr_len)))
430 * Try to satisfy the given range request by manipulating the fixed
431 * MTRRs that cover low memory.
433 * Note that we try to be generous here; we'll bloat the range out to
434 * the next higher/lower boundary to avoid the consumer having to know
435 * too much about the mechanisms here.
437 * XXX note that this will have to be updated when we start supporting
441 i686_mrsetlow(struct mem_range_softc *sc, struct mem_range_desc *mrd, int *arg)
443 struct mem_range_desc *first_md, *last_md, *curr_md;
446 if (((first_md = i686_mtrrfixsearch(sc, mrd->mr_base)) == NULL) ||
447 ((last_md = i686_mtrrfixsearch(sc, mrd->mr_base + mrd->mr_len - 1)) == NULL))
450 /* Check that we aren't doing something risky. */
451 if (!(mrd->mr_flags & MDF_FORCE))
452 for (curr_md = first_md; curr_md <= last_md; curr_md++) {
453 if ((curr_md->mr_flags & MDF_ATTRMASK) == MDF_UNKNOWN)
457 /* Set flags, clear set-by-firmware flag. */
458 for (curr_md = first_md; curr_md <= last_md; curr_md++) {
459 curr_md->mr_flags = mrcopyflags(curr_md->mr_flags &
460 ~MDF_FIRMWARE, mrd->mr_flags);
461 bcopy(mrd->mr_owner, curr_md->mr_owner, sizeof(mrd->mr_owner));
468 * Modify/add a variable MTRR to satisfy the request.
470 * XXX needs to be updated to properly support "busy" ranges.
473 i686_mrsetvariable(struct mem_range_softc *sc, struct mem_range_desc *mrd,
476 struct mem_range_desc *curr_md, *free_md;
480 * Scan the currently active variable descriptors, look for
481 * one we exactly match (straight takeover) and for possible
482 * accidental overlaps.
484 * Keep track of the first empty variable descriptor in case
485 * we can't perform a takeover.
487 i = (sc->mr_cap & MR686_FIXMTRR) ? MTRR_N64K + MTRR_N16K + MTRR_N4K : 0;
488 curr_md = sc->mr_desc + i;
490 for (; i < sc->mr_ndesc; i++, curr_md++) {
491 if (curr_md->mr_flags & MDF_ACTIVE) {
493 if ((curr_md->mr_base == mrd->mr_base) &&
494 (curr_md->mr_len == mrd->mr_len)) {
496 /* Whoops, owned by someone. */
497 if (curr_md->mr_flags & MDF_BUSY)
500 /* Check that we aren't doing something risky */
501 if (!(mrd->mr_flags & MDF_FORCE) &&
502 ((curr_md->mr_flags & MDF_ATTRMASK) ==
506 /* Ok, just hijack this entry. */
511 /* Non-exact overlap? */
512 if (mroverlap(curr_md, mrd)) {
513 /* Between conflicting region types? */
514 if (i686_mtrrconflict(curr_md->mr_flags,
518 } else if (free_md == NULL) {
523 /* Got somewhere to put it? */
527 /* Set up new descriptor. */
528 free_md->mr_base = mrd->mr_base;
529 free_md->mr_len = mrd->mr_len;
530 free_md->mr_flags = mrcopyflags(MDF_ACTIVE, mrd->mr_flags);
531 bcopy(mrd->mr_owner, free_md->mr_owner, sizeof(mrd->mr_owner));
536 * Handle requests to set memory range attributes by manipulating MTRRs.
539 i686_mrset(struct mem_range_softc *sc, struct mem_range_desc *mrd, int *arg)
541 struct mem_range_desc *targ;
545 case MEMRANGE_SET_UPDATE:
547 * Make sure that what's being asked for is even
550 if (!mrvalid(mrd->mr_base, mrd->mr_len) ||
551 i686_mtrrtype(mrd->mr_flags) == -1)
554 #define FIXTOP ((MTRR_N64K * 0x10000) + (MTRR_N16K * 0x4000) + (MTRR_N4K * 0x1000))
556 /* Are the "low memory" conditions applicable? */
557 if ((sc->mr_cap & MR686_FIXMTRR) &&
558 ((mrd->mr_base + mrd->mr_len) <= FIXTOP)) {
559 if ((error = i686_mrsetlow(sc, mrd, arg)) != 0)
562 /* It's time to play with variable MTRRs. */
563 if ((error = i686_mrsetvariable(sc, mrd, arg)) != 0)
568 case MEMRANGE_SET_REMOVE:
569 if ((targ = mem_range_match(sc, mrd)) == NULL)
571 if (targ->mr_flags & MDF_FIXACTIVE)
573 if (targ->mr_flags & MDF_BUSY)
575 targ->mr_flags &= ~MDF_ACTIVE;
576 targ->mr_owner[0] = 0;
583 /* Update the hardware. */
586 /* Refetch to see where we're at. */
592 * Work out how many ranges we support, initialise storage for them,
593 * and fetch the initial settings.
596 i686_mrinit(struct mem_range_softc *sc)
598 struct mem_range_desc *mrd;
600 int i, nmdesc = 0, pabits;
602 mtrrcap = rdmsr(MSR_MTRRcap);
603 mtrrdef = rdmsr(MSR_MTRRdefType);
605 /* For now, bail out if MTRRs are not enabled. */
606 if (!(mtrrdef & MTRR_DEF_ENABLE)) {
608 kprintf("CPU supports MTRRs but not enabled\n");
611 nmdesc = mtrrcap & MTRR_CAP_VCNT;
613 kprintf("Pentium Pro MTRR support enabled\n");
616 * Determine the size of the PhysMask and PhysBase fields in
617 * the variable range MTRRs. If the extended CPUID 0x80000008
618 * is present, use that to figure out how many physical
619 * address bits the CPU supports. Otherwise, default to 36
622 if (cpu_exthigh >= 0x80000008) {
623 do_cpuid(0x80000008, regs);
624 pabits = regs[0] & 0xff;
627 mtrr_physmask = ((1ULL << pabits) - 1) & ~0xfffULL;
629 /* If fixed MTRRs supported and enabled. */
630 if ((mtrrcap & MTRR_CAP_FIXED) && (mtrrdef & MTRR_DEF_FIXED_ENABLE)) {
631 sc->mr_cap = MR686_FIXMTRR;
632 nmdesc += MTRR_N64K + MTRR_N16K + MTRR_N4K;
635 sc->mr_desc = kmalloc(nmdesc * sizeof(struct mem_range_desc), M_MEMDESC,
637 sc->mr_ndesc = nmdesc;
641 /* Populate the fixed MTRR entries' base/length. */
642 if (sc->mr_cap & MR686_FIXMTRR) {
643 for (i = 0; i < MTRR_N64K; i++, mrd++) {
644 mrd->mr_base = i * 0x10000;
645 mrd->mr_len = 0x10000;
646 mrd->mr_flags = MDF_FIXBASE | MDF_FIXLEN |
649 for (i = 0; i < MTRR_N16K; i++, mrd++) {
650 mrd->mr_base = i * 0x4000 + 0x80000;
651 mrd->mr_len = 0x4000;
652 mrd->mr_flags = MDF_FIXBASE | MDF_FIXLEN |
655 for (i = 0; i < MTRR_N4K; i++, mrd++) {
656 mrd->mr_base = i * 0x1000 + 0xc0000;
657 mrd->mr_len = 0x1000;
658 mrd->mr_flags = MDF_FIXBASE | MDF_FIXLEN |
664 * Get current settings, anything set now is considered to
665 * have been set by the firmware. (XXX has something already
670 for (i = 0; i < sc->mr_ndesc; i++, mrd++) {
671 if (mrd->mr_flags & MDF_ACTIVE)
672 mrd->mr_flags |= MDF_FIRMWARE;
679 i686_mrAPinit_cpusync(void *arg)
687 * Initialise MTRRs on an AP after the BSP has run the init code.
690 i686_mrAPinit(struct mem_range_softc *sc)
694 wrmsr(MSR_MTRRdefType, mtrrdef);
698 * Re-initialise running CPU(s) MTRRs to match the ranges in the descriptor
701 * XXX Must be called with interrupts enabled.
704 i686_mrreinit(struct mem_range_softc *sc)
708 * We should use ipi_all_but_self() to call other CPUs into a
709 * locking gate, then call a target function to do this work.
710 * The "proper" solution involves a generalised locking gate
711 * implementation, not ready yet.
713 lwkt_cpusync_simple(-1, i686_mrAPinit_cpusync, sc);
722 i686_mem_drvinit(void *unused)
727 if (!(cpu_feature & CPUID_MTRR))
729 if ((cpu_id & 0xf00) != 0x600 && (cpu_id & 0xf00) != 0xf00)
731 switch (cpu_vendor_id) {
732 case CPU_VENDOR_INTEL:
735 case CPU_VENDOR_CENTAUR:
736 if (cpu_exthigh >= 0x80000008)
742 mem_range_softc.mr_op = &i686_mrops;
744 SYSINIT(i686memdev, SI_SUB_DRIVERS, SI_ORDER_FIRST, i686_mem_drvinit, NULL);