2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
32 #include <linux/kernel.h>
33 #include <linux/moduleparam.h>
34 #include <linux/pwm.h>
35 #include "intel_drv.h"
37 #define CRC_PMIC_PWM_PERIOD_NS 21333
40 intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
41 struct drm_display_mode *adjusted_mode)
43 drm_mode_copy(adjusted_mode, fixed_mode);
45 drm_mode_set_crtcinfo(adjusted_mode, 0);
49 * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
51 * @fixed_mode : panel native mode
52 * @connector: LVDS/eDP connector
54 * Return downclock_avail
55 * Find the reduced downclock for LVDS/eDP in EDID.
57 struct drm_display_mode *
58 intel_find_panel_downclock(struct drm_device *dev,
59 struct drm_display_mode *fixed_mode,
60 struct drm_connector *connector)
62 struct drm_display_mode *scan, *tmp_mode;
65 temp_downclock = fixed_mode->clock;
68 list_for_each_entry(scan, &connector->probed_modes, head) {
70 * If one mode has the same resolution with the fixed_panel
71 * mode while they have the different refresh rate, it means
72 * that the reduced downclock is found. In such
73 * case we can set the different FPx0/1 to dynamically select
74 * between low and high frequency.
76 if (scan->hdisplay == fixed_mode->hdisplay &&
77 scan->hsync_start == fixed_mode->hsync_start &&
78 scan->hsync_end == fixed_mode->hsync_end &&
79 scan->htotal == fixed_mode->htotal &&
80 scan->vdisplay == fixed_mode->vdisplay &&
81 scan->vsync_start == fixed_mode->vsync_start &&
82 scan->vsync_end == fixed_mode->vsync_end &&
83 scan->vtotal == fixed_mode->vtotal) {
84 if (scan->clock < temp_downclock) {
86 * The downclock is already found. But we
87 * expect to find the lower downclock.
89 temp_downclock = scan->clock;
95 if (temp_downclock < fixed_mode->clock)
96 return drm_mode_duplicate(dev, tmp_mode);
101 /* adjusted_mode has been preset to be the panel's fixed mode */
103 intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
104 struct intel_crtc_state *pipe_config,
107 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
108 int x = 0, y = 0, width = 0, height = 0;
110 /* Native modes don't need fitting */
111 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
112 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
115 switch (fitting_mode) {
116 case DRM_MODE_SCALE_CENTER:
117 width = pipe_config->pipe_src_w;
118 height = pipe_config->pipe_src_h;
119 x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
120 y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
123 case DRM_MODE_SCALE_ASPECT:
124 /* Scale but preserve the aspect ratio */
126 u32 scaled_width = adjusted_mode->crtc_hdisplay
127 * pipe_config->pipe_src_h;
128 u32 scaled_height = pipe_config->pipe_src_w
129 * adjusted_mode->crtc_vdisplay;
130 if (scaled_width > scaled_height) { /* pillar */
131 width = scaled_height / pipe_config->pipe_src_h;
134 x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
136 height = adjusted_mode->crtc_vdisplay;
137 } else if (scaled_width < scaled_height) { /* letter */
138 height = scaled_width / pipe_config->pipe_src_w;
141 y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
143 width = adjusted_mode->crtc_hdisplay;
146 width = adjusted_mode->crtc_hdisplay;
147 height = adjusted_mode->crtc_vdisplay;
152 case DRM_MODE_SCALE_FULLSCREEN:
154 width = adjusted_mode->crtc_hdisplay;
155 height = adjusted_mode->crtc_vdisplay;
159 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
164 pipe_config->pch_pfit.pos = (x << 16) | y;
165 pipe_config->pch_pfit.size = (width << 16) | height;
166 pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
170 centre_horizontally(struct drm_display_mode *adjusted_mode,
173 u32 border, sync_pos, blank_width, sync_width;
175 /* keep the hsync and hblank widths constant */
176 sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
177 blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start;
178 sync_pos = (blank_width - sync_width + 1) / 2;
180 border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
181 border += border & 1; /* make the border even */
183 adjusted_mode->crtc_hdisplay = width;
184 adjusted_mode->crtc_hblank_start = width + border;
185 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width;
187 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
188 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
192 centre_vertically(struct drm_display_mode *adjusted_mode,
195 u32 border, sync_pos, blank_width, sync_width;
197 /* keep the vsync and vblank widths constant */
198 sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
199 blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start;
200 sync_pos = (blank_width - sync_width + 1) / 2;
202 border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
204 adjusted_mode->crtc_vdisplay = height;
205 adjusted_mode->crtc_vblank_start = height + border;
206 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width;
208 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos;
209 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
212 static inline u32 panel_fitter_scaling(u32 source, u32 target)
215 * Floating point operation is not supported. So the FACTOR
216 * is defined, which can avoid the floating point computation
217 * when calculating the panel ratio.
220 #define FACTOR (1 << ACCURACY)
221 u32 ratio = source * FACTOR / target;
222 return (FACTOR * ratio + FACTOR/2) / FACTOR;
225 static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
228 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
229 u32 scaled_width = adjusted_mode->crtc_hdisplay *
230 pipe_config->pipe_src_h;
231 u32 scaled_height = pipe_config->pipe_src_w *
232 adjusted_mode->crtc_vdisplay;
234 /* 965+ is easy, it does everything in hw */
235 if (scaled_width > scaled_height)
236 *pfit_control |= PFIT_ENABLE |
238 else if (scaled_width < scaled_height)
239 *pfit_control |= PFIT_ENABLE |
241 else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w)
242 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
245 static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
246 u32 *pfit_control, u32 *pfit_pgm_ratios,
249 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
250 u32 scaled_width = adjusted_mode->crtc_hdisplay *
251 pipe_config->pipe_src_h;
252 u32 scaled_height = pipe_config->pipe_src_w *
253 adjusted_mode->crtc_vdisplay;
257 * For earlier chips we have to calculate the scaling
258 * ratio by hand and program it into the
259 * PFIT_PGM_RATIO register
261 if (scaled_width > scaled_height) { /* pillar */
262 centre_horizontally(adjusted_mode,
264 pipe_config->pipe_src_h);
266 *border = LVDS_BORDER_ENABLE;
267 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) {
268 bits = panel_fitter_scaling(pipe_config->pipe_src_h,
269 adjusted_mode->crtc_vdisplay);
271 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
272 bits << PFIT_VERT_SCALE_SHIFT);
273 *pfit_control |= (PFIT_ENABLE |
274 VERT_INTERP_BILINEAR |
275 HORIZ_INTERP_BILINEAR);
277 } else if (scaled_width < scaled_height) { /* letter */
278 centre_vertically(adjusted_mode,
280 pipe_config->pipe_src_w);
282 *border = LVDS_BORDER_ENABLE;
283 if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
284 bits = panel_fitter_scaling(pipe_config->pipe_src_w,
285 adjusted_mode->crtc_hdisplay);
287 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
288 bits << PFIT_VERT_SCALE_SHIFT);
289 *pfit_control |= (PFIT_ENABLE |
290 VERT_INTERP_BILINEAR |
291 HORIZ_INTERP_BILINEAR);
294 /* Aspects match, Let hw scale both directions */
295 *pfit_control |= (PFIT_ENABLE |
296 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
297 VERT_INTERP_BILINEAR |
298 HORIZ_INTERP_BILINEAR);
302 void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
303 struct intel_crtc_state *pipe_config,
306 struct drm_device *dev = intel_crtc->base.dev;
307 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
308 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
310 /* Native modes don't need fitting */
311 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
312 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
315 switch (fitting_mode) {
316 case DRM_MODE_SCALE_CENTER:
318 * For centered modes, we have to calculate border widths &
319 * heights and modify the values programmed into the CRTC.
321 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
322 centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
323 border = LVDS_BORDER_ENABLE;
325 case DRM_MODE_SCALE_ASPECT:
326 /* Scale but preserve the aspect ratio */
327 if (INTEL_INFO(dev)->gen >= 4)
328 i965_scale_aspect(pipe_config, &pfit_control);
330 i9xx_scale_aspect(pipe_config, &pfit_control,
331 &pfit_pgm_ratios, &border);
333 case DRM_MODE_SCALE_FULLSCREEN:
335 * Full scaling, even if it changes the aspect ratio.
336 * Fortunately this is all done for us in hw.
338 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay ||
339 pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
340 pfit_control |= PFIT_ENABLE;
341 if (INTEL_INFO(dev)->gen >= 4)
342 pfit_control |= PFIT_SCALING_AUTO;
344 pfit_control |= (VERT_AUTO_SCALE |
345 VERT_INTERP_BILINEAR |
347 HORIZ_INTERP_BILINEAR);
351 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
355 /* 965+ wants fuzzy fitting */
356 /* FIXME: handle multiple panels by failing gracefully */
357 if (INTEL_INFO(dev)->gen >= 4)
358 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
362 if ((pfit_control & PFIT_ENABLE) == 0) {
367 /* Make sure pre-965 set dither correctly for 18bpp panels. */
368 if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
369 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
371 pipe_config->gmch_pfit.control = pfit_control;
372 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
373 pipe_config->gmch_pfit.lvds_border_bits = border;
376 enum drm_connector_status
377 intel_panel_detect(struct drm_device *dev)
379 struct drm_i915_private *dev_priv = dev->dev_private;
381 /* Assume that the BIOS does not lie through the OpRegion... */
382 if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) {
383 return *dev_priv->opregion.lid_state & 0x1 ?
384 connector_status_connected :
385 connector_status_disconnected;
388 switch (i915.panel_ignore_lid) {
390 return connector_status_connected;
392 return connector_status_disconnected;
394 return connector_status_unknown;
399 * scale - scale values from one range to another
401 * @source_val: value in range [@source_min..@source_max]
403 * Return @source_val in range [@source_min..@source_max] scaled to range
404 * [@target_min..@target_max].
406 static uint32_t scale(uint32_t source_val,
407 uint32_t source_min, uint32_t source_max,
408 uint32_t target_min, uint32_t target_max)
412 WARN_ON(source_min > source_max);
413 WARN_ON(target_min > target_max);
416 source_val = clamp(source_val, source_min, source_max);
418 /* avoid overflows */
419 target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) *
420 (target_max - target_min), source_max - source_min);
421 target_val += target_min;
426 /* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
427 static inline u32 scale_user_to_hw(struct intel_connector *connector,
428 u32 user_level, u32 user_max)
430 struct intel_panel *panel = &connector->panel;
432 return scale(user_level, 0, user_max,
433 panel->backlight.min, panel->backlight.max);
436 /* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
437 * to [hw_min..hw_max]. */
438 static inline u32 clamp_user_to_hw(struct intel_connector *connector,
439 u32 user_level, u32 user_max)
441 struct intel_panel *panel = &connector->panel;
444 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
445 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
450 /* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
451 static inline u32 scale_hw_to_user(struct intel_connector *connector,
452 u32 hw_level, u32 user_max)
454 struct intel_panel *panel = &connector->panel;
456 return scale(hw_level, panel->backlight.min, panel->backlight.max,
460 static u32 intel_panel_compute_brightness(struct intel_connector *connector,
463 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
464 struct intel_panel *panel = &connector->panel;
466 WARN_ON(panel->backlight.max == 0);
468 if (i915.invert_brightness < 0)
471 if (i915.invert_brightness > 0 ||
472 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
473 return panel->backlight.max - val;
479 static u32 lpt_get_backlight(struct intel_connector *connector)
481 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
483 return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
486 static u32 pch_get_backlight(struct intel_connector *connector)
488 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
490 return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
493 static u32 i9xx_get_backlight(struct intel_connector *connector)
495 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
496 struct intel_panel *panel = &connector->panel;
499 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
500 if (INTEL_INFO(dev_priv)->gen < 4)
503 if (panel->backlight.combination_mode) {
506 pci_read_config_byte(dev_priv->dev->pdev, LBPC, &lbpc);
513 static u32 _vlv_get_backlight(struct drm_i915_private *dev_priv, enum i915_pipe pipe)
515 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
518 return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
521 static u32 vlv_get_backlight(struct intel_connector *connector)
523 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
524 enum i915_pipe pipe = intel_get_pipe_from_connector(connector);
526 return _vlv_get_backlight(dev_priv, pipe);
529 static u32 bxt_get_backlight(struct intel_connector *connector)
531 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
532 struct intel_panel *panel = &connector->panel;
534 return I915_READ(BXT_BLC_PWM_DUTY(panel->backlight.controller));
537 static u32 pwm_get_backlight(struct intel_connector *connector)
539 struct intel_panel *panel = &connector->panel;
542 duty_ns = pwm_get_duty_cycle(panel->backlight.pwm);
543 return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS);
547 static u32 intel_panel_get_backlight(struct intel_connector *connector)
549 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
550 struct intel_panel *panel = &connector->panel;
553 mutex_lock(&dev_priv->backlight_lock);
555 if (panel->backlight.enabled) {
556 val = panel->backlight.get(connector);
557 val = intel_panel_compute_brightness(connector, val);
560 mutex_unlock(&dev_priv->backlight_lock);
562 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
567 static void lpt_set_backlight(struct intel_connector *connector, u32 level)
569 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
570 u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
571 I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
574 static void pch_set_backlight(struct intel_connector *connector, u32 level)
576 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
579 tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
580 I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
583 static void i9xx_set_backlight(struct intel_connector *connector, u32 level)
585 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
586 struct intel_panel *panel = &connector->panel;
589 WARN_ON(panel->backlight.max == 0);
591 if (panel->backlight.combination_mode) {
594 lbpc = level * 0xfe / panel->backlight.max + 1;
596 pci_write_config_byte(dev_priv->dev->pdev, LBPC, lbpc);
599 if (IS_GEN4(dev_priv)) {
600 mask = BACKLIGHT_DUTY_CYCLE_MASK;
603 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
606 tmp = I915_READ(BLC_PWM_CTL) & ~mask;
607 I915_WRITE(BLC_PWM_CTL, tmp | level);
610 static void vlv_set_backlight(struct intel_connector *connector, u32 level)
612 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
613 enum i915_pipe pipe = intel_get_pipe_from_connector(connector);
616 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
619 tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
620 I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
623 static void bxt_set_backlight(struct intel_connector *connector, u32 level)
625 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
626 struct intel_panel *panel = &connector->panel;
628 I915_WRITE(BXT_BLC_PWM_DUTY(panel->backlight.controller), level);
631 static void pwm_set_backlight(struct intel_connector *connector, u32 level)
633 struct intel_panel *panel = &connector->panel;
634 int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);
636 pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS);
640 intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level)
642 struct intel_panel *panel = &connector->panel;
644 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
646 level = intel_panel_compute_brightness(connector, level);
647 panel->backlight.set(connector, level);
650 /* set backlight brightness to level in range [0..max], scaling wrt hw min */
651 static void intel_panel_set_backlight(struct intel_connector *connector,
652 u32 user_level, u32 user_max)
654 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
655 struct intel_panel *panel = &connector->panel;
658 if (!panel->backlight.present)
661 mutex_lock(&dev_priv->backlight_lock);
663 WARN_ON(panel->backlight.max == 0);
665 hw_level = scale_user_to_hw(connector, user_level, user_max);
666 panel->backlight.level = hw_level;
668 if (panel->backlight.enabled)
669 intel_panel_actually_set_backlight(connector, hw_level);
671 mutex_unlock(&dev_priv->backlight_lock);
674 /* set backlight brightness to level in range [0..max], assuming hw min is
677 void intel_panel_set_backlight_acpi(struct intel_connector *connector,
678 u32 user_level, u32 user_max)
680 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
681 struct intel_panel *panel = &connector->panel;
682 enum i915_pipe pipe = intel_get_pipe_from_connector(connector);
686 * INVALID_PIPE may occur during driver init because
687 * connection_mutex isn't held across the entire backlight
688 * setup + modeset readout, and the BIOS can issue the
689 * requests at any time.
691 if (!panel->backlight.present || pipe == INVALID_PIPE)
694 mutex_lock(&dev_priv->backlight_lock);
696 WARN_ON(panel->backlight.max == 0);
698 hw_level = clamp_user_to_hw(connector, user_level, user_max);
699 panel->backlight.level = hw_level;
701 if (panel->backlight.device)
702 panel->backlight.device->props.brightness =
703 scale_hw_to_user(connector,
704 panel->backlight.level,
705 panel->backlight.device->props.max_brightness);
707 if (panel->backlight.enabled)
708 intel_panel_actually_set_backlight(connector, hw_level);
710 mutex_unlock(&dev_priv->backlight_lock);
713 static void lpt_disable_backlight(struct intel_connector *connector)
715 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
718 intel_panel_actually_set_backlight(connector, 0);
721 * Although we don't support or enable CPU PWM with LPT/SPT based
722 * systems, it may have been enabled prior to loading the
723 * driver. Disable to avoid warnings on LCPLL disable.
725 * This needs rework if we need to add support for CPU PWM on PCH split
728 tmp = I915_READ(BLC_PWM_CPU_CTL2);
729 if (tmp & BLM_PWM_ENABLE) {
730 DRM_DEBUG_KMS("cpu backlight was enabled, disabling\n");
731 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
734 tmp = I915_READ(BLC_PWM_PCH_CTL1);
735 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
738 static void pch_disable_backlight(struct intel_connector *connector)
740 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
743 intel_panel_actually_set_backlight(connector, 0);
745 tmp = I915_READ(BLC_PWM_CPU_CTL2);
746 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
748 tmp = I915_READ(BLC_PWM_PCH_CTL1);
749 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
752 static void i9xx_disable_backlight(struct intel_connector *connector)
754 intel_panel_actually_set_backlight(connector, 0);
757 static void i965_disable_backlight(struct intel_connector *connector)
759 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
762 intel_panel_actually_set_backlight(connector, 0);
764 tmp = I915_READ(BLC_PWM_CTL2);
765 I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
768 static void vlv_disable_backlight(struct intel_connector *connector)
770 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
771 enum i915_pipe pipe = intel_get_pipe_from_connector(connector);
774 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
777 intel_panel_actually_set_backlight(connector, 0);
779 tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
780 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
783 static void bxt_disable_backlight(struct intel_connector *connector)
785 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
786 struct intel_panel *panel = &connector->panel;
789 intel_panel_actually_set_backlight(connector, 0);
791 tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
792 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
793 tmp & ~BXT_BLC_PWM_ENABLE);
795 if (panel->backlight.controller == 1) {
796 val = I915_READ(UTIL_PIN_CTL);
797 val &= ~UTIL_PIN_ENABLE;
798 I915_WRITE(UTIL_PIN_CTL, val);
802 static void pwm_disable_backlight(struct intel_connector *connector)
804 struct intel_panel *panel = &connector->panel;
806 /* Disable the backlight */
807 pwm_config(panel->backlight.pwm, 0, CRC_PMIC_PWM_PERIOD_NS);
808 usleep_range(2000, 3000);
809 pwm_disable(panel->backlight.pwm);
812 void intel_panel_disable_backlight(struct intel_connector *connector)
814 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
815 struct intel_panel *panel = &connector->panel;
817 if (!panel->backlight.present)
821 * Do not disable backlight on the vga_switcheroo path. When switching
822 * away from i915, the other client may depend on i915 to handle the
823 * backlight. This will leave the backlight on unnecessarily when
824 * another client is not activated.
826 if (dev_priv->dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
827 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
831 mutex_lock(&dev_priv->backlight_lock);
833 if (panel->backlight.device)
834 panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
835 panel->backlight.enabled = false;
836 panel->backlight.disable(connector);
838 mutex_unlock(&dev_priv->backlight_lock);
841 static void lpt_enable_backlight(struct intel_connector *connector)
843 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
844 struct intel_panel *panel = &connector->panel;
845 u32 pch_ctl1, pch_ctl2;
847 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
848 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
849 DRM_DEBUG_KMS("pch backlight already enabled\n");
850 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
851 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
854 pch_ctl2 = panel->backlight.max << 16;
855 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
858 if (panel->backlight.active_low_pwm)
859 pch_ctl1 |= BLM_PCH_POLARITY;
861 /* After LPT, override is the default. */
862 if (HAS_PCH_LPT(dev_priv))
863 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
865 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
866 POSTING_READ(BLC_PWM_PCH_CTL1);
867 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
869 /* This won't stick until the above enable. */
870 intel_panel_actually_set_backlight(connector, panel->backlight.level);
873 static void pch_enable_backlight(struct intel_connector *connector)
875 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
876 struct intel_panel *panel = &connector->panel;
877 enum i915_pipe pipe = intel_get_pipe_from_connector(connector);
878 enum transcoder cpu_transcoder =
879 intel_pipe_to_cpu_transcoder(dev_priv, pipe);
880 u32 cpu_ctl2, pch_ctl1, pch_ctl2;
882 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
883 if (cpu_ctl2 & BLM_PWM_ENABLE) {
884 DRM_DEBUG_KMS("cpu backlight already enabled\n");
885 cpu_ctl2 &= ~BLM_PWM_ENABLE;
886 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
889 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
890 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
891 DRM_DEBUG_KMS("pch backlight already enabled\n");
892 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
893 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
896 if (cpu_transcoder == TRANSCODER_EDP)
897 cpu_ctl2 = BLM_TRANSCODER_EDP;
899 cpu_ctl2 = BLM_PIPE(cpu_transcoder);
900 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
901 POSTING_READ(BLC_PWM_CPU_CTL2);
902 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
904 /* This won't stick until the above enable. */
905 intel_panel_actually_set_backlight(connector, panel->backlight.level);
907 pch_ctl2 = panel->backlight.max << 16;
908 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
911 if (panel->backlight.active_low_pwm)
912 pch_ctl1 |= BLM_PCH_POLARITY;
914 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
915 POSTING_READ(BLC_PWM_PCH_CTL1);
916 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
919 static void i9xx_enable_backlight(struct intel_connector *connector)
921 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
922 struct intel_panel *panel = &connector->panel;
925 ctl = I915_READ(BLC_PWM_CTL);
926 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
927 DRM_DEBUG_KMS("backlight already enabled\n");
928 I915_WRITE(BLC_PWM_CTL, 0);
931 freq = panel->backlight.max;
932 if (panel->backlight.combination_mode)
936 if (panel->backlight.combination_mode)
937 ctl |= BLM_LEGACY_MODE;
938 if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm)
939 ctl |= BLM_POLARITY_PNV;
941 I915_WRITE(BLC_PWM_CTL, ctl);
942 POSTING_READ(BLC_PWM_CTL);
944 /* XXX: combine this into above write? */
945 intel_panel_actually_set_backlight(connector, panel->backlight.level);
948 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
949 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
950 * that has backlight.
952 if (IS_GEN2(dev_priv))
953 I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
956 static void i965_enable_backlight(struct intel_connector *connector)
958 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
959 struct intel_panel *panel = &connector->panel;
960 enum i915_pipe pipe = intel_get_pipe_from_connector(connector);
963 ctl2 = I915_READ(BLC_PWM_CTL2);
964 if (ctl2 & BLM_PWM_ENABLE) {
965 DRM_DEBUG_KMS("backlight already enabled\n");
966 ctl2 &= ~BLM_PWM_ENABLE;
967 I915_WRITE(BLC_PWM_CTL2, ctl2);
970 freq = panel->backlight.max;
971 if (panel->backlight.combination_mode)
975 I915_WRITE(BLC_PWM_CTL, ctl);
977 ctl2 = BLM_PIPE(pipe);
978 if (panel->backlight.combination_mode)
979 ctl2 |= BLM_COMBINATION_MODE;
980 if (panel->backlight.active_low_pwm)
981 ctl2 |= BLM_POLARITY_I965;
982 I915_WRITE(BLC_PWM_CTL2, ctl2);
983 POSTING_READ(BLC_PWM_CTL2);
984 I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
986 intel_panel_actually_set_backlight(connector, panel->backlight.level);
989 static void vlv_enable_backlight(struct intel_connector *connector)
991 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
992 struct intel_panel *panel = &connector->panel;
993 enum i915_pipe pipe = intel_get_pipe_from_connector(connector);
996 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
999 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
1000 if (ctl2 & BLM_PWM_ENABLE) {
1001 DRM_DEBUG_KMS("backlight already enabled\n");
1002 ctl2 &= ~BLM_PWM_ENABLE;
1003 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
1006 ctl = panel->backlight.max << 16;
1007 I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
1009 /* XXX: combine this into above write? */
1010 intel_panel_actually_set_backlight(connector, panel->backlight.level);
1013 if (panel->backlight.active_low_pwm)
1014 ctl2 |= BLM_POLARITY_I965;
1015 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
1016 POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
1017 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
1020 static void bxt_enable_backlight(struct intel_connector *connector)
1022 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1023 struct intel_panel *panel = &connector->panel;
1024 enum i915_pipe pipe = intel_get_pipe_from_connector(connector);
1027 /* To use 2nd set of backlight registers, utility pin has to be
1028 * enabled with PWM mode.
1029 * The field should only be changed when the utility pin is disabled
1031 if (panel->backlight.controller == 1) {
1032 val = I915_READ(UTIL_PIN_CTL);
1033 if (val & UTIL_PIN_ENABLE) {
1034 DRM_DEBUG_KMS("util pin already enabled\n");
1035 val &= ~UTIL_PIN_ENABLE;
1036 I915_WRITE(UTIL_PIN_CTL, val);
1040 if (panel->backlight.util_pin_active_low)
1041 val |= UTIL_PIN_POLARITY;
1042 I915_WRITE(UTIL_PIN_CTL, val | UTIL_PIN_PIPE(pipe) |
1043 UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE);
1046 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1047 if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1048 DRM_DEBUG_KMS("backlight already enabled\n");
1049 pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1050 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1054 I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
1055 panel->backlight.max);
1057 intel_panel_actually_set_backlight(connector, panel->backlight.level);
1060 if (panel->backlight.active_low_pwm)
1061 pwm_ctl |= BXT_BLC_PWM_POLARITY;
1063 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
1064 POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1065 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1066 pwm_ctl | BXT_BLC_PWM_ENABLE);
1069 static void pwm_enable_backlight(struct intel_connector *connector)
1071 struct intel_panel *panel = &connector->panel;
1073 pwm_enable(panel->backlight.pwm);
1074 intel_panel_actually_set_backlight(connector, panel->backlight.level);
1077 void intel_panel_enable_backlight(struct intel_connector *connector)
1079 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1080 struct intel_panel *panel = &connector->panel;
1081 enum i915_pipe pipe = intel_get_pipe_from_connector(connector);
1083 if (!panel->backlight.present)
1086 DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
1088 mutex_lock(&dev_priv->backlight_lock);
1090 WARN_ON(panel->backlight.max == 0);
1092 if (panel->backlight.level <= panel->backlight.min) {
1093 panel->backlight.level = panel->backlight.max;
1094 if (panel->backlight.device)
1095 panel->backlight.device->props.brightness =
1096 scale_hw_to_user(connector,
1097 panel->backlight.level,
1098 panel->backlight.device->props.max_brightness);
1101 panel->backlight.enable(connector);
1102 panel->backlight.enabled = true;
1103 if (panel->backlight.device)
1104 panel->backlight.device->props.power = FB_BLANK_UNBLANK;
1106 mutex_unlock(&dev_priv->backlight_lock);
1109 #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
1111 static int intel_backlight_device_update_status(struct backlight_device *bd)
1114 struct intel_connector *connector = bl_get_data(bd);
1115 struct intel_panel *panel = &connector->panel;
1116 struct drm_device *dev = connector->base.dev;
1118 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1119 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
1120 bd->props.brightness, bd->props.max_brightness);
1121 intel_panel_set_backlight(connector, bd->props.brightness,
1122 bd->props.max_brightness);
1125 * Allow flipping bl_power as a sub-state of enabled. Sadly the
1126 * backlight class device does not make it easy to to differentiate
1127 * between callbacks for brightness and bl_power, so our backlight_power
1128 * callback needs to take this into account.
1130 if (panel->backlight.enabled) {
1131 if (panel->backlight.power) {
1132 bool enable = bd->props.power == FB_BLANK_UNBLANK &&
1133 bd->props.brightness != 0;
1134 panel->backlight.power(connector, enable);
1137 bd->props.power = FB_BLANK_POWERDOWN;
1140 drm_modeset_unlock(&dev->mode_config.connection_mutex);
1145 static int intel_backlight_device_get_brightness(struct backlight_device *bd)
1148 struct intel_connector *connector = bl_get_data(bd);
1149 struct drm_device *dev = connector->base.dev;
1150 struct drm_i915_private *dev_priv = dev->dev_private;
1154 intel_runtime_pm_get(dev_priv);
1155 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1157 hw_level = intel_panel_get_backlight(connector);
1158 ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);
1160 drm_modeset_unlock(&dev->mode_config.connection_mutex);
1161 intel_runtime_pm_put(dev_priv);
1168 static const struct backlight_ops intel_backlight_device_ops = {
1169 .update_status = intel_backlight_device_update_status,
1170 .get_brightness = intel_backlight_device_get_brightness,
1174 static int intel_backlight_device_register(struct intel_connector *connector)
1176 struct intel_panel *panel = &connector->panel;
1177 struct backlight_properties props;
1179 if (WARN_ON(panel->backlight.device))
1182 if (!panel->backlight.present)
1185 WARN_ON(panel->backlight.max == 0);
1187 memset(&props, 0, sizeof(props));
1188 props.type = BACKLIGHT_RAW;
1191 * Note: Everything should work even if the backlight device max
1192 * presented to the userspace is arbitrarily chosen.
1194 props.max_brightness = panel->backlight.max;
1195 props.brightness = scale_hw_to_user(connector,
1196 panel->backlight.level,
1197 props.max_brightness);
1199 if (panel->backlight.enabled)
1200 props.power = FB_BLANK_UNBLANK;
1202 props.power = FB_BLANK_POWERDOWN;
1205 * Note: using the same name independent of the connector prevents
1206 * registration of multiple backlight devices in the driver.
1209 panel->backlight.device =
1210 backlight_device_register("intel_backlight",
1211 connector->base.kdev,
1213 &intel_backlight_device_ops, &props);
1215 if (IS_ERR(panel->backlight.device)) {
1216 DRM_ERROR("Failed to register backlight: %ld\n",
1217 PTR_ERR(panel->backlight.device));
1218 panel->backlight.device = NULL;
1222 DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n",
1223 connector->base.name);
1229 static void intel_backlight_device_unregister(struct intel_connector *connector)
1232 struct intel_panel *panel = &connector->panel;
1234 if (panel->backlight.device) {
1235 backlight_device_unregister(panel->backlight.device);
1236 panel->backlight.device = NULL;
1240 #else /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1241 static int intel_backlight_device_register(struct intel_connector *connector)
1245 static void intel_backlight_device_unregister(struct intel_connector *connector)
1248 #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1251 * BXT: PWM clock frequency = 19.2 MHz.
1253 static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1255 return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz);
1259 * SPT: This value represents the period of the PWM stream in clock periods
1260 * multiplied by 16 (default increment) or 128 (alternate increment selected in
1261 * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
1263 static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1265 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1268 if (I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY)
1273 return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul);
1277 * LPT: This value represents the period of the PWM stream in clock periods
1278 * multiplied by 128 (default increment) or 16 (alternate increment, selected in
1279 * LPT SOUTH_CHICKEN2 register bit 5).
1281 static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1283 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1286 if (I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY)
1291 if (HAS_PCH_LPT_H(dev_priv))
1292 clock = MHz(135); /* LPT:H */
1294 clock = MHz(24); /* LPT:LP */
1296 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1300 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH
1301 * display raw clocks multiplied by 128.
1303 static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1305 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1307 return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz * 128);
1311 * Gen2: This field determines the number of time base events (display core
1312 * clock frequency/32) in total for a complete cycle of modulated backlight
1315 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock)
1318 static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1320 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1323 if (IS_PINEVIEW(dev_priv))
1324 clock = KHz(dev_priv->rawclk_freq);
1326 clock = KHz(dev_priv->cdclk_freq);
1328 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32);
1332 * Gen4: This value represents the period of the PWM stream in display core
1333 * clocks ([DevCTG] HRAW clocks) multiplied by 128.
1336 static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1338 struct drm_device *dev = connector->base.dev;
1339 struct drm_i915_private *dev_priv = dev->dev_private;
1342 if (IS_G4X(dev_priv))
1343 clock = KHz(dev_priv->rawclk_freq);
1345 clock = KHz(dev_priv->cdclk_freq);
1347 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128);
1351 * VLV: This value represents the period of the PWM stream in display core
1352 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks
1353 * multiplied by 16. CHV uses a 19.2MHz S0IX clock.
1355 static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1357 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1360 if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {
1361 if (IS_CHERRYVIEW(dev_priv))
1367 clock = KHz(dev_priv->rawclk_freq);
1371 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1374 static u32 get_backlight_max_vbt(struct intel_connector *connector)
1376 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1377 struct intel_panel *panel = &connector->panel;
1378 u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;
1381 if (!panel->backlight.hz_to_pwm) {
1382 DRM_DEBUG_KMS("backlight frequency conversion not supported\n");
1387 DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n",
1391 DRM_DEBUG_KMS("default backlight frequency %u Hz\n",
1395 pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz);
1397 DRM_DEBUG_KMS("backlight frequency conversion failed\n");
1405 * Note: The setup hooks can't assume pipe is set!
1407 static u32 get_backlight_min_vbt(struct intel_connector *connector)
1409 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1410 struct intel_panel *panel = &connector->panel;
1413 WARN_ON(panel->backlight.max == 0);
1416 * XXX: If the vbt value is 255, it makes min equal to max, which leads
1417 * to problems. There are such machines out there. Either our
1418 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
1419 * against this by letting the minimum be at most (arbitrarily chosen)
1422 min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
1423 if (min != dev_priv->vbt.backlight.min_brightness) {
1424 DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n",
1425 dev_priv->vbt.backlight.min_brightness, min);
1428 /* vbt value is a coefficient in range [0..255] */
1429 return scale(min, 0, 255, 0, panel->backlight.max);
1432 static int lpt_setup_backlight(struct intel_connector *connector, enum i915_pipe unused)
1434 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1435 struct intel_panel *panel = &connector->panel;
1436 u32 pch_ctl1, pch_ctl2, val;
1438 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1439 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1441 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1442 panel->backlight.max = pch_ctl2 >> 16;
1444 if (!panel->backlight.max)
1445 panel->backlight.max = get_backlight_max_vbt(connector);
1447 if (!panel->backlight.max)
1450 panel->backlight.min = get_backlight_min_vbt(connector);
1452 val = lpt_get_backlight(connector);
1453 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1455 panel->backlight.enabled = (pch_ctl1 & BLM_PCH_PWM_ENABLE) &&
1456 panel->backlight.level != 0;
1461 static int pch_setup_backlight(struct intel_connector *connector, enum i915_pipe unused)
1463 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1464 struct intel_panel *panel = &connector->panel;
1465 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
1467 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1468 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1470 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1471 panel->backlight.max = pch_ctl2 >> 16;
1473 if (!panel->backlight.max)
1474 panel->backlight.max = get_backlight_max_vbt(connector);
1476 if (!panel->backlight.max)
1479 panel->backlight.min = get_backlight_min_vbt(connector);
1481 val = pch_get_backlight(connector);
1482 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1484 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
1485 panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
1486 (pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level != 0;
1491 static int i9xx_setup_backlight(struct intel_connector *connector, enum i915_pipe unused)
1493 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1494 struct intel_panel *panel = &connector->panel;
1497 ctl = I915_READ(BLC_PWM_CTL);
1499 if (IS_GEN2(dev_priv) || IS_I915GM(dev_priv) || IS_I945GM(dev_priv))
1500 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
1502 if (IS_PINEVIEW(dev_priv))
1503 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
1505 panel->backlight.max = ctl >> 17;
1507 if (!panel->backlight.max) {
1508 panel->backlight.max = get_backlight_max_vbt(connector);
1509 panel->backlight.max >>= 1;
1512 if (!panel->backlight.max)
1515 if (panel->backlight.combination_mode)
1516 panel->backlight.max *= 0xff;
1518 panel->backlight.min = get_backlight_min_vbt(connector);
1520 val = i9xx_get_backlight(connector);
1521 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1523 panel->backlight.enabled = panel->backlight.level != 0;
1528 static int i965_setup_backlight(struct intel_connector *connector, enum i915_pipe unused)
1530 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1531 struct intel_panel *panel = &connector->panel;
1534 ctl2 = I915_READ(BLC_PWM_CTL2);
1535 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
1536 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1538 ctl = I915_READ(BLC_PWM_CTL);
1539 panel->backlight.max = ctl >> 16;
1541 if (!panel->backlight.max)
1542 panel->backlight.max = get_backlight_max_vbt(connector);
1544 if (!panel->backlight.max)
1547 if (panel->backlight.combination_mode)
1548 panel->backlight.max *= 0xff;
1550 panel->backlight.min = get_backlight_min_vbt(connector);
1552 val = i9xx_get_backlight(connector);
1553 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1555 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1556 panel->backlight.level != 0;
1561 static int vlv_setup_backlight(struct intel_connector *connector, enum i915_pipe pipe)
1563 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1564 struct intel_panel *panel = &connector->panel;
1567 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
1570 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
1571 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1573 ctl = I915_READ(VLV_BLC_PWM_CTL(pipe));
1574 panel->backlight.max = ctl >> 16;
1576 if (!panel->backlight.max)
1577 panel->backlight.max = get_backlight_max_vbt(connector);
1579 if (!panel->backlight.max)
1582 panel->backlight.min = get_backlight_min_vbt(connector);
1584 val = _vlv_get_backlight(dev_priv, pipe);
1585 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1587 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1588 panel->backlight.level != 0;
1593 #ifdef __DragonFly__
1595 * Read max backlight level
1598 sysctl_backlight_max(SYSCTL_HANDLER_ARGS)
1601 struct intel_connector *connector = arg1;
1602 struct drm_device *dev = connector->base.dev;
1603 struct drm_i915_private *dev_priv = dev->dev_private;
1604 struct intel_panel *panel = &connector->panel;
1606 mutex_lock(&dev_priv->backlight_lock);
1607 val = panel->backlight.max;
1608 mutex_unlock(&dev_priv->backlight_lock);
1610 err = sysctl_handle_int(oidp, &val, 0, req);
1615 * Read/write backlight level
1618 sysctl_backlight_handler(SYSCTL_HANDLER_ARGS)
1620 struct intel_connector *connector = arg1;
1621 struct drm_device *dev = connector->base.dev;
1622 struct drm_i915_private *dev_priv = dev->dev_private;
1623 struct intel_panel *panel = &connector->panel;
1625 u32 user_level, max_brightness;
1627 mutex_lock(&dev_priv->backlight_lock);
1628 max_brightness = panel->backlight.max;
1629 user_level = scale_hw_to_user(connector, panel->backlight.level,
1631 mutex_unlock(&dev_priv->backlight_lock);
1634 err = sysctl_handle_int(oidp, &val, 0, req);
1635 if (err != 0 || req->newptr == NULL) {
1639 if (val != user_level && val >= 0 && val <= max_brightness) {
1640 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1641 intel_panel_set_backlight(arg1, val, max_brightness);
1642 drm_modeset_unlock(&dev->mode_config.connection_mutex);
1647 #endif /* __DragonFly__ */
1650 bxt_setup_backlight(struct intel_connector *connector, enum i915_pipe unused)
1652 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1653 struct intel_panel *panel = &connector->panel;
1657 * For BXT hard coding the Backlight controller to 0.
1658 * TODO : Read the controller value from VBT and generalize
1660 panel->backlight.controller = 0;
1662 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1664 /* Keeping the check if controller 1 is to be programmed.
1665 * This will come into affect once the VBT parsing
1666 * is fixed for controller selection, and controller 1 is used
1667 * for a prticular display configuration.
1669 if (panel->backlight.controller == 1) {
1670 val = I915_READ(UTIL_PIN_CTL);
1671 panel->backlight.util_pin_active_low =
1672 val & UTIL_PIN_POLARITY;
1675 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1676 panel->backlight.max =
1677 I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));
1679 if (!panel->backlight.max)
1680 panel->backlight.max = get_backlight_max_vbt(connector);
1682 if (!panel->backlight.max)
1685 val = bxt_get_backlight(connector);
1686 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1688 panel->backlight.enabled = (pwm_ctl & BXT_BLC_PWM_ENABLE) &&
1689 panel->backlight.level != 0;
1694 static int pwm_setup_backlight(struct intel_connector *connector,
1695 enum i915_pipe pipe)
1697 struct drm_device *dev = connector->base.dev;
1698 struct intel_panel *panel = &connector->panel;
1701 /* Get the PWM chip for backlight control */
1702 panel->backlight.pwm = pwm_get(dev->dev, "pwm_backlight");
1703 if (IS_ERR(panel->backlight.pwm)) {
1704 DRM_ERROR("Failed to own the pwm chip\n");
1705 panel->backlight.pwm = NULL;
1710 * FIXME: pwm_apply_args() should be removed when switching to
1711 * the atomic PWM API.
1714 pwm_apply_args(panel->backlight.pwm);
1717 retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS,
1718 CRC_PMIC_PWM_PERIOD_NS);
1720 DRM_ERROR("Failed to configure the pwm chip\n");
1721 pwm_put(panel->backlight.pwm);
1722 panel->backlight.pwm = NULL;
1726 panel->backlight.min = 0; /* 0% */
1727 panel->backlight.max = 100; /* 100% */
1728 panel->backlight.level = DIV_ROUND_UP(
1729 pwm_get_duty_cycle(panel->backlight.pwm) * 100,
1730 CRC_PMIC_PWM_PERIOD_NS);
1731 panel->backlight.enabled = panel->backlight.level != 0;
1736 int intel_panel_setup_backlight(struct drm_connector *connector, enum i915_pipe pipe)
1738 struct drm_i915_private *dev_priv = to_i915(connector->dev);
1739 struct intel_connector *intel_connector = to_intel_connector(connector);
1740 struct intel_panel *panel = &intel_connector->panel;
1743 if (!dev_priv->vbt.backlight.present) {
1744 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
1745 DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
1747 DRM_DEBUG_KMS("no backlight present per VBT\n");
1752 /* ensure intel_panel has been initialized first */
1753 if (WARN_ON(!panel->backlight.setup))
1756 /* set level and max in panel struct */
1757 mutex_lock(&dev_priv->backlight_lock);
1758 ret = panel->backlight.setup(intel_connector, pipe);
1759 mutex_unlock(&dev_priv->backlight_lock);
1762 DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
1767 panel->backlight.present = true;
1769 #ifdef __DragonFly__
1770 SYSCTL_ADD_PROC(&connector->dev->sysctl->ctx, &sysctl__hw_children,
1771 OID_AUTO, "backlight_max",
1772 CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_ANYBODY,
1773 connector, sizeof(int),
1774 sysctl_backlight_max,
1775 "I", "Max backlight level");
1776 SYSCTL_ADD_PROC(&connector->dev->sysctl->ctx, &sysctl__hw_children,
1777 OID_AUTO, "backlight_level",
1778 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_ANYBODY,
1779 connector, sizeof(int),
1780 sysctl_backlight_handler,
1781 "I", "Backlight level");
1784 DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n",
1786 panel->backlight.enabled ? "enabled" : "disabled",
1787 panel->backlight.level, panel->backlight.max);
1792 void intel_panel_destroy_backlight(struct drm_connector *connector)
1794 struct intel_connector *intel_connector = to_intel_connector(connector);
1795 struct intel_panel *panel = &intel_connector->panel;
1797 /* dispose of the pwm */
1798 if (panel->backlight.pwm)
1799 pwm_put(panel->backlight.pwm);
1801 panel->backlight.present = false;
1804 /* Set up chip specific backlight functions */
1806 intel_panel_init_backlight_funcs(struct intel_panel *panel)
1808 struct intel_connector *connector =
1809 container_of(panel, struct intel_connector, panel);
1810 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1812 if (IS_BROXTON(dev_priv)) {
1813 panel->backlight.setup = bxt_setup_backlight;
1814 panel->backlight.enable = bxt_enable_backlight;
1815 panel->backlight.disable = bxt_disable_backlight;
1816 panel->backlight.set = bxt_set_backlight;
1817 panel->backlight.get = bxt_get_backlight;
1818 panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
1819 } else if (HAS_PCH_LPT(dev_priv) || HAS_PCH_SPT(dev_priv) ||
1820 HAS_PCH_KBP(dev_priv)) {
1821 panel->backlight.setup = lpt_setup_backlight;
1822 panel->backlight.enable = lpt_enable_backlight;
1823 panel->backlight.disable = lpt_disable_backlight;
1824 panel->backlight.set = lpt_set_backlight;
1825 panel->backlight.get = lpt_get_backlight;
1826 if (HAS_PCH_LPT(dev_priv))
1827 panel->backlight.hz_to_pwm = lpt_hz_to_pwm;
1829 panel->backlight.hz_to_pwm = spt_hz_to_pwm;
1830 } else if (HAS_PCH_SPLIT(dev_priv)) {
1831 panel->backlight.setup = pch_setup_backlight;
1832 panel->backlight.enable = pch_enable_backlight;
1833 panel->backlight.disable = pch_disable_backlight;
1834 panel->backlight.set = pch_set_backlight;
1835 panel->backlight.get = pch_get_backlight;
1836 panel->backlight.hz_to_pwm = pch_hz_to_pwm;
1837 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
1838 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) {
1839 panel->backlight.setup = pwm_setup_backlight;
1840 panel->backlight.enable = pwm_enable_backlight;
1841 panel->backlight.disable = pwm_disable_backlight;
1842 panel->backlight.set = pwm_set_backlight;
1843 panel->backlight.get = pwm_get_backlight;
1845 panel->backlight.setup = vlv_setup_backlight;
1846 panel->backlight.enable = vlv_enable_backlight;
1847 panel->backlight.disable = vlv_disable_backlight;
1848 panel->backlight.set = vlv_set_backlight;
1849 panel->backlight.get = vlv_get_backlight;
1850 panel->backlight.hz_to_pwm = vlv_hz_to_pwm;
1852 } else if (IS_GEN4(dev_priv)) {
1853 panel->backlight.setup = i965_setup_backlight;
1854 panel->backlight.enable = i965_enable_backlight;
1855 panel->backlight.disable = i965_disable_backlight;
1856 panel->backlight.set = i9xx_set_backlight;
1857 panel->backlight.get = i9xx_get_backlight;
1858 panel->backlight.hz_to_pwm = i965_hz_to_pwm;
1860 panel->backlight.setup = i9xx_setup_backlight;
1861 panel->backlight.enable = i9xx_enable_backlight;
1862 panel->backlight.disable = i9xx_disable_backlight;
1863 panel->backlight.set = i9xx_set_backlight;
1864 panel->backlight.get = i9xx_get_backlight;
1865 panel->backlight.hz_to_pwm = i9xx_hz_to_pwm;
1869 int intel_panel_init(struct intel_panel *panel,
1870 struct drm_display_mode *fixed_mode,
1871 struct drm_display_mode *downclock_mode)
1873 intel_panel_init_backlight_funcs(panel);
1875 panel->fixed_mode = fixed_mode;
1876 panel->downclock_mode = downclock_mode;
1881 void intel_panel_fini(struct intel_panel *panel)
1883 struct intel_connector *intel_connector =
1884 container_of(panel, struct intel_connector, panel);
1886 if (panel->fixed_mode)
1887 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
1889 if (panel->downclock_mode)
1890 drm_mode_destroy(intel_connector->base.dev,
1891 panel->downclock_mode);
1894 void intel_backlight_register(struct drm_device *dev)
1896 struct intel_connector *connector;
1898 for_each_intel_connector(dev, connector)
1899 intel_backlight_device_register(connector);
1902 void intel_backlight_unregister(struct drm_device *dev)
1904 struct intel_connector *connector;
1906 for_each_intel_connector(dev, connector)
1907 intel_backlight_device_unregister(connector);