2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
43 #include "opt_atalk.h"
44 #include "opt_compat.h"
47 #include "opt_directio.h"
50 #include "opt_maxmem.h"
51 #include "opt_msgbuf.h"
52 #include "opt_perfmon.h"
54 #include "opt_userconfig.h"
56 #include <sys/param.h>
57 #include <sys/systm.h>
58 #include <sys/sysproto.h>
59 #include <sys/signalvar.h>
60 #include <sys/kernel.h>
61 #include <sys/linker.h>
62 #include <sys/malloc.h>
66 #include <sys/reboot.h>
68 #include <sys/msgbuf.h>
69 #include <sys/sysent.h>
70 #include <sys/sysctl.h>
71 #include <sys/vmmeter.h>
73 #include <sys/upcall.h>
74 #include <sys/usched.h>
78 #include <vm/vm_param.h>
80 #include <vm/vm_kern.h>
81 #include <vm/vm_object.h>
82 #include <vm/vm_page.h>
83 #include <vm/vm_map.h>
84 #include <vm/vm_pager.h>
85 #include <vm/vm_extern.h>
87 #include <sys/thread2.h>
88 #include <sys/mplock2.h>
89 #include <sys/mutex2.h>
97 #include <machine/cpu.h>
98 #include <machine/clock.h>
99 #include <machine/specialreg.h>
100 #include <machine/bootinfo.h>
101 #include <machine/md_var.h>
102 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
103 #include <machine/globaldata.h> /* CPU_prvspace */
104 #include <machine/smp.h>
106 #include <machine/perfmon.h>
108 #include <machine/cputypes.h>
109 #include <machine/intr_machdep.h>
112 #include <bus/isa/isa_device.h>
114 #include <machine_base/isa/isa_intr.h>
115 #include <bus/isa/rtc.h>
116 #include <machine/vm86.h>
117 #include <sys/random.h>
118 #include <sys/ptrace.h>
119 #include <machine/sigframe.h>
121 #include <sys/machintr.h>
122 #include <machine_base/icu/icu_abi.h>
123 #include <machine_base/icu/elcr_var.h>
124 #include <machine_base/apic/lapic.h>
125 #include <machine_base/apic/ioapic.h>
126 #include <machine_base/apic/ioapic_abi.h>
127 #include <machine/mptable.h>
129 #define PHYSMAP_ENTRIES 10
131 extern void init386(int first);
132 extern void dblfault_handler(void);
134 extern void printcpuinfo(void); /* XXX header file */
135 extern void finishidentcpu(void);
136 extern void panicifcpuunsupported(void);
137 extern void initializecpu(void);
139 static void cpu_startup(void *);
140 static void pic_finish(void *);
141 static void cpu_finish(void *);
142 #ifndef CPU_DISABLE_SSE
143 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
144 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
145 #endif /* CPU_DISABLE_SSE */
147 extern void ffs_rawread_setup(void);
148 #endif /* DIRECTIO */
149 static void init_locks(void);
151 SYSINIT(cpu, SI_BOOT2_START_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
152 SYSINIT(pic_finish, SI_BOOT2_FINISH_PIC, SI_ORDER_FIRST, pic_finish, NULL)
153 SYSINIT(cpu_finish, SI_BOOT2_FINISH_CPU, SI_ORDER_FIRST, cpu_finish, NULL)
155 int _udatasel, _ucodesel;
158 int64_t tsc_offsets[MAXCPU];
160 int64_t tsc_offsets[1];
163 #if defined(SWTCH_OPTIM_STATS)
164 extern int swtch_optim_stats;
165 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
166 CTLFLAG_RD, &swtch_optim_stats, 0, "");
167 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
168 CTLFLAG_RD, &tlb_flush_count, 0, "");
173 u_long ebda_addr = 0;
175 int imcr_present = 0;
177 int naps = 0; /* # of Applications processors */
178 struct mtx dt_lock; /* lock for GDT and LDT */
183 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
185 u_long pmem = ctob(physmem);
187 int error = sysctl_handle_long(oidp, &pmem, 0, req);
191 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_ULONG|CTLFLAG_RD,
192 0, 0, sysctl_hw_physmem, "LU", "Total system memory in bytes (number of pages * page size)");
195 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
197 int error = sysctl_handle_int(oidp, 0,
198 ctob(physmem - vmstats.v_wire_count), req);
202 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
203 0, 0, sysctl_hw_usermem, "IU", "");
206 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
208 int error = sysctl_handle_int(oidp, 0,
209 i386_btop(avail_end - avail_start), req);
213 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
214 0, 0, sysctl_hw_availpages, "I", "");
219 vm_paddr_t phys_avail[PHYSMAP_ENTRIES*2+2];
220 vm_paddr_t dump_avail[PHYSMAP_ENTRIES*2+2];
223 static vm_offset_t buffer_sva, buffer_eva;
224 vm_offset_t clean_sva, clean_eva;
225 static vm_offset_t pager_sva, pager_eva;
226 static struct trapframe proc0_tf;
229 cpu_startup(void *dummy)
233 vm_offset_t firstaddr;
236 * Good {morning,afternoon,evening,night}.
238 kprintf("%s", version);
241 panicifcpuunsupported();
245 kprintf("real memory = %ju (%ju MB)\n",
247 (intmax_t)Realmem / 1024 / 1024);
249 * Display any holes after the first chunk of extended memory.
254 kprintf("Physical memory chunk(s):\n");
255 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
256 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
258 kprintf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
259 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
265 * Allocate space for system data structures.
266 * The first available kernel virtual address is in "v".
267 * As pages of kernel virtual memory are allocated, "v" is incremented.
268 * As pages of memory are allocated and cleared,
269 * "firstaddr" is incremented.
270 * An index into the kernel page table corresponding to the
271 * virtual memory address maintained in "v" is kept in "mapaddr".
275 * Make two passes. The first pass calculates how much memory is
276 * needed and allocates it. The second pass assigns virtual
277 * addresses to the various data structures.
281 v = (caddr_t)firstaddr;
283 #define valloc(name, type, num) \
284 (name) = (type *)v; v = (caddr_t)((name)+(num))
285 #define valloclim(name, type, num, lim) \
286 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
289 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
290 * For the first 64MB of ram nominally allocate sufficient buffers to
291 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
292 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
293 * the buffer cache we limit the eventual kva reservation to
296 * factor represents the 1/4 x ram conversion.
299 int factor = 4 * BKVASIZE / 1024;
300 int kbytes = physmem * (PAGE_SIZE / 1024);
304 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
306 nbuf += (kbytes - 65536) * 2 / (factor * 5);
307 if (maxbcache && nbuf > maxbcache / BKVASIZE)
308 nbuf = maxbcache / BKVASIZE;
312 * Do not allow the buffer_map to be more then 1/2 the size of the
315 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
316 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
317 kprintf("Warning: nbufs capped at %d\n", nbuf);
320 /* limit to 128 on i386 */
321 nswbuf = max(min(nbuf/4, 128), 16);
323 if (nswbuf < NSWBUF_MIN)
330 valloc(swbuf, struct buf, nswbuf);
331 valloc(buf, struct buf, nbuf);
334 * End of first pass, size has been calculated so allocate memory
336 if (firstaddr == 0) {
337 size = (vm_size_t)(v - firstaddr);
338 firstaddr = kmem_alloc(&kernel_map, round_page(size));
340 panic("startup: no room for tables");
345 * End of second pass, addresses have been assigned
347 if ((vm_size_t)(v - firstaddr) != size)
348 panic("startup: table size inconsistency");
350 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
351 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
352 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
354 buffer_map.system_map = 1;
355 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
356 (nswbuf*MAXPHYS) + pager_map_size);
357 pager_map.system_map = 1;
359 #if defined(USERCONFIG)
361 cninit(); /* the preferred console may have changed */
364 kprintf("avail memory = %ju (%ju MB)\n",
365 (intmax_t)ptoa(vmstats.v_free_count),
366 (intmax_t)ptoa(vmstats.v_free_count) / 1024 / 1024);
369 * Set up buffers, so they can be used to read disk labels.
372 vm_pager_bufferinit();
376 cpu_finish(void *dummy __unused)
382 pic_finish(void *dummy __unused)
384 /* Log ELCR information */
387 /* Log MPTABLE information */
388 mptable_pci_int_dump();
391 MachIntrABI.finalize();
395 * Send an interrupt to process.
397 * Stack is set up to allow sigcode stored
398 * at top to call routine, followed by kcall
399 * to sigreturn routine below. After sigreturn
400 * resets the signal mask, the stack, and the
401 * frame pointer, it returns to the user
405 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
407 struct lwp *lp = curthread->td_lwp;
408 struct proc *p = lp->lwp_proc;
409 struct trapframe *regs;
410 struct sigacts *psp = p->p_sigacts;
411 struct sigframe sf, *sfp;
414 regs = lp->lwp_md.md_regs;
415 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
417 /* save user context */
418 bzero(&sf, sizeof(struct sigframe));
419 sf.sf_uc.uc_sigmask = *mask;
420 sf.sf_uc.uc_stack = lp->lwp_sigstk;
421 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
422 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_gs, sizeof(struct trapframe));
424 /* make the size of the saved context visible to userland */
425 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
427 /* save mailbox pending state for syscall interlock semantics */
428 if (p->p_flag & P_MAILBOX)
429 sf.sf_uc.uc_mcontext.mc_xflags |= PGEX_MAILBOX;
431 /* Allocate and validate space for the signal handler context. */
432 if ((lp->lwp_flag & LWP_ALTSTACK) != 0 && !oonstack &&
433 SIGISMEMBER(psp->ps_sigonstack, sig)) {
434 sfp = (struct sigframe *)(lp->lwp_sigstk.ss_sp +
435 lp->lwp_sigstk.ss_size - sizeof(struct sigframe));
436 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
438 sfp = (struct sigframe *)regs->tf_esp - 1;
441 /* Translate the signal is appropriate */
442 if (p->p_sysent->sv_sigtbl) {
443 if (sig <= p->p_sysent->sv_sigsize)
444 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
447 /* Build the argument list for the signal handler. */
449 sf.sf_ucontext = (register_t)&sfp->sf_uc;
450 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
451 /* Signal handler installed with SA_SIGINFO. */
452 sf.sf_siginfo = (register_t)&sfp->sf_si;
453 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
455 /* fill siginfo structure */
456 sf.sf_si.si_signo = sig;
457 sf.sf_si.si_code = code;
458 sf.sf_si.si_addr = (void*)regs->tf_err;
461 /* Old FreeBSD-style arguments. */
462 sf.sf_siginfo = code;
463 sf.sf_addr = regs->tf_err;
464 sf.sf_ahu.sf_handler = catcher;
468 * If we're a vm86 process, we want to save the segment registers.
469 * We also change eflags to be our emulated eflags, not the actual
472 if (regs->tf_eflags & PSL_VM) {
473 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
474 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
476 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
477 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
478 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
479 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
481 if (vm86->vm86_has_vme == 0)
482 sf.sf_uc.uc_mcontext.mc_eflags =
483 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
484 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
487 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
488 * syscalls made by the signal handler. This just avoids
489 * wasting time for our lazy fixup of such faults. PSL_NT
490 * does nothing in vm86 mode, but vm86 programs can set it
491 * almost legitimately in probes for old cpu types.
493 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
497 * Save the FPU state and reinit the FP unit
499 npxpush(&sf.sf_uc.uc_mcontext);
502 * Copy the sigframe out to the user's stack.
504 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
506 * Something is wrong with the stack pointer.
507 * ...Kill the process.
512 regs->tf_esp = (int)sfp;
513 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
516 * i386 abi specifies that the direction flag must be cleared
519 regs->tf_eflags &= ~(PSL_T|PSL_D);
521 regs->tf_cs = _ucodesel;
522 regs->tf_ds = _udatasel;
523 regs->tf_es = _udatasel;
526 * Allow the signal handler to inherit %fs in addition to %gs as
527 * the userland program might be using both.
529 * However, if a T_PROTFLT occured the segment registers could be
530 * totally broken. They must be reset in order to be able to
531 * return to userland.
533 if (regs->tf_trapno == T_PROTFLT) {
534 regs->tf_fs = _udatasel;
535 regs->tf_gs = _udatasel;
537 regs->tf_ss = _udatasel;
541 * Sanitize the trapframe for a virtual kernel passing control to a custom
542 * VM context. Remove any items that would otherwise create a privilage
545 * XXX at the moment we allow userland to set the resume flag. Is this a
549 cpu_sanitize_frame(struct trapframe *frame)
551 frame->tf_cs = _ucodesel;
552 frame->tf_ds = _udatasel;
553 frame->tf_es = _udatasel; /* XXX allow userland this one too? */
555 frame->tf_fs = _udatasel;
556 frame->tf_gs = _udatasel;
558 frame->tf_ss = _udatasel;
559 frame->tf_eflags &= (PSL_RF | PSL_USERCHANGE);
560 frame->tf_eflags |= PSL_RESERVED_DEFAULT | PSL_I;
565 cpu_sanitize_tls(struct savetls *tls)
567 struct segment_descriptor *desc;
570 for (i = 0; i < NGTLS; ++i) {
572 if (desc->sd_dpl == 0 && desc->sd_type == 0)
574 if (desc->sd_def32 == 0)
576 if (desc->sd_type != SDT_MEMRWA)
578 if (desc->sd_dpl != SEL_UPL)
580 if (desc->sd_xx != 0 || desc->sd_p != 1)
587 * sigreturn(ucontext_t *sigcntxp)
589 * System call to cleanup state after a signal
590 * has been taken. Reset signal mask and
591 * stack state from context left by sendsig (above).
592 * Return to previous pc and psl as specified by
593 * context left by sendsig. Check carefully to
594 * make sure that the user has not modified the
595 * state to gain improper privileges.
599 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
600 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
603 sys_sigreturn(struct sigreturn_args *uap)
605 struct lwp *lp = curthread->td_lwp;
606 struct proc *p = lp->lwp_proc;
607 struct trapframe *regs;
615 * We have to copy the information into kernel space so userland
616 * can't modify it while we are sniffing it.
618 regs = lp->lwp_md.md_regs;
619 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
623 eflags = ucp->uc_mcontext.mc_eflags;
625 if (eflags & PSL_VM) {
626 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
627 struct vm86_kernel *vm86;
630 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
631 * set up the vm86 area, and we can't enter vm86 mode.
633 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
635 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
636 if (vm86->vm86_inited == 0)
639 /* go back to user mode if both flags are set */
640 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
641 trapsignal(lp, SIGBUS, 0);
643 if (vm86->vm86_has_vme) {
644 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
645 (eflags & VME_USERCHANGE) | PSL_VM;
647 vm86->vm86_eflags = eflags; /* save VIF, VIP */
648 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
649 (eflags & VM_USERCHANGE) | PSL_VM;
651 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
652 tf->tf_eflags = eflags;
653 tf->tf_vm86_ds = tf->tf_ds;
654 tf->tf_vm86_es = tf->tf_es;
655 tf->tf_vm86_fs = tf->tf_fs;
656 tf->tf_vm86_gs = tf->tf_gs;
657 tf->tf_ds = _udatasel;
658 tf->tf_es = _udatasel;
660 tf->tf_fs = _udatasel;
661 tf->tf_gs = _udatasel;
665 * Don't allow users to change privileged or reserved flags.
668 * XXX do allow users to change the privileged flag PSL_RF.
669 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
670 * should sometimes set it there too. tf_eflags is kept in
671 * the signal context during signal handling and there is no
672 * other place to remember it, so the PSL_RF bit may be
673 * corrupted by the signal handler without us knowing.
674 * Corruption of the PSL_RF bit at worst causes one more or
675 * one less debugger trap, so allowing it is fairly harmless.
677 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
678 kprintf("sigreturn: eflags = 0x%x\n", eflags);
683 * Don't allow users to load a valid privileged %cs. Let the
684 * hardware check for invalid selectors, excess privilege in
685 * other selectors, invalid %eip's and invalid %esp's.
687 cs = ucp->uc_mcontext.mc_cs;
688 if (!CS_SECURE(cs)) {
689 kprintf("sigreturn: cs = 0x%x\n", cs);
690 trapsignal(lp, SIGBUS, T_PROTFLT);
693 bcopy(&ucp->uc_mcontext.mc_gs, regs, sizeof(struct trapframe));
697 * Restore the FPU state from the frame
700 npxpop(&ucp->uc_mcontext);
703 * Merge saved signal mailbox pending flag to maintain interlock
704 * semantics against system calls.
706 if (ucp->uc_mcontext.mc_xflags & PGEX_MAILBOX)
707 p->p_flag |= P_MAILBOX;
709 if (ucp->uc_mcontext.mc_onstack & 1)
710 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
712 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
714 lp->lwp_sigmask = ucp->uc_sigmask;
715 SIG_CANTMASK(lp->lwp_sigmask);
721 * Stack frame on entry to function. %eax will contain the function vector,
722 * %ecx will contain the function data. flags, ecx, and eax will have
723 * already been pushed on the stack.
734 sendupcall(struct vmupcall *vu, int morepending)
736 struct lwp *lp = curthread->td_lwp;
737 struct trapframe *regs;
738 struct upcall upcall;
739 struct upc_frame upc_frame;
743 * If we are a virtual kernel running an emulated user process
744 * context, switch back to the virtual kernel context before
745 * trying to post the signal.
747 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
748 lp->lwp_md.md_regs->tf_trapno = 0;
749 vkernel_trap(lp, lp->lwp_md.md_regs);
753 * Get the upcall data structure
755 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
756 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
759 kprintf("bad upcall address\n");
764 * If the data structure is already marked pending or has a critical
765 * section count, mark the data structure as pending and return
766 * without doing an upcall. vu_pending is left set.
768 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
769 if (upcall.upc_pending < vu->vu_pending) {
770 upcall.upc_pending = vu->vu_pending;
771 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
772 sizeof(upcall.upc_pending));
778 * We can run this upcall now, clear vu_pending.
780 * Bump our critical section count and set or clear the
781 * user pending flag depending on whether more upcalls are
782 * pending. The user will be responsible for calling
783 * upc_dispatch(-1) to process remaining upcalls.
786 upcall.upc_pending = morepending;
788 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
789 sizeof(upcall.upc_pending));
790 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
794 * Construct a stack frame and issue the upcall
796 regs = lp->lwp_md.md_regs;
797 upc_frame.eax = regs->tf_eax;
798 upc_frame.ecx = regs->tf_ecx;
799 upc_frame.edx = regs->tf_edx;
800 upc_frame.flags = regs->tf_eflags;
801 upc_frame.oldip = regs->tf_eip;
802 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
803 sizeof(upc_frame)) != 0) {
804 kprintf("bad stack on upcall\n");
806 regs->tf_eax = (register_t)vu->vu_func;
807 regs->tf_ecx = (register_t)vu->vu_data;
808 regs->tf_edx = (register_t)lp->lwp_upcall;
809 regs->tf_eip = (register_t)vu->vu_ctx;
810 regs->tf_esp -= sizeof(upc_frame);
815 * fetchupcall occurs in the context of a system call, which means that
816 * we have to return EJUSTRETURN in order to prevent eax and edx from
817 * being overwritten by the syscall return value.
819 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
820 * and the function pointer in %eax.
823 fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
825 struct upc_frame upc_frame;
826 struct lwp *lp = curthread->td_lwp;
827 struct trapframe *regs;
829 struct upcall upcall;
832 regs = lp->lwp_md.md_regs;
834 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
838 * This jumps us to the next ready context.
841 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
844 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
847 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
848 regs->tf_eax = (register_t)vu->vu_func;
849 regs->tf_ecx = (register_t)vu->vu_data;
850 regs->tf_edx = (register_t)lp->lwp_upcall;
851 regs->tf_eip = (register_t)vu->vu_ctx;
852 regs->tf_esp = (register_t)rsp;
855 * This returns us to the originally interrupted code.
857 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
858 regs->tf_eax = upc_frame.eax;
859 regs->tf_ecx = upc_frame.ecx;
860 regs->tf_edx = upc_frame.edx;
861 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
862 (upc_frame.flags & PSL_USERCHANGE);
863 regs->tf_eip = upc_frame.oldip;
864 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
873 * Machine dependent boot() routine
875 * I haven't seen anything to put here yet
876 * Possibly some stuff might be grafted back here from boot()
884 * Shutdown the CPU as much as possible
890 __asm__ __volatile("hlt");
894 * cpu_idle() represents the idle LWKT. You cannot return from this function
895 * (unless you want to blow things up!). Instead we look for runnable threads
896 * and loop or halt as appropriate. Giant is not held on entry to the thread.
898 * The main loop is entered with a critical section held, we must release
899 * the critical section before doing anything else. lwkt_switch() will
900 * check for pending interrupts due to entering and exiting its own
903 * NOTE: On an SMP system we rely on a scheduler IPI to wake a HLTed cpu up.
905 * NOTE: cpu_idle_hlt again defaults to 2 (use ACPI sleep states). Set to
906 * 1 to just use hlt and for debugging purposes.
908 static int cpu_idle_hlt = 2;
909 static int cpu_idle_hltcnt;
910 static int cpu_idle_spincnt;
911 static u_int cpu_idle_repeat = 4;
912 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
913 &cpu_idle_hlt, 0, "Idle loop HLT enable");
914 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
915 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
916 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
917 &cpu_idle_spincnt, 0, "Idle loop entry spins");
918 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_repeat, CTLFLAG_RW,
919 &cpu_idle_repeat, 0, "Idle entries before acpi hlt");
922 cpu_idle_default_hook(void)
925 * We must guarentee that hlt is exactly the instruction
928 __asm __volatile("sti; hlt");
931 /* Other subsystems (e.g., ACPI) can hook this later. */
932 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
937 globaldata_t gd = mycpu;
938 struct thread *td __debugvar = gd->gd_curthread;
943 KKASSERT(td->td_critcount == 0);
946 * See if there are any LWKTs ready to go.
951 * When halting inside a cli we must check for reqflags
952 * races, particularly [re]schedule requests. Running
953 * splz() does the job.
956 * 0 Never halt, just spin
958 * 1 Always use HLT (or MONITOR/MWAIT if avail).
959 * This typically eats more power than the
962 * 2 Use HLT/MONITOR/MWAIT up to a point and then
963 * use the ACPI halt (default). This is a hybrid
964 * approach. See machdep.cpu_idle_repeat.
966 * 3 Always use the ACPI halt. This typically
967 * eats the least amount of power but the cpu
968 * will be slow waking up. Slows down e.g.
969 * compiles and other pipe/event oriented stuff.
972 * NOTE: Interrupts are enabled and we are not in a critical
975 * NOTE: Preemptions do not reset gd_idle_repeat. Also we
976 * don't bother capping gd_idle_repeat, it is ok if
979 ++gd->gd_idle_repeat;
980 reqflags = gd->gd_reqflags;
981 quick = (cpu_idle_hlt == 1) ||
983 gd->gd_idle_repeat < cpu_idle_repeat);
985 if (quick && (cpu_mi_feature & CPU_MI_MONITOR) &&
986 (reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
987 cpu_mmw_pause_int(&gd->gd_reqflags, reqflags);
989 } else if (cpu_idle_hlt) {
990 __asm __volatile("cli");
992 if ((gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
994 cpu_idle_default_hook();
998 __asm __volatile("sti");
1002 __asm __volatile("sti");
1011 * This routine is called if a spinlock has been held through the
1012 * exponential backoff period and is seriously contested. On a real cpu
1016 cpu_spinlock_contested(void)
1024 * Clear registers on exec
1027 exec_setregs(u_long entry, u_long stack, u_long ps_strings)
1029 struct thread *td = curthread;
1030 struct lwp *lp = td->td_lwp;
1031 struct pcb *pcb = td->td_pcb;
1032 struct trapframe *regs = lp->lwp_md.md_regs;
1034 /* was i386_user_cleanup() in NetBSD */
1037 bzero((char *)regs, sizeof(struct trapframe));
1038 regs->tf_eip = entry;
1039 regs->tf_esp = stack;
1040 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1041 regs->tf_ss = _udatasel;
1042 regs->tf_ds = _udatasel;
1043 regs->tf_es = _udatasel;
1044 regs->tf_fs = _udatasel;
1045 regs->tf_gs = _udatasel;
1046 regs->tf_cs = _ucodesel;
1048 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1049 regs->tf_ebx = ps_strings;
1052 * Reset the hardware debug registers if they were in use.
1053 * They won't have any meaning for the newly exec'd process.
1055 if (pcb->pcb_flags & PCB_DBREGS) {
1062 if (pcb == td->td_pcb) {
1064 * Clear the debug registers on the running
1065 * CPU, otherwise they will end up affecting
1066 * the next process we switch to.
1070 pcb->pcb_flags &= ~PCB_DBREGS;
1074 * Initialize the math emulator (if any) for the current process.
1075 * Actually, just clear the bit that says that the emulator has
1076 * been initialized. Initialization is delayed until the process
1077 * traps to the emulator (if it is done at all) mainly because
1078 * emulators don't provide an entry point for initialization.
1080 pcb->pcb_flags &= ~FP_SOFTFP;
1083 * note: do not set CR0_TS here. npxinit() must do it after clearing
1084 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
1088 load_cr0(rcr0() | CR0_MP);
1091 /* Initialize the npx (if any) for the current process. */
1092 npxinit(__INITIAL_NPXCW__);
1097 * note: linux emulator needs edx to be 0x0 on entry, which is
1098 * handled in execve simply by setting the 64 bit syscall
1099 * return value to 0.
1109 cr0 |= CR0_NE; /* Done by npxinit() */
1110 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1111 cr0 |= CR0_WP | CR0_AM;
1117 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1120 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1122 if (!error && req->newptr)
1127 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1128 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1130 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1131 CTLFLAG_RW, &disable_rtc_set, 0, "");
1133 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1134 CTLFLAG_RD, &bootinfo, bootinfo, "");
1136 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1137 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1139 extern u_long bootdev; /* not a cdev_t - encoding is different */
1140 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1141 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1144 * Initialize 386 and configure to run kernel
1148 * Initialize segments & interrupt table
1152 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1153 static struct gate_descriptor idt0[NIDT];
1154 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1155 union descriptor ldt[NLDT]; /* local descriptor table */
1157 /* table descriptors - used to load tables by cpu */
1158 struct region_descriptor r_gdt, r_idt;
1160 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1161 extern int has_f00f_bug;
1164 static struct i386tss dblfault_tss;
1165 static char dblfault_stack[PAGE_SIZE];
1167 extern struct user *proc0paddr;
1170 /* software prototypes -- in more palatable form */
1171 struct soft_segment_descriptor gdt_segs[] = {
1172 /* GNULL_SEL 0 Null Descriptor */
1173 { 0x0, /* segment base address */
1175 0, /* segment type */
1176 0, /* segment descriptor priority level */
1177 0, /* segment descriptor present */
1179 0, /* default 32 vs 16 bit size */
1180 0 /* limit granularity (byte/page units)*/ },
1181 /* GCODE_SEL 1 Code Descriptor for kernel */
1182 { 0x0, /* segment base address */
1183 0xfffff, /* length - all address space */
1184 SDT_MEMERA, /* segment type */
1185 0, /* segment descriptor priority level */
1186 1, /* segment descriptor present */
1188 1, /* default 32 vs 16 bit size */
1189 1 /* limit granularity (byte/page units)*/ },
1190 /* GDATA_SEL 2 Data Descriptor for kernel */
1191 { 0x0, /* segment base address */
1192 0xfffff, /* length - all address space */
1193 SDT_MEMRWA, /* segment type */
1194 0, /* segment descriptor priority level */
1195 1, /* segment descriptor present */
1197 1, /* default 32 vs 16 bit size */
1198 1 /* limit granularity (byte/page units)*/ },
1199 /* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1200 { 0x0, /* segment base address */
1201 0xfffff, /* length - all address space */
1202 SDT_MEMRWA, /* segment type */
1203 0, /* segment descriptor priority level */
1204 1, /* segment descriptor present */
1206 1, /* default 32 vs 16 bit size */
1207 1 /* limit granularity (byte/page units)*/ },
1208 /* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1210 0x0, /* segment base address */
1211 sizeof(struct i386tss)-1,/* length - all address space */
1212 SDT_SYS386TSS, /* segment type */
1213 0, /* segment descriptor priority level */
1214 1, /* segment descriptor present */
1216 0, /* unused - default 32 vs 16 bit size */
1217 0 /* limit granularity (byte/page units)*/ },
1218 /* GLDT_SEL 5 LDT Descriptor */
1219 { (int) ldt, /* segment base address */
1220 sizeof(ldt)-1, /* length - all address space */
1221 SDT_SYSLDT, /* segment type */
1222 SEL_UPL, /* segment descriptor priority level */
1223 1, /* segment descriptor present */
1225 0, /* unused - default 32 vs 16 bit size */
1226 0 /* limit granularity (byte/page units)*/ },
1227 /* GUSERLDT_SEL 6 User LDT Descriptor per process */
1228 { (int) ldt, /* segment base address */
1229 (512 * sizeof(union descriptor)-1), /* length */
1230 SDT_SYSLDT, /* segment type */
1231 0, /* segment descriptor priority level */
1232 1, /* segment descriptor present */
1234 0, /* unused - default 32 vs 16 bit size */
1235 0 /* limit granularity (byte/page units)*/ },
1236 /* GTGATE_SEL 7 Null Descriptor - Placeholder */
1237 { 0x0, /* segment base address */
1238 0x0, /* length - all address space */
1239 0, /* segment type */
1240 0, /* segment descriptor priority level */
1241 0, /* segment descriptor present */
1243 0, /* default 32 vs 16 bit size */
1244 0 /* limit granularity (byte/page units)*/ },
1245 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1246 { 0x400, /* segment base address */
1247 0xfffff, /* length */
1248 SDT_MEMRWA, /* segment type */
1249 0, /* segment descriptor priority level */
1250 1, /* segment descriptor present */
1252 1, /* default 32 vs 16 bit size */
1253 1 /* limit granularity (byte/page units)*/ },
1254 /* GPANIC_SEL 9 Panic Tss Descriptor */
1255 { (int) &dblfault_tss, /* segment base address */
1256 sizeof(struct i386tss)-1,/* length - all address space */
1257 SDT_SYS386TSS, /* segment type */
1258 0, /* segment descriptor priority level */
1259 1, /* segment descriptor present */
1261 0, /* unused - default 32 vs 16 bit size */
1262 0 /* limit granularity (byte/page units)*/ },
1263 /* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1264 { 0, /* segment base address (overwritten) */
1265 0xfffff, /* length */
1266 SDT_MEMERA, /* segment type */
1267 0, /* segment descriptor priority level */
1268 1, /* segment descriptor present */
1270 0, /* default 32 vs 16 bit size */
1271 1 /* limit granularity (byte/page units)*/ },
1272 /* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1273 { 0, /* segment base address (overwritten) */
1274 0xfffff, /* length */
1275 SDT_MEMERA, /* segment type */
1276 0, /* segment descriptor priority level */
1277 1, /* segment descriptor present */
1279 0, /* default 32 vs 16 bit size */
1280 1 /* limit granularity (byte/page units)*/ },
1281 /* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1282 { 0, /* segment base address (overwritten) */
1283 0xfffff, /* length */
1284 SDT_MEMRWA, /* segment type */
1285 0, /* segment descriptor priority level */
1286 1, /* segment descriptor present */
1288 1, /* default 32 vs 16 bit size */
1289 1 /* limit granularity (byte/page units)*/ },
1290 /* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1291 { 0, /* segment base address (overwritten) */
1292 0xfffff, /* length */
1293 SDT_MEMRWA, /* segment type */
1294 0, /* segment descriptor priority level */
1295 1, /* segment descriptor present */
1297 0, /* default 32 vs 16 bit size */
1298 1 /* limit granularity (byte/page units)*/ },
1299 /* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1300 { 0, /* segment base address (overwritten) */
1301 0xfffff, /* length */
1302 SDT_MEMRWA, /* segment type */
1303 0, /* segment descriptor priority level */
1304 1, /* segment descriptor present */
1306 0, /* default 32 vs 16 bit size */
1307 1 /* limit granularity (byte/page units)*/ },
1308 /* GTLS_START 15 TLS */
1309 { 0x0, /* segment base address */
1311 0, /* segment type */
1312 0, /* segment descriptor priority level */
1313 0, /* segment descriptor present */
1315 0, /* default 32 vs 16 bit size */
1316 0 /* limit granularity (byte/page units)*/ },
1317 /* GTLS_START+1 16 TLS */
1318 { 0x0, /* segment base address */
1320 0, /* segment type */
1321 0, /* segment descriptor priority level */
1322 0, /* segment descriptor present */
1324 0, /* default 32 vs 16 bit size */
1325 0 /* limit granularity (byte/page units)*/ },
1326 /* GTLS_END 17 TLS */
1327 { 0x0, /* segment base address */
1329 0, /* segment type */
1330 0, /* segment descriptor priority level */
1331 0, /* segment descriptor present */
1333 0, /* default 32 vs 16 bit size */
1334 0 /* limit granularity (byte/page units)*/ },
1335 /* GNDIS_SEL 18 NDIS Descriptor */
1336 { 0x0, /* segment base address */
1338 0, /* segment type */
1339 0, /* segment descriptor priority level */
1340 0, /* segment descriptor present */
1342 0, /* default 32 vs 16 bit size */
1343 0 /* limit granularity (byte/page units)*/ },
1346 static struct soft_segment_descriptor ldt_segs[] = {
1347 /* Null Descriptor - overwritten by call gate */
1348 { 0x0, /* segment base address */
1349 0x0, /* length - all address space */
1350 0, /* segment type */
1351 0, /* segment descriptor priority level */
1352 0, /* segment descriptor present */
1354 0, /* default 32 vs 16 bit size */
1355 0 /* limit granularity (byte/page units)*/ },
1356 /* Null Descriptor - overwritten by call gate */
1357 { 0x0, /* segment base address */
1358 0x0, /* length - all address space */
1359 0, /* segment type */
1360 0, /* segment descriptor priority level */
1361 0, /* segment descriptor present */
1363 0, /* default 32 vs 16 bit size */
1364 0 /* limit granularity (byte/page units)*/ },
1365 /* Null Descriptor - overwritten by call gate */
1366 { 0x0, /* segment base address */
1367 0x0, /* length - all address space */
1368 0, /* segment type */
1369 0, /* segment descriptor priority level */
1370 0, /* segment descriptor present */
1372 0, /* default 32 vs 16 bit size */
1373 0 /* limit granularity (byte/page units)*/ },
1374 /* Code Descriptor for user */
1375 { 0x0, /* segment base address */
1376 0xfffff, /* length - all address space */
1377 SDT_MEMERA, /* segment type */
1378 SEL_UPL, /* segment descriptor priority level */
1379 1, /* segment descriptor present */
1381 1, /* default 32 vs 16 bit size */
1382 1 /* limit granularity (byte/page units)*/ },
1383 /* Null Descriptor - overwritten by call gate */
1384 { 0x0, /* segment base address */
1385 0x0, /* length - all address space */
1386 0, /* segment type */
1387 0, /* segment descriptor priority level */
1388 0, /* segment descriptor present */
1390 0, /* default 32 vs 16 bit size */
1391 0 /* limit granularity (byte/page units)*/ },
1392 /* Data Descriptor for user */
1393 { 0x0, /* segment base address */
1394 0xfffff, /* length - all address space */
1395 SDT_MEMRWA, /* segment type */
1396 SEL_UPL, /* segment descriptor priority level */
1397 1, /* segment descriptor present */
1399 1, /* default 32 vs 16 bit size */
1400 1 /* limit granularity (byte/page units)*/ },
1404 setidt(int idx, inthand_t *func, int typ, int dpl, int selec)
1406 struct gate_descriptor *ip;
1409 ip->gd_looffset = (int)func;
1410 ip->gd_selector = selec;
1416 ip->gd_hioffset = ((int)func)>>16 ;
1419 #define IDTVEC(name) __CONCAT(X,name)
1422 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1423 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1424 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1425 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1426 IDTVEC(xmm), IDTVEC(syscall),
1429 IDTVEC(int0x80_syscall);
1431 #ifdef DEBUG_INTERRUPTS
1432 extern inthand_t *Xrsvdary[256];
1436 sdtossd(struct segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1438 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1439 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1440 ssd->ssd_type = sd->sd_type;
1441 ssd->ssd_dpl = sd->sd_dpl;
1442 ssd->ssd_p = sd->sd_p;
1443 ssd->ssd_def32 = sd->sd_def32;
1444 ssd->ssd_gran = sd->sd_gran;
1448 * Populate the (physmap) array with base/bound pairs describing the
1449 * available physical memory in the system, then test this memory and
1450 * build the phys_avail array describing the actually-available memory.
1452 * If we cannot accurately determine the physical memory map, then use
1453 * value from the 0xE801 call, and failing that, the RTC.
1455 * Total memory size may be set by the kernel environment variable
1456 * hw.physmem or the compile-time define MAXMEM.
1459 getmemsize(int first)
1461 int i, physmap_idx, pa_indx, da_indx;
1463 u_int basemem, extmem;
1464 struct vm86frame vmf;
1465 struct vm86context vmc;
1467 vm_offset_t physmap[PHYSMAP_ENTRIES*2];
1475 quad_t dcons_addr, dcons_size;
1477 bzero(&vmf, sizeof(struct vm86frame));
1478 bzero(physmap, sizeof(physmap));
1482 * Some newer BIOSes has broken INT 12H implementation which cause
1483 * kernel panic immediately. In this case, we need to scan SMAP
1484 * with INT 15:E820 first, then determine base memory size.
1487 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1488 if (hasbrokenint12) {
1493 * Perform "base memory" related probes & setup. If we get a crazy
1494 * value give the bios some scribble space just in case.
1496 vm86_intcall(0x12, &vmf);
1497 basemem = vmf.vmf_ax;
1498 if (basemem > 640) {
1499 kprintf("Preposterous BIOS basemem of %uK, "
1500 "truncating to < 640K\n", basemem);
1505 * XXX if biosbasemem is now < 640, there is a `hole'
1506 * between the end of base memory and the start of
1507 * ISA memory. The hole may be empty or it may
1508 * contain BIOS code or data. Map it read/write so
1509 * that the BIOS can write to it. (Memory from 0 to
1510 * the physical end of the kernel is mapped read-only
1511 * to begin with and then parts of it are remapped.
1512 * The parts that aren't remapped form holes that
1513 * remain read-only and are unused by the kernel.
1514 * The base memory area is below the physical end of
1515 * the kernel and right now forms a read-only hole.
1516 * The part of it from PAGE_SIZE to
1517 * (trunc_page(biosbasemem * 1024) - 1) will be
1518 * remapped and used by the kernel later.)
1520 * This code is similar to the code used in
1521 * pmap_mapdev, but since no memory needs to be
1522 * allocated we simply change the mapping.
1524 for (pa = trunc_page(basemem * 1024);
1525 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1526 pte = vtopte(pa + KERNBASE);
1527 *pte = pa | PG_RW | PG_V;
1531 * if basemem != 640, map pages r/w into vm86 page table so
1532 * that the bios can scribble on it.
1535 for (i = basemem / 4; i < 160; i++)
1536 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1540 * map page 1 R/W into the kernel page table so we can use it
1541 * as a buffer. The kernel will unmap this page later.
1543 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
1544 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1547 * get memory map with INT 15:E820
1549 #define SMAPSIZ sizeof(*smap)
1550 #define SMAP_SIG 0x534D4150 /* 'SMAP' */
1553 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1554 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1559 vmf.vmf_eax = 0xE820;
1560 vmf.vmf_edx = SMAP_SIG;
1561 vmf.vmf_ecx = SMAPSIZ;
1562 i = vm86_datacall(0x15, &vmf, &vmc);
1563 if (i || vmf.vmf_eax != SMAP_SIG)
1565 if (boothowto & RB_VERBOSE)
1566 kprintf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1568 *(u_int32_t *)((char *)&smap->base + 4),
1569 (u_int32_t)smap->base,
1570 *(u_int32_t *)((char *)&smap->length + 4),
1571 (u_int32_t)smap->length);
1573 if (smap->type != 0x01)
1576 if (smap->length == 0)
1579 Realmem += smap->length;
1581 if (smap->base >= 0xffffffffLLU) {
1582 kprintf("%ju MB of memory above 4GB ignored\n",
1583 (uintmax_t)(smap->length / 1024 / 1024));
1587 for (i = 0; i <= physmap_idx; i += 2) {
1588 if (smap->base < physmap[i + 1]) {
1589 if (boothowto & RB_VERBOSE) {
1590 kprintf("Overlapping or non-montonic "
1591 "memory region, ignoring "
1594 Realmem -= smap->length;
1599 if (smap->base == physmap[physmap_idx + 1]) {
1600 physmap[physmap_idx + 1] += smap->length;
1605 if (physmap_idx == PHYSMAP_ENTRIES*2) {
1606 kprintf("Too many segments in the physical "
1607 "address map, giving up\n");
1610 physmap[physmap_idx] = smap->base;
1611 physmap[physmap_idx + 1] = smap->base + smap->length;
1613 ; /* fix GCC3.x warning */
1614 } while (vmf.vmf_ebx != 0);
1617 * Perform "base memory" related probes & setup based on SMAP
1620 for (i = 0; i <= physmap_idx; i += 2) {
1621 if (physmap[i] == 0x00000000) {
1622 basemem = physmap[i + 1] / 1024;
1631 if (basemem > 640) {
1632 kprintf("Preposterous BIOS basemem of %uK, "
1633 "truncating to 640K\n", basemem);
1637 for (pa = trunc_page(basemem * 1024);
1638 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1639 pte = vtopte(pa + KERNBASE);
1640 *pte = pa | PG_RW | PG_V;
1644 for (i = basemem / 4; i < 160; i++)
1645 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1648 if (physmap[1] != 0)
1652 * If we failed above, try memory map with INT 15:E801
1654 vmf.vmf_ax = 0xE801;
1655 if (vm86_intcall(0x15, &vmf) == 0) {
1656 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1660 vm86_intcall(0x15, &vmf);
1661 extmem = vmf.vmf_ax;
1664 * Prefer the RTC value for extended memory.
1666 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1671 * Special hack for chipsets that still remap the 384k hole when
1672 * there's 16MB of memory - this really confuses people that
1673 * are trying to use bus mastering ISA controllers with the
1674 * "16MB limit"; they only have 16MB, but the remapping puts
1675 * them beyond the limit.
1677 * If extended memory is between 15-16MB (16-17MB phys address range),
1680 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1684 physmap[1] = basemem * 1024;
1686 physmap[physmap_idx] = 0x100000;
1687 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1691 * Now, physmap contains a map of physical memory.
1694 base_memory = physmap[1];
1696 /* make hole for AP bootstrap code YYY */
1697 physmap[1] = mp_bootaddress(base_memory);
1700 /* Save EBDA address, if any */
1701 ebda_addr = (u_long)(*(u_short *)(KERNBASE + 0x40e));
1705 * Maxmem isn't the "maximum memory", it's one larger than the
1706 * highest page of the physical address space. It should be
1707 * called something like "Maxphyspage". We may adjust this
1708 * based on ``hw.physmem'' and the results of the memory test.
1710 Maxmem = atop(physmap[physmap_idx + 1]);
1713 Maxmem = MAXMEM / 4;
1716 if (kgetenv_quad("hw.physmem", &maxmem))
1717 Maxmem = atop(maxmem);
1719 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1720 (boothowto & RB_VERBOSE))
1721 kprintf("Physical memory use set to %lluK\n", Maxmem * 4);
1724 * If Maxmem has been increased beyond what the system has detected,
1725 * extend the last memory segment to the new limit.
1727 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1728 physmap[physmap_idx + 1] = ptoa(Maxmem);
1730 /* call pmap initialization to make new kernel address space */
1731 pmap_bootstrap(first, 0);
1734 * Size up each available chunk of physical memory.
1736 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1739 phys_avail[pa_indx++] = physmap[0];
1740 phys_avail[pa_indx] = physmap[0];
1741 dump_avail[da_indx] = physmap[0];
1746 * Get dcons buffer address
1748 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1749 kgetenv_quad("dcons.size", &dcons_size) == 0)
1753 * physmap is in bytes, so when converting to page boundaries,
1754 * round up the start address and round down the end address.
1756 for (i = 0; i <= physmap_idx; i += 2) {
1760 if (physmap[i + 1] < end)
1761 end = trunc_page(physmap[i + 1]);
1762 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1763 int tmp, page_bad, full;
1767 int *ptr = (int *)CADDR1;
1772 * block out kernel memory as not available.
1774 if (pa >= 0x100000 && pa < first)
1778 * block out dcons buffer
1781 && pa >= trunc_page(dcons_addr)
1782 && pa < dcons_addr + dcons_size)
1788 * map page into kernel: valid, read/write,non-cacheable
1790 *pte = pa | PG_V | PG_RW | PG_N;
1795 * Test for alternating 1's and 0's
1797 *(volatile int *)ptr = 0xaaaaaaaa;
1798 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1802 * Test for alternating 0's and 1's
1804 *(volatile int *)ptr = 0x55555555;
1805 if (*(volatile int *)ptr != 0x55555555) {
1811 *(volatile int *)ptr = 0xffffffff;
1812 if (*(volatile int *)ptr != 0xffffffff) {
1818 *(volatile int *)ptr = 0x0;
1819 if (*(volatile int *)ptr != 0x0) {
1823 * Restore original value.
1828 * Adjust array of valid/good pages.
1830 if (page_bad == TRUE) {
1834 * If this good page is a continuation of the
1835 * previous set of good pages, then just increase
1836 * the end pointer. Otherwise start a new chunk.
1837 * Note that "end" points one higher than end,
1838 * making the range >= start and < end.
1839 * If we're also doing a speculative memory
1840 * test and we at or past the end, bump up Maxmem
1841 * so that we keep going. The first bad page
1842 * will terminate the loop.
1844 if (phys_avail[pa_indx] == pa) {
1845 phys_avail[pa_indx] += PAGE_SIZE;
1848 if (pa_indx >= PHYSMAP_ENTRIES*2) {
1849 kprintf("Too many holes in the physical address space, giving up\n");
1854 phys_avail[pa_indx++] = pa; /* start */
1855 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1859 if (dump_avail[da_indx] == pa) {
1860 dump_avail[da_indx] += PAGE_SIZE;
1863 if (da_indx >= PHYSMAP_ENTRIES*2) {
1867 dump_avail[da_indx++] = pa; /* start */
1868 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1881 * The last chunk must contain at least one page plus the message
1882 * buffer to avoid complicating other code (message buffer address
1883 * calculation, etc.).
1885 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1886 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1887 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1888 phys_avail[pa_indx--] = 0;
1889 phys_avail[pa_indx--] = 0;
1892 Maxmem = atop(phys_avail[pa_indx]);
1894 /* Trim off space for the message buffer. */
1895 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1897 avail_end = phys_avail[pa_indx];
1900 struct machintr_abi MachIntrABI;
1911 * 7 Device Not Available (x87)
1913 * 9 Coprocessor Segment overrun (unsupported, reserved)
1915 * 11 Segment not present
1917 * 13 General Protection
1920 * 16 x87 FP Exception pending
1921 * 17 Alignment Check
1923 * 19 SIMD floating point
1925 * 32-255 INTn/external sources
1930 struct gate_descriptor *gdp;
1931 int gsel_tss, metadata_missing, off, x;
1932 struct mdglobaldata *gd;
1935 * Prevent lowering of the ipl if we call tsleep() early.
1937 gd = &CPU_prvspace[0].mdglobaldata;
1938 bzero(gd, sizeof(*gd));
1940 gd->mi.gd_curthread = &thread0;
1941 thread0.td_gd = &gd->mi;
1943 atdevbase = ISA_HOLE_START + KERNBASE;
1945 metadata_missing = 0;
1946 if (bootinfo.bi_modulep) {
1947 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1948 preload_bootstrap_relocate(KERNBASE);
1950 metadata_missing = 1;
1952 if (bootinfo.bi_envp)
1953 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1955 if (boothowto & RB_VERBOSE)
1959 * Default MachIntrABI to ICU
1961 MachIntrABI = MachIntrABI_ICU;
1963 TUNABLE_INT_FETCH("hw.apic_io_enable", &ioapic_enable); /* for compat */
1964 TUNABLE_INT_FETCH("hw.ioapic_enable", &ioapic_enable);
1965 TUNABLE_INT_FETCH("hw.lapic_enable", &lapic_enable);
1968 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1969 * and ncpus_fit_mask remain 0.
1974 /* Init basic tunables, hz etc */
1978 * make gdt memory segments, the code segment goes up to end of the
1979 * page with etext in it, the data segment goes to the end of
1983 * XXX text protection is temporarily (?) disabled. The limit was
1984 * i386_btop(round_page(etext)) - 1.
1986 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1987 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1989 gdt_segs[GPRIV_SEL].ssd_limit =
1990 atop(sizeof(struct privatespace) - 1);
1991 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
1992 gdt_segs[GPROC0_SEL].ssd_base =
1993 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1995 gd->mi.gd_prvspace = &CPU_prvspace[0];
1998 * Note: on both UP and SMP curthread must be set non-NULL
1999 * early in the boot sequence because the system assumes
2000 * that 'curthread' is never NULL.
2003 for (x = 0; x < NGDT; x++) {
2005 /* avoid overwriting db entries with APM ones */
2006 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
2009 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2012 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2013 r_gdt.rd_base = (int) gdt;
2016 mi_gdinit(&gd->mi, 0);
2018 mi_proc0init(&gd->mi, proc0paddr);
2019 safepri = TDPRI_MAX;
2021 /* make ldt memory segments */
2023 * XXX - VM_MAX_USER_ADDRESS is an end address, not a max. And it
2024 * should be spelled ...MAX_USER...
2026 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
2027 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
2028 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2029 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2031 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2033 gd->gd_currentldt = _default_ldt;
2034 /* spinlocks and the BGL */
2038 * Setup the hardware exception table. Most exceptions use
2039 * SDT_SYS386TGT, known as a 'trap gate'. Trap gates leave
2040 * interrupts enabled. VM page faults use SDT_SYS386IGT, known as
2041 * an 'interrupt trap gate', which disables interrupts on entry,
2042 * in order to be able to poll the appropriate CRn register to
2043 * determine the fault address.
2045 for (x = 0; x < NIDT; x++) {
2046 #ifdef DEBUG_INTERRUPTS
2047 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2049 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2052 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2053 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2054 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2055 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2056 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2057 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2058 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2059 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2060 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2061 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2062 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2063 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2064 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2065 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2066 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2067 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2068 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2069 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2070 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2071 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2072 setidt(0x80, &IDTVEC(int0x80_syscall),
2073 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2075 r_idt.rd_limit = sizeof(idt0) - 1;
2076 r_idt.rd_base = (int) idt;
2080 * Initialize the console before we print anything out.
2084 if (metadata_missing)
2085 kprintf("WARNING: loader(8) metadata is missing!\n");
2094 * Initialize IRQ mapping
2097 * SHOULD be after elcr_probe()
2099 MachIntrABI_ICU.initmap();
2101 MachIntrABI_IOAPIC.initmap();
2106 if (boothowto & RB_KDB)
2107 Debugger("Boot flags requested debugger");
2110 finishidentcpu(); /* Final stage of CPU initialization */
2111 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2112 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2113 initializecpu(); /* Initialize CPU registers */
2116 * make an initial tss so cpu can get interrupt stack on syscall!
2117 * The 16 bytes is to save room for a VM86 context.
2119 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
2120 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
2121 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2122 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
2123 gd->gd_common_tssd = *gd->gd_tss_gdt;
2124 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
2127 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2128 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
2129 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2130 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2131 dblfault_tss.tss_cr3 = (int)IdlePTD;
2132 dblfault_tss.tss_eip = (int) dblfault_handler;
2133 dblfault_tss.tss_eflags = PSL_KERNEL;
2134 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2135 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2136 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2137 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2138 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2142 init_param2(physmem);
2144 /* now running on new page tables, configured,and u/iom is accessible */
2146 /* Map the message buffer. */
2147 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2148 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2150 msgbufinit(msgbufp, MSGBUF_SIZE);
2152 /* make a call gate to reenter kernel with */
2153 gdp = &ldt[LSYS5CALLS_SEL].gd;
2155 x = (int) &IDTVEC(syscall);
2156 gdp->gd_looffset = x++;
2157 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2159 gdp->gd_type = SDT_SYS386CGT;
2160 gdp->gd_dpl = SEL_UPL;
2162 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2164 /* XXX does this work? */
2165 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2166 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2168 /* transfer to user mode */
2170 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2171 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2173 /* setup proc 0's pcb */
2174 thread0.td_pcb->pcb_flags = 0;
2175 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
2176 thread0.td_pcb->pcb_ext = 0;
2177 lwp0.lwp_md.md_regs = &proc0_tf;
2181 * Initialize machine-dependant portions of the global data structure.
2182 * Note that the global data area and cpu0's idlestack in the private
2183 * data space were allocated in locore.
2185 * Note: the idlethread's cpl is 0
2187 * WARNING! Called from early boot, 'mycpu' may not work yet.
2190 cpu_gdinit(struct mdglobaldata *gd, int cpu)
2193 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
2195 lwkt_init_thread(&gd->mi.gd_idlethread,
2196 gd->mi.gd_prvspace->idlestack,
2197 sizeof(gd->mi.gd_prvspace->idlestack),
2199 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2200 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2201 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2202 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
2206 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
2208 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
2209 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
2216 globaldata_find(int cpu)
2218 KKASSERT(cpu >= 0 && cpu < ncpus);
2219 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2222 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2223 static void f00f_hack(void *unused);
2224 SYSINIT(f00f_hack, SI_BOOT2_BIOS, SI_ORDER_ANY, f00f_hack, NULL);
2227 f00f_hack(void *unused)
2229 struct gate_descriptor *new_idt;
2235 kprintf("Intel Pentium detected, installing workaround for F00F bug\n");
2237 r_idt.rd_limit = sizeof(idt0) - 1;
2239 tmp = kmem_alloc(&kernel_map, PAGE_SIZE * 2);
2241 panic("kmem_alloc returned 0");
2242 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2243 panic("kmem_alloc returned non-page-aligned memory");
2244 /* Put the first seven entries in the lower page */
2245 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2246 bcopy(idt, new_idt, sizeof(idt0));
2247 r_idt.rd_base = (int)new_idt;
2250 if (vm_map_protect(&kernel_map, tmp, tmp + PAGE_SIZE,
2251 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2252 panic("vm_map_protect failed");
2255 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2258 ptrace_set_pc(struct lwp *lp, unsigned long addr)
2260 lp->lwp_md.md_regs->tf_eip = addr;
2265 ptrace_single_step(struct lwp *lp)
2267 lp->lwp_md.md_regs->tf_eflags |= PSL_T;
2272 fill_regs(struct lwp *lp, struct reg *regs)
2274 struct trapframe *tp;
2276 tp = lp->lwp_md.md_regs;
2277 regs->r_gs = tp->tf_gs;
2278 regs->r_fs = tp->tf_fs;
2279 regs->r_es = tp->tf_es;
2280 regs->r_ds = tp->tf_ds;
2281 regs->r_edi = tp->tf_edi;
2282 regs->r_esi = tp->tf_esi;
2283 regs->r_ebp = tp->tf_ebp;
2284 regs->r_ebx = tp->tf_ebx;
2285 regs->r_edx = tp->tf_edx;
2286 regs->r_ecx = tp->tf_ecx;
2287 regs->r_eax = tp->tf_eax;
2288 regs->r_eip = tp->tf_eip;
2289 regs->r_cs = tp->tf_cs;
2290 regs->r_eflags = tp->tf_eflags;
2291 regs->r_esp = tp->tf_esp;
2292 regs->r_ss = tp->tf_ss;
2297 set_regs(struct lwp *lp, struct reg *regs)
2299 struct trapframe *tp;
2301 tp = lp->lwp_md.md_regs;
2302 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2303 !CS_SECURE(regs->r_cs))
2305 tp->tf_gs = regs->r_gs;
2306 tp->tf_fs = regs->r_fs;
2307 tp->tf_es = regs->r_es;
2308 tp->tf_ds = regs->r_ds;
2309 tp->tf_edi = regs->r_edi;
2310 tp->tf_esi = regs->r_esi;
2311 tp->tf_ebp = regs->r_ebp;
2312 tp->tf_ebx = regs->r_ebx;
2313 tp->tf_edx = regs->r_edx;
2314 tp->tf_ecx = regs->r_ecx;
2315 tp->tf_eax = regs->r_eax;
2316 tp->tf_eip = regs->r_eip;
2317 tp->tf_cs = regs->r_cs;
2318 tp->tf_eflags = regs->r_eflags;
2319 tp->tf_esp = regs->r_esp;
2320 tp->tf_ss = regs->r_ss;
2324 #ifndef CPU_DISABLE_SSE
2326 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
2328 struct env87 *penv_87 = &sv_87->sv_env;
2329 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2332 /* FPU control/status */
2333 penv_87->en_cw = penv_xmm->en_cw;
2334 penv_87->en_sw = penv_xmm->en_sw;
2335 penv_87->en_tw = penv_xmm->en_tw;
2336 penv_87->en_fip = penv_xmm->en_fip;
2337 penv_87->en_fcs = penv_xmm->en_fcs;
2338 penv_87->en_opcode = penv_xmm->en_opcode;
2339 penv_87->en_foo = penv_xmm->en_foo;
2340 penv_87->en_fos = penv_xmm->en_fos;
2343 for (i = 0; i < 8; ++i)
2344 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2348 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2350 struct env87 *penv_87 = &sv_87->sv_env;
2351 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2354 /* FPU control/status */
2355 penv_xmm->en_cw = penv_87->en_cw;
2356 penv_xmm->en_sw = penv_87->en_sw;
2357 penv_xmm->en_tw = penv_87->en_tw;
2358 penv_xmm->en_fip = penv_87->en_fip;
2359 penv_xmm->en_fcs = penv_87->en_fcs;
2360 penv_xmm->en_opcode = penv_87->en_opcode;
2361 penv_xmm->en_foo = penv_87->en_foo;
2362 penv_xmm->en_fos = penv_87->en_fos;
2365 for (i = 0; i < 8; ++i)
2366 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2368 #endif /* CPU_DISABLE_SSE */
2371 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2373 #ifndef CPU_DISABLE_SSE
2375 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2376 (struct save87 *)fpregs);
2379 #endif /* CPU_DISABLE_SSE */
2380 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2385 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2387 #ifndef CPU_DISABLE_SSE
2389 set_fpregs_xmm((struct save87 *)fpregs,
2390 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2393 #endif /* CPU_DISABLE_SSE */
2394 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2399 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2402 dbregs->dr0 = rdr0();
2403 dbregs->dr1 = rdr1();
2404 dbregs->dr2 = rdr2();
2405 dbregs->dr3 = rdr3();
2406 dbregs->dr4 = rdr4();
2407 dbregs->dr5 = rdr5();
2408 dbregs->dr6 = rdr6();
2409 dbregs->dr7 = rdr7();
2413 pcb = lp->lwp_thread->td_pcb;
2414 dbregs->dr0 = pcb->pcb_dr0;
2415 dbregs->dr1 = pcb->pcb_dr1;
2416 dbregs->dr2 = pcb->pcb_dr2;
2417 dbregs->dr3 = pcb->pcb_dr3;
2420 dbregs->dr6 = pcb->pcb_dr6;
2421 dbregs->dr7 = pcb->pcb_dr7;
2427 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2430 load_dr0(dbregs->dr0);
2431 load_dr1(dbregs->dr1);
2432 load_dr2(dbregs->dr2);
2433 load_dr3(dbregs->dr3);
2434 load_dr4(dbregs->dr4);
2435 load_dr5(dbregs->dr5);
2436 load_dr6(dbregs->dr6);
2437 load_dr7(dbregs->dr7);
2440 struct ucred *ucred;
2442 uint32_t mask1, mask2;
2445 * Don't let an illegal value for dr7 get set. Specifically,
2446 * check for undefined settings. Setting these bit patterns
2447 * result in undefined behaviour and can lead to an unexpected
2450 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2451 i++, mask1 <<= 2, mask2 <<= 2)
2452 if ((dbregs->dr7 & mask1) == mask2)
2455 pcb = lp->lwp_thread->td_pcb;
2456 ucred = lp->lwp_proc->p_ucred;
2459 * Don't let a process set a breakpoint that is not within the
2460 * process's address space. If a process could do this, it
2461 * could halt the system by setting a breakpoint in the kernel
2462 * (if ddb was enabled). Thus, we need to check to make sure
2463 * that no breakpoints are being enabled for addresses outside
2464 * process's address space, unless, perhaps, we were called by
2467 * XXX - what about when the watched area of the user's
2468 * address space is written into from within the kernel
2469 * ... wouldn't that still cause a breakpoint to be generated
2470 * from within kernel mode?
2473 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
2474 if (dbregs->dr7 & 0x3) {
2475 /* dr0 is enabled */
2476 if (dbregs->dr0 >= VM_MAX_USER_ADDRESS)
2480 if (dbregs->dr7 & (0x3<<2)) {
2481 /* dr1 is enabled */
2482 if (dbregs->dr1 >= VM_MAX_USER_ADDRESS)
2486 if (dbregs->dr7 & (0x3<<4)) {
2487 /* dr2 is enabled */
2488 if (dbregs->dr2 >= VM_MAX_USER_ADDRESS)
2492 if (dbregs->dr7 & (0x3<<6)) {
2493 /* dr3 is enabled */
2494 if (dbregs->dr3 >= VM_MAX_USER_ADDRESS)
2499 pcb->pcb_dr0 = dbregs->dr0;
2500 pcb->pcb_dr1 = dbregs->dr1;
2501 pcb->pcb_dr2 = dbregs->dr2;
2502 pcb->pcb_dr3 = dbregs->dr3;
2503 pcb->pcb_dr6 = dbregs->dr6;
2504 pcb->pcb_dr7 = dbregs->dr7;
2506 pcb->pcb_flags |= PCB_DBREGS;
2513 * Return > 0 if a hardware breakpoint has been hit, and the
2514 * breakpoint was in user space. Return 0, otherwise.
2517 user_dbreg_trap(void)
2519 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2520 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2521 int nbp; /* number of breakpoints that triggered */
2522 caddr_t addr[4]; /* breakpoint addresses */
2526 if ((dr7 & 0x000000ff) == 0) {
2528 * all GE and LE bits in the dr7 register are zero,
2529 * thus the trap couldn't have been caused by the
2530 * hardware debug registers
2537 bp = dr6 & 0x0000000f;
2541 * None of the breakpoint bits are set meaning this
2542 * trap was not caused by any of the debug registers
2548 * at least one of the breakpoints were hit, check to see
2549 * which ones and if any of them are user space addresses
2553 addr[nbp++] = (caddr_t)rdr0();
2556 addr[nbp++] = (caddr_t)rdr1();
2559 addr[nbp++] = (caddr_t)rdr2();
2562 addr[nbp++] = (caddr_t)rdr3();
2565 for (i=0; i<nbp; i++) {
2567 (caddr_t)VM_MAX_USER_ADDRESS) {
2569 * addr[i] is in user space
2576 * None of the breakpoints are in user space.
2584 Debugger(const char *msg)
2586 kprintf("Debugger(\"%s\") called.\n", msg);
2593 * Provide inb() and outb() as functions. They are normally only
2594 * available as macros calling inlined functions, thus cannot be
2595 * called inside DDB.
2597 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2603 /* silence compiler warnings */
2605 void outb(u_int, u_char);
2612 * We use %%dx and not %1 here because i/o is done at %dx and not at
2613 * %edx, while gcc generates inferior code (movw instead of movl)
2614 * if we tell it to load (u_short) port.
2616 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2621 outb(u_int port, u_char data)
2625 * Use an unnecessary assignment to help gcc's register allocator.
2626 * This make a large difference for gcc-1.40 and a tiny difference
2627 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2628 * best results. gcc-2.6.0 can't handle this.
2631 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2638 #include "opt_cpu.h"
2642 * initialize all the SMP locks
2645 /* critical region when masking or unmasking interupts */
2646 struct spinlock_deprecated imen_spinlock;
2648 /* critical region for old style disable_intr/enable_intr */
2649 struct spinlock_deprecated mpintr_spinlock;
2651 /* critical region around INTR() routines */
2652 struct spinlock_deprecated intr_spinlock;
2654 /* lock region used by kernel profiling */
2655 struct spinlock_deprecated mcount_spinlock;
2657 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2658 struct spinlock_deprecated com_spinlock;
2660 /* lock regions around the clock hardware */
2661 struct spinlock_deprecated clock_spinlock;
2663 /* lock around the MP rendezvous */
2664 struct spinlock_deprecated smp_rv_spinlock;
2671 * Get the initial mplock with a count of 1 for the BSP.
2672 * This uses a LOGICAL cpu ID, ie BSP == 0.
2674 cpu_get_initial_mplock();
2677 spin_lock_init(&mcount_spinlock);
2678 spin_lock_init(&intr_spinlock);
2679 spin_lock_init(&mpintr_spinlock);
2680 spin_lock_init(&imen_spinlock);
2681 spin_lock_init(&smp_rv_spinlock);
2682 spin_lock_init(&com_spinlock);
2683 spin_lock_init(&clock_spinlock);
2685 /* our token pool needs to work early */
2686 lwkt_token_pool_init();