1 /**************************************************************************
3 ** $FreeBSD: src/sys/pci/ncr.c,v 1.155.2.3 2001/03/05 13:09:10 obrien Exp $
4 ** $DragonFly: src/sys/dev/disk/ncr/ncr.c,v 1.7 2004/03/15 01:10:44 dillon Exp $
6 ** Device driver for the NCR 53C8XX PCI-SCSI-Controller Family.
8 **-------------------------------------------------------------------------
10 ** Written for 386bsd and FreeBSD by
11 ** Wolfgang Stanglmeier <wolf@cologne.de>
12 ** Stefan Esser <se@mi.Uni-Koeln.de>
14 **-------------------------------------------------------------------------
16 ** Copyright (c) 1994 Wolfgang Stanglmeier. All rights reserved.
18 ** Redistribution and use in source and binary forms, with or without
19 ** modification, are permitted provided that the following conditions
21 ** 1. Redistributions of source code must retain the above copyright
22 ** notice, this list of conditions and the following disclaimer.
23 ** 2. Redistributions in binary form must reproduce the above copyright
24 ** notice, this list of conditions and the following disclaimer in the
25 ** documentation and/or other materials provided with the distribution.
26 ** 3. The name of the author may not be used to endorse or promote products
27 ** derived from this software without specific prior written permission.
29 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
30 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
31 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
32 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
33 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
34 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
38 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 ***************************************************************************
43 #define NCR_DATE "pl30 98/1/1"
45 #define NCR_VERSION (2)
46 #define MAX_UNITS (16)
48 #define NCR_GETCC_WITHMSG
50 #if (defined(__DragonFly__) || defined (__FreeBSD__)) && defined(_KERNEL)
54 /*==========================================================
56 ** Configuration and Debugging
58 ** May be overwritten in <arch/conf/xxxx>
60 **==========================================================
64 ** SCSI address of this device.
65 ** The boot routines should have set it.
69 #ifndef SCSI_NCR_MYADDR
70 #define SCSI_NCR_MYADDR (7)
71 #endif /* SCSI_NCR_MYADDR */
74 ** The default synchronous period factor
76 ** If maximum synchronous frequency is defined, use it instead.
79 #ifndef SCSI_NCR_MAX_SYNC
81 #ifndef SCSI_NCR_DFLT_SYNC
82 #define SCSI_NCR_DFLT_SYNC (12)
83 #endif /* SCSI_NCR_DFLT_SYNC */
87 #if SCSI_NCR_MAX_SYNC == 0
88 #define SCSI_NCR_DFLT_SYNC 0
90 #define SCSI_NCR_DFLT_SYNC (250000 / SCSI_NCR_MAX_SYNC)
96 ** The minimal asynchronous pre-scaler period (ns)
100 #ifndef SCSI_NCR_MIN_ASYNC
101 #define SCSI_NCR_MIN_ASYNC (40)
102 #endif /* SCSI_NCR_MIN_ASYNC */
105 ** The maximal bus with (in log2 byte)
106 ** (0=8 bit, 1=16 bit)
109 #ifndef SCSI_NCR_MAX_WIDE
110 #define SCSI_NCR_MAX_WIDE (1)
111 #endif /* SCSI_NCR_MAX_WIDE */
113 /*==========================================================
115 ** Configuration and Debugging
117 **==========================================================
121 ** Number of targets supported by the driver.
122 ** n permits target numbers 0..n-1.
123 ** Default is 7, meaning targets #0..#6.
127 #define MAX_TARGET (16)
130 ** Number of logic units supported by the driver.
131 ** n enables logic unit numbers 0..n-1.
132 ** The common SCSI devices require only
133 ** one lun, so take 1 as the default.
141 ** The maximum number of jobs scheduled for starting.
142 ** There should be one slot per target, and one slot
143 ** for each tag of each target in use.
146 #define MAX_START (256)
149 ** The maximum number of segments a transfer is split into.
152 #define MAX_SCATTER (33)
155 ** The maximum transfer length (should be >= 64k).
156 ** MUST NOT be greater than (MAX_SCATTER-1) * PAGE_SIZE.
159 #define MAX_SIZE ((MAX_SCATTER-1) * (long) PAGE_SIZE)
165 #define NCR_SNOOP_TIMEOUT (1000000)
167 /*==========================================================
171 **==========================================================
174 #include <sys/param.h>
175 #include <sys/time.h>
178 #include <sys/systm.h>
179 #include <sys/malloc.h>
181 #include <sys/kernel.h>
182 #include <sys/sysctl.h>
184 #include <machine/clock.h>
185 #include <machine/md_var.h>
186 #include <machine/bus.h>
187 #include <machine/resource.h>
188 #include <sys/rman.h>
191 #include <vm/vm_extern.h>
194 #include <bus/pci/pcivar.h>
195 #include <bus/pci/pcireg.h>
198 #include <bus/cam/cam.h>
199 #include <bus/cam/cam_ccb.h>
200 #include <bus/cam/cam_sim.h>
201 #include <bus/cam/cam_xpt_sim.h>
202 #include <bus/cam/cam_debug.h>
204 #include <bus/cam/scsi/scsi_all.h>
205 #include <bus/cam/scsi/scsi_message.h>
207 /*==========================================================
211 **==========================================================
214 #define DEBUG_ALLOC (0x0001)
215 #define DEBUG_PHASE (0x0002)
216 #define DEBUG_POLL (0x0004)
217 #define DEBUG_QUEUE (0x0008)
218 #define DEBUG_RESULT (0x0010)
219 #define DEBUG_SCATTER (0x0020)
220 #define DEBUG_SCRIPT (0x0040)
221 #define DEBUG_TINY (0x0080)
222 #define DEBUG_TIMING (0x0100)
223 #define DEBUG_NEGO (0x0200)
224 #define DEBUG_TAGS (0x0400)
225 #define DEBUG_FREEZE (0x0800)
226 #define DEBUG_RESTART (0x1000)
229 ** Enable/Disable debug messages.
230 ** Can be changed at runtime too.
232 #ifdef SCSI_NCR_DEBUG
233 #define DEBUG_FLAGS ncr_debug
234 #else /* SCSI_NCR_DEBUG */
235 #define SCSI_NCR_DEBUG 0
236 #define DEBUG_FLAGS 0
237 #endif /* SCSI_NCR_DEBUG */
241 /*==========================================================
245 **==========================================================
247 ** modified copy from 386bsd:/usr/include/sys/assert.h
249 **----------------------------------------------------------
253 #define assert(expression) { \
254 if (!(expression)) { \
255 (void)printf("assertion \"%s\" failed: " \
256 "file \"%s\", line %d\n", \
257 #expression, __FILE__, __LINE__); \
262 #define assert(expression) { \
263 if (!(expression)) { \
264 (void)printf("assertion \"%s\" failed: " \
265 "file \"%s\", line %d\n", \
266 #expression, __FILE__, __LINE__); \
271 /*==========================================================
273 ** Access to the controller chip.
275 **==========================================================
281 #define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va)
284 #define INB(r) bus_space_read_1(np->bst, np->bsh, offsetof(struct ncr_reg, r))
285 #define INW(r) bus_space_read_2(np->bst, np->bsh, offsetof(struct ncr_reg, r))
286 #define INL(r) bus_space_read_4(np->bst, np->bsh, offsetof(struct ncr_reg, r))
288 #define OUTB(r, val) bus_space_write_1(np->bst, np->bsh, \
289 offsetof(struct ncr_reg, r), val)
290 #define OUTW(r, val) bus_space_write_2(np->bst, np->bsh, \
291 offsetof(struct ncr_reg, r), val)
292 #define OUTL(r, val) bus_space_write_4(np->bst, np->bsh, \
293 offsetof(struct ncr_reg, r), val)
294 #define OUTL_OFF(o, val) bus_space_write_4(np->bst, np->bsh, o, val)
296 #define INB_OFF(o) bus_space_read_1(np->bst, np->bsh, o)
297 #define INW_OFF(o) bus_space_read_2(np->bst, np->bsh, o)
298 #define INL_OFF(o) bus_space_read_4(np->bst, np->bsh, o)
300 #define READSCRIPT_OFF(base, off) \
301 (base ? *((volatile u_int32_t *)((volatile char *)base + (off))) : \
302 bus_space_read_4(np->bst2, np->bsh2, off))
304 #define WRITESCRIPT_OFF(base, off, val) \
307 *((volatile u_int32_t *) \
308 ((volatile char *)base + (off))) = (val); \
310 bus_space_write_4(np->bst2, np->bsh2, off, val); \
313 #define READSCRIPT(r) \
314 READSCRIPT_OFF(np->script, offsetof(struct script, r))
316 #define WRITESCRIPT(r, val) \
317 WRITESCRIPT_OFF(np->script, offsetof(struct script, r), val)
320 ** Set bit field ON, OFF
323 #define OUTONB(r, m) OUTB(r, INB(r) | (m))
324 #define OUTOFFB(r, m) OUTB(r, INB(r) & ~(m))
325 #define OUTONW(r, m) OUTW(r, INW(r) | (m))
326 #define OUTOFFW(r, m) OUTW(r, INW(r) & ~(m))
327 #define OUTONL(r, m) OUTL(r, INL(r) | (m))
328 #define OUTOFFL(r, m) OUTL(r, INL(r) & ~(m))
330 /*==========================================================
332 ** Command control block states.
334 **==========================================================
339 #define HS_NEGOTIATE (2) /* sync/wide data transfer*/
340 #define HS_DISCONNECT (3) /* Disconnected by target */
342 #define HS_COMPLETE (4)
343 #define HS_SEL_TIMEOUT (5) /* Selection timeout */
344 #define HS_RESET (6) /* SCSI reset */
345 #define HS_ABORTED (7) /* Transfer aborted */
346 #define HS_TIMEOUT (8) /* Software timeout */
347 #define HS_FAIL (9) /* SCSI or PCI bus errors */
348 #define HS_UNEXPECTED (10) /* Unexpected disconnect */
349 #define HS_STALL (11) /* QUEUE FULL or BUSY */
351 #define HS_DONEMASK (0xfc)
353 /*==========================================================
355 ** Software Interrupt Codes
357 **==========================================================
360 #define SIR_SENSE_RESTART (1)
361 #define SIR_SENSE_FAILED (2)
362 #define SIR_STALL_RESTART (3)
363 #define SIR_STALL_QUEUE (4)
364 #define SIR_NEGO_SYNC (5)
365 #define SIR_NEGO_WIDE (6)
366 #define SIR_NEGO_FAILED (7)
367 #define SIR_NEGO_PROTO (8)
368 #define SIR_REJECT_RECEIVED (9)
369 #define SIR_REJECT_SENT (10)
370 #define SIR_IGN_RESIDUE (11)
371 #define SIR_MISSING_SAVE (12)
374 /*==========================================================
376 ** Extended error codes.
377 ** xerr_status field of struct nccb.
379 **==========================================================
383 #define XE_EXTRA_DATA (1) /* unexpected data phase */
384 #define XE_BAD_PHASE (2) /* illegal phase (4/5) */
386 /*==========================================================
388 ** Negotiation status.
389 ** nego_status field of struct nccb.
391 **==========================================================
397 /*==========================================================
399 ** XXX These are no longer used. Remove once the
400 ** script is updated.
401 ** "Special features" of targets.
402 ** quirks field of struct tcb.
403 ** actualquirks field of struct nccb.
405 **==========================================================
408 #define QUIRK_AUTOSAVE (0x01)
409 #define QUIRK_NOMSG (0x02)
410 #define QUIRK_NOSYNC (0x10)
411 #define QUIRK_NOWIDE16 (0x20)
412 #define QUIRK_NOTAGS (0x40)
413 #define QUIRK_UPDATE (0x80)
415 /*==========================================================
419 **==========================================================
422 #define CCB_MAGIC (0xf2691ad2)
423 #define MAX_TAGS (32) /* hard limit */
425 /*==========================================================
429 **==========================================================
432 #define PRINT_ADDR(ccb) xpt_print_path((ccb)->ccb_h.path)
434 /*==========================================================
436 ** Declaration of structs.
438 **==========================================================
447 typedef struct ncb * ncb_p;
448 typedef struct tcb * tcb_p;
449 typedef struct lcb * lcb_p;
450 typedef struct nccb * nccb_p;
464 #define UC_SETSYNC 10
465 #define UC_SETTAGS 11
466 #define UC_SETDEBUG 12
467 #define UC_SETORDER 13
468 #define UC_SETWIDE 14
469 #define UC_SETFLAG 15
471 #define UF_TRACE (0x01)
473 /*---------------------------------------
475 ** Timestamps for profiling
477 **---------------------------------------
480 /* Type of the kernel variable `ticks'. XXX should be declared with the var. */
494 ** profiling data (per device)
510 /*==========================================================
512 ** Declaration of structs: target control block
514 **==========================================================
517 #define NCR_TRANS_CUR 0x01 /* Modify current neogtiation status */
518 #define NCR_TRANS_ACTIVE 0x03 /* Assume this is the active target */
519 #define NCR_TRANS_GOAL 0x04 /* Modify negotiation goal */
520 #define NCR_TRANS_USER 0x08 /* Modify user negotiation settings */
522 struct ncr_transinfo {
528 struct ncr_target_tinfo {
529 /* Hardware version of our sync settings */
531 #define NCR_CUR_DISCENB 0x01
532 #define NCR_CUR_TAGENB 0x02
533 #define NCR_USR_DISCENB 0x04
534 #define NCR_USR_TAGENB 0x08
536 struct ncr_transinfo current;
537 struct ncr_transinfo goal;
538 struct ncr_transinfo user;
539 /* Hardware version of our wide settings */
545 ** during reselection the ncr jumps to this point
546 ** with SFBR set to the encoded target number
548 ** if it's not this target, jump to the next.
550 ** JUMP IF (SFBR != #target#)
554 struct link jump_tcb;
557 ** load the actual values for the sxfer and the scntl3
558 ** register (sync/wide mode).
561 ** @(sval field of this tcb)
564 ** @(wval field of this tcb)
565 ** @(scntl3 register)
571 ** if next message is "identify"
572 ** then load the message to SFBR,
573 ** else load 0 to SFBR.
579 struct link call_lun;
582 ** now look for the right lun.
585 ** @(first nccb of this lun)
588 struct link jump_lcb;
591 ** pointer to interrupted getcc nccb
597 ** pointer to nccb used for negotiating.
598 ** Avoid to start a nego for all queued commands
599 ** when tagged command queuing is enabled.
612 ** user settable limits for sync transfer
613 ** and tagged commands.
616 struct ncr_target_tinfo tinfo;
619 ** the lcb's of this tcb
625 /*==========================================================
627 ** Declaration of structs: lun control block
629 **==========================================================
634 ** during reselection the ncr jumps to this point
635 ** with SFBR set to the "Identify" message.
636 ** if it's not this lun, jump to the next.
638 ** JUMP IF (SFBR != #lun#)
639 ** @(next lcb of this target)
642 struct link jump_lcb;
645 ** if next message is "simple tag",
646 ** then load the tag to SFBR,
647 ** else load 0 to SFBR.
653 struct link call_tag;
656 ** now look for the right nccb.
659 ** @(first nccb of this lun)
662 struct link jump_nccb;
665 ** start of the nccb chain
671 ** Control of tagged queueing
681 /*==========================================================
683 ** Declaration of structs: COMMAND control block
685 **==========================================================
687 ** This substructure is copied from the nccb to a
688 ** global address after selection (or reselection)
689 ** and copied back before disconnect.
691 ** These fields are accessible to the script processor.
693 **----------------------------------------------------------
698 ** Execution of a nccb starts at this point.
699 ** It's a jump to the "SELECT" label
702 ** After successful selection the script
703 ** processor overwrites it with a jump to
704 ** the IDLE label of the script.
710 ** Saved data pointer.
711 ** Points to the position in the script
712 ** responsible for the actual transfer
714 ** It's written after reception of a
715 ** "SAVE_DATA_POINTER" message.
716 ** The goalpointer points after
717 ** the last transfer command.
725 ** The virtual address of the nccb
726 ** containing this header.
732 ** space for some timestamps to gather
733 ** profiling data about devices and this driver.
746 ** The status bytes are used by the host and the script processor.
748 ** The first four byte are copied to the scratchb register
749 ** (declared as scr0..scr3 in ncr_reg.h) just after the select/reselect,
750 ** and copied back just after disconnecting.
751 ** Inside the script the XX_REG are used.
753 ** The last four bytes are used inside the script by "COPY" commands.
754 ** Because source and destination must have the same alignment
755 ** in a longword, the fields HAVE to be at the choosen offsets.
756 ** xerr_st (4) 0 (0x34) scratcha
757 ** sync_st (5) 1 (0x05) sxfer
758 ** wide_st (7) 3 (0x03) scntl3
762 ** First four bytes (script)
766 #define HS_PRT nc_scr1
771 ** First four bytes (host)
773 #define actualquirks phys.header.status[0]
774 #define host_status phys.header.status[1]
775 #define s_status phys.header.status[2]
776 #define parity_status phys.header.status[3]
779 ** Last four bytes (script)
781 #define xerr_st header.status[4] /* MUST be ==0 mod 4 */
782 #define sync_st header.status[5] /* MUST be ==1 mod 4 */
783 #define nego_st header.status[6]
784 #define wide_st header.status[7] /* MUST be ==3 mod 4 */
787 ** Last four bytes (host)
789 #define xerr_status phys.xerr_st
790 #define sync_status phys.sync_st
791 #define nego_status phys.nego_st
792 #define wide_status phys.wide_st
794 /*==========================================================
796 ** Declaration of structs: Data structure block
798 **==========================================================
800 ** During execution of a nccb by the script processor,
801 ** the DSA (data structure address) register points
802 ** to this substructure of the nccb.
803 ** This substructure contains the header with
804 ** the script-processor-changable data and
805 ** data blocks for the indirect move commands.
807 **----------------------------------------------------------
814 ** Has to be the first entry,
815 ** because it's jumped to by the
822 ** Table data for Script
825 struct scr_tblsel select;
826 struct scr_tblmove smsg ;
827 struct scr_tblmove smsg2 ;
828 struct scr_tblmove cmd ;
829 struct scr_tblmove scmd ;
830 struct scr_tblmove sense ;
831 struct scr_tblmove data [MAX_SCATTER];
834 /*==========================================================
836 ** Declaration of structs: Command control block.
838 **==========================================================
840 ** During execution of a nccb by the script processor,
841 ** the DSA (data structure address) register points
842 ** to this substructure of the nccb.
843 ** This substructure contains the header with
844 ** the script-processor-changable data and then
845 ** data blocks for the indirect move commands.
847 **----------------------------------------------------------
853 ** This filler ensures that the global header is
854 ** cache line size aligned.
859 ** during reselection the ncr jumps to this point.
860 ** If a "SIMPLE_TAG" message was received,
861 ** then SFBR is set to the tag.
862 ** else SFBR is set to 0
863 ** If looking for another tag, jump to the next nccb.
865 ** JUMP IF (SFBR != #TAG#)
866 ** @(next nccb of this lun)
869 struct link jump_nccb;
872 ** After execution of this call, the return address
873 ** (in the TEMP register) points to the following
874 ** data structure block.
875 ** So copy it to the DSA register, and start
876 ** processing of this data structure.
882 struct link call_tmp;
885 ** This is the data structure which is
886 ** to be executed by the script processor.
892 ** If a data transfer phase is terminated too early
893 ** (after reception of a message (i.e. DISCONNECT)),
894 ** we have to prepare a mini script to transfer
895 ** the rest of the data.
901 ** The general SCSI driver provides a
902 ** pointer to a control block.
908 ** We prepare a message to be sent after selection,
909 ** and a second one to be sent after getcc selection.
910 ** Contents are IDENTIFY and SIMPLE_TAG.
911 ** While negotiating sync or wide transfer,
912 ** a SDTM or WDTM message is appended.
915 u_char scsi_smsg [8];
916 u_char scsi_smsg2[8];
920 ** Flag is used while looking for a free nccb.
926 ** Physical address of this instance of nccb
932 ** Completion time out for this job.
933 ** It's set to time of start + allowed number of seconds.
939 ** All nccbs of one hostadapter are chained.
945 ** All nccbs of one target/lun are chained.
957 ** Tag for this transfer.
958 ** It's patched into jump_nccb.
959 ** If it's not zero, a SIMPLE_TAG
960 ** message is included in smsg.
966 #define CCB_PHYS(cp,lbl) (cp->p_nccb + offsetof(struct nccb, lbl))
968 /*==========================================================
970 ** Declaration of structs: NCR device descriptor
972 **==========================================================
977 ** The global header.
978 ** Accessible to both the host and the
980 ** We assume it is cache line size aligned.
986 /*-----------------------------------------------
988 **-----------------------------------------------
990 ** During reselection the ncr jumps to this point.
991 ** The SFBR register is loaded with the encoded target id.
993 ** Jump to the first target.
998 struct link jump_tcb;
1000 /*-----------------------------------------------
1002 **-----------------------------------------------
1004 ** virtual and physical addresses
1005 ** of the 53c810 chip.
1008 struct resource *reg_res;
1009 bus_space_tag_t bst;
1010 bus_space_handle_t bsh;
1013 struct resource *sram_res;
1014 bus_space_tag_t bst2;
1015 bus_space_handle_t bsh2;
1017 struct resource *irq_res;
1021 ** Scripts instance virtual address.
1023 struct script *script;
1024 struct scripth *scripth;
1027 ** Scripts instance physical address.
1033 ** The SCSI address of the host adapter.
1038 ** timing parameters
1040 u_char minsync; /* Minimum sync period factor */
1041 u_char maxsync; /* Maximum sync period factor */
1042 u_char maxoffs; /* Max scsi offset */
1043 u_char clock_divn; /* Number of clock divisors */
1044 u_long clock_khz; /* SCSI clock frequency in KHz */
1045 u_long features; /* Chip features map */
1046 u_char multiplier; /* Clock multiplier (1,2,4) */
1048 u_char maxburst; /* log base 2 of dwords burst */
1051 ** BIOS supplied PCI bus options
1062 /*-----------------------------------------------
1063 ** CAM SIM information for this instance
1064 **-----------------------------------------------
1067 struct cam_sim *sim;
1068 struct cam_path *path;
1070 /*-----------------------------------------------
1072 **-----------------------------------------------
1074 ** Commands from user
1081 struct tcb target[MAX_TARGET];
1086 u_int32_t squeue [MAX_START];
1096 struct callout_handle timeout_ch;
1098 /*-----------------------------------------------
1099 ** Debug and profiling
1100 **-----------------------------------------------
1104 struct ncr_reg regdump;
1110 struct profile profile;
1115 ** Head of list of all nccbs for this controller.
1121 ** Should be longword aligned,
1122 ** because they're written with a
1123 ** COPY script command.
1130 ** Buffer for STATUS_IN phase.
1135 ** controller chip dependent maximal transfer width.
1141 ** address of the ncr control registers in io space
1147 #define NCB_SCRIPT_PHYS(np,lbl) (np->p_script + offsetof (struct script, lbl))
1148 #define NCB_SCRIPTH_PHYS(np,lbl) (np->p_scripth + offsetof (struct scripth,lbl))
1150 /*==========================================================
1153 ** Script for NCR-Processor.
1155 ** Use ncr_script_fill() to create the variable parts.
1156 ** Use ncr_script_copy_and_bind() to make a copy and
1157 ** bind to physical addresses.
1160 **==========================================================
1162 ** We have to know the offsets of all labels before
1163 ** we reach them (for forward jumps).
1164 ** Therefore we declare a struct here.
1165 ** If you make changes inside the script,
1166 ** DONT FORGET TO CHANGE THE LENGTHS HERE!
1168 **----------------------------------------------------------
1172 ** Script fragments which are loaded into the on-board RAM
1173 ** of 825A, 875 and 895 chips.
1179 ncrcmd startpos [ 1];
1184 ncrcmd select [ 18];
1185 ncrcmd prepare [ 4];
1186 ncrcmd loadpos [ 14];
1187 ncrcmd prepare2 [ 24];
1190 ncrcmd dispatch [ 33];
1191 ncrcmd no_data [ 17];
1192 ncrcmd checkatn [ 10];
1193 ncrcmd command [ 15];
1194 ncrcmd status [ 27];
1195 ncrcmd msg_in [ 26];
1196 ncrcmd msg_bad [ 6];
1197 ncrcmd complete [ 13];
1198 ncrcmd cleanup [ 12];
1199 ncrcmd cleanup0 [ 9];
1200 ncrcmd signal [ 12];
1201 ncrcmd save_dp [ 5];
1202 ncrcmd restore_dp [ 5];
1203 ncrcmd disconnect [ 12];
1204 ncrcmd disconnect0 [ 5];
1205 ncrcmd disconnect1 [ 23];
1206 ncrcmd msg_out [ 9];
1207 ncrcmd msg_out_done [ 7];
1208 ncrcmd badgetcc [ 6];
1209 ncrcmd reselect [ 8];
1210 ncrcmd reselect1 [ 8];
1211 ncrcmd reselect2 [ 8];
1212 ncrcmd resel_tmp [ 5];
1213 ncrcmd resel_lun [ 18];
1214 ncrcmd resel_tag [ 24];
1215 ncrcmd data_in [MAX_SCATTER * 4 + 7];
1216 ncrcmd data_out [MAX_SCATTER * 4 + 7];
1220 ** Script fragments which stay in main memory for all chips.
1223 ncrcmd tryloop [MAX_START*5+2];
1224 ncrcmd msg_parity [ 6];
1225 ncrcmd msg_reject [ 8];
1226 ncrcmd msg_ign_residue [ 32];
1227 ncrcmd msg_extended [ 18];
1228 ncrcmd msg_ext_2 [ 18];
1229 ncrcmd msg_wdtr [ 27];
1230 ncrcmd msg_ext_3 [ 18];
1231 ncrcmd msg_sdtr [ 27];
1232 ncrcmd msg_out_abort [ 10];
1235 #ifdef NCR_GETCC_WITHMSG
1236 ncrcmd getcc2 [ 29];
1238 ncrcmd getcc2 [ 14];
1241 ncrcmd aborttag [ 4];
1243 ncrcmd snooptest [ 9];
1244 ncrcmd snoopend [ 2];
1247 /*==========================================================
1250 ** Function headers.
1253 **==========================================================
1257 static nccb_p ncr_alloc_nccb (ncb_p np, u_long target, u_long lun);
1258 static void ncr_complete (ncb_p np, nccb_p cp);
1259 static int ncr_delta (int * from, int * to);
1260 static void ncr_exception (ncb_p np);
1261 static void ncr_free_nccb (ncb_p np, nccb_p cp);
1262 static void ncr_freeze_devq (ncb_p np, struct cam_path *path);
1263 static void ncr_selectclock (ncb_p np, u_char scntl3);
1264 static void ncr_getclock (ncb_p np, u_char multiplier);
1265 static nccb_p ncr_get_nccb (ncb_p np, u_long t,u_long l);
1267 static u_int32_t ncr_info (int unit);
1269 static void ncr_init (ncb_p np, char * msg, u_long code);
1270 static void ncr_intr (void *vnp);
1271 static void ncr_int_ma (ncb_p np, u_char dstat);
1272 static void ncr_int_sir (ncb_p np);
1273 static void ncr_int_sto (ncb_p np);
1275 static void ncr_min_phys (struct buf *bp);
1277 static void ncr_poll (struct cam_sim *sim);
1278 static void ncb_profile (ncb_p np, nccb_p cp);
1279 static void ncr_script_copy_and_bind
1280 (ncb_p np, ncrcmd *src, ncrcmd *dst, int len);
1281 static void ncr_script_fill (struct script * scr, struct scripth *scrh);
1282 static int ncr_scatter (struct dsb* phys, vm_offset_t vaddr,
1284 static void ncr_getsync (ncb_p np, u_char sfac, u_char *fakp,
1286 static void ncr_setsync (ncb_p np, nccb_p cp,u_char scntl3,u_char sxfer,
1288 static void ncr_setwide (ncb_p np, nccb_p cp, u_char wide, u_char ack);
1289 static int ncr_show_msg (u_char * msg);
1290 static int ncr_snooptest (ncb_p np);
1291 static void ncr_action (struct cam_sim *sim, union ccb *ccb);
1292 static void ncr_timeout (void *arg);
1293 static void ncr_wakeup (ncb_p np, u_long code);
1295 static int ncr_probe (device_t dev);
1296 static int ncr_attach (device_t dev);
1298 #endif /* _KERNEL */
1300 /*==========================================================
1303 ** Global static data.
1306 **==========================================================
1311 * $FreeBSD: src/sys/pci/ncr.c,v 1.155.2.3 2001/03/05 13:09:10 obrien Exp $
1313 static const u_long ncr_version = NCR_VERSION * 11
1314 + (u_long) sizeof (struct ncb) * 7
1315 + (u_long) sizeof (struct nccb) * 5
1316 + (u_long) sizeof (struct lcb) * 3
1317 + (u_long) sizeof (struct tcb) * 2;
1321 static int ncr_debug = SCSI_NCR_DEBUG;
1322 SYSCTL_INT(_debug, OID_AUTO, ncr_debug, CTLFLAG_RW, &ncr_debug, 0, "");
1324 static int ncr_cache; /* to be aligned _NOT_ static */
1326 /*==========================================================
1329 ** Global static data: auto configure
1332 **==========================================================
1335 #define NCR_810_ID (0x00011000ul)
1336 #define NCR_815_ID (0x00041000ul)
1337 #define NCR_820_ID (0x00021000ul)
1338 #define NCR_825_ID (0x00031000ul)
1339 #define NCR_860_ID (0x00061000ul)
1340 #define NCR_875_ID (0x000f1000ul)
1341 #define NCR_875_ID2 (0x008f1000ul)
1342 #define NCR_885_ID (0x000d1000ul)
1343 #define NCR_895_ID (0x000c1000ul)
1344 #define NCR_896_ID (0x000b1000ul)
1345 #define NCR_895A_ID (0x00121000ul)
1346 #define NCR_1510D_ID (0x000a1000ul)
1349 static char *ncr_name (ncb_p np)
1351 static char name[10];
1352 snprintf(name, sizeof(name), "ncr%d", np->unit);
1356 /*==========================================================
1359 ** Scripts for NCR-Processor.
1361 ** Use ncr_script_bind for binding to physical addresses.
1364 **==========================================================
1366 ** NADDR generates a reference to a field of the controller data.
1367 ** PADDR generates a reference to another part of the script.
1368 ** RADDR generates a reference to a script processor register.
1369 ** FADDR generates a reference to a script processor register
1372 **----------------------------------------------------------
1375 #define RELOC_SOFTC 0x40000000
1376 #define RELOC_LABEL 0x50000000
1377 #define RELOC_REGISTER 0x60000000
1378 #define RELOC_KVAR 0x70000000
1379 #define RELOC_LABELH 0x80000000
1380 #define RELOC_MASK 0xf0000000
1382 #define NADDR(label) (RELOC_SOFTC | offsetof(struct ncb, label))
1383 #define PADDR(label) (RELOC_LABEL | offsetof(struct script, label))
1384 #define PADDRH(label) (RELOC_LABELH | offsetof(struct scripth, label))
1385 #define RADDR(label) (RELOC_REGISTER | REG(label))
1386 #define FADDR(label,ofs)(RELOC_REGISTER | ((REG(label))+(ofs)))
1387 #define KVAR(which) (RELOC_KVAR | (which))
1389 #define KVAR_SECOND (0)
1390 #define KVAR_TICKS (1)
1391 #define KVAR_NCR_CACHE (2)
1393 #define SCRIPT_KVAR_FIRST (0)
1394 #define SCRIPT_KVAR_LAST (3)
1397 * Kernel variables referenced in the scripts.
1398 * THESE MUST ALL BE ALIGNED TO A 4-BYTE BOUNDARY.
1400 static void *script_kvars[] =
1401 { &time_second, &ticks, &ncr_cache };
1403 static struct script script0 = {
1404 /*--------------------------< START >-----------------------*/ {
1406 ** Claim to be still alive ...
1408 SCR_COPY (sizeof (((struct ncb *)0)->heartbeat)),
1412 ** Make data structure address invalid.
1415 SCR_LOAD_REG (dsa, 0xff),
1417 SCR_FROM_REG (ctest2),
1419 }/*-------------------------< START0 >----------------------*/,{
1421 ** Hook for interrupted GetConditionCode.
1422 ** Will be patched to ... IFTRUE by
1423 ** the interrupt handler.
1425 SCR_INT ^ IFFALSE (0),
1428 }/*-------------------------< START1 >----------------------*/,{
1430 ** Hook for stalled start queue.
1431 ** Will be patched to IFTRUE by the interrupt handler.
1433 SCR_INT ^ IFFALSE (0),
1436 ** Then jump to a certain point in tryloop.
1437 ** Due to the lack of indirect addressing the code
1438 ** is self modifying here.
1441 }/*-------------------------< STARTPOS >--------------------*/,{
1444 }/*-------------------------< TRYSEL >----------------------*/,{
1447 ** DSA: Address of a Data Structure
1448 ** or Address of the IDLE-Label.
1450 ** TEMP: Address of a script, which tries to
1451 ** start the NEXT entry.
1453 ** Save the TEMP register into the SCRATCHA register.
1454 ** Then copy the DSA to TEMP and RETURN.
1455 ** This is kind of an indirect jump.
1456 ** (The script processor has NO stack, so the
1457 ** CALL is actually a jump and link, and the
1458 ** RETURN is an indirect jump.)
1460 ** If the slot was empty, DSA contains the address
1461 ** of the IDLE part of this script. The processor
1462 ** jumps to IDLE and waits for a reselect.
1463 ** It will wake up and try the same slot again
1464 ** after the SIGP bit becomes set by the host.
1466 ** If the slot was not empty, DSA contains
1467 ** the address of the phys-part of a nccb.
1468 ** The processor jumps to this address.
1469 ** phys starts with head,
1470 ** head starts with launch,
1471 ** so actually the processor jumps to
1473 ** If the entry is scheduled for execution,
1474 ** then launch contains a jump to SELECT.
1475 ** If it's not scheduled, it contains a jump to IDLE.
1486 }/*-------------------------< SKIP >------------------------*/,{
1488 ** This entry has been canceled.
1489 ** Next time use the next slot.
1495 ** patch the launch field.
1496 ** should look like an idle process.
1503 }/*-------------------------< SKIP2 >-----------------------*/,{
1507 }/*-------------------------< IDLE >------------------------*/,{
1510 ** Wait for reselect.
1515 }/*-------------------------< SELECT >----------------------*/,{
1517 ** DSA contains the address of a scheduled
1520 ** SCRATCHA contains the address of the script,
1521 ** which starts the next entry.
1523 ** Set Initiator mode.
1525 ** (Target mode is left as an exercise for the reader)
1530 SCR_LOAD_REG (HS_REG, 0xff),
1534 ** And try to select this target.
1536 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select),
1540 ** Now there are 4 possibilities:
1542 ** (1) The ncr looses arbitration.
1543 ** This is ok, because it will try again,
1544 ** when the bus becomes idle.
1545 ** (But beware of the timeout function!)
1547 ** (2) The ncr is reselected.
1548 ** Then the script processor takes the jump
1549 ** to the RESELECT label.
1551 ** (3) The ncr completes the selection.
1552 ** Then it will execute the next statement.
1554 ** (4) There is a selection timeout.
1555 ** Then the ncr should interrupt the host and stop.
1556 ** Unfortunately, it seems to continue execution
1557 ** of the script. But it will fail with an
1558 ** IID-interrupt on the next WHEN.
1561 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_IN)),
1565 ** Send the IDENTIFY and SIMPLE_TAG messages
1566 ** (and the MSG_EXT_SDTR message)
1568 SCR_MOVE_TBL ^ SCR_MSG_OUT,
1569 offsetof (struct dsb, smsg),
1570 #ifdef undef /* XXX better fail than try to deal with this ... */
1571 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_OUT)),
1580 ** Selection complete.
1581 ** Next time use the next slot.
1586 }/*-------------------------< PREPARE >----------------------*/,{
1588 ** The ncr doesn't have an indirect load
1589 ** or store command. So we have to
1590 ** copy part of the control block to a
1591 ** fixed place, where we can access it.
1593 ** We patch the address part of a
1594 ** COPY command with the DSA-register.
1600 ** then we do the actual copy.
1602 SCR_COPY (sizeof (struct head)),
1604 ** continued after the next label ...
1607 }/*-------------------------< LOADPOS >---------------------*/,{
1611 ** Mark this nccb as not scheduled.
1615 NADDR (header.launch),
1617 ** Set a time stamp for this selection
1619 SCR_COPY (sizeof (ticks)),
1621 NADDR (header.stamp.select),
1623 ** load the savep (saved pointer) into
1624 ** the TEMP register (actual pointer)
1627 NADDR (header.savep),
1630 ** Initialize the status registers
1633 NADDR (header.status),
1636 }/*-------------------------< PREPARE2 >---------------------*/,{
1638 ** Load the synchronous mode register
1644 ** Load the wide mode and timing register
1650 ** Initialize the msgout buffer with a NOOP message.
1652 SCR_LOAD_REG (scratcha, MSG_NOOP),
1661 ** Message in phase ?
1663 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
1666 ** Extended or reject message ?
1668 SCR_FROM_REG (sbdl),
1670 SCR_JUMP ^ IFTRUE (DATA (MSG_EXTENDED)),
1672 SCR_JUMP ^ IFTRUE (DATA (MSG_MESSAGE_REJECT)),
1673 PADDRH (msg_reject),
1675 ** normal processing
1679 }/*-------------------------< SETMSG >----------------------*/,{
1685 }/*-------------------------< CLRACK >----------------------*/,{
1687 ** Terminate possible pending message phase.
1692 }/*-----------------------< DISPATCH >----------------------*/,{
1693 SCR_FROM_REG (HS_REG),
1695 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
1698 ** remove bogus output signals
1700 SCR_REG_REG (socl, SCR_AND, CACK|CATN),
1702 SCR_RETURN ^ IFTRUE (WHEN (SCR_DATA_OUT)),
1704 SCR_RETURN ^ IFTRUE (IF (SCR_DATA_IN)),
1706 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)),
1708 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_IN)),
1710 SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)),
1712 SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)),
1715 ** Discard one illegal phase byte, if required.
1717 SCR_LOAD_REG (scratcha, XE_BAD_PHASE),
1722 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_OUT)),
1724 SCR_MOVE_ABS (1) ^ SCR_ILG_OUT,
1726 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_IN)),
1728 SCR_MOVE_ABS (1) ^ SCR_ILG_IN,
1733 }/*-------------------------< NO_DATA >--------------------*/,{
1735 ** The target wants to tranfer too much data
1736 ** or in the wrong direction.
1737 ** Remember that in extended error.
1739 SCR_LOAD_REG (scratcha, XE_EXTRA_DATA),
1745 ** Discard one data byte, if required.
1747 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)),
1749 SCR_MOVE_ABS (1) ^ SCR_DATA_OUT,
1751 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)),
1753 SCR_MOVE_ABS (1) ^ SCR_DATA_IN,
1756 ** .. and repeat as required.
1762 }/*-------------------------< CHECKATN >--------------------*/,{
1764 ** If AAP (bit 1 of scntl0 register) is set
1765 ** and a parity error is detected,
1766 ** the script processor asserts ATN.
1768 ** The target should switch to a MSG_OUT phase
1769 ** to get the message.
1771 SCR_FROM_REG (socl),
1773 SCR_JUMP ^ IFFALSE (MASK (CATN, CATN)),
1778 SCR_REG_REG (PS_REG, SCR_ADD, 1),
1781 ** Prepare a MSG_INITIATOR_DET_ERR message
1782 ** (initiator detected error).
1783 ** The target should retry the transfer.
1785 SCR_LOAD_REG (scratcha, MSG_INITIATOR_DET_ERR),
1790 }/*-------------------------< COMMAND >--------------------*/,{
1792 ** If this is not a GETCC transfer ...
1794 SCR_FROM_REG (SS_REG),
1796 /*<<<*/ SCR_JUMPR ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)),
1799 ** ... set a timestamp ...
1801 SCR_COPY (sizeof (ticks)),
1803 NADDR (header.stamp.command),
1805 ** ... and send the command
1807 SCR_MOVE_TBL ^ SCR_COMMAND,
1808 offsetof (struct dsb, cmd),
1812 ** Send the GETCC command
1814 /*>>>*/ SCR_MOVE_TBL ^ SCR_COMMAND,
1815 offsetof (struct dsb, scmd),
1819 }/*-------------------------< STATUS >--------------------*/,{
1821 ** set the timestamp.
1823 SCR_COPY (sizeof (ticks)),
1825 NADDR (header.stamp.status),
1827 ** If this is a GETCC transfer,
1829 SCR_FROM_REG (SS_REG),
1831 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (SCSI_STATUS_CHECK_COND)),
1836 SCR_MOVE_ABS (1) ^ SCR_STATUS,
1839 ** Save status to scsi_status.
1840 ** Mark as complete.
1841 ** And wait for disconnect.
1843 SCR_TO_REG (SS_REG),
1845 SCR_REG_REG (SS_REG, SCR_OR, SCSI_STATUS_SENSE),
1847 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
1852 ** If it was no GETCC transfer,
1853 ** save the status to scsi_status.
1855 /*>>>*/ SCR_MOVE_ABS (1) ^ SCR_STATUS,
1857 SCR_TO_REG (SS_REG),
1860 ** if it was no check condition ...
1862 SCR_JUMP ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)),
1865 ** ... mark as complete.
1867 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
1872 }/*-------------------------< MSG_IN >--------------------*/,{
1874 ** Get the first byte of the message
1875 ** and save it to SCRATCHA.
1877 ** The script processor doesn't negate the
1878 ** ACK signal after this transfer.
1880 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
1883 ** Check for message parity error.
1885 SCR_TO_REG (scratcha),
1887 SCR_FROM_REG (socl),
1889 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
1890 PADDRH (msg_parity),
1891 SCR_FROM_REG (scratcha),
1894 ** Parity was ok, handle this message.
1896 SCR_JUMP ^ IFTRUE (DATA (MSG_CMDCOMPLETE)),
1898 SCR_JUMP ^ IFTRUE (DATA (MSG_SAVEDATAPOINTER)),
1900 SCR_JUMP ^ IFTRUE (DATA (MSG_RESTOREPOINTERS)),
1902 SCR_JUMP ^ IFTRUE (DATA (MSG_DISCONNECT)),
1904 SCR_JUMP ^ IFTRUE (DATA (MSG_EXTENDED)),
1905 PADDRH (msg_extended),
1906 SCR_JUMP ^ IFTRUE (DATA (MSG_NOOP)),
1908 SCR_JUMP ^ IFTRUE (DATA (MSG_MESSAGE_REJECT)),
1909 PADDRH (msg_reject),
1910 SCR_JUMP ^ IFTRUE (DATA (MSG_IGN_WIDE_RESIDUE)),
1911 PADDRH (msg_ign_residue),
1913 ** Rest of the messages left as
1916 ** Unimplemented messages:
1917 ** fall through to MSG_BAD.
1919 }/*-------------------------< MSG_BAD >------------------*/,{
1921 ** unimplemented message - reject it.
1925 SCR_LOAD_REG (scratcha, MSG_MESSAGE_REJECT),
1930 }/*-------------------------< COMPLETE >-----------------*/,{
1932 ** Complete message.
1934 ** If it's not the get condition code,
1935 ** copy TEMP register to LASTP in header.
1937 SCR_FROM_REG (SS_REG),
1939 /*<<<*/ SCR_JUMPR ^ IFTRUE (MASK (SCSI_STATUS_SENSE, SCSI_STATUS_SENSE)),
1943 NADDR (header.lastp),
1945 ** When we terminate the cycle by clearing ACK,
1946 ** the target may disconnect immediately.
1948 ** We don't want to be told of an
1949 ** "unexpected disconnect",
1950 ** so we disable this feature.
1952 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
1955 ** Terminate cycle ...
1957 SCR_CLR (SCR_ACK|SCR_ATN),
1960 ** ... and wait for the disconnect.
1964 }/*-------------------------< CLEANUP >-------------------*/,{
1966 ** dsa: Pointer to nccb
1967 ** or xxxxxxFF (no nccb)
1969 ** HS_REG: Host-Status (<>0!)
1973 SCR_JUMP ^ IFTRUE (DATA (0xff)),
1977 ** save the status registers
1981 NADDR (header.status),
1983 ** and copy back the header to the nccb.
1988 SCR_COPY (sizeof (struct head)),
1990 }/*-------------------------< CLEANUP0 >--------------------*/,{
1994 ** If command resulted in "check condition"
1995 ** status and is not yet completed,
1996 ** try to get the condition code.
1998 SCR_FROM_REG (HS_REG),
2000 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (0, HS_DONEMASK)),
2002 SCR_FROM_REG (SS_REG),
2004 SCR_JUMP ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)),
2006 }/*-------------------------< SIGNAL >----------------------*/,{
2008 ** if status = queue full,
2009 ** reinsert in startqueue and stall queue.
2011 /*>>>*/ SCR_FROM_REG (SS_REG),
2013 SCR_INT ^ IFTRUE (DATA (SCSI_STATUS_QUEUE_FULL)),
2016 ** And make the DSA register invalid.
2018 SCR_LOAD_REG (dsa, 0xff), /* invalid */
2021 ** if job completed ...
2023 SCR_FROM_REG (HS_REG),
2026 ** ... signal completion to the host
2028 SCR_INT_FLY ^ IFFALSE (MASK (0, HS_DONEMASK)),
2031 ** Auf zu neuen Schandtaten!
2036 }/*-------------------------< SAVE_DP >------------------*/,{
2039 ** Copy TEMP register to SAVEP in header.
2043 NADDR (header.savep),
2046 }/*-------------------------< RESTORE_DP >---------------*/,{
2048 ** RESTORE_DP message:
2049 ** Copy SAVEP in header to TEMP register.
2052 NADDR (header.savep),
2057 }/*-------------------------< DISCONNECT >---------------*/,{
2059 ** If QUIRK_AUTOSAVE is set,
2060 ** do an "save pointer" operation.
2062 SCR_FROM_REG (QU_REG),
2064 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (QUIRK_AUTOSAVE, QUIRK_AUTOSAVE)),
2067 ** like SAVE_DP message:
2068 ** Copy TEMP register to SAVEP in header.
2072 NADDR (header.savep),
2074 ** Check if temp==savep or temp==goalp:
2075 ** if not, log a missing save pointer message.
2076 ** In fact, it's a comparison mod 256.
2078 ** Hmmm, I hadn't thought that I would be urged to
2079 ** write this kind of ugly self modifying code.
2081 ** It's unbelievable, but the ncr53c8xx isn't able
2082 ** to subtract one register from another.
2084 SCR_FROM_REG (temp),
2087 ** You are not expected to understand this ..
2089 ** CAUTION: only little endian architectures supported! XXX
2092 NADDR (header.savep),
2093 PADDR (disconnect0),
2094 }/*-------------------------< DISCONNECT0 >--------------*/,{
2095 /*<<<*/ SCR_JUMPR ^ IFTRUE (DATA (1)),
2101 NADDR (header.goalp),
2102 PADDR (disconnect1),
2103 }/*-------------------------< DISCONNECT1 >--------------*/,{
2104 SCR_INT ^ IFFALSE (DATA (1)),
2109 ** DISCONNECTing ...
2111 ** disable the "unexpected disconnect" feature,
2112 ** and remove the ACK signal.
2114 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2116 SCR_CLR (SCR_ACK|SCR_ATN),
2119 ** Wait for the disconnect.
2125 ** Set a time stamp,
2126 ** and count the disconnects.
2128 SCR_COPY (sizeof (ticks)),
2130 NADDR (header.stamp.disconnect),
2134 SCR_REG_REG (temp, SCR_ADD, 0x01),
2140 ** Status is: DISCONNECTED.
2142 SCR_LOAD_REG (HS_REG, HS_DISCONNECT),
2147 }/*-------------------------< MSG_OUT >-------------------*/,{
2149 ** The target requests a message.
2151 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
2157 ** If it was no ABORT message ...
2159 SCR_JUMP ^ IFTRUE (DATA (MSG_ABORT)),
2160 PADDRH (msg_out_abort),
2162 ** ... wait for the next phase
2163 ** if it's a message out, send it again, ...
2165 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
2167 }/*-------------------------< MSG_OUT_DONE >--------------*/,{
2169 ** ... else clear the message ...
2171 SCR_LOAD_REG (scratcha, MSG_NOOP),
2177 ** ... and process the next phase
2182 }/*------------------------< BADGETCC >---------------------*/,{
2184 ** If SIGP was set, clear it and try again.
2186 SCR_FROM_REG (ctest2),
2188 SCR_JUMP ^ IFTRUE (MASK (CSIGP,CSIGP)),
2192 }/*-------------------------< RESELECT >--------------------*/,{
2194 ** This NOP will be patched with LED OFF
2195 ** SCR_REG_REG (gpreg, SCR_OR, 0x01)
2201 ** make the DSA invalid.
2203 SCR_LOAD_REG (dsa, 0xff),
2208 ** Sleep waiting for a reselection.
2209 ** If SIGP is set, special treatment.
2211 ** Zu allem bereit ..
2215 }/*-------------------------< RESELECT1 >--------------------*/,{
2217 ** This NOP will be patched with LED ON
2218 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2223 ** ... zu nichts zu gebrauchen ?
2225 ** load the target id into the SFBR
2226 ** and jump to the control block.
2228 ** Look at the declarations of
2233 ** to understand what's going on.
2235 SCR_REG_SFBR (ssid, SCR_AND, 0x8F),
2241 }/*-------------------------< RESELECT2 >-------------------*/,{
2243 ** This NOP will be patched with LED ON
2244 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2249 ** If it's not connected :(
2250 ** -> interrupted by SIGP bit.
2253 SCR_FROM_REG (ctest2),
2255 SCR_JUMP ^ IFTRUE (MASK (CSIGP,CSIGP)),
2260 }/*-------------------------< RESEL_TMP >-------------------*/,{
2262 ** The return address in TEMP
2263 ** is in fact the data structure address,
2264 ** so copy it to the DSA register.
2272 }/*-------------------------< RESEL_LUN >-------------------*/,{
2274 ** come back to this point
2275 ** to get an IDENTIFY message
2276 ** Wait for a msg_in phase.
2278 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
2282 ** It's not a sony, it's a trick:
2283 ** read the data without acknowledging it.
2285 SCR_FROM_REG (sbdl),
2287 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (MSG_IDENTIFYFLAG, 0x98)),
2290 ** It WAS an Identify message.
2291 ** get it and ack it!
2293 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2298 ** Mask out the lun.
2300 SCR_REG_REG (sfbr, SCR_AND, 0x07),
2305 ** No message phase or no IDENTIFY message:
2308 /*>>>*/ SCR_LOAD_SFBR (0),
2313 }/*-------------------------< RESEL_TAG >-------------------*/,{
2315 ** come back to this point
2316 ** to get a SIMPLE_TAG message
2317 ** Wait for a MSG_IN phase.
2319 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
2323 ** It's a trick - read the data
2324 ** without acknowledging it.
2326 SCR_FROM_REG (sbdl),
2328 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (MSG_SIMPLE_Q_TAG)),
2331 ** It WAS a SIMPLE_TAG message.
2332 ** get it and ack it!
2334 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2339 ** Wait for the second byte (the tag)
2341 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
2344 ** Get it and ack it!
2346 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2348 SCR_CLR (SCR_ACK|SCR_CARRY),
2353 ** No message phase or no SIMPLE_TAG message
2354 ** or no second byte: return 0.
2356 /*>>>*/ SCR_LOAD_SFBR (0),
2358 SCR_SET (SCR_CARRY),
2363 }/*-------------------------< DATA_IN >--------------------*/,{
2365 ** Because the size depends on the
2366 ** #define MAX_SCATTER parameter,
2367 ** it is filled in at runtime.
2369 ** SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
2371 ** SCR_COPY (sizeof (ticks)),
2372 ** KVAR (KVAR_TICKS),
2373 ** NADDR (header.stamp.data),
2374 ** SCR_MOVE_TBL ^ SCR_DATA_IN,
2375 ** offsetof (struct dsb, data[ 0]),
2377 ** ##===========< i=1; i<MAX_SCATTER >=========
2378 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)),
2379 ** || PADDR (checkatn),
2380 ** || SCR_MOVE_TBL ^ SCR_DATA_IN,
2381 ** || offsetof (struct dsb, data[ i]),
2382 ** ##==========================================
2385 ** PADDR (checkatn),
2390 }/*-------------------------< DATA_OUT >-------------------*/,{
2392 ** Because the size depends on the
2393 ** #define MAX_SCATTER parameter,
2394 ** it is filled in at runtime.
2396 ** SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2398 ** SCR_COPY (sizeof (ticks)),
2399 ** KVAR (KVAR_TICKS),
2400 ** NADDR (header.stamp.data),
2401 ** SCR_MOVE_TBL ^ SCR_DATA_OUT,
2402 ** offsetof (struct dsb, data[ 0]),
2404 ** ##===========< i=1; i<MAX_SCATTER >=========
2405 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2406 ** || PADDR (dispatch),
2407 ** || SCR_MOVE_TBL ^ SCR_DATA_OUT,
2408 ** || offsetof (struct dsb, data[ i]),
2409 ** ##==========================================
2412 ** PADDR (dispatch),
2416 **---------------------------------------------------------
2420 }/*--------------------------------------------------------*/
2424 static struct scripth scripth0 = {
2425 /*-------------------------< TRYLOOP >---------------------*/{
2427 ** Load an entry of the start queue into dsa
2428 ** and try to start it by jumping to TRYSEL.
2430 ** Because the size depends on the
2431 ** #define MAX_START parameter, it is filled
2434 **-----------------------------------------------------------
2436 ** ##===========< I=0; i<MAX_START >===========
2438 ** || NADDR (squeue[i]),
2441 ** || PADDR (trysel),
2442 ** ##==========================================
2447 **-----------------------------------------------------------
2450 }/*-------------------------< MSG_PARITY >---------------*/,{
2454 SCR_REG_REG (PS_REG, SCR_ADD, 0x01),
2457 ** send a "message parity error" message.
2459 SCR_LOAD_REG (scratcha, MSG_PARITY_ERROR),
2463 }/*-------------------------< MSG_MESSAGE_REJECT >---------------*/,{
2465 ** If a negotiation was in progress,
2466 ** negotiation failed.
2468 SCR_FROM_REG (HS_REG),
2470 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
2473 ** else make host log this message
2475 SCR_INT ^ IFFALSE (DATA (HS_NEGOTIATE)),
2476 SIR_REJECT_RECEIVED,
2480 }/*-------------------------< MSG_IGN_RESIDUE >----------*/,{
2486 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2489 ** get residue size.
2491 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2494 ** Check for message parity error.
2496 SCR_TO_REG (scratcha),
2498 SCR_FROM_REG (socl),
2500 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2501 PADDRH (msg_parity),
2502 SCR_FROM_REG (scratcha),
2505 ** Size is 0 .. ignore message.
2507 SCR_JUMP ^ IFTRUE (DATA (0)),
2510 ** Size is not 1 .. have to interrupt.
2512 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (1)),
2515 ** Check for residue byte in swide register
2517 SCR_FROM_REG (scntl2),
2519 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
2522 ** There IS data in the swide register.
2525 SCR_REG_REG (scntl2, SCR_OR, WSR),
2530 ** Load again the size to the sfbr register.
2532 /*>>>*/ SCR_FROM_REG (scratcha),
2539 }/*-------------------------< MSG_EXTENDED >-------------*/,{
2545 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2550 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2553 ** Check for message parity error.
2555 SCR_TO_REG (scratcha),
2557 SCR_FROM_REG (socl),
2559 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2560 PADDRH (msg_parity),
2561 SCR_FROM_REG (scratcha),
2565 SCR_JUMP ^ IFTRUE (DATA (3)),
2567 SCR_JUMP ^ IFFALSE (DATA (2)),
2569 }/*-------------------------< MSG_EXT_2 >----------------*/,{
2572 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2575 ** get extended message code.
2577 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2580 ** Check for message parity error.
2582 SCR_TO_REG (scratcha),
2584 SCR_FROM_REG (socl),
2586 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2587 PADDRH (msg_parity),
2588 SCR_FROM_REG (scratcha),
2590 SCR_JUMP ^ IFTRUE (DATA (MSG_EXT_WDTR)),
2593 ** unknown extended message
2597 }/*-------------------------< MSG_WDTR >-----------------*/,{
2600 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2603 ** get data bus width
2605 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2607 SCR_FROM_REG (socl),
2609 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2610 PADDRH (msg_parity),
2612 ** let the host do the real work.
2617 ** let the target fetch our answer.
2624 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2627 ** Send the MSG_EXT_WDTR
2629 SCR_MOVE_ABS (4) ^ SCR_MSG_OUT,
2637 PADDR (msg_out_done),
2639 }/*-------------------------< MSG_EXT_3 >----------------*/,{
2642 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2645 ** get extended message code.
2647 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2650 ** Check for message parity error.
2652 SCR_TO_REG (scratcha),
2654 SCR_FROM_REG (socl),
2656 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2657 PADDRH (msg_parity),
2658 SCR_FROM_REG (scratcha),
2660 SCR_JUMP ^ IFTRUE (DATA (MSG_EXT_SDTR)),
2663 ** unknown extended message
2668 }/*-------------------------< MSG_SDTR >-----------------*/,{
2671 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2674 ** get period and offset
2676 SCR_MOVE_ABS (2) ^ SCR_MSG_IN,
2678 SCR_FROM_REG (socl),
2680 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2681 PADDRH (msg_parity),
2683 ** let the host do the real work.
2688 ** let the target fetch our answer.
2695 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2698 ** Send the MSG_EXT_SDTR
2700 SCR_MOVE_ABS (5) ^ SCR_MSG_OUT,
2708 PADDR (msg_out_done),
2710 }/*-------------------------< MSG_OUT_ABORT >-------------*/,{
2712 ** After ABORT message,
2714 ** expect an immediate disconnect, ...
2716 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2718 SCR_CLR (SCR_ACK|SCR_ATN),
2723 ** ... and set the status to "ABORTED"
2725 SCR_LOAD_REG (HS_REG, HS_ABORTED),
2730 }/*-------------------------< GETCC >-----------------------*/,{
2732 ** The ncr doesn't have an indirect load
2733 ** or store command. So we have to
2734 ** copy part of the control block to a
2735 ** fixed place, where we can modify it.
2737 ** We patch the address part of a COPY command
2738 ** with the address of the dsa register ...
2744 ** ... then we do the actual copy.
2746 SCR_COPY (sizeof (struct head)),
2747 }/*-------------------------< GETCC1 >----------------------*/,{
2751 ** Initialize the status registers
2754 NADDR (header.status),
2756 }/*-------------------------< GETCC2 >----------------------*/,{
2758 ** Get the condition code from a target.
2760 ** DSA points to a data structure.
2761 ** Set TEMP to the script location
2762 ** that receives the condition code.
2764 ** Because there is no script command
2765 ** to load a longword into a register,
2766 ** we use a CALL command.
2771 ** Get the condition code.
2773 SCR_MOVE_TBL ^ SCR_DATA_IN,
2774 offsetof (struct dsb, sense),
2776 ** No data phase may follow!
2785 ** The CALL jumps to this point.
2786 ** Prepare for a RESTORE_POINTER message.
2787 ** Save the TEMP register into the saved pointer.
2791 NADDR (header.savep),
2793 ** Load scratcha, because in case of a selection timeout,
2794 ** the host will expect a new value for startpos in
2795 ** the scratcha register.
2800 #ifdef NCR_GETCC_WITHMSG
2802 ** If QUIRK_NOMSG is set, select without ATN.
2803 ** and don't send a message.
2805 SCR_FROM_REG (QU_REG),
2807 SCR_JUMP ^ IFTRUE (MASK (QUIRK_NOMSG, QUIRK_NOMSG)),
2810 ** Then try to connect to the target.
2811 ** If we are reselected, special treatment
2812 ** of the current job is required before
2813 ** accepting the reselection.
2815 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select),
2818 ** Send the IDENTIFY message.
2819 ** In case of short transfer, remove ATN.
2821 SCR_MOVE_TBL ^ SCR_MSG_OUT,
2822 offsetof (struct dsb, smsg2),
2826 ** save the first byte of the message.
2835 }/*-------------------------< GETCC3 >----------------------*/,{
2837 ** Try to connect to the target.
2838 ** If we are reselected, special treatment
2839 ** of the current job is required before
2840 ** accepting the reselection.
2842 ** Silly target won't accept a message.
2843 ** Select without ATN.
2845 SCR_SEL_TBL ^ offsetof (struct dsb, select),
2848 ** Force error if selection timeout
2850 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_IN)),
2857 }/*-------------------------< ABORTTAG >-------------------*/,{
2859 ** Abort a bad reselection.
2860 ** Set the message to ABORT vs. ABORT_TAG
2862 SCR_LOAD_REG (scratcha, MSG_ABORT_TAG),
2864 SCR_JUMPR ^ IFFALSE (CARRYSET),
2866 }/*-------------------------< ABORT >----------------------*/,{
2867 SCR_LOAD_REG (scratcha, MSG_ABORT),
2878 ** we expect an immediate disconnect
2880 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2882 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
2887 SCR_CLR (SCR_ACK|SCR_ATN),
2893 }/*-------------------------< SNOOPTEST >-------------------*/,{
2895 ** Read the variable.
2898 KVAR (KVAR_NCR_CACHE),
2901 ** Write the variable.
2905 KVAR (KVAR_NCR_CACHE),
2907 ** Read back the variable.
2910 KVAR (KVAR_NCR_CACHE),
2912 }/*-------------------------< SNOOPEND >-------------------*/,{
2918 }/*--------------------------------------------------------*/
2922 /*==========================================================
2925 ** Fill in #define dependent parts of the script
2928 **==========================================================
2931 void ncr_script_fill (struct script * scr, struct scripth * scrh)
2937 for (i=0; i<MAX_START; i++) {
2939 *p++ =NADDR (squeue[i]);
2942 *p++ =PADDR (trysel);
2945 *p++ =PADDRH(tryloop);
2947 assert ((char *)p == (char *)&scrh->tryloop + sizeof (scrh->tryloop));
2951 *p++ =SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN));
2952 *p++ =PADDR (no_data);
2953 *p++ =SCR_COPY (sizeof (ticks));
2954 *p++ =(ncrcmd) KVAR (KVAR_TICKS);
2955 *p++ =NADDR (header.stamp.data);
2956 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
2957 *p++ =offsetof (struct dsb, data[ 0]);
2959 for (i=1; i<MAX_SCATTER; i++) {
2960 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN));
2961 *p++ =PADDR (checkatn);
2962 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
2963 *p++ =offsetof (struct dsb, data[i]);
2967 *p++ =PADDR (checkatn);
2969 *p++ =PADDR (no_data);
2971 assert ((char *)p == (char *)&scr->data_in + sizeof (scr->data_in));
2975 *p++ =SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_OUT));
2976 *p++ =PADDR (no_data);
2977 *p++ =SCR_COPY (sizeof (ticks));
2978 *p++ =(ncrcmd) KVAR (KVAR_TICKS);
2979 *p++ =NADDR (header.stamp.data);
2980 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
2981 *p++ =offsetof (struct dsb, data[ 0]);
2983 for (i=1; i<MAX_SCATTER; i++) {
2984 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT));
2985 *p++ =PADDR (dispatch);
2986 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
2987 *p++ =offsetof (struct dsb, data[i]);
2991 *p++ =PADDR (dispatch);
2993 *p++ =PADDR (no_data);
2995 assert ((char *)p == (char *)&scr->data_out + sizeof (scr->data_out));
2998 /*==========================================================
3001 ** Copy and rebind a script.
3004 **==========================================================
3007 static void ncr_script_copy_and_bind (ncb_p np, ncrcmd *src, ncrcmd *dst, int len)
3009 ncrcmd opcode, new, old, tmp1, tmp2;
3010 ncrcmd *start, *end;
3020 WRITESCRIPT_OFF(dst, offset, opcode);
3024 ** If we forget to change the length
3025 ** in struct script, a field will be
3026 ** padded with 0. This is an illegal
3031 printf ("%s: ERROR0 IN SCRIPT at %d.\n",
3032 ncr_name(np), (int) (src-start-1));
3036 if (DEBUG_FLAGS & DEBUG_SCRIPT)
3037 printf ("%p: <%x>\n",
3038 (src-1), (unsigned)opcode);
3041 ** We don't have to decode ALL commands
3043 switch (opcode >> 28) {
3047 ** COPY has TWO arguments.
3051 if ((tmp1 & RELOC_MASK) == RELOC_KVAR)
3054 if ((tmp2 & RELOC_MASK) == RELOC_KVAR)
3056 if ((tmp1 ^ tmp2) & 3) {
3057 printf ("%s: ERROR1 IN SCRIPT at %d.\n",
3058 ncr_name(np), (int) (src-start-1));
3062 ** If PREFETCH feature not enabled, remove
3063 ** the NO FLUSH bit if present.
3065 if ((opcode & SCR_NO_FLUSH) && !(np->features&FE_PFEN))
3066 WRITESCRIPT_OFF(dst, offset - 4,
3067 (opcode & ~SCR_NO_FLUSH));
3072 ** MOVE (absolute address)
3080 ** dont't relocate if relative :-)
3082 if (opcode & 0x00800000)
3104 switch (old & RELOC_MASK) {
3105 case RELOC_REGISTER:
3106 new = (old & ~RELOC_MASK) + rman_get_start(np->reg_res);
3109 new = (old & ~RELOC_MASK) + np->p_script;
3112 new = (old & ~RELOC_MASK) + np->p_scripth;
3115 new = (old & ~RELOC_MASK) + vtophys(np);
3118 if (((old & ~RELOC_MASK) <
3119 SCRIPT_KVAR_FIRST) ||
3120 ((old & ~RELOC_MASK) >
3122 panic("ncr KVAR out of range");
3123 new = vtophys(script_kvars[old &
3127 /* Don't relocate a 0 address. */
3134 panic("ncr_script_copy_and_bind: weird relocation %x @ %d\n", old, (int)(src - start));
3138 WRITESCRIPT_OFF(dst, offset, new);
3142 WRITESCRIPT_OFF(dst, offset, *src++);
3149 /*==========================================================
3152 ** Auto configuration.
3155 **==========================================================
3159 /*----------------------------------------------------------
3161 ** Reduce the transfer length to the max value
3162 ** we can transfer safely.
3164 ** Reading a block greater then MAX_SIZE from the
3165 ** raw (character) device exercises a memory leak
3166 ** in the vm subsystem. This is common to ALL devices.
3167 ** We have submitted a description of this bug to
3168 ** <FreeBSD-bugs@freefall.cdrom.com>.
3169 ** It should be fixed in the current release.
3171 **----------------------------------------------------------
3174 void ncr_min_phys (struct buf *bp)
3176 if ((unsigned long)bp->b_bcount > MAX_SIZE) bp->b_bcount = MAX_SIZE;
3182 /*----------------------------------------------------------
3184 ** Maximal number of outstanding requests per target.
3186 **----------------------------------------------------------
3189 u_int32_t ncr_info (int unit)
3191 return (1); /* may be changed later */
3196 /*----------------------------------------------------------
3198 ** NCR chip devices table and chip look up function.
3199 ** Features bit are defined in ncrreg.h. Is it the
3202 **----------------------------------------------------------
3205 unsigned long device_id;
3206 unsigned short minrevid;
3208 unsigned char maxburst;
3209 unsigned char maxoffs;
3210 unsigned char clock_divn;
3211 unsigned int features;
3214 static ncr_chip ncr_chip_table[] = {
3215 {NCR_810_ID, 0x00, "ncr 53c810 fast10 scsi", 4, 8, 4,
3218 {NCR_810_ID, 0x10, "ncr 53c810a fast10 scsi", 4, 8, 4,
3219 FE_ERL|FE_LDSTR|FE_PFEN|FE_BOF}
3221 {NCR_815_ID, 0x00, "ncr 53c815 fast10 scsi", 4, 8, 4,
3224 {NCR_820_ID, 0x00, "ncr 53c820 fast10 wide scsi", 4, 8, 4,
3227 {NCR_825_ID, 0x00, "ncr 53c825 fast10 wide scsi", 4, 8, 4,
3228 FE_WIDE|FE_ERL|FE_BOF}
3230 {NCR_825_ID, 0x10, "ncr 53c825a fast10 wide scsi", 7, 8, 4,
3231 FE_WIDE|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3233 {NCR_860_ID, 0x00, "ncr 53c860 fast20 scsi", 4, 8, 5,
3234 FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_LDSTR|FE_PFEN}
3236 {NCR_875_ID, 0x00, "ncr 53c875 fast20 wide scsi", 7, 16, 5,
3237 FE_WIDE|FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3239 {NCR_875_ID, 0x02, "ncr 53c875 fast20 wide scsi", 7, 16, 5,
3240 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3242 {NCR_875_ID2, 0x00, "ncr 53c875j fast20 wide scsi", 7, 16, 5,
3243 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3245 {NCR_885_ID, 0x00, "ncr 53c885 fast20 wide scsi", 7, 16, 5,
3246 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3248 {NCR_895_ID, 0x00, "ncr 53c895 fast40 wide scsi", 7, 31, 7,
3249 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3251 {NCR_896_ID, 0x00, "ncr 53c896 fast40 wide scsi", 7, 31, 7,
3252 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3254 {NCR_895A_ID, 0x00, "ncr 53c895a fast40 wide scsi", 7, 31, 7,
3255 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3257 {NCR_1510D_ID, 0x00, "ncr 53c1510d fast40 wide scsi", 7, 31, 7,
3258 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3261 static int ncr_chip_lookup(u_long device_id, u_char revision_id)
3266 for (i = 0; i < sizeof(ncr_chip_table)/sizeof(ncr_chip_table[0]); i++) {
3267 if (device_id == ncr_chip_table[i].device_id &&
3268 ncr_chip_table[i].minrevid <= revision_id) {
3270 ncr_chip_table[found].minrevid
3271 < ncr_chip_table[i].minrevid) {
3279 /*----------------------------------------------------------
3281 ** Probe the hostadapter.
3283 **----------------------------------------------------------
3288 static int ncr_probe (device_t dev)
3292 i = ncr_chip_lookup(pci_get_devid(dev), pci_get_revid(dev));
3294 device_set_desc(dev, ncr_chip_table[i].name);
3295 return (-1000); /* Allows to use both ncr and sym */
3303 /*==========================================================
3305 ** NCR chip clock divisor table.
3306 ** Divisors are multiplied by 10,000,000 in order to make
3307 ** calculations more simple.
3309 **==========================================================
3313 static u_long div_10M[] =
3314 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
3316 /*===============================================================
3318 ** NCR chips allow burst lengths of 2, 4, 8, 16, 32, 64, 128
3319 ** transfers. 32,64,128 are only supported by 875 and 895 chips.
3320 ** We use log base 2 (burst length) as internal code, with
3321 ** value 0 meaning "burst disabled".
3323 **===============================================================
3327 * Burst length from burst code.
3329 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
3332 * Burst code from io register bits.
3334 #define burst_code(dmode, ctest4, ctest5) \
3335 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
3338 * Set initial io register bits from burst code.
3341 ncr_init_burst(ncb_p np, u_char bc)
3343 np->rv_ctest4 &= ~0x80;
3344 np->rv_dmode &= ~(0x3 << 6);
3345 np->rv_ctest5 &= ~0x4;
3348 np->rv_ctest4 |= 0x80;
3352 np->rv_dmode |= ((bc & 0x3) << 6);
3353 np->rv_ctest5 |= (bc & 0x4);
3357 /*==========================================================
3360 ** Auto configuration: attach and init a host adapter.
3363 **==========================================================
3368 ncr_attach (device_t dev)
3370 ncb_p np = (struct ncb*) device_get_softc(dev);
3376 struct cam_devq *devq;
3379 ** allocate and initialize structures.
3382 np->unit = device_get_unit(dev);
3385 ** Try to map the controller chip to
3386 ** virtual and physical memory.
3390 np->reg_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &np->reg_rid,
3391 0, ~0, 1, RF_ACTIVE);
3393 device_printf(dev, "could not map memory\n");
3398 ** Make the controller's registers available.
3399 ** Now the INB INW INL OUTB OUTW OUTL macros
3400 ** can be used safely.
3403 np->bst = rman_get_bustag(np->reg_res);
3404 np->bsh = rman_get_bushandle(np->reg_res);
3409 ** Try to map the controller chip into iospace.
3412 if (!pci_map_port (config_id, 0x10, &np->port))
3418 ** Save some controller register default values
3421 np->rv_scntl3 = INB(nc_scntl3) & 0x77;
3422 np->rv_dmode = INB(nc_dmode) & 0xce;
3423 np->rv_dcntl = INB(nc_dcntl) & 0xa9;
3424 np->rv_ctest3 = INB(nc_ctest3) & 0x01;
3425 np->rv_ctest4 = INB(nc_ctest4) & 0x88;
3426 np->rv_ctest5 = INB(nc_ctest5) & 0x24;
3427 np->rv_gpcntl = INB(nc_gpcntl);
3428 np->rv_stest2 = INB(nc_stest2) & 0x20;
3430 if (bootverbose >= 2) {
3431 printf ("\tBIOS values: SCNTL3:%02x DMODE:%02x DCNTL:%02x\n",
3432 np->rv_scntl3, np->rv_dmode, np->rv_dcntl);
3433 printf ("\t CTEST3:%02x CTEST4:%02x CTEST5:%02x\n",
3434 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
3437 np->rv_dcntl |= NOCOM;
3440 ** Do chip dependent initialization.
3443 rev = pci_get_revid(dev);
3446 ** Get chip features from chips table.
3448 i = ncr_chip_lookup(pci_get_devid(dev), rev);
3451 np->maxburst = ncr_chip_table[i].maxburst;
3452 np->maxoffs = ncr_chip_table[i].maxoffs;
3453 np->clock_divn = ncr_chip_table[i].clock_divn;
3454 np->features = ncr_chip_table[i].features;
3455 } else { /* Should'nt happen if probe() is ok */
3459 np->features = FE_ERL;
3462 np->maxwide = np->features & FE_WIDE ? 1 : 0;
3463 np->clock_khz = np->features & FE_CLK80 ? 80000 : 40000;
3464 if (np->features & FE_QUAD) np->multiplier = 4;
3465 else if (np->features & FE_DBLR) np->multiplier = 2;
3466 else np->multiplier = 1;
3469 ** Get the frequency of the chip's clock.
3470 ** Find the right value for scntl3.
3472 if (np->features & (FE_ULTRA|FE_ULTRA2))
3473 ncr_getclock(np, np->multiplier);
3475 #ifdef NCR_TEKRAM_EEPROM
3477 printf ("%s: Tekram EEPROM read %s\n",
3479 read_tekram_eeprom (np, NULL) ?
3480 "succeeded" : "failed");
3482 #endif /* NCR_TEKRAM_EEPROM */
3485 * If scntl3 != 0, we assume BIOS is present.
3488 np->features |= FE_BIOS;
3491 * Divisor to be used for async (timer pre-scaler).
3493 i = np->clock_divn - 1;
3496 if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz > div_10M[i]) {
3501 np->rv_scntl3 = i+1;
3504 * Minimum synchronous period factor supported by the chip.
3505 * Btw, 'period' is in tenths of nanoseconds.
3508 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
3509 if (period <= 250) np->minsync = 10;
3510 else if (period <= 303) np->minsync = 11;
3511 else if (period <= 500) np->minsync = 12;
3512 else np->minsync = (period + 40 - 1) / 40;
3515 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
3518 if (np->minsync < 25 && !(np->features & (FE_ULTRA|FE_ULTRA2)))
3520 else if (np->minsync < 12 && !(np->features & FE_ULTRA2))
3524 * Maximum synchronous period factor supported by the chip.
3527 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
3528 np->maxsync = period > 2540 ? 254 : period / 10;
3531 * Now, some features available with Symbios compatible boards.
3532 * LED support through GPIO0 and DIFF support.
3535 #ifdef SCSI_NCR_SYMBIOS_COMPAT
3536 if (!(np->rv_gpcntl & 0x01))
3537 np->features |= FE_LED0;
3538 #if 0 /* Not safe enough without NVRAM support or user settable option */
3539 if (!(INB(nc_gpreg) & 0x08))
3540 np->features |= FE_DIFF;
3542 #endif /* SCSI_NCR_SYMBIOS_COMPAT */
3545 * Prepare initial IO registers settings.
3546 * Trust BIOS only if we believe we have one and if we want to.
3548 #ifdef SCSI_NCR_TRUST_BIOS
3549 if (!(np->features & FE_BIOS)) {
3554 np->rv_dcntl = NOCOM;
3556 np->rv_ctest4 = MPEE;
3560 if (np->features & FE_ERL)
3561 np->rv_dmode |= ERL; /* Enable Read Line */
3562 if (np->features & FE_BOF)
3563 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
3564 if (np->features & FE_ERMP)
3565 np->rv_dmode |= ERMP; /* Enable Read Multiple */
3566 if (np->features & FE_CLSE)
3567 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
3568 if (np->features & FE_WRIE)
3569 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
3570 if (np->features & FE_PFEN)
3571 np->rv_dcntl |= PFEN; /* Prefetch Enable */
3572 if (np->features & FE_DFS)
3573 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
3574 if (np->features & FE_DIFF)
3575 np->rv_stest2 |= 0x20; /* Differential mode */
3576 ncr_init_burst(np, np->maxburst); /* Max dwords burst length */
3579 burst_code(np->rv_dmode, np->rv_ctest4, np->rv_ctest5);
3583 ** Get on-chip SRAM address, if supported
3585 if ((np->features & FE_RAM) && sizeof(struct script) <= 4096) {
3586 np->sram_rid = 0x18;
3587 np->sram_res = bus_alloc_resource(dev, SYS_RES_MEMORY,
3589 0, ~0, 1, RF_ACTIVE);
3593 ** Allocate structure for script relocation.
3595 if (np->sram_res != NULL) {
3597 np->p_script = rman_get_start(np->sram_res);
3598 np->bst2 = rman_get_bustag(np->sram_res);
3599 np->bsh2 = rman_get_bushandle(np->sram_res);
3600 } else if (sizeof (struct script) > PAGE_SIZE) {
3601 np->script = (struct script*) vm_page_alloc_contig
3602 (round_page(sizeof (struct script)),
3603 0, 0xffffffff, PAGE_SIZE);
3605 np->script = (struct script *)
3606 malloc (sizeof (struct script), M_DEVBUF, M_WAITOK);
3609 /* XXX JGibbs - Use contigmalloc */
3610 if (sizeof (struct scripth) > PAGE_SIZE) {
3611 np->scripth = (struct scripth*) vm_page_alloc_contig
3612 (round_page(sizeof (struct scripth)),
3613 0, 0xffffffff, PAGE_SIZE);
3616 np->scripth = (struct scripth *)
3617 malloc (sizeof (struct scripth), M_DEVBUF, M_WAITOK);
3620 #ifdef SCSI_NCR_PCI_CONFIG_FIXUP
3622 ** If cache line size is enabled, check PCI config space and
3623 ** try to fix it up if necessary.
3625 #ifdef PCIR_CACHELNSZ /* To be sure that new PCI stuff is present */
3627 u_char cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
3628 u_short command = pci_read_config(dev, PCIR_COMMAND, 2);
3632 printf("%s: setting PCI cache line size register to %d.\n",
3633 ncr_name(np), (int)cachelnsz);
3634 pci_write_config(dev, PCIR_CACHELNSZ, cachelnsz, 1);
3637 if (!(command & (1<<4))) {
3639 printf("%s: setting PCI command write and invalidate.\n",
3641 pci_write_config(dev, PCIR_COMMAND, command, 2);
3644 #endif /* PCIR_CACHELNSZ */
3646 #endif /* SCSI_NCR_PCI_CONFIG_FIXUP */
3648 /* Initialize per-target user settings */
3650 if (SCSI_NCR_DFLT_SYNC) {
3651 usrsync = SCSI_NCR_DFLT_SYNC;
3652 if (usrsync > np->maxsync)
3653 usrsync = np->maxsync;
3654 if (usrsync < np->minsync)
3655 usrsync = np->minsync;
3658 usrwide = (SCSI_NCR_MAX_WIDE);
3659 if (usrwide > np->maxwide) usrwide=np->maxwide;
3661 for (i=0;i<MAX_TARGET;i++) {
3662 tcb_p tp = &np->target[i];
3664 tp->tinfo.user.period = usrsync;
3665 tp->tinfo.user.offset = usrsync != 0 ? np->maxoffs : 0;
3666 tp->tinfo.user.width = usrwide;
3667 tp->tinfo.disc_tag = NCR_CUR_DISCENB
3674 ** Bells and whistles ;-)
3677 printf("%s: minsync=%d, maxsync=%d, maxoffs=%d, %d dwords burst, %s dma fifo\n",
3678 ncr_name(np), np->minsync, np->maxsync, np->maxoffs,
3679 burst_length(np->maxburst),
3680 (np->rv_ctest5 & DFS) ? "large" : "normal");
3683 ** Print some complementary information that can be helpfull.
3686 printf("%s: %s, %s IRQ driver%s\n",
3688 np->rv_stest2 & 0x20 ? "differential" : "single-ended",
3689 np->rv_dcntl & IRQM ? "totem pole" : "open drain",
3690 np->sram_res ? ", using on-chip SRAM" : "");
3693 ** Patch scripts to physical addresses
3695 ncr_script_fill (&script0, &scripth0);
3698 np->p_script = vtophys(np->script);
3699 np->p_scripth = vtophys(np->scripth);
3701 ncr_script_copy_and_bind (np, (ncrcmd *) &script0,
3702 (ncrcmd *) np->script, sizeof(struct script));
3704 ncr_script_copy_and_bind (np, (ncrcmd *) &scripth0,
3705 (ncrcmd *) np->scripth, sizeof(struct scripth));
3708 ** Patch the script for LED support.
3711 if (np->features & FE_LED0) {
3712 WRITESCRIPT(reselect[0], SCR_REG_REG(gpreg, SCR_OR, 0x01));
3713 WRITESCRIPT(reselect1[0], SCR_REG_REG(gpreg, SCR_AND, 0xfe));
3714 WRITESCRIPT(reselect2[0], SCR_REG_REG(gpreg, SCR_AND, 0xfe));
3718 ** init data structure
3721 np->jump_tcb.l_cmd = SCR_JUMP;
3722 np->jump_tcb.l_paddr = NCB_SCRIPTH_PHYS (np, abort);
3725 ** Get SCSI addr of host adapter (set by bios?).
3728 np->myaddr = INB(nc_scid) & 0x07;
3729 if (!np->myaddr) np->myaddr = SCSI_NCR_MYADDR;
3733 ** Log the initial register contents
3737 for (reg=0; reg<256; reg+=4) {
3738 if (reg%16==0) printf ("reg[%2x]", reg);
3739 printf (" %08x", (int)pci_conf_read (config_id, reg));
3740 if (reg%16==12) printf ("\n");
3743 #endif /* NCR_DUMP_REG */
3749 OUTB (nc_istat, SRST);
3751 OUTB (nc_istat, 0 );
3755 ** Now check the cache handling of the pci chipset.
3758 if (ncr_snooptest (np)) {
3759 printf ("CACHE INCORRECTLY CONFIGURED.\n");
3764 ** Install the interrupt handler.
3768 np->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
3769 RF_SHAREABLE | RF_ACTIVE);
3770 if (np->irq_res == NULL) {
3772 "interruptless mode: reduced performance.\n");
3774 bus_setup_intr(dev, np->irq_res, INTR_TYPE_CAM,
3775 ncr_intr, np, &np->irq_handle);
3779 ** Create the device queue. We only allow MAX_START-1 concurrent
3780 ** transactions so we can be sure to have one element free in our
3781 ** start queue to reset to the idle loop.
3783 devq = cam_simq_alloc(MAX_START - 1);
3788 ** Now tell the generic SCSI layer
3791 np->sim = cam_sim_alloc(ncr_action, ncr_poll, "ncr", np, np->unit,
3793 cam_simq_release(devq);
3794 if (np->sim == NULL)
3798 if (xpt_bus_register(np->sim, 0) != CAM_SUCCESS) {
3799 cam_sim_free(np->sim);
3803 if (xpt_create_path(&np->path, /*periph*/NULL,
3804 cam_sim_path(np->sim), CAM_TARGET_WILDCARD,
3805 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
3806 xpt_bus_deregister(cam_sim_path(np->sim));
3807 cam_sim_free(np->sim);
3812 ** start the timeout daemon
3820 /*==========================================================
3823 ** Process pending device interrupts.
3826 **==========================================================
3834 int oldspl = splcam();
3836 if (DEBUG_FLAGS & DEBUG_TINY) printf ("[");
3838 if (INB(nc_istat) & (INTF|SIP|DIP)) {
3840 ** Repeat until no outstanding ints
3844 } while (INB(nc_istat) & (INTF|SIP|DIP));
3849 if (DEBUG_FLAGS & DEBUG_TINY) printf ("]\n");
3854 /*==========================================================
3857 ** Start execution of a SCSI command.
3858 ** This is called from the generic SCSI driver.
3861 **==========================================================
3865 ncr_action (struct cam_sim *sim, union ccb *ccb)
3869 np = (ncb_p) cam_sim_softc(sim);
3871 switch (ccb->ccb_h.func_code) {
3872 /* Common cases first */
3873 case XPT_SCSI_IO: /* Execute the requested I/O operation */
3879 struct ccb_scsiio *csio;
3888 tp = &np->target[ccb->ccb_h.target_id];
3894 * Last time we need to check if this CCB needs to
3897 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
3902 ccb->ccb_h.status |= CAM_SIM_QUEUED;
3904 /*---------------------------------------------------
3906 ** Assign an nccb / bind ccb
3908 **----------------------------------------------------
3910 cp = ncr_get_nccb (np, ccb->ccb_h.target_id,
3911 ccb->ccb_h.target_lun);
3913 /* XXX JGibbs - Freeze SIMQ */
3914 ccb->ccb_h.status = CAM_RESRC_UNAVAIL;
3921 /*---------------------------------------------------
3925 **----------------------------------------------------
3928 ** XXX JGibbs - Isn't this expensive
3929 ** enough to be conditionalized??
3932 bzero (&cp->phys.header.stamp, sizeof (struct tstamp));
3933 cp->phys.header.stamp.start = ticks;
3936 if (tp->nego_cp == NULL) {
3938 if (tp->tinfo.current.width
3939 != tp->tinfo.goal.width) {
3942 } else if ((tp->tinfo.current.period
3943 != tp->tinfo.goal.period)
3944 || (tp->tinfo.current.offset
3945 != tp->tinfo.goal.offset)) {
3951 /*---------------------------------------------------
3953 ** choose a new tag ...
3955 **----------------------------------------------------
3957 lp = tp->lp[ccb->ccb_h.target_lun];
3959 if ((ccb->ccb_h.flags & CAM_TAG_ACTION_VALID) != 0
3960 && (ccb->csio.tag_action != CAM_TAG_ACTION_NONE)
3963 ** assign a tag to this nccb
3966 nccb_p cp2 = lp->next_nccb;
3967 lp->lasttag = lp->lasttag % 255 + 1;
3968 while (cp2 && cp2->tag != lp->lasttag)
3969 cp2 = cp2->next_nccb;
3971 cp->tag=lp->lasttag;
3972 if (DEBUG_FLAGS & DEBUG_TAGS) {
3974 printf ("using tag #%d.\n", cp->tag);
3981 /*----------------------------------------------------
3983 ** Build the identify / tag / sdtr message
3985 **----------------------------------------------------
3987 idmsg = MSG_IDENTIFYFLAG | ccb->ccb_h.target_lun;
3988 if (tp->tinfo.disc_tag & NCR_CUR_DISCENB)
3989 idmsg |= MSG_IDENTIFY_DISCFLAG;
3991 msgptr = cp->scsi_smsg;
3993 msgptr[msglen++] = idmsg;
3996 msgptr[msglen++] = ccb->csio.tag_action;
3997 msgptr[msglen++] = cp->tag;
4002 msgptr[msglen++] = MSG_EXTENDED;
4003 msgptr[msglen++] = MSG_EXT_SDTR_LEN;
4004 msgptr[msglen++] = MSG_EXT_SDTR;
4005 msgptr[msglen++] = tp->tinfo.goal.period;
4006 msgptr[msglen++] = tp->tinfo.goal.offset;;
4007 if (DEBUG_FLAGS & DEBUG_NEGO) {
4009 printf ("sync msgout: ");
4010 ncr_show_msg (&cp->scsi_smsg [msglen-5]);
4015 msgptr[msglen++] = MSG_EXTENDED;
4016 msgptr[msglen++] = MSG_EXT_WDTR_LEN;
4017 msgptr[msglen++] = MSG_EXT_WDTR;
4018 msgptr[msglen++] = tp->tinfo.goal.width;
4019 if (DEBUG_FLAGS & DEBUG_NEGO) {
4021 printf ("wide msgout: ");
4022 ncr_show_msg (&cp->scsi_smsg [msglen-4]);
4028 /*----------------------------------------------------
4030 ** Build the identify message for getcc.
4032 **----------------------------------------------------
4035 cp->scsi_smsg2 [0] = idmsg;
4038 /*----------------------------------------------------
4040 ** Build the data descriptors
4042 **----------------------------------------------------
4045 /* XXX JGibbs - Handle other types of I/O */
4046 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
4047 segments = ncr_scatter(&cp->phys,
4048 (vm_offset_t)csio->data_ptr,
4049 (vm_size_t)csio->dxfer_len);
4052 ccb->ccb_h.status = CAM_REQ_TOO_BIG;
4053 ncr_free_nccb(np, cp);
4058 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
4059 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, data_in);
4060 cp->phys.header.goalp = cp->phys.header.savep +20 +segments*16;
4061 } else { /* CAM_DIR_OUT */
4062 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, data_out);
4063 cp->phys.header.goalp = cp->phys.header.savep +20 +segments*16;
4066 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, no_data);
4067 cp->phys.header.goalp = cp->phys.header.savep;
4070 cp->phys.header.lastp = cp->phys.header.savep;
4073 /*----------------------------------------------------
4077 **----------------------------------------------------
4080 ** physical -> virtual backlink
4081 ** Generic SCSI command
4083 cp->phys.header.cp = cp;
4087 cp->phys.header.launch.l_paddr = NCB_SCRIPT_PHYS (np, select);
4088 cp->phys.header.launch.l_cmd = SCR_JUMP;
4092 cp->phys.select.sel_id = ccb->ccb_h.target_id;
4093 cp->phys.select.sel_scntl3 = tp->tinfo.wval;
4094 cp->phys.select.sel_sxfer = tp->tinfo.sval;
4098 cp->phys.smsg.addr = CCB_PHYS (cp, scsi_smsg);
4099 cp->phys.smsg.size = msglen;
4101 cp->phys.smsg2.addr = CCB_PHYS (cp, scsi_smsg2);
4102 cp->phys.smsg2.size = msglen2;
4106 /* XXX JGibbs - Support other command types */
4107 cp->phys.cmd.addr = vtophys (csio->cdb_io.cdb_bytes);
4108 cp->phys.cmd.size = csio->cdb_len;
4112 cp->phys.scmd.addr = CCB_PHYS (cp, sensecmd);
4113 cp->phys.scmd.size = 6;
4115 ** patch requested size into sense command
4117 cp->sensecmd[0] = 0x03;
4118 cp->sensecmd[1] = ccb->ccb_h.target_lun << 5;
4119 cp->sensecmd[4] = sizeof(struct scsi_sense_data);
4120 cp->sensecmd[4] = csio->sense_len;
4124 cp->phys.sense.addr = vtophys (&csio->sense_data);
4125 cp->phys.sense.size = csio->sense_len;
4129 cp->actualquirks = QUIRK_NOMSG;
4130 cp->host_status = nego ? HS_NEGOTIATE : HS_BUSY;
4131 cp->s_status = SCSI_STATUS_ILLEGAL;
4132 cp->parity_status = 0;
4134 cp->xerr_status = XE_OK;
4135 cp->sync_status = tp->tinfo.sval;
4136 cp->nego_status = nego;
4137 cp->wide_status = tp->tinfo.wval;
4139 /*----------------------------------------------------
4141 ** Critical region: start this job.
4143 **----------------------------------------------------
4147 ** reselect pattern and activate this job.
4150 cp->jump_nccb.l_cmd = (SCR_JUMP ^ IFFALSE (DATA (cp->tag)));
4151 cp->tlimit = time_second
4152 + ccb->ccb_h.timeout / 1000 + 2;
4153 cp->magic = CCB_MAGIC;
4156 ** insert into start queue.
4159 qidx = np->squeueput + 1;
4160 if (qidx >= MAX_START)
4162 np->squeue [qidx ] = NCB_SCRIPT_PHYS (np, idle);
4163 np->squeue [np->squeueput] = CCB_PHYS (cp, phys);
4164 np->squeueput = qidx;
4166 if(DEBUG_FLAGS & DEBUG_QUEUE)
4167 printf("%s: queuepos=%d tryoffset=%d.\n",
4168 ncr_name (np), np->squeueput,
4169 (unsigned)(READSCRIPT(startpos[0]) -
4170 (NCB_SCRIPTH_PHYS (np, tryloop))));
4173 ** Script processor may be waiting for reselect.
4176 OUTB (nc_istat, SIGP);
4179 ** and reenable interrupts
4184 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */
4185 case XPT_EN_LUN: /* Enable LUN as a target */
4186 case XPT_TARGET_IO: /* Execute target I/O request */
4187 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */
4188 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/
4189 case XPT_ABORT: /* Abort the specified CCB */
4191 ccb->ccb_h.status = CAM_REQ_INVALID;
4194 case XPT_SET_TRAN_SETTINGS: