2 * Copyright (c) 2003 by Quinton Dolan <q@onthenet.com.au>.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * $Id: if_nvreg.h,v 1.6 2004/08/12 14:00:05 q Exp $
27 * $DragonFly: src/sys/dev/netif/nv/Attic/if_nvreg.h,v 1.10 2005/11/28 17:13:43 dillon Exp $
33 /* Include NVIDIA Linux driver header files */
44 #ifndef NVIDIA_VENDORID
45 #define NVIDIA_VENDORID 0x10DE
48 #define NFORCE_MCPNET1_DEVICEID 0x01C3
49 #define NFORCE_MCPNET2_DEVICEID 0x0066
50 #define NFORCE_MCPNET3_DEVICEID 0x00D6
51 #define NFORCE_MCPNET4_DEVICEID 0x0086
52 #define NFORCE_MCPNET5_DEVICEID 0x008C
53 #define NFORCE_MCPNET6_DEVICEID 0x00E6
54 #define NFORCE_MCPNET7_DEVICEID 0x00DF
55 #define NFORCE_MCPNET8_DEVICEID 0x0056
56 #define NFORCE_MCPNET9_DEVICEID 0x0057
57 #define NFORCE_MCPNET10_DEVICEID 0x0037
58 #define NFORCE_MCPNET11_DEVICEID 0x0038
62 #define TX_RING_SIZE 64
63 #define RX_RING_SIZE 64
64 #define NV_MAX_FRAGS 63
68 #define NV_DEBUG 0x0000
69 #define NV_DEBUG_INIT 0x0001
70 #define NV_DEBUG_RUNNING 0x0002
71 #define NV_DEBUG_DEINIT 0x0004
72 #define NV_DEBUG_IOCTL 0x0008
73 #define NV_DEBUG_INTERRUPT 0x0010
74 #define NV_DEBUG_API 0x0020
75 #define NV_DEBUG_LOCK 0x0040
76 #define NV_DEBUG_BROKEN 0x0080
77 #define NV_DEBUG_MII 0x0100
78 #define NV_DEBUG_ALL 0xFFFF
81 #define DEBUGOUT(level, fmt, args...) if (NV_DEBUG & level) \
84 #define DEBUGOUT(level, fmt, args...)
87 typedef unsigned long ulong;
89 struct nv_map_buffer {
90 struct mbuf *mbuf; /* mbuf receiving packet */
91 bus_dmamap_t map; /* DMA map */
96 struct nv_map_buffer buf;
98 caddr_t vaddr; /* Virtual memory address */
99 bus_addr_t paddr; /* DMA physical address */
103 struct nv_rx_desc *next;
104 struct nv_map_buffer buf;
111 /* Don't add anything above this structure */
112 TX_INFO_ADAP TxInfoAdap;
113 struct nv_tx_desc *next;
114 struct nv_map_buffer buf;
117 bus_dma_segment_t frags[NV_MAX_FRAGS + 1];
121 struct arpcom arpcom; /* interface info */
122 struct resource *res;
123 struct resource *irq;
131 struct callout nv_stat_timer;
134 bus_space_tag_t sc_st;
135 bus_space_handle_t sc_sh;
142 struct nv_rx_desc *rx_desc;
143 struct nv_tx_desc *tx_desc;
146 u_int16_t rx_ring_full;
147 u_int16_t tx_ring_full;
150 u_int32_t pending_rxs;
151 u_int32_t pending_txs;
157 /* Stuff for dealing with the NVIDIA OS API */
158 struct callout ostimer;
159 PTIMER_FUNC ostimer_func;
160 void *ostimer_params;
164 NV_UINT32 max_frame_size;
167 CMNDATA_OS_ADAPTER adapterdata;
168 unsigned char original_mac_addr[6];
177 #define sc_if arpcom.ac_if
178 #define sc_macaddr arpcom.ac_enaddr
180 #define NV_OSLOCK(_sc) crit_enter()
181 #define NV_OSUNLOCK(_sc) crit_exit()
183 #define IF_Kbps(x) ((x) * 1000) /* kilobits/sec. */
184 #define IF_Mbps(x) (IF_Kbps((x) * 1000)) /* megabits/sec. */
185 #define ETHER_ALIGN 2
187 extern int ADAPTER_ReadPhy (PVOID pContext, ULONG ulPhyAddr, ULONG ulReg, ULONG *pulVal);
188 extern int ADAPTER_WritePhy (PVOID pContext, ULONG ulPhyAddr, ULONG ulReg, ULONG ulVal);
189 extern int ADAPTER_Init (PVOID pContext, USHORT usForcedSpeed, UCHAR ucForceDpx, UCHAR ucForceMode, UINT *puiLinkState);