1 /* Opcode table for the H8-300
2 Copyright (C) 1991,1992 Free Software Foundation.
3 Written by Steve Chamberlain, sac@cygnus.com.
5 This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
40 #define KBIT 0x21 /* K is #1, or #2, yielding 0x0 or 0x8 */
41 #define IMM3 0x22 /* bit number */
42 #define RD8 0x23 /* 8 bit reg as 2nd op */
43 #define RD16 0x24 /* 16 bit reg as 2nd op */
44 #define RS8 0x25 /* 8 bit reg as 1st op */
45 #define RS16 0x26 /* 16 bit reg 1st op */
46 #define IMM8 0x27 /* constant which fits into 8 bits */
47 #define IMM16 0x28 /* constant which fits into 16 bits */
48 #define CCR 0x29 /* CCR reg */
49 #define ABS8SRC 0x2a /* abs 8 address mode */
50 #define ABS8DST 0x2b /* abs 8 address mode */
51 #define DISP8 0x2c /* pc rel displacement */
52 #define ABS16SRC 0x2d /* abs 16 address mode */
53 #define ABS16OR8SRC 0x2e /* abs 16 address mode, but could be abs 8 */
54 #define ABS16DST 0x2f /* abs 16 address mode */
55 #define ABS16OR8DST 0x30 /* abs 16 address mode */
56 #define DISPSRC 0x31 /* @(r:16) address mode src */
57 #define DISPDST 0x32 /* @(r:16) address mode dst*/
58 #define DISPREG 0x33 /* register from DISP address mode */
59 #define RDDEC 0x34 /* @-rn mode */
60 #define RSINC 0x35 /* @rn+ mode */
61 #define RDIND 0x36 /* @R mode dst */
62 #define RSIND 0x37 /* @R mode src */
63 #define MEMIND 0x38 /* @@abs8 mode */
64 #define ABS16ORREL8SRC 0x39 /* abs 16bit or pcrel */
66 #define B30 0x40 /* bit 3 must be low */
67 #define B31 0x80 /* bit 3 must be high */
68 #define E 0x81 /* End of list */
100 #define BITOP(imm, name, op00, op01,op10,op11, op20,op21)\
101 { name, {imm,RD8,E}, {op00, op01, imm, RD8,E}},\
102 { name, {imm,RDIND,E}, {op10, op11, RDIND, 0, op00,op01, imm, 0,E}},\
103 { name, {imm,ABS8DST,E},{op20, op21, ABS8DST, IGNORE, op00,op01, imm, 0,E}}
105 #define EBITOP(imm, name, op00, op01,op10,op11, op20,op21)\
106 BITOP(imm, name, op00+1, op01, op10,op11, op20,op21),\
107 BITOP(RS8, name, op00, op01, op10,op11, op20,op21)
109 #define WTWOP(name, op1, op2) \
110 { name, {RS16, RD16, E}, { op1, op2, RS16, RD16, E}}
112 #define BRANCH(name, op) \
113 { name,{DISP8,E}, { Hex4, op, DISP8,IGNORE,E }}
120 #define TWOOP(name, op1, op2,op3) \
121 { name, {IMM8, RD8,E}, { op1, RD8, IMM8,IGNORE,E}},\
122 { name, {RS8, RD8, E}, { op2, op3, RS8, RD8 ,E}}
124 #define UNOP(name, op1, op2) \
125 { name, {RS8, E}, { op1, op2, 0, RS8, E}}
127 #define UNOP3(name, op1, op2, op3) \
128 { name , {RS8, E}, {op1, op2, op3, RS8, E}}
130 struct h8_opcode h8_opcodes[]
133 TWOOP("add.b", Hex8, Hex0,Hex8),
134 WTWOP("add.w", Hex0, Hex9),
135 SOP("adds"), {KBIT,RD16|B30, E}, {Hex0, HexB, KBIT, RD16|B30, E} EOP,
136 TWOOP("addx", Hex9,Hex0,HexE),
137 TWOOP("and", HexE,Hex1,Hex6),
138 SOP("andc"), {IMM8, CCR, E}, { Hex0, Hex6, IMM8,IGNORE, E} EOP,
139 BITOP(IMM3|B30, "band", Hex7, Hex6, Hex7, HexC, Hex7, HexE),
160 EBITOP(IMM3|B30,"bclr", Hex6, Hex2, Hex7, HexD, Hex7, HexF),
161 BITOP(IMM3|B31,"biand", Hex7, Hex6, Hex7, HexC, Hex7, HexE),
162 BITOP(IMM3|B31, "bild", Hex7, Hex7,Hex7, HexC, Hex7, HexE),
163 BITOP(IMM3|B31, "bior", Hex7, Hex4,Hex7, HexC, Hex7, HexE),
164 BITOP(IMM3|B31, "bist", Hex6, Hex7,Hex7, HexD, Hex7, HexE),
165 BITOP(IMM3|B31, "bixor", Hex7, Hex5,Hex7, HexC, Hex7, HexE),
166 BITOP(IMM3|B30, "bld", Hex7, Hex7,Hex7, HexC, Hex7, HexE),
167 EBITOP(IMM3|B30,"bnot", Hex6, Hex1, Hex7, HexD, Hex7, HexF),
168 BITOP(IMM3|B30,"bor", Hex7, Hex4,Hex7, HexC, Hex7, HexE),
169 EBITOP(IMM3|B30,"bset", Hex6, Hex0,Hex7, HexD, Hex7, HexF),
170 SOP("bsr"),{DISP8, E},{ Hex5, Hex5, DISP8,IGNORE, E}, EOP,
171 BITOP(IMM3|B30, "bst", Hex6, Hex7,Hex7, HexD, Hex7, HexF),
172 EBITOP(IMM3|B30, "btst", Hex6, Hex3,Hex7, HexC, Hex7, HexE),
173 BITOP(IMM3|B30, "bxor", Hex7,Hex5,Hex7, HexC, Hex7, HexE),
174 TWOOP( "cmp.b",HexA, Hex1, HexC),
175 WTWOP( "cmp.w",Hex1,HexD),
176 UNOP( "daa",Hex0, HexF),
177 UNOP( "das",Hex1, HexF),
178 UNOP( "dec",Hex1, HexA),
179 SOP("divxu"),{RS8, RD16|B30, E}, { Hex5, Hex1, RS8, RD16|B30, E} EOP,
180 SOP("eepmov"),{ E}, {Hex7, HexB, Hex5, HexC, Hex5, Hex9, Hex8, HexF,E} EOP,
181 UNOP( "inc", Hex0, HexA),
182 SOP("jmp"),{RSIND|B30, E}, {Hex5, Hex9, RSIND|B30, Hex0, E} EOP,
183 SOP("jmp"),{ABS16ORREL8SRC, E}, {Hex5, HexA, Hex0, Hex0, ABS16ORREL8SRC, IGNORE,IGNORE,IGNORE,E} EOP,
184 SOP("jmp"),{MEMIND, E}, {Hex5, HexB, MEMIND,IGNORE, E} EOP,
185 SOP("jsr"),{RSIND|B30, E}, {Hex5, HexD, RSIND|B30, Hex0, E} EOP,
186 SOP("jsr"),{ABS16ORREL8SRC, E}, {Hex5, HexE, Hex0, Hex0,
187 ABS16ORREL8SRC,IGNORE,IGNORE,IGNORE, E} EOP,
188 SOP("jsr"),{MEMIND, E}, {Hex5, HexF, MEMIND, IGNORE,E} EOP,
189 SOP("ldc"),{IMM8, CCR, E}, { Hex0, Hex7, IMM8,IGNORE, E} EOP,
190 SOP("ldc"),{RS8, CCR, E}, { Hex0, Hex3, Hex0, RS8, E} EOP,
191 SOP("mov.b"),{RS8, RD8, E}, { Hex0, HexC, RS8, RD8, E} EOP,
192 SOP("mov.b"),{IMM8, RD8, E}, { HexF, RD8, IMM8,IGNORE, E} EOP,
193 SOP("mov.b"),{RSIND|B30,RD8, E}, { Hex6, Hex8, RSIND|B30, RD8, E} EOP,
194 SOP("mov.b"),{DISPSRC,RD8, E}, { Hex6, HexE, DISPREG|B30, RD8,
195 DISPSRC, IGNORE, IGNORE, IGNORE, E} EOP,
196 SOP("mov.b"),{RSINC|B30, RD8, E}, { Hex6, HexC, RSINC|B30, RD8, E} EOP,
197 SOP("mov.b"),{ABS16OR8SRC, RD8, E}, { Hex6, HexA, Hex0, RD8,ABS16OR8SRC,
198 IGNORE,IGNORE,IGNORE,E} EOP,
199 SOP("mov.b"),{ABS8SRC, RD8, E}, { Hex2, RD8, ABS8SRC,IGNORE, E} EOP,
200 SOP("mov.b"),{RS8, RDIND|B30, E}, { Hex6, Hex8, RDIND|B31, RS8, E} EOP,
201 SOP("mov.b"),{RS8, DISPDST, E}, { Hex6, HexE, DISPREG|B31,
202 RS8,DISPDST, IGNORE, IGNORE, IGNORE, E} EOP,
203 SOP("mov.b"),{RS8, RDDEC|B31, E}, { Hex6, HexC, RDDEC|B31, RS8, E} EOP,
204 SOP( "mov.b"),{RS8, ABS16OR8DST, E}, { Hex6, HexA, Hex8, RS8,
205 ABS16OR8DST,IGNORE,IGNORE,IGNORE, E} EOP,
206 SOP( "mov.b"),{RS8, ABS8DST, E}, { Hex3, RS8, ABS8DST,IGNORE, E} EOP,
207 SOP( "mov.w"),{RS16|B30, RD16|B30, E},{ Hex0, HexD, RS16|B30,
209 SOP("mov.w"),{IMM16, RD16|B30, E}, { Hex7, Hex9, Hex0, RD16|B30,
210 IMM16,IGNORE,IGNORE,IGNORE, E} EOP,
211 SOP("mov.w"),{RSIND|B30,RD16|B30, E},{ Hex6, Hex9, RSIND|B30,
213 SOP("mov.w"),{DISPSRC,RD16|B30, E}, { Hex6, HexF, DISPREG|B30,
214 RD16|B30, DISPSRC, IGNORE, IGNORE, IGNORE,E} EOP,
215 SOP("mov.w"),{RSINC|B30, RD16|B30, E}, { Hex6, HexD, RSINC|B30,
217 SOP("mov.w"), {ABS16SRC, RD16|B30, E}, { Hex6, HexB, Hex0,
218 RD16|B30,ABS16SRC,IGNORE,IGNORE,IGNORE, E} EOP,
219 SOP("mov.w"), {RS16|B30, RDIND|B30, E},{ Hex6, Hex9, RDIND|B31,
221 SOP("mov.w"), {RS16|B30, DISPDST, E}, { Hex6, HexF, DISPREG|B31,
222 RS16|B30,DISPDST, IGNORE,IGNORE,IGNORE,E} EOP,
223 SOP("mov.w"), {RS16|B30, RDDEC|B30, E},{ Hex6, HexD, RDDEC|B31,
225 SOP("mov.w"), {RS16|B30, ABS16DST, E}, { Hex6, HexB, Hex8, RS16|B30,
226 ABS16DST, IGNORE, IGNORE, IGNORE, E} EOP,
227 SOP("movfpe"), {ABS16SRC, RD8, E}, { Hex6, HexA, Hex4, RD8,
228 ABS16SRC,IGNORE,IGNORE,IGNORE, E} EOP,
229 SOP("movtpe"), {RS8, ABS16DST, E}, { Hex6, HexA, HexC, RS8,
230 ABS16DST,IGNORE,IGNORE,IGNORE,
232 SOP("mulxu"), {RS8, RD16|B30, E}, { Hex5, Hex0, RS8, RD16|B30, E} EOP,
233 SOP( "neg"), {RS8, E}, { Hex1, Hex7, Hex8, RS8, E} EOP,
234 SOP( "nop"), {E}, { Hex0, Hex0, Hex0, Hex0,E} EOP,
235 SOP( "not"), {RS8,E}, { Hex1, Hex7, Hex0, RS8,E} EOP,
236 TWOOP("or", HexC, Hex1, Hex4),
237 SOP( "orc"), {IMM8, CCR,E}, { Hex0, Hex4, IMM8,IGNORE,E} EOP,
238 SOP( "pop"), {RS16|B30,E}, { Hex6, HexD, Hex7, RS16|B30,E} EOP,
239 SOP( "push"), {RS16|B30,E}, { Hex6, HexD, HexF, RS16|B30,E} EOP,
240 UNOP3( "rotl",Hex1, Hex2,Hex8),
241 UNOP3( "rotr",Hex1, Hex3, Hex8),
242 UNOP3( "rotxl",Hex1, Hex2, Hex0),
243 UNOP3( "rotxr",Hex1, Hex3, Hex0),
244 SOP("rte"), {E}, { Hex5, Hex6, Hex7, Hex0,E} EOP,
245 SOP("rts"), {E}, { Hex5, Hex4, Hex7, Hex0,E} EOP,
246 UNOP3( "shal", Hex1, Hex0, Hex8),
247 UNOP3( "shar", Hex1, Hex1, Hex8),
248 UNOP3( "shll", Hex1, Hex0, Hex0),
249 UNOP3( "shlr", Hex1, Hex1, Hex0),
250 SOP("sleep"), {E}, { Hex0, Hex1, Hex8, Hex0,E} EOP,
251 SOP("stc"), {CCR, RD8,E}, { Hex0, Hex2, Hex0, RD8,E} EOP,
252 SOP("sub.b"), {RS8,RD8,E}, { Hex1, Hex8, RS8, RD8,E} EOP,
253 SOP("sub.w"), {RS16|B30, RD16|B30,E}, {Hex1, Hex9, RS16|B30,RD16|B30,E} EOP,
254 SOP("subs"), {KBIT,RD16|B30,E}, { Hex1, HexB, KBIT, RD16|B30,E} EOP,
255 TWOOP("subx",HexB, Hex1, HexE),
256 TWOOP("xor", HexD, Hex1, Hex5),
257 SOP("xorc"), {IMM8, CCR,E}, { Hex0, Hex5, IMM8,IGNORE,E} EOP,
261 extern struct h8_opcode h8_opcodes[] ;