2 * Copyright (c) 2001 Wind River Systems
4 * Bill Paul <wpaul@bsdi.com>. All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Bill Paul.
17 * 4. Neither the name of the author nor the names of any co-contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
31 * THE POSSIBILITY OF SUCH DAMAGE.
33 * $FreeBSD: src/sys/dev/mii/nsgphy.c,v 1.1.2.3 2002/11/08 21:53:49 semenu Exp $
37 * Driver for the National Semiconductor DP83891 and DP83861
39 * Datasheet available at: http://www.national.com/ds/DP/DP83861.pdf
41 * The DP83891 is the older NatSemi gigE PHY which isn't being sold
42 * anymore. The DP83861 is its replacement, which is an 'enhanced'
43 * firmware driven component. The major difference between the
44 * two is that the 83891 can't generate interrupts, while the
45 * 83861 can. (I think it wasn't originally designed to do this, but
46 * it can now thanks to firmware updates.) The 83861 also allows
47 * access to its internal RAM via indirect register access.
50 #include <sys/param.h>
51 #include <sys/systm.h>
52 #include <sys/kernel.h>
53 #include <sys/socket.h>
56 #include <machine/clock.h>
59 #include <net/if_media.h>
61 #include <dev/mii/mii.h>
62 #include <dev/mii/miivar.h>
63 #include <dev/mii/miidevs.h>
65 #include <dev/mii/nsgphyreg.h>
67 #include "miibus_if.h"
70 static const char rcsid[] =
71 "$FreeBSD: src/sys/dev/mii/nsgphy.c,v 1.1.2.3 2002/11/08 21:53:49 semenu Exp $";
74 static int nsgphy_probe __P((device_t));
75 static int nsgphy_attach __P((device_t));
76 static int nsgphy_detach __P((device_t));
78 static device_method_t nsgphy_methods[] = {
79 /* device interface */
80 DEVMETHOD(device_probe, nsgphy_probe),
81 DEVMETHOD(device_attach, nsgphy_attach),
82 DEVMETHOD(device_detach, nsgphy_detach),
83 DEVMETHOD(device_shutdown, bus_generic_shutdown),
87 static devclass_t nsgphy_devclass;
89 static driver_t nsgphy_driver = {
92 sizeof(struct mii_softc)
95 DRIVER_MODULE(nsgphy, miibus, nsgphy_driver, nsgphy_devclass, 0, 0);
97 int nsgphy_service __P((struct mii_softc *, struct mii_data *, int));
98 void nsgphy_status __P((struct mii_softc *));
100 static int nsgphy_mii_phy_auto __P((struct mii_softc *, int));
101 extern void mii_phy_auto_timeout __P((void *));
103 static int nsgphy_probe(dev)
106 struct mii_attach_args *ma;
108 ma = device_get_ivars(dev);
110 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_NATSEMI) {
111 if (MII_MODEL(ma->mii_id2) == MII_MODEL_NATSEMI_DP83891) {
112 device_set_desc(dev, MII_STR_NATSEMI_DP83891);
115 if (MII_MODEL(ma->mii_id2) == MII_MODEL_NATSEMI_DP83861) {
116 device_set_desc(dev, MII_STR_NATSEMI_DP83861);
124 static int nsgphy_attach(dev)
127 struct mii_softc *sc;
128 struct mii_attach_args *ma;
129 struct mii_data *mii;
130 const char *sep = "";
132 sc = device_get_softc(dev);
133 ma = device_get_ivars(dev);
134 sc->mii_dev = device_get_parent(dev);
135 mii = device_get_softc(sc->mii_dev);
136 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
138 sc->mii_inst = mii->mii_instance;
139 sc->mii_phy = ma->mii_phyno;
140 sc->mii_service = nsgphy_service;
143 sc->mii_flags |= MIIF_NOISOLATE;
146 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
147 #define PRINT(s) printf("%s%s", sep, s); sep = ", "
149 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
152 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst),
153 BMCR_LOOP|BMCR_S100);
158 device_printf(dev, " ");
159 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_TX, IFM_FDX, sc->mii_inst),
160 NSGPHY_S1000|NSGPHY_BMCR_FDX);
161 PRINT("1000baseTX-FDX");
162 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_TX, 0, sc->mii_inst),
165 sc->mii_capabilities =
166 (PHY_READ(sc, MII_BMSR) |
167 (BMSR_10TFDX|BMSR_10THDX)) & ma->mii_capmask;
168 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst),
169 NSGPHY_S100|NSGPHY_BMCR_FDX);
170 PRINT("100baseTX-FDX");
171 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst), NSGPHY_S100);
173 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst),
174 NSGPHY_S10|NSGPHY_BMCR_FDX);
175 PRINT("10baseT-FDX");
176 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst), NSGPHY_S10);
178 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 0);
184 MIIBUS_MEDIAINIT(sc->mii_dev);
188 static int nsgphy_detach(dev)
191 struct mii_softc *sc;
192 struct mii_data *mii;
194 sc = device_get_softc(dev);
195 mii = device_get_softc(device_get_parent(dev));
196 if (sc->mii_flags & MIIF_DOINGAUTO)
197 untimeout(mii_phy_auto_timeout, sc, sc->mii_auto_ch);
199 LIST_REMOVE(sc, mii_list);
204 nsgphy_service(sc, mii, cmd)
205 struct mii_softc *sc;
206 struct mii_data *mii;
209 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
215 * If we're not polling our PHY instance, just return.
217 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
223 * If the media indicates a different PHY instance,
226 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
227 reg = PHY_READ(sc, MII_BMCR);
228 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
233 * If the interface is not up, don't do anything.
235 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
239 switch (IFM_SUBTYPE(ife->ifm_media)) {
243 * If we're already in auto mode, just return.
245 if (PHY_READ(sc, NSGPHY_MII_BMCR) & NSGPHY_BMCR_AUTOEN)
248 (void) nsgphy_mii_phy_auto(sc, 0);
251 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) {
252 PHY_WRITE(sc, NSGPHY_MII_BMCR,
253 NSGPHY_BMCR_FDX|NSGPHY_BMCR_SPD1);
255 PHY_WRITE(sc, NSGPHY_MII_BMCR,
258 PHY_WRITE(sc, NSGPHY_MII_ANAR, NSGPHY_SEL_TYPE);
261 * When setting the link manually, one side must
262 * be the master and the other the slave. However
263 * ifmedia doesn't give us a good way to specify
264 * this, so we fake it by using one of the LINK
265 * flags. If LINK0 is set, we program the PHY to
266 * be a master, otherwise it's a slave.
268 if ((mii->mii_ifp->if_flags & IFF_LINK0)) {
269 PHY_WRITE(sc, NSGPHY_MII_1000CTL,
270 NSGPHY_1000CTL_MSE|NSGPHY_1000CTL_MSC);
272 PHY_WRITE(sc, NSGPHY_MII_1000CTL,
278 * XXX Not supported as a manual setting right now.
282 PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN);
286 * BMCR data is stored in the ifmedia entry.
288 PHY_WRITE(sc, MII_ANAR,
289 mii_anar(ife->ifm_media));
290 PHY_WRITE(sc, MII_BMCR, ife->ifm_data);
297 * If we're not currently selected, just return.
299 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
303 * Only used for autonegotiation.
305 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
309 * Is the interface even up?
311 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
315 * Only retry autonegotiation every 17 seconds.
316 * Actually, for gigE PHYs, we should wait longer, since
317 * 5 seconds is the mimimum time the documentation
318 * says to wait for a 1000mbps link to be established.
320 if (++sc->mii_ticks != 17)
326 * Check to see if we have link.
328 reg = PHY_READ(sc, NSGPHY_MII_PHYSUP);
329 if (reg & NSGPHY_PHYSUP_LNKSTS)
333 if (nsgphy_mii_phy_auto(sc, 0) == EJUSTRETURN)
338 /* Update the media status. */
341 /* Callback if something changed. */
342 if (sc->mii_active != mii->mii_media_active || cmd == MII_MEDIACHG) {
343 MIIBUS_STATCHG(sc->mii_dev);
344 sc->mii_active = mii->mii_media_active;
351 struct mii_softc *sc;
353 struct mii_data *mii = sc->mii_pdata;
354 int bmsr, bmcr, physup, anlpar, gstat;
356 mii->mii_media_status = IFM_AVALID;
357 mii->mii_media_active = IFM_ETHER;
359 bmsr = PHY_READ(sc, NSGPHY_MII_BMSR);
360 physup = PHY_READ(sc, NSGPHY_MII_PHYSUP);
361 if (physup & NSGPHY_PHYSUP_LNKSTS)
362 mii->mii_media_status |= IFM_ACTIVE;
364 bmcr = PHY_READ(sc, NSGPHY_MII_BMCR);
366 if (bmcr & NSGPHY_BMCR_LOOP)
367 mii->mii_media_active |= IFM_LOOP;
369 if (bmcr & NSGPHY_BMCR_AUTOEN) {
370 if ((bmsr & NSGPHY_BMSR_ACOMP) == 0) {
371 /* Erg, still trying, I guess... */
372 mii->mii_media_active |= IFM_NONE;
375 anlpar = PHY_READ(sc, NSGPHY_MII_ANLPAR);
376 gstat = PHY_READ(sc, NSGPHY_MII_1000STS);
377 if (gstat & NSGPHY_1000STS_LPFD)
378 mii->mii_media_active |= IFM_1000_TX|IFM_FDX;
379 else if (gstat & NSGPHY_1000STS_LPHD)
380 mii->mii_media_active |= IFM_1000_TX|IFM_HDX;
381 else if (anlpar & NSGPHY_ANLPAR_100T4)
382 mii->mii_media_active |= IFM_100_T4;
383 else if (anlpar & NSGPHY_ANLPAR_100FDX)
384 mii->mii_media_active |= IFM_100_TX|IFM_FDX;
385 else if (anlpar & NSGPHY_ANLPAR_100HDX)
386 mii->mii_media_active |= IFM_100_TX;
387 else if (anlpar & NSGPHY_ANLPAR_10FDX)
388 mii->mii_media_active |= IFM_10_T|IFM_FDX;
389 else if (anlpar & NSGPHY_ANLPAR_10HDX)
390 mii->mii_media_active |= IFM_10_T|IFM_HDX;
392 mii->mii_media_active |= IFM_NONE;
396 switch(bmcr & (NSGPHY_BMCR_SPD1|NSGPHY_BMCR_SPD0)) {
398 mii->mii_media_active |= IFM_1000_TX;
401 mii->mii_media_active |= IFM_100_TX;
404 mii->mii_media_active |= IFM_10_T;
410 if (bmcr & NSGPHY_BMCR_FDX)
411 mii->mii_media_active |= IFM_FDX;
413 mii->mii_media_active |= IFM_HDX;
420 nsgphy_mii_phy_auto(mii, waitfor)
421 struct mii_softc *mii;
424 int bmsr, ktcr = 0, i;
426 if ((mii->mii_flags & MIIF_DOINGAUTO) == 0) {
428 PHY_WRITE(mii, NSGPHY_MII_BMCR, 0);
430 ktcr = PHY_READ(mii, NSGPHY_MII_1000CTL);
431 PHY_WRITE(mii, NSGPHY_MII_1000CTL, ktcr |
432 (NSGPHY_1000CTL_AFD|NSGPHY_1000CTL_AHD));
433 ktcr = PHY_READ(mii, NSGPHY_MII_1000CTL);
435 PHY_WRITE(mii, NSGPHY_MII_ANAR,
436 BMSR_MEDIA_TO_ANAR(mii->mii_capabilities) | ANAR_CSMA);
438 PHY_WRITE(mii, NSGPHY_MII_BMCR,
439 NSGPHY_BMCR_AUTOEN | NSGPHY_BMCR_STARTNEG);
443 /* Wait 500ms for it to complete. */
444 for (i = 0; i < 500; i++) {
445 if ((bmsr = PHY_READ(mii, NSGPHY_MII_BMSR)) &
450 if ((bmsr & BMSR_ACOMP) == 0)
451 printf("%s: autonegotiation failed to complete\n",
452 mii->mii_dev.dv_xname);
457 * Don't need to worry about clearing MIIF_DOINGAUTO.
458 * If that's set, a timeout is pending, and it will
465 * Just let it finish asynchronously. This is for the benefit of
466 * the tick handler driving autonegotiation. Don't want 500ms
467 * delays all the time while the system is running!
469 if ((mii->mii_flags & MIIF_DOINGAUTO) == 0) {
470 mii->mii_flags |= MIIF_DOINGAUTO;
471 mii->mii_auto_ch = timeout(mii_phy_auto_timeout, mii, hz >> 1);
473 return (EJUSTRETURN);