2 * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * $FreeBSD: src/sys/i386/include/pci_cfgreg.h,v 1.4.2.1 2001/07/28 05:55:07 imp Exp $
27 * $DragonFly: src/sys/platform/pc32/include/Attic/pci_cfgreg.h,v 1.3 2003/06/28 04:16:03 dillon Exp $
31 #ifndef _MACHINE_PCI_CFGREG_H_
32 #define _MACHINE_PCI_CFGREG_H_
34 #define CONF1_ADDR_PORT 0x0cf8
35 #define CONF1_DATA_PORT 0x0cfc
37 #define CONF1_ENABLE 0x80000000ul
38 #define CONF1_ENABLE_CHK 0x80000000ul
39 #define CONF1_ENABLE_MSK 0x7ff00000ul
40 #define CONF1_ENABLE_CHK1 0xff000001ul
41 #define CONF1_ENABLE_MSK1 0x80000001ul
42 #define CONF1_ENABLE_RES1 0x80000000ul
44 #define CONF2_ENABLE_PORT 0x0cf8
46 #define CONF2_FORWARD_PORT 0x0cf9
48 #define CONF2_FORWARD_PORT 0x0cfa
51 #define CONF2_ENABLE_CHK 0x0e
52 #define CONF2_ENABLE_RES 0x0e
54 extern int pci_cfgregopen(void);
55 extern u_int32_t pci_cfgregread(int bus, int slot, int func, int reg, int bytes);
56 extern void pci_cfgregwrite(int bus, int slot, int func, int reg, u_int32_t data, int bytes);
57 extern int pci_cfgintr(int bus, int device, int pin);