2 * Copyright (c) 1991 The Regents of the University of California.
3 * Copyright (c) 2005,2008 The DragonFly Project.
6 * This code is derived from software contributed to The DragonFly Project
7 * by Matthew Dillon <dillon@backplane.com>
9 * This code is derived from software contributed to Berkeley by
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in
20 * the documentation and/or other materials provided with the
22 * 3. Neither the name of The DragonFly Project nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific, prior written permission.
26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
29 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
30 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
31 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
32 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
33 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
34 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
35 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
36 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * $DragonFly: src/sys/platform/pc64/icu/icu_abi.c,v 1.1 2008/08/29 17:07:16 dillon Exp $
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/kernel.h>
45 #include <sys/machintr.h>
46 #include <sys/interrupt.h>
49 #include <machine/segments.h>
50 #include <machine/md_var.h>
51 #include <machine/intr_machdep.h>
52 #include <machine/globaldata.h>
53 #include <machine/smp.h>
55 #include <sys/thread2.h>
57 #include <machine_base/icu/elcr_var.h>
59 #include <machine_base/icu/icu.h>
60 #include <machine_base/icu/icu_ipl.h>
61 #include <machine_base/apic/ioapic.h>
64 IDTVEC(icu_intr0), IDTVEC(icu_intr1),
65 IDTVEC(icu_intr2), IDTVEC(icu_intr3),
66 IDTVEC(icu_intr4), IDTVEC(icu_intr5),
67 IDTVEC(icu_intr6), IDTVEC(icu_intr7),
68 IDTVEC(icu_intr8), IDTVEC(icu_intr9),
69 IDTVEC(icu_intr10), IDTVEC(icu_intr11),
70 IDTVEC(icu_intr12), IDTVEC(icu_intr13),
71 IDTVEC(icu_intr14), IDTVEC(icu_intr15);
73 static inthand_t *icu_intr[ICU_HWI_VECTORS] = {
74 &IDTVEC(icu_intr0), &IDTVEC(icu_intr1),
75 &IDTVEC(icu_intr2), &IDTVEC(icu_intr3),
76 &IDTVEC(icu_intr4), &IDTVEC(icu_intr5),
77 &IDTVEC(icu_intr6), &IDTVEC(icu_intr7),
78 &IDTVEC(icu_intr8), &IDTVEC(icu_intr9),
79 &IDTVEC(icu_intr10), &IDTVEC(icu_intr11),
80 &IDTVEC(icu_intr12), &IDTVEC(icu_intr13),
81 &IDTVEC(icu_intr14), &IDTVEC(icu_intr15)
84 static struct icu_irqmap {
85 int im_type; /* ICU_IMT_ */
86 enum intr_trigger im_trig;
87 } icu_irqmaps[MAX_HARDINTS]; /* XXX MAX_HARDINTS may not be correct */
89 #define ICU_IMT_UNUSED 0 /* KEEP THIS */
90 #define ICU_IMT_RESERVED 1
91 #define ICU_IMT_LINE 2
92 #define ICU_IMT_SYSCALL 3
94 extern void ICU_INTREN(int);
95 extern void ICU_INTRDIS(int);
97 extern int imcr_present;
99 static int icu_vectorctl(int, int, int);
100 static int icu_setvar(int, const void *);
101 static int icu_getvar(int, void *);
102 static void icu_finalize(void);
103 static void icu_cleanup(void);
104 static void icu_setdefault(void);
105 static void icu_stabilize(void);
106 static void icu_initmap(void);
107 static void icu_intr_config(int, enum intr_trigger, enum intr_polarity);
109 struct machintr_abi MachIntrABI_ICU = {
111 .intrdis = ICU_INTRDIS,
112 .intren = ICU_INTREN,
113 .vectorctl = icu_vectorctl,
114 .setvar = icu_setvar,
115 .getvar = icu_getvar,
116 .finalize = icu_finalize,
117 .cleanup = icu_cleanup,
118 .setdefault = icu_setdefault,
119 .stabilize = icu_stabilize,
120 .initmap = icu_initmap,
121 .intr_config = icu_intr_config
125 * WARNING! SMP builds can use the ICU now so this code must be MP safe.
128 icu_setvar(int varid, const void *buf)
134 icu_getvar(int varid, void *buf)
140 * Called before interrupts are physically enabled
147 for (intr = 0; intr < ICU_HWI_VECTORS; ++intr)
148 machintr_intrdis(intr);
149 machintr_intren(ICU_IRQ_SLAVE);
153 * Called after interrupts physically enabled but before the
154 * critical section is released.
159 bzero(mdcpu->gd_ipending, sizeof(mdcpu->gd_ipending));
163 * Called after stablize and cleanup; critical section is not
164 * held and interrupts are not physically disabled.
169 KKASSERT(MachIntrABI.type == MACHINTR_ICU);
170 KKASSERT(!ioapic_enable);
173 * If an IMCR is present, programming bit 0 disconnects the 8259
174 * from the BSP. The 8259 may still be connected to LINT0 on the
177 * If we are running SMP the LAPIC is active, try to use virtual
178 * wire mode so we can use other interrupt sources within the LAPIC
179 * in addition to the 8259.
188 icu_vectorctl(int op, int intr, int flags)
193 if (intr < 0 || intr >= ICU_HWI_VECTORS || intr == ICU_IRQ_SLAVE)
201 case MACHINTR_VECTOR_SETUP:
202 setidt(IDT_OFFSET + intr, icu_intr[intr], SDT_SYSIGT,
204 machintr_intren(intr);
207 case MACHINTR_VECTOR_TEARDOWN:
208 machintr_intrdis(intr);
209 setidt(IDT_OFFSET + intr, icu_intr[intr], SDT_SYSIGT,
226 for (intr = 0; intr < ICU_HWI_VECTORS; ++intr) {
227 if (intr == ICU_IRQ_SLAVE)
229 setidt(IDT_OFFSET + intr, icu_intr[intr], SDT_SYSIGT,
239 for (i = 0; i < ICU_HWI_VECTORS; ++i)
240 icu_irqmaps[i].im_type = ICU_IMT_LINE;
241 icu_irqmaps[ICU_IRQ_SLAVE].im_type = ICU_IMT_RESERVED;
244 for (i = 0; i < ICU_HWI_VECTORS; ++i)
245 icu_irqmaps[i].im_trig = elcr_read_trigger(i);
248 * NOTE: Trigger mode does not matter at all
250 for (i = 0; i < ICU_HWI_VECTORS; ++i)
251 icu_irqmaps[i].im_trig = INTR_TRIGGER_EDGE;
253 icu_irqmaps[IDT_OFFSET_SYSCALL - IDT_OFFSET].im_type = ICU_IMT_SYSCALL;
257 icu_intr_config(int irq, enum intr_trigger trig,
258 enum intr_polarity pola __unused)
260 struct icu_irqmap *map;
262 KKASSERT(trig == INTR_TRIGGER_EDGE || trig == INTR_TRIGGER_LEVEL);
264 KKASSERT(irq >= 0 && irq < MAX_HARDINTS);
265 map = &icu_irqmaps[irq];
267 KKASSERT(map->im_type == ICU_IMT_LINE);
269 /* TODO: Check whether it is configured or not */
271 if (trig == map->im_trig)
275 kprintf("ICU: irq %d, %s -> %s\n", irq,
276 intr_str_trigger(map->im_trig),
277 intr_str_trigger(trig));
283 kprintf("ICU: no ELCR, skip irq %d config\n", irq);
286 elcr_write_trigger(irq, map->im_trig);