sys/dev/drm/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <linux/dmi.h>
  28 #include <linux/i2c.h>
  29 #include <drm/drmP.h>
  30 #include <drm/drm_atomic_helper.h>
  31 #include <drm/drm_crtc.h>
  32 #include <drm/drm_crtc_helper.h>
  33 #include <drm/drm_edid.h>
  34 #include "intel_drv.h"
  35 #include <drm/i915_drm.h>
  36 #include "i915_drv.h"
  37
  38 /* Here's the desired hotplug mode */
  39 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |                \
  40                            ADPA_CRT_HOTPLUG_WARMUP_10MS |               \
  41                            ADPA_CRT_HOTPLUG_SAMPLE_4S |                 \
  42                            ADPA_CRT_HOTPLUG_VOLTAGE_50 |                \
  43                            ADPA_CRT_HOTPLUG_VOLREF_325MV |              \
  44                            ADPA_CRT_HOTPLUG_ENABLE)
  45
  46 struct intel_crt {
  47         struct intel_encoder base;
  48         /* DPMS state is stored in the connector, which we need in the
  49          * encoder's enable/disable callbacks */
  50         struct intel_connector *connector;
  51         bool force_hotplug_required;
  52         u32 adpa_reg;
  53 };
  54
  55 static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
  56 {
  57         return container_of(encoder, struct intel_crt, base);
  58 }
  59
  60 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
  61 {
  62         return intel_encoder_to_crt(intel_attached_encoder(connector));
  63 }
  64
  65 static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
  66                                    enum i915_pipe *pipe)
  67 {
  68         struct drm_device *dev = encoder->base.dev;
  69         struct drm_i915_private *dev_priv = dev->dev_private;
  70         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  71         enum intel_display_power_domain power_domain;
  72         u32 tmp;
  73
  74         power_domain = intel_display_port_power_domain(encoder);
  75         if (!intel_display_power_is_enabled(dev_priv, power_domain))
  76                 return false;
  77
  78         tmp = I915_READ(crt->adpa_reg);
  79
  80         if (!(tmp & ADPA_DAC_ENABLE))
  81                 return false;
  82
  83         if (HAS_PCH_CPT(dev))
  84                 *pipe = PORT_TO_PIPE_CPT(tmp);
  85         else
  86                 *pipe = PORT_TO_PIPE(tmp);
  87
  88         return true;
  89 }
  90
  91 static unsigned int intel_crt_get_flags(struct intel_encoder *encoder)
  92 {
  93         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  94         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  95         u32 tmp, flags = 0;
  96
  97         tmp = I915_READ(crt->adpa_reg);
  98
  99         if (tmp & ADPA_HSYNC_ACTIVE_HIGH)
 100                 flags |= DRM_MODE_FLAG_PHSYNC;
 101         else
 102                 flags |= DRM_MODE_FLAG_NHSYNC;
 103
 104         if (tmp & ADPA_VSYNC_ACTIVE_HIGH)
 105                 flags |= DRM_MODE_FLAG_PVSYNC;
 106         else
 107                 flags |= DRM_MODE_FLAG_NVSYNC;
 108
 109         return flags;
 110 }
 111
 112 static void intel_crt_get_config(struct intel_encoder *encoder,
 113                                  struct intel_crtc_state *pipe_config)
 114 {
 115         struct drm_device *dev = encoder->base.dev;
 116         int dotclock;
 117
 118         pipe_config->base.adjusted_mode.flags |= intel_crt_get_flags(encoder);
 119
 120         dotclock = pipe_config->port_clock;
 121
 122         if (HAS_PCH_SPLIT(dev))
 123                 ironlake_check_encoder_dotclock(pipe_config, dotclock);
 124
 125         pipe_config->base.adjusted_mode.crtc_clock = dotclock;
 126 }
 127
 128 static void hsw_crt_get_config(struct intel_encoder *encoder,
 129                                struct intel_crtc_state *pipe_config)
 130 {
 131         intel_ddi_get_config(encoder, pipe_config);
 132
 133         pipe_config->base.adjusted_mode.flags &= ~(DRM_MODE_FLAG_PHSYNC |
 134                                               DRM_MODE_FLAG_NHSYNC |
 135                                               DRM_MODE_FLAG_PVSYNC |
 136                                               DRM_MODE_FLAG_NVSYNC);
 137         pipe_config->base.adjusted_mode.flags |= intel_crt_get_flags(encoder);
 138 }
 139
 140 /* Note: The caller is required to filter out dpms modes not supported by the
 141  * platform. */
 142 static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
 143 {
 144         struct drm_device *dev = encoder->base.dev;
 145         struct drm_i915_private *dev_priv = dev->dev_private;
 146         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 147         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
 148         const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
 149         u32 adpa;
 150
 151         if (INTEL_INFO(dev)->gen >= 5)
 152                 adpa = ADPA_HOTPLUG_BITS;
 153         else
 154                 adpa = 0;
 155
 156         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 157                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 158         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 159                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 160
 161         /* For CPT allow 3 pipe config, for others just use A or B */
 162         if (HAS_PCH_LPT(dev))
 163                 ; /* Those bits don't exist here */
 164         else if (HAS_PCH_CPT(dev))
 165                 adpa |= PORT_TRANS_SEL_CPT(crtc->pipe);
 166         else if (crtc->pipe == 0)
 167                 adpa |= ADPA_PIPE_A_SELECT;
 168         else
 169                 adpa |= ADPA_PIPE_B_SELECT;
 170
 171         if (!HAS_PCH_SPLIT(dev))
 172                 I915_WRITE(BCLRPAT(crtc->pipe), 0);
 173
 174         switch (mode) {
 175         case DRM_MODE_DPMS_ON:
 176                 adpa |= ADPA_DAC_ENABLE;
 177                 break;
 178         case DRM_MODE_DPMS_STANDBY:
 179                 adpa |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
 180                 break;
 181         case DRM_MODE_DPMS_SUSPEND:
 182                 adpa |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
 183                 break;
 184         case DRM_MODE_DPMS_OFF:
 185                 adpa |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
 186                 break;
 187         }
 188
 189         I915_WRITE(crt->adpa_reg, adpa);
 190 }
 191
 192 static void intel_disable_crt(struct intel_encoder *encoder)
 193 {
 194         intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
 195 }
 196
 197 static void pch_disable_crt(struct intel_encoder *encoder)
 198 {
 199 }
 200
 201 static void pch_post_disable_crt(struct intel_encoder *encoder)
 202 {
 203         intel_disable_crt(encoder);
 204 }
 205
 206 static void intel_enable_crt(struct intel_encoder *encoder)
 207 {
 208         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 209
 210         intel_crt_set_dpms(encoder, crt->connector->base.dpms);
 211 }
 212
 213 static enum drm_mode_status
 214 intel_crt_mode_valid(struct drm_connector *connector,
 215                      struct drm_display_mode *mode)
 216 {
 217         struct drm_device *dev = connector->dev;
 218
 219         int max_clock = 0;
 220         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 221                 return MODE_NO_DBLESCAN;
 222
 223         if (mode->clock < 25000)
 224                 return MODE_CLOCK_LOW;
 225
 226         if (IS_GEN2(dev))
 227                 max_clock = 350000;
 228         else
 229                 max_clock = 400000;
 230         if (mode->clock > max_clock)
 231                 return MODE_CLOCK_HIGH;
 232
 233         /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
 234         if (HAS_PCH_LPT(dev) &&
 235             (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
 236                 return MODE_CLOCK_HIGH;
 237
 238         return MODE_OK;
 239 }
 240
 241 static bool intel_crt_compute_config(struct intel_encoder *encoder,
 242                                      struct intel_crtc_state *pipe_config)
 243 {
 244         struct drm_device *dev = encoder->base.dev;
 245
 246         if (HAS_PCH_SPLIT(dev))
 247                 pipe_config->has_pch_encoder = true;
 248
 249         /* LPT FDI RX only supports 8bpc. */
 250         if (HAS_PCH_LPT(dev))
 251                 pipe_config->pipe_bpp = 24;
 252
 253         /* FDI must always be 2.7 GHz */
 254         if (HAS_DDI(dev)) {
 255                 pipe_config->ddi_pll_sel = PORT_CLK_SEL_SPLL;
 256                 pipe_config->port_clock = 135000 * 2;
 257
 258                 pipe_config->dpll_hw_state.wrpll = 0;
 259                 pipe_config->dpll_hw_state.spll =
 260                         SPLL_PLL_ENABLE | SPLL_PLL_FREQ_1350MHz | SPLL_PLL_SSC;
 261         }
 262
 263         return true;
 264 }
 265
 266 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 267 {
 268         struct drm_device *dev = connector->dev;
 269         struct intel_crt *crt = intel_attached_crt(connector);
 270         struct drm_i915_private *dev_priv = dev->dev_private;
 271         u32 adpa;
 272         bool ret;
 273
 274         /* The first time through, trigger an explicit detection cycle */
 275         if (crt->force_hotplug_required) {
 276                 bool turn_off_dac = HAS_PCH_SPLIT(dev);
 277                 u32 save_adpa;
 278
 279                 crt->force_hotplug_required = 0;
 280
 281                 save_adpa = adpa = I915_READ(crt->adpa_reg);
 282                 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 283
 284                 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 285                 if (turn_off_dac)
 286                         adpa &= ~ADPA_DAC_ENABLE;
 287
 288                 I915_WRITE(crt->adpa_reg, adpa);
 289
 290                 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 291                              1000))
 292                         DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 293
 294                 if (turn_off_dac) {
 295                         I915_WRITE(crt->adpa_reg, save_adpa);
 296                         POSTING_READ(crt->adpa_reg);
 297                 }
 298         }
 299
 300         /* Check the status to see if both blue and green are on now */
 301         adpa = I915_READ(crt->adpa_reg);
 302         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 303                 ret = true;
 304         else
 305                 ret = false;
 306         DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
 307
 308         return ret;
 309 }
 310
 311 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
 312 {
 313         struct drm_device *dev = connector->dev;
 314         struct intel_crt *crt = intel_attached_crt(connector);
 315         struct drm_i915_private *dev_priv = dev->dev_private;
 316         u32 adpa;
 317         bool ret;
 318         u32 save_adpa;
 319
 320         save_adpa = adpa = I915_READ(crt->adpa_reg);
 321         DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 322
 323         adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 324
 325         I915_WRITE(crt->adpa_reg, adpa);
 326
 327         if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 328                      1000)) {
 329                 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 330                 I915_WRITE(crt->adpa_reg, save_adpa);
 331         }
 332
 333         /* Check the status to see if both blue and green are on now */
 334         adpa = I915_READ(crt->adpa_reg);
 335         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 336                 ret = true;
 337         else
 338                 ret = false;
 339
 340         DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
 341
 342         return ret;
 343 }
 344
 345 /**
 346  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 347  *
 348  * Not for i915G/i915GM
 349  *
 350  * \return true if CRT is connected.
 351  * \return false if CRT is disconnected.
 352  */
 353 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 354 {
 355         struct drm_device *dev = connector->dev;
 356         struct drm_i915_private *dev_priv = dev->dev_private;
 357         u32 stat;
 358         bool ret = false;
 359         int i, tries = 0;
 360
 361         if (HAS_PCH_SPLIT(dev))
 362                 return intel_ironlake_crt_detect_hotplug(connector);
 363
 364         if (IS_VALLEYVIEW(dev))
 365                 return valleyview_crt_detect_hotplug(connector);
 366
 367         /*
 368          * On 4 series desktop, CRT detect sequence need to be done twice
 369          * to get a reliable result.
 370          */
 371
 372         if (IS_G4X(dev) && !IS_GM45(dev))
 373                 tries = 2;
 374         else
 375                 tries = 1;
 376
 377         for (i = 0; i < tries ; i++) {
 378                 /* turn on the FORCE_DETECT */
 379                 i915_hotplug_interrupt_update(dev_priv,
 380                                               CRT_HOTPLUG_FORCE_DETECT,
 381                                               CRT_HOTPLUG_FORCE_DETECT);
 382                 /* wait for FORCE_DETECT to go off */
 383                 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
 384                               CRT_HOTPLUG_FORCE_DETECT) == 0,
 385                              1000))
 386                         DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
 387         }
 388
 389         stat = I915_READ(PORT_HOTPLUG_STAT);
 390         if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
 391                 ret = true;
 392
 393         /* clear the interrupt we just generated, if any */
 394         I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
 395
 396         i915_hotplug_interrupt_update(dev_priv, CRT_HOTPLUG_FORCE_DETECT, 0);
 397
 398         return ret;
 399 }
 400
 401 static struct edid *intel_crt_get_edid(struct drm_connector *connector,
 402                                 struct i2c_adapter *i2c)
 403 {
 404         struct edid *edid;
 405
 406         edid = drm_get_edid(connector, i2c);
 407
 408         if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
 409                 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
 410                 intel_gmbus_force_bit(i2c, true);
 411                 edid = drm_get_edid(connector, i2c);
 412                 intel_gmbus_force_bit(i2c, false);
 413         }
 414
 415         return edid;
 416 }
 417
 418 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
 419 static int intel_crt_ddc_get_modes(struct drm_connector *connector,
 420                                 struct i2c_adapter *adapter)
 421 {
 422         struct edid *edid;
 423         int ret;
 424
 425         edid = intel_crt_get_edid(connector, adapter);
 426         if (!edid)
 427                 return 0;
 428
 429         ret = intel_connector_update_modes(connector, edid);
 430         kfree(edid);
 431
 432         return ret;
 433 }
 434
 435 static bool intel_crt_detect_ddc(struct drm_connector *connector)
 436 {
 437         struct intel_crt *crt = intel_attached_crt(connector);
 438         struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
 439         struct edid *edid;
 440         struct i2c_adapter *i2c;
 441
 442         BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
 443
 444         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
 445         edid = intel_crt_get_edid(connector, i2c);
 446
 447         if (edid) {
 448                 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
 449
 450                 /*
 451                  * This may be a DVI-I connector with a shared DDC
 452                  * link between analog and digital outputs, so we
 453                  * have to check the EDID input spec of the attached device.
 454                  */
 455                 if (!is_digital) {
 456                         DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
 457                         return true;
 458                 }
 459
 460                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
 461         } else {
 462                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
 463         }
 464
 465         kfree(edid);
 466
 467         return false;
 468 }
 469
 470 static enum drm_connector_status
 471 intel_crt_load_detect(struct intel_crt *crt)
 472 {
 473         struct drm_device *dev = crt->base.base.dev;
 474         struct drm_i915_private *dev_priv = dev->dev_private;
 475         uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
 476         uint32_t save_bclrpat;
 477         uint32_t save_vtotal;
 478         uint32_t vtotal, vactive;
 479         uint32_t vsample;
 480         uint32_t vblank, vblank_start, vblank_end;
 481         uint32_t dsl;
 482         uint32_t bclrpat_reg;
 483         uint32_t vtotal_reg;
 484         uint32_t vblank_reg;
 485         uint32_t vsync_reg;
 486         uint32_t pipeconf_reg;
 487         uint32_t pipe_dsl_reg;
 488         uint8_t st00;
 489         enum drm_connector_status status;
 490
 491         DRM_DEBUG_KMS("starting load-detect on CRT\n");
 492
 493         bclrpat_reg = BCLRPAT(pipe);
 494         vtotal_reg = VTOTAL(pipe);
 495         vblank_reg = VBLANK(pipe);
 496         vsync_reg = VSYNC(pipe);
 497         pipeconf_reg = PIPECONF(pipe);
 498         pipe_dsl_reg = PIPEDSL(pipe);
 499
 500         save_bclrpat = I915_READ(bclrpat_reg);
 501         save_vtotal = I915_READ(vtotal_reg);
 502         vblank = I915_READ(vblank_reg);
 503
 504         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 505         vactive = (save_vtotal & 0x7ff) + 1;
 506
 507         vblank_start = (vblank & 0xfff) + 1;
 508         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 509
 510         /* Set the border color to purple. */
 511         I915_WRITE(bclrpat_reg, 0x500050);
 512
 513         if (!IS_GEN2(dev)) {
 514                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 515                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 516                 POSTING_READ(pipeconf_reg);
 517                 /* Wait for next Vblank to substitue
 518                  * border color for Color info */
 519                 intel_wait_for_vblank(dev, pipe);
 520                 st00 = I915_READ8(VGA_MSR_WRITE);
 521                 status = ((st00 & (1 << 4)) != 0) ?
 522                         connector_status_connected :
 523                         connector_status_disconnected;
 524
 525                 I915_WRITE(pipeconf_reg, pipeconf);
 526         } else {
 527                 bool restore_vblank = false;
 528                 int count, detect;
 529
 530                 /*
 531                 * If there isn't any border, add some.
 532                 * Yes, this will flicker
 533                 */
 534                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 535                         uint32_t vsync = I915_READ(vsync_reg);
 536                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 537
 538                         vblank_start = vsync_start;
 539                         I915_WRITE(vblank_reg,
 540                                    (vblank_start - 1) |
 541                                    ((vblank_end - 1) << 16));
 542                         restore_vblank = true;
 543                 }
 544                 /* sample in the vertical border, selecting the larger one */
 545                 if (vblank_start - vactive >= vtotal - vblank_end)
 546                         vsample = (vblank_start + vactive) >> 1;
 547                 else
 548                         vsample = (vtotal + vblank_end) >> 1;
 549
 550                 /*
 551                  * Wait for the border to be displayed
 552                  */
 553                 while (I915_READ(pipe_dsl_reg) >= vactive)
 554                         ;
 555                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 556                         ;
 557                 /*
 558                  * Watch ST00 for an entire scanline
 559                  */
 560                 detect = 0;
 561                 count = 0;
 562                 do {
 563                         count++;
 564                         /* Read the ST00 VGA status register */
 565                         st00 = I915_READ8(VGA_MSR_WRITE);
 566                         if (st00 & (1 << 4))
 567                                 detect++;
 568                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 569
 570                 /* restore vblank if necessary */
 571                 if (restore_vblank)
 572                         I915_WRITE(vblank_reg, vblank);
 573                 /*
 574                  * If more than 3/4 of the scanline detected a monitor,
 575                  * then it is assumed to be present. This works even on i830,
 576                  * where there isn't any way to force the border color across
 577                  * the screen
 578                  */
 579                 status = detect * 4 > count * 3 ?
 580                          connector_status_connected :
 581                          connector_status_disconnected;
 582         }
 583
 584         /* Restore previous settings */
 585         I915_WRITE(bclrpat_reg, save_bclrpat);
 586
 587         return status;
 588 }
 589
 590 static enum drm_connector_status
 591 intel_crt_detect(struct drm_connector *connector, bool force)
 592 {
 593         struct drm_device *dev = connector->dev;
 594         struct drm_i915_private *dev_priv = dev->dev_private;
 595         struct intel_crt *crt = intel_attached_crt(connector);
 596         struct intel_encoder *intel_encoder = &crt->base;
 597         enum intel_display_power_domain power_domain;
 598         enum drm_connector_status status;
 599         struct intel_load_detect_pipe tmp;
 600         struct drm_modeset_acquire_ctx ctx;
 601
 602         DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",
 603                       connector->base.id, connector->name,
 604                       force);
 605
 606         power_domain = intel_display_port_power_domain(intel_encoder);
 607         intel_display_power_get(dev_priv, power_domain);
 608
 609         if (I915_HAS_HOTPLUG(dev)) {
 610                 /* We can not rely on the HPD pin always being correctly wired
 611                  * up, for example many KVM do not pass it through, and so
 612                  * only trust an assertion that the monitor is connected.
 613                  */
 614                 if (intel_crt_detect_hotplug(connector)) {
 615                         DRM_DEBUG_KMS("CRT detected via hotplug\n");
 616                         status = connector_status_connected;
 617                         goto out;
 618                 } else
 619                         DRM_DEBUG_KMS("CRT not detected via hotplug\n");
 620         }
 621
 622         if (intel_crt_detect_ddc(connector)) {
 623                 status = connector_status_connected;
 624                 goto out;
 625         }
 626
 627         /* Load detection is broken on HPD capable machines. Whoever wants a
 628          * broken monitor (without edid) to work behind a broken kvm (that fails
 629          * to have the right resistors for HP detection) needs to fix this up.
 630          * For now just bail out. */
 631         if (I915_HAS_HOTPLUG(dev) && !i915.load_detect_test) {
 632                 status = connector_status_disconnected;
 633                 goto out;
 634         }
 635
 636         if (!force) {
 637                 status = connector->status;
 638                 goto out;
 639         }
 640
 641         drm_modeset_acquire_init(&ctx, 0);
 642
 643         /* for pre-945g platforms use load detect */
 644         if (intel_get_load_detect_pipe(connector, NULL, &tmp, &ctx)) {
 645                 if (intel_crt_detect_ddc(connector))
 646                         status = connector_status_connected;
 647                 else if (INTEL_INFO(dev)->gen < 4)
 648                         status = intel_crt_load_detect(crt);
 649                 else
 650                         status = connector_status_unknown;
 651                 intel_release_load_detect_pipe(connector, &tmp, &ctx);
 652         } else
 653                 status = connector_status_unknown;
 654
 655         drm_modeset_drop_locks(&ctx);
 656         drm_modeset_acquire_fini(&ctx);
 657
 658 out:
 659         intel_display_power_put(dev_priv, power_domain);
 660         return status;
 661 }
 662
 663 static void intel_crt_destroy(struct drm_connector *connector)
 664 {
 665         drm_connector_cleanup(connector);
 666         kfree(connector);
 667 }
 668
 669 static int intel_crt_get_modes(struct drm_connector *connector)
 670 {
 671         struct drm_device *dev = connector->dev;
 672         struct drm_i915_private *dev_priv = dev->dev_private;
 673         struct intel_crt *crt = intel_attached_crt(connector);
 674         struct intel_encoder *intel_encoder = &crt->base;
 675         enum intel_display_power_domain power_domain;
 676         int ret;
 677         struct i2c_adapter *i2c;
 678
 679         power_domain = intel_display_port_power_domain(intel_encoder);
 680         intel_display_power_get(dev_priv, power_domain);
 681
 682         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
 683         ret = intel_crt_ddc_get_modes(connector, i2c);
 684         if (ret || !IS_G4X(dev))
 685                 goto out;
 686
 687         /* Try to probe digital port for output in DVI-I -> VGA mode. */
 688         i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPB);
 689         ret = intel_crt_ddc_get_modes(connector, i2c);
 690
 691 out:
 692         intel_display_power_put(dev_priv, power_domain);
 693
 694         return ret;
 695 }
 696
 697 static int intel_crt_set_property(struct drm_connector *connector,
 698                                   struct drm_property *property,
 699                                   uint64_t value)
 700 {
 701         return 0;
 702 }
 703
 704 static void intel_crt_reset(struct drm_connector *connector)
 705 {
 706         struct drm_device *dev = connector->dev;
 707         struct drm_i915_private *dev_priv = dev->dev_private;
 708         struct intel_crt *crt = intel_attached_crt(connector);
 709
 710         if (INTEL_INFO(dev)->gen >= 5) {
 711                 u32 adpa;
 712
 713                 adpa = I915_READ(crt->adpa_reg);
 714                 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
 715                 adpa |= ADPA_HOTPLUG_BITS;
 716                 I915_WRITE(crt->adpa_reg, adpa);
 717                 POSTING_READ(crt->adpa_reg);
 718
 719                 DRM_DEBUG_KMS("crt adpa set to 0x%x\n", adpa);
 720                 crt->force_hotplug_required = 1;
 721         }
 722
 723 }
 724
 725 /*
 726  * Routines for controlling stuff on the analog port
 727  */
 728
 729 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 730         .reset = intel_crt_reset,
 731         .dpms = drm_atomic_helper_connector_dpms,
 732         .detect = intel_crt_detect,
 733         .fill_modes = drm_helper_probe_single_connector_modes,
 734         .destroy = intel_crt_destroy,
 735         .set_property = intel_crt_set_property,
 736         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 737         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 738         .atomic_get_property = intel_connector_atomic_get_property,
 739 };
 740
 741 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 742         .mode_valid = intel_crt_mode_valid,
 743         .get_modes = intel_crt_get_modes,
 744         .best_encoder = intel_best_encoder,
 745 };
 746
 747 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 748         .destroy = intel_encoder_destroy,
 749 };
 750
 751 static int intel_no_crt_dmi_callback(const struct dmi_system_id *id)
 752 {
 753         DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
 754         return 1;
 755 }
 756
 757 static const struct dmi_system_id intel_no_crt[] = {
 758         {
 759                 .callback = intel_no_crt_dmi_callback,
 760                 .ident = "ACER ZGB",
 761                 .matches = {
 762                         DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
 763                         DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
 764                 },
 765         },
 766         {
 767                 .callback = intel_no_crt_dmi_callback,
 768                 .ident = "DELL XPS 8700",
 769                 .matches = {
 770                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 771                         DMI_MATCH(DMI_PRODUCT_NAME, "XPS 8700"),
 772                 },
 773         },
 774         { }
 775 };
 776
 777 void intel_crt_init(struct drm_device *dev)
 778 {
 779         struct drm_connector *connector;
 780         struct intel_crt *crt;
 781         struct intel_connector *intel_connector;
 782         struct drm_i915_private *dev_priv = dev->dev_private;
 783
 784         /* Skip machines without VGA that falsely report hotplug events */
 785         if (dmi_check_system(intel_no_crt))
 786                 return;
 787
 788         crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
 789         if (!crt)
 790                 return;
 791
 792         intel_connector = intel_connector_alloc();
 793         if (!intel_connector) {
 794                 kfree(crt);
 795                 return;
 796         }
 797
 798         connector = &intel_connector->base;
 799         crt->connector = intel_connector;
 800         drm_connector_init(dev, &intel_connector->base,
 801                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 802
 803         drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
 804                          DRM_MODE_ENCODER_DAC);
 805
 806         intel_connector_attach_encoder(intel_connector, &crt->base);
 807
 808         crt->base.type = INTEL_OUTPUT_ANALOG;
 809         crt->base.cloneable = (1 << INTEL_OUTPUT_DVO) | (1 << INTEL_OUTPUT_HDMI);
 810         if (IS_I830(dev))
 811                 crt->base.crtc_mask = (1 << 0);
 812         else
 813                 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 814
 815         if (IS_GEN2(dev))
 816                 connector->interlace_allowed = 0;
 817         else
 818                 connector->interlace_allowed = 1;
 819         connector->doublescan_allowed = 0;
 820
 821         if (HAS_PCH_SPLIT(dev))
 822                 crt->adpa_reg = PCH_ADPA;
 823         else if (IS_VALLEYVIEW(dev))
 824                 crt->adpa_reg = VLV_ADPA;
 825         else
 826                 crt->adpa_reg = ADPA;
 827
 828         crt->base.compute_config = intel_crt_compute_config;
 829         if (HAS_PCH_SPLIT(dev) && !HAS_DDI(dev)) {
 830                 crt->base.disable = pch_disable_crt;
 831                 crt->base.post_disable = pch_post_disable_crt;
 832         } else {
 833                 crt->base.disable = intel_disable_crt;
 834         }
 835         crt->base.enable = intel_enable_crt;
 836         if (I915_HAS_HOTPLUG(dev))
 837                 crt->base.hpd_pin = HPD_CRT;
 838         if (HAS_DDI(dev)) {
 839                 crt->base.get_config = hsw_crt_get_config;
 840                 crt->base.get_hw_state = intel_ddi_get_hw_state;
 841         } else {
 842                 crt->base.get_config = intel_crt_get_config;
 843                 crt->base.get_hw_state = intel_crt_get_hw_state;
 844         }
 845         intel_connector->get_hw_state = intel_connector_get_hw_state;
 846         intel_connector->unregister = intel_connector_unregister;
 847
 848         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 849
 850         drm_connector_register(connector);
 851
 852         if (!I915_HAS_HOTPLUG(dev))
 853                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
 854
 855         /*
 856          * Configure the automatic hotplug detection stuff
 857          */
 858         crt->force_hotplug_required = 0;
 859
 860         /*
 861          * TODO: find a proper way to discover whether we need to set the the
 862          * polarity and link reversal bits or not, instead of relying on the
 863          * BIOS.
 864          */
 865         if (HAS_PCH_LPT(dev)) {
 866                 u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
 867                                  FDI_RX_LINK_REVERSAL_OVERRIDE;
 868
 869                 dev_priv->fdi_rx_config = I915_READ(FDI_RX_CTL(PIPE_A)) & fdi_config;
 870         }
 871
 872         intel_crt_reset(connector);
 873 }