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32 .\" $FreeBSD: src/share/man/man4/ixgbe.4,v 1.2 2008/06/17 21:14:02 brueffer Exp $
39 .Nd "Intel(R) 10Gb Ethernet driver"
41 To compile this driver into the kernel,
42 place the following line in your
43 kernel configuration file:
44 .Bd -ragged -offset indent
48 Alternatively, to load the driver as a
49 module at boot time, place the following line in
51 .Bd -literal -offset indent
57 driver provides support for PCI Express 10Gb Ethernet adapters based on
63 Ethernet controller chips.
68 .Bl -item -offset indent -compact
70 Transmit/Receive checksum offload for IP/UDP/TCP.
75 TCP segmentation offload (TSO)
77 Receive side scaling (RSS)
79 Multiple tranmission queues
83 VLAN tag stripping and inserting
92 driver will try enabling as many reception queues and transmission queues
93 as are allowed by the number of CPUs in the system.
95 If multiple transmission queues are used,
96 the round-robin arbitration is performed among the transmission queues.
97 And if both TSO and multiple tranmission queues are used,
98 the round-robin arbitration between transmission queues is done at the
99 TCP segment boundary after the hardware segmentation is performed.
101 82598 supports 16 reception queues and 32 transmission queues.
102 MSI-X is not enabled due to hardware errata.
103 Under MSI or legacy interrupt mode,
104 2 reception queues are enabled for hardware RSS hash
105 and only 1 transmission queue is enable.
107 82599 and X540 supports 16 reception queues and 64 transmission queues.
108 MSI-X is enable by default.
110 due to the number of MSI-X vectors is 64,
111 at most 16 reception queues and 32 transmission queues will be enabled
116 driver supports the following media types:
117 .Bl -tag -width ".Cm autoselect"
119 Enables auto-negotiation for speed and duplex.
124 driver supports the following media options:
125 .Bl -tag -width ".Cm forcepause"
127 Enable flow control PAUSE reception.
129 Enable flow control PAUSE transmission.
131 Force flow control PAUSE operation as configured by
138 For more information on configuring this device, see
147 driver supports Gigabit Ethernet adapters based on the Intel
156 Intel 82599EB 10 Gigabit Ethernet Controller
158 Intel 82598EB 10 Gigabit Ethernet Controller
160 Intel Ethernet Converged Network Adapter X520-SR1
162 Intel Ethernet Converged Network Adapter X520-SR2
164 Intel Ethernet Converged Network Adapter X520-DA2
166 Intel Ethernet Converged Network Adapter X520-LR1
168 Intel 82599ES 10 Gigabit Ethernet Controller
170 Intel 10 Gigabit AF DA Dual Port Server Adapter
172 Intel 10 Gigabit AT Server Adapter
174 Intel 10 Gigabit AT2 Server Adapter
176 Intel 10 Gigabit CX4 Dual Port Server Adapter
178 Intel 10 Gigabit XF LR Server Adapter
180 Intel 10 Gigabit XF SR Dual Port Server Adapter
182 Intel 10 Gigabit XF SR Server Adapter
184 Intel Ethernet Converged Network Adapter X540-T1
186 Intel Ethernet Converged Network Adapter X540-T2
188 Intel Ethernet Controller X540-AT2
190 Intel 82599EN 10 Gigabit Ethernet Controller
192 Intel Ethernet Converged Network Adapter X520-DA1
194 Intel Ethernet Converged Network Adapter X520-DA4
196 Intel Ethernet Converged Network Adapter X520-QDA1
198 Intel Ethernet Converged Network Adapter X520-T2
200 Intel Ethernet Controller X710-AM2
202 Intel Ethernet Converged Network Adapter X710-DA2
204 Intel Ethernet Converged Network Adapter X710-DA4
207 Tunables can be set at the
209 prompt before booting the kernel or stored in
212 is the device unit number.
213 .Bl -tag -width ".Va hw.ixY.unsupported_sfp"
214 .It Va hw.ix.rxd Va hw.ixY.rxd
215 Number of receive descriptors allocated by the driver.
216 The default value is 2048.
218 and the maximum is 4096.
219 .It Va hw.ix.txd Va hw.ixY.txd
220 Number of transmit descriptors allocated by the driver.
221 The default value is 2048.
223 and the maximum is 4096.
224 .It Va hw.ix.rxr Va hw.ixY.rxr
225 This tunable specifies the number of reception queues could be enabled.
226 Maximum allowed value for these tunables is device specific
227 and it must be power of 2 aligned.
228 Setting these tunables to 0 allows the driver to make
229 as many reception queues ready-for-use as allowed by the number of CPUs.
230 .It Va hw.ix.txr Va hw.ixY.txr
231 This tunable specifies the number of transmission queues could be enabled.
232 Maximum allowed value for these tunables is device specific
233 and it must be power of 2 aligned.
234 Setting these tunables to 0 allows the driver to make
235 as many transmission queues ready-for-use as allowed by the number of CPUs.
236 .It Va hw.ix.msix.enable Va hw.ixY.msix.enable
238 the driver will use MSI-X if it is supported.
239 This behaviour can be turned off by setting this tunable to 0.
240 .It Va hw.ix.msix.agg_rxtx Va hw.ixY.msix.agg_rxtx
242 the driver aggregates transmission queue and reception queue processing
244 This behaviour could be turned off by setting this tunable to 0.
245 If the number of MSI-X vectors is not enough to
246 put transmission queue processing and reception queue processing
247 onto independent MSI-X vector,
248 then transmission queue and reception queue processing are always
250 .It Va hw.ixY.msix.off
252 and transmission queue and reception queue processing are aggregated,
253 this tunable specifies the leading target CPU for
254 transmission and reception queues processing.
255 The value specificed must be aligned to the maximum of
256 the number of reception queues
257 and the number of transmission queues enabled,
258 and must be less than the power of 2 number of CPUs.
259 .It Va hw.ixY.msix.rxoff
261 and transmission queue and reception queue processing are not aggregated,
262 this tunable specifies the leading target CPU for reception queues processing.
263 The value specificed must be aligned to the number of reception queues enabled
264 and must be less than the power of 2 number of CPUs.
265 .It Va hw.ixY.msix.txoff
267 and transmission queue and reception queue processing are not aggregated,
268 this tunable specifies the leading target CPU
269 for transmission queues processing.
270 The value specificed must be aligned to
271 the number of transmission queues enabled
272 and must be less than the power of 2 number of CPUs.
273 .It Va hw.ix.msi.enable Va hw.ixY.msi.enable
274 If MSI-X is disabled and MSI is supported,
275 the driver will use MSI.
276 This behavior can be turned off by setting this tunable to 0.
277 .It Va hw.ixY.msi.cpu
279 it specifies the MSI's target CPU.
280 .It Va hw.ixY.npoll.txoff
281 This tunable specifies the leading target CPU for
285 The value specificed must be aligned to the number of transmission queues
286 enabled and must be less than the power of 2 number of CPUs.
287 .It Va hw.ixY.npoll.rxoff
288 This tunable specifies the leading target CPU for
292 The value specificed must be aligned to the number of reception queues
293 enabled and must be less than the power of 2 number of CPUs.
294 .It Va hw.ix.unsupported_sfp
296 this driver does not allow "unsupported" SFP modules.
297 This behavior can be changed by setting this tunable to 1.
298 .It Va hw.ix.flow_ctrl Va hw.ixY.flow_ctrl
299 The default flow control settings.
300 Supported values are:
301 rxpause (only enable PAUSE reception),
302 txpause (only enable PAUSE transmission),
303 full (enable PAUSE reception and transmission),
304 none (disable flow control PAUSE operation),
305 force-rxpause (force PAUSE reception),
306 force-txpause (force PAUSE transmission),
307 force-full (forcefully enable PAUSE reception and transmission),
308 force-none (forcefully disable flow control PAUSE operation).
312 A number of per-interface variables are implemented in the
317 .Bl -tag -width "rxtx_intr_rate"
319 Number of reception queues could be enabled (read-only).
326 Number of reception queues being used (read-only).
328 Number of transmission queues could be enabled (read-only).
335 Number of transmission queues being used (read-only).
337 Number of descriptors per reception queue (read-only).
344 Number of descriptors per transmission queue (read-only).
350 .It Va rxtx_intr_rate
351 If MSI or legacy interrupt is used,
352 this sysctl controls the highest possible frequency
353 that interrupt could be generated by the device.
355 this sysctl controls the highest possible frequency
356 that interrupt could be generated by the MSI-X vectors,
357 which aggregate transmission queue and reception queue procecssing.
358 It is 8000 by default (125us).
361 this sysctl controls the highest possible frequency
362 that interrupt could be generated by the MSI-X vectors,
363 which only process reception queue.
364 It is 8000 by default (125us).
367 this sysctl controls the highest possible frequency
368 that interrupt could be generated by the MSI-X vectors,
369 which only process transmission queue.
370 It is 6000 by default (~150us).
373 this sysctl controls the highest possible frequency
374 that interrupt could be generated by the MSI-X vectors,
375 which only process chip status changes.
376 It is 8000 by default (125us).
378 Transmission interrupt is asked to be generated upon every
380 transmission descritors having been setup.
381 The default value is 1/16 of the number of transmission descriptors per queue.
383 The number of transmission descriptors should be setup
384 before the hardware register is written.
385 Setting this value too high will have negative effect
386 on transmission timeliness.
387 Setting this value too low will hurt overall transmission performance
388 due to the frequent hardware register writing.
389 The default value is 8.
391 The number of reception descriptors should be setup
392 before the hardware register is written.
393 Setting this value too high will make device drop incoming packets.
394 Setting this value too low will hurt overall reception performance
395 due to the frequent hardware register writing.
396 The default value is 32.
399 .Va hw.ixY.npoll.rxoff .
400 The set value will take effect the next time
402 is enabled on the device.
405 .Va hw.ixY.npoll.txoff .
406 The set value will take effect the next time
408 is enabled on the device.
422 device driver first appeared in
427 driver was written by
428 .An Intel Corporation Aq Mt freebsdnic@mailbox.intel.com .